Semiconductor element and semiconductor device

Abstract

A semiconductor element according to the present invention is provided with: an element body having a principal surface oriented in one direction in a thickness direction z; a wiring layer that is formed on the principal surface and that is made electrically conductive with the element body; an insulating layer that covers the principal surface and the wiring layer and that has a first opening from which the wiring layer is exposed; a surface protective film that covers the insulating layer and that has a second opening from which the wiring layer is exposed; and a metal layer that is in contact with the wiring layer via the first opening and the second opening and that overlaps the surface protective film when viewed in the thickness direction z. When viewed in the thickness direction z, an outer periphery of the metal layer is a curve.

Description

Semiconductor element and semiconductor device

[0001] The present disclosure relates to semiconductor elements and semiconductor devices.

[0002] Semiconductor elements configured with switching circuits such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) or IGBTs (Insulated Gate Bipolar Transistors) are used for current control in various industrial devices, automobiles, etc. For example, Patent Document 1 discloses an example of such a semiconductor element.

[0003] The semiconductor element includes a semiconductor substrate, a semiconductor layer, an interlayer insulating film, a wiring layer, a passivation film, an electrode, and a surface protective film. The semiconductor substrate has a semiconductor layer, an interlayer insulating film, a wiring layer, and a passivation film stacked thereon, and an electrode electrically connected to the wiring layer is disposed in a recess in the passivation film. The surface protective film covers the passivation film and has an opening for exposing the electrode. The wiring layer and the electrode contain Al. Bonding a bonding wire containing Cu to the semiconductor element may cause cracks in the semiconductor layer or corrosion at the interface between the electrode and the bonding wire, resulting in poor bonding of the bonding wire. To solve these problems, a semiconductor element has been developed in which, instead of an electrode, a metal layer (e.g., including a Ni layer) is formed in contact with the wiring layer and partially overlapping the surface of the surface protective film, and this metal layer serves as a pad for bonding the bonding wire.

[0004] Japanese Patent Application Laid-Open No. 2020-77680

[0005] In the semiconductor element, the metal layer and the surface protection film have different thermal expansion coefficients due to the difference in materials, which causes thermal stress to be applied to the surface protection film. Therefore, if the temperature of the semiconductor element changes repeatedly due to the external environment and self-heating during use, cracks may occur in the surface protection film.

[0006] An object of the present disclosure is to provide an improved semiconductor device. In particular, in view of the above circumstances, an object of the present disclosure is to provide a semiconductor element that can suppress the occurrence of cracks in a surface protection film, and a semiconductor device equipped with the semiconductor element.

[0007] A semiconductor device according to one aspect of the present disclosure includes an element body having an element main surface facing one side in a thickness direction, a wiring layer formed on the element main surface and conducting to the element body, an insulating layer covering the element main surface and the wiring layer and having a first opening through which the wiring layer is exposed, a surface protective film covering the insulating layer and having a second opening through which the wiring layer is exposed, and a metal layer in contact with the wiring layer through the first opening and the second opening and overlapping the surface protective film as viewed in the thickness direction, wherein an outer edge of the metal layer as viewed in the thickness direction is curved.

[0008] A semiconductor device provided by another aspect of the present disclosure includes a semiconductor element provided by the first aspect, a conductive support member that supports the semiconductor element and is electrically connected to the semiconductor element, a connecting member that is joined to the metal layer of the semiconductor element and the conductive support member, and a sealing resin that covers the semiconductor element, the connecting member, and a portion of the conductive support member.

[0009] According to the above configuration, it is possible to prevent cracks from occurring in the surface protection film of the semiconductor element.

[0010] FIG. 1 is a perspective view showing a semiconductor device according to a first embodiment of the present disclosure. FIG. 2 is a plan view showing the semiconductor device of FIG. 1, seen through the sealing resin. FIG. 3 is a bottom view showing the semiconductor device of FIG. 1. FIG. 4 is a front view showing the semiconductor device of FIG. 1. FIG. 5 is a right side view showing the semiconductor device of FIG. 1. FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. 2. FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. 2. FIG. 8 is a plan view showing a semiconductor element according to a first embodiment. FIG. 9 is a partial enlarged view of a portion of FIG. 8, showing the periphery of one metal layer. FIG. 10 is a cross-sectional view taken along line X-X in FIG. 9. FIG. 11 is a partial enlarged plan view showing a semiconductor element according to a second embodiment of the present disclosure. FIG. 12 is a partial enlarged plan view showing a semiconductor element according to a third embodiment of the present disclosure. FIG. 13 is a partial enlarged plan view showing a semiconductor element according to a fourth embodiment of the present disclosure. FIG. 14 is a partial enlarged plan view showing a semiconductor element according to a fifth embodiment of the present disclosure. Fig. 15 is a cross-sectional view taken along line XV-XV in Fig. 14. Fig. 16 is a partially enlarged plan view showing a semiconductor element according to a sixth embodiment of the present disclosure.

[0011] Preferred embodiments of the semiconductor element and semiconductor device of the present disclosure will be described below with reference to the drawings. Hereinafter, identical or similar components will be designated by the same reference numerals, and redundant description will be omitted. Terms such as "first," "second," and "third" in this disclosure are used merely as labels and are not necessarily intended to assign any order to their objects.

[0012] In this disclosure, unless otherwise specified, "a certain object A is formed on a certain object B" and "a certain object A is formed on (an) object B" include "a certain object A is formed directly on a certain object B" and "a certain object A is formed on a certain object B with another object interposed between the certain object A and the certain object B." Similarly, "a certain object A is disposed on a certain object B" and "a certain object A is disposed on (an) object B" include "a certain object A is disposed directly on a certain object B" and "a certain object A is disposed on (an) object B with another object interposed between the certain object A and the certain object B" unless otherwise specified. Similarly, "a certain object A is located on (an) object B" includes "a certain object A is in contact with a certain object B and is located on (an) object B" and "a certain object A is located on (an) object B with another object interposed between the certain object A and the certain object B." Furthermore, unless otherwise specified, "when viewed from a certain direction, an object A overlaps an object B" includes "an object A overlaps the entire object B" and "an object A overlaps a part of an object B." Furthermore, "an object A (a constituent material of which) contains a certain material C" includes "an object A (a constituent material of which) is made of a certain material C" and "an object A (a constituent material of which) mainly consists of a certain material C."

[0013] 1 to 10 show a semiconductor element A1 according to a first embodiment and a semiconductor device B1 including the semiconductor element A1. In FIG. 2, for ease of understanding, the outline of the sealing resin 7 is shown by an imaginary line (two-dot chain line) through the sealing resin 7. As shown in these figures, the semiconductor device B1 includes, in addition to the semiconductor element A1, a first lead 51, a plurality of second leads 52, a plurality of connecting members 6, and the sealing resin 7. The semiconductor device B1 is a modularized version of the semiconductor element A1. The shape and size of the semiconductor device B1 are not limited in any way.

[0014] For convenience of explanation, the thickness direction of the semiconductor device B1 will be referred to as the "thickness direction z." In the following explanation, one side of the thickness direction z will be referred to as the upper side, and the other side will be referred to as the lower side. Note that terms such as "upper," "lower," "upper," "lower," "top surface," and "bottom surface" indicate the relative positional relationship of each component in the thickness direction z, and do not necessarily define the relationship with the direction of gravity. Furthermore, "plan view" refers to the view in the thickness direction z. The direction perpendicular to the thickness direction z will be referred to as the "first direction x." The first direction x is the left-right direction in the plan view of the semiconductor device B1 (see FIG. 2). The direction perpendicular to the thickness direction z and the first direction x will be referred to as the "second direction y." The second direction y is the up-down direction in the plan view of the semiconductor device B1 (see FIG. 2).

[0015] The semiconductor element A1 is an element that performs the electrical function of the semiconductor device B1. In this embodiment, the semiconductor element A1 is, for example, a BiCDMOS (Bipolar CMOS DMOS) element, which is a semiconductor composite element in which a bipolar element, a CMOS (Complementary MOS) transistor, and a DMOS (Double diffusion MOS) transistor are formed on a common semiconductor substrate. However, the semiconductor element A1 is not limited to this.

[0016] 2, 6, and 7, the semiconductor element A1 is mounted on a first lead 51. The semiconductor element A1 includes an element body 10, an insulating layer 13, a wiring layer 14, a back electrode 24, a plurality of metal layers 25, and a surface protective film 26.

[0017] As shown in Figures 2 and 8, the element body 10 has a rectangular shape in a plan view. As shown in Figures 6 and 7, the element body 10 has a main surface 10a and a back surface 10b. The main surface 10a faces one side in the thickness direction z. The back surface 10b faces the opposite side to the main surface 10a. As shown in Figure 10, the element body 10 includes a semiconductor substrate 11 and a semiconductor layer 12.

[0018] The semiconductor substrate 11 supports the semiconductor layer 12. The semiconductor substrate 11 is an n+ type semiconductor layer. The semiconductor substrate 11 includes Si (silicon) or SiC (silicon carbide). The semiconductor layer 12 is stacked on the semiconductor substrate 11. The semiconductor layer 12 is electrically connected to the semiconductor substrate 11. The surface of the semiconductor substrate 11 facing the opposite side to the surface on which the semiconductor layer 12 is stacked (the lower surface in FIG. 10 ) is the back surface 10b of the element body 10. The surface of the semiconductor layer 12 facing the opposite side to the side on which the semiconductor substrate 11 is located in the thickness direction z (the upper surface in FIG. 10 ) is the main surface 10a of the element body 10.

[0019] The wiring layer 14 is formed on the main surface 10a and is electrically connected to the semiconductor layer 12 of the element body 10. The wiring layer 14 is made of, for example, an alloy (AlCu) of Al (aluminum) and Cu (copper). The material of the wiring layer 14 is not limited, and may be other materials containing Al, such as Al or AlSi, or other materials containing Cu. The wiring layer 14 is formed by, for example, sputtering. The method of forming the wiring layer 14 is not limited. The shape of the wiring layer 14 in a plan view is not limited, and may be designed appropriately depending on the positions of each circuit in the semiconductor layer 12 and the position of the metal layer 25, etc.

[0020] The insulating layer 13 is formed on the main surface 10a and covers the main surface 10a and the wiring layer 14. The insulating layer 13 has electrical insulation properties and is composed of, for example, a silicon oxide film (SiO2) and a silicon nitride film (Si3N4) laminated on the silicon oxide film. The insulating layer 13 is formed, for example, by plasma CVD (chemical vapor deposition). Note that the configuration, material, and formation method of the insulating layer 13 are not limited. The insulating layer 13 has multiple openings 13a penetrating in the thickness direction z. The wiring layer 14 is exposed through the openings 13a. As shown in FIG. 9 , in this embodiment, the openings 13a are circular when viewed in the thickness direction z.

[0021] 10, for simplification, only the uppermost wiring layer 14 is shown, but multiple wiring layers 14 may be stacked. In this case, an interlayer insulating layer is interposed between each wiring layer 14, and each wiring layer 14 is electrically connected through vias provided in the interlayer insulating layer.

[0022] The surface protective film 26 is formed on the main surface 10a and covers the insulating layer 13. In this embodiment, the surface protective film 26 covers the inner edges of the openings 13a in the insulating layer 13 and is in contact with the wiring layer 14. The surface protective film 26 has electrical insulation properties and includes, for example, polyimide resin. Note that the material of the surface protective film 26 is not limited and other insulating materials may be used. The surface protective film 26 has multiple openings 26a penetrating in the thickness direction z. The wiring layer 14 is exposed through the openings 26a. As shown in FIG. 9 , in this embodiment, the openings 26a are circular when viewed in the thickness direction z. In this embodiment, the openings 26a are enclosed within the openings 13a when viewed in the thickness direction z. The surface protective film 26 is formed, for example, by applying photolithography to a photosensitive resin material applied by a spin coater. Note that the method for forming the surface protective film 26 is not limited.

[0023] Each of the multiple metal layers 25 is formed on the wiring layer 14 and is in contact with the wiring layer 14 through the openings 13a and 26a. Each metal layer 25 is electrically connected to the internal circuit of the semiconductor layer 12 via the wiring layer 14. When viewed in the thickness direction z, each metal layer 25 overlaps a portion of the surface protective film 26. As shown in FIG. 2 , the multiple metal layers 25 function as pads to which the connection members 6 are bonded. Each metal layer 25 is provided to prevent cracks in the element body 10, corrosion at the boundary between the wiring layer 14 and the bonding wire, and poor bonding of the bonding wire, which may occur when a bonding wire is directly bonded to the wiring layer 14.

[0024] 10 , each metal layer 25 is composed of multiple metal layers stacked upward from the wiring layer 14, and includes a first layer 251, a second layer 252, a third layer 253, and a base layer 254. The base layer 254 is in contact with the wiring layer 14 and serves as a conductive path for forming the first layer 251, the second layer 252, and the third layer 253 by electrolytic plating. The base layer 254 includes a Ti layer in contact with the wiring layer 14 and a Cu layer in contact with the Ti layer. The base layer 254 is formed by sputtering. The material and formation method of the base layer 254 are not limited.

[0025] The first layer 251 is in contact with the base layer 254 and contains Ni. The second layer 252 is in contact with the first layer 251 and contains Pd. The third layer 253 is in contact with the second layer 252 and contains Au. The first layer 251, the second layer 252, and the third layer 253 are formed by electrolytic plating. The configuration, material, and formation method of the metal layer 25 are not limited in any way. For example, the metal layer 25 does not need to include the third layer 253.

[0026] 9 , in this embodiment, each metal layer 25 has a circular shape when viewed in the thickness direction z. In this embodiment, the openings 13 a and 26 a are contained within the metal layer 25 when viewed in the thickness direction z. That is, when viewed in the thickness direction z, the inner edges of the openings 13 a and 26 a are located inside the outer edges 25 a of the metal layer 25. Note that the inner edge of the opening 13 a may be located outside the outer edges 25 a of the metal layer 25.

[0027] As shown in FIGS. 6 , 7 , and 10 , the back electrode 24 is provided on the back surface 10b of the element body 10. The back electrode 24 is provided over the entire back surface 10b. The back electrode 24 is electrically connected to the semiconductor layer 12 via the semiconductor substrate 11. The material and configuration of the back electrode 24 are not limited, but may include, for example, a layer containing silver (Ag) in contact with the semiconductor substrate 11 and a layer containing gold (Au) laminated on the Ag layer. As shown in FIGS. 6 and 7 , the back electrode 24 is bonded to the first lead 51 via a conductive bonding material 29. The material of the conductive bonding material 29 is not limited, but may be, for example, solder, silver paste, or sintered silver.

[0028] The first lead 51 and the multiple second leads 52 (hereinafter collectively referred to as the "conductive support member 5") support the semiconductor element A1 and serve as terminals for mounting the semiconductor device B1 on a wiring board. The conductive support member 5 is formed, for example, by etching or stamping a metal plate. The conductive support member 5 is made of a metal selected from Cu, Ni, iron (Fe), etc., or an alloy thereof. The conductive support member 5 may have a plating layer made of a metal selected from Ag, Ni, Pd, Au, etc., formed in appropriate locations. The thickness of the conductive support member 5 is not limited and is, for example, 0.12 mm or more and 0.2 mm or less.

[0029] The first lead 51 supports the semiconductor element A1. The first lead 51 is electrically connected to the back electrode 24 of the semiconductor element A1 via the conductive bonding material 29. As shown in FIGS. 2, 6, and 7, the first lead 51 has a die pad portion 511 and two extension portions 512.

[0030] The die pad portion 511 is a portion that supports the semiconductor element A1. The shape of the die pad portion 511 is not limited in any way, and in the example shown in FIG. 2, it is rectangular in plan view. As shown in FIGS. 6 and 7, the die pad portion 511 has a die pad main surface 511a and a die pad back surface 511b. The die pad main surface 511a faces one side in the thickness direction z. The die pad back surface 511b faces the opposite side from the die pad main surface 511a in the thickness direction z. In the example shown, the die pad main surface 511a and the die pad back surface 511b are flat. The semiconductor element A1 is bonded to the die pad main surface 511a. As shown in FIGS. 3, 6, and 7, the die pad back surface 511b is exposed from the sealing resin 7 (a resin back surface 72 described below).

[0031] 2 and 6, the two extension portions 512 extend from the die pad portion 511 to both sides in the first direction x. In the example shown in Fig. 6, the extension portion 512 has a portion extending from the die pad portion 511 in the first direction x, a portion extending at an angle relative to the portion extending in the thickness direction z toward the side toward which the die pad main surface 511a faces, and a portion extending from the portion extending in the first direction x, and has a curved shape as a whole.

[0032] As shown in FIG. 2 , each of the multiple second leads 52 is spaced apart from the first lead 51. The multiple second leads 52 are arranged around the first lead 51, and in the illustrated example, some are arranged on one side of the first lead 51 in the second direction y and some are arranged on the other side of the second direction y. The multiple second leads 52 are spaced apart from each other in the first direction x on each of the one side of the second direction y and the other side of the second direction y. As shown in FIGS. 2 and 6 , each of the multiple second leads 52 has a pad portion 521 and a terminal portion 522.

[0033] The pad portion 521 is connected to one of the plurality of connection members 6. In the example shown in Fig. 7, the pad portion 521 is located closer to the die pad main surface 511a than the die pad portion 511 in the thickness direction z.

[0034] The terminal portion 522 extends outward in the second direction y from the pad portion 521. The terminal portion 522 has a strip shape in a plan view. As shown in Fig. 7 , the terminal portion 522 is bent in a gull-wing shape when viewed in the first direction x. As shown in Fig. 7 , the tip portion of the terminal portion 522 (the end portion farther from the die pad portion 511 in the second direction y) is located at approximately the same position as the die pad portion 511 in the thickness direction z.

[0035] The terminal portions 522 of the second leads 52 are used as external terminals of the semiconductor device B1, such as an input terminal for a control signal, a ground terminal, an output terminal connected to a load, a power supply terminal, a non-connect terminal, and a self-diagnosis output terminal.

[0036] Each of the plurality of connection members 6 provides electrical continuity between mutually spaced apart portions. The connection members 6 are, for example, but not limited to, bonding wires. The connection members 6 include, for example, Cu. The material of the connection members 6 is not limited, and may include, for example, Al or Au.

[0037] Each of the plurality of connection members 6 is bonded to one of the plurality of metal layers 25 (pads) of the semiconductor element A1 and one of the pad portions 521 of the plurality of second leads 52. Each of the plurality of connection members 6 electrically connects the internal circuit of the semiconductor element A1 to each of the second leads 52.

[0038] The sealing resin 7 covers the first lead 51 and a portion of each of the second leads 52, the semiconductor element A1, and the connecting members 6. The sealing resin 7 is made of an insulating resin, and may include, for example, an epoxy resin mixed with a filler. The sealing resin 7 has a resin main surface 71, a resin back surface 72, two resin side surfaces 73, and two resin side surfaces 74.

[0039] The resin main surface 71 faces the same side as the die pad main surface 511a in the thickness direction z. The resin main surface 71 is, for example, a flat surface. The resin back surface 72 faces the opposite side to the resin main surface 71 in the thickness direction z (the same side as the die pad back surface 511b). The resin back surface 72 is, for example, a flat surface. The die pad back surface 511b is exposed from the resin back surface 72.

[0040] The two resin side surfaces 73 are located between the resin main surface 71 and the resin back surface 72 in the thickness direction z, and are spaced apart in the first direction x as shown in FIGS. 2 to 4. The extension portions 512 are exposed from each of the two resin side surfaces 73. The two resin side surfaces 74 are located between the resin main surface 71 and the resin back surface 72 in the thickness direction z, and are spaced apart in the second direction y as shown in FIGS. 2, 3, and 5. A plurality of second leads 52 protrude from either of the two resin side surfaces 74.

[0041] The functions and effects of the semiconductor element A1 and the semiconductor device B1 are as follows.

[0042] The semiconductor element A1 includes a surface protective film 26 and a metal layer 25 formed on the main surface 10a. The metal layer 25 overlaps a portion of the surface protective film 26 when viewed in the thickness direction z. Thermal stress is applied to the surface protective film 26 due to the difference in thermal expansion coefficients between the metal layer 25 and the surface protective film 26, which is caused by the difference in materials. Because the metal layer of a conventional semiconductor element has a rectangular shape when viewed in the thickness direction z, thermal stress tends to concentrate at positions of the surface protective film 26 that overlap the corners of the metal layer when viewed in the thickness direction z, resulting in cracks. However, in the semiconductor element A1, the metal layer 25 has a circular shape when viewed in the thickness direction z, so the thermal stress is dispersed and does not concentrate in a single area. As a result, the semiconductor element A1 can suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z.

[0043] Furthermore, in the semiconductor element A1, the opening 26a of the surface protective film 26 is contained within the opening 13a of the insulating layer 13 as viewed in the thickness direction z. Conversely, if the opening 13a were contained within the opening 26a, cracks would likely occur in the insulating layer 13 at a position overlapping the opening 26a of the surface protective film 26 as viewed in the thickness direction z due to thermal stress caused by the difference in thermal expansion coefficients between the surface protective film 26 and the insulating layer 13. However, in the semiconductor element A1, the opening 26a is contained within the opening 13a, thereby suppressing the occurrence of cracks in the insulating layer 13. Furthermore, although thermal stress is applied to the surface protective film 26 due to the difference in thermal expansion coefficients between the insulating layer 13 and the surface protective film 26, the circular shape of the opening 13a as viewed in the thickness direction z disperses the thermal stress and prevents it from concentrating in one area. As a result, the semiconductor element A1 is able to suppress the occurrence of cracks in the surface protective film 26 compared to when the opening 13a is rectangular as viewed in the thickness direction z.

[0044] Furthermore, in the semiconductor element A1, the opening 26a of the surface protective film 26 when viewed in the thickness direction z is a circle similar to the opening 13a of the insulating layer 13. This allows the area of ​​the metal layer 25 in contact with the wiring layer 14 to be larger in the semiconductor element A1 than when the opening 26a has another shape, such as a rectangle.

[0045] The semiconductor device B1 includes a semiconductor element A1. The temperature of the semiconductor device B1 changes frequently depending on the environment in which it is used. For example, when mounted on a circuit board such as an automobile, the automobile may be driven under a variety of climatic conditions, from cold regions to hot and humid regions, and when mounted in the engine compartment, the automobile is constantly exposed to temperature changes due to the environment and driving patterns. As described above, the semiconductor element A1 can suppress the occurrence of cracks due to temperature changes, and therefore the reliability of the semiconductor device B1 against temperature changes is improved. Therefore, the semiconductor device B1 can be used even in environments where temperature changes occur frequently, and therefore has a wide range of uses.

[0046] In this embodiment, the metal layer 25, the opening 13a, and the opening 26a are circular when viewed in the thickness direction z, but this is not limiting. The shape of the metal layer 25 as viewed in the thickness direction z may be, for example, an elliptical shape, as long as the outer edge 25a is curved and does not include a location where stress concentrates. The shape of the opening 13a as viewed in the thickness direction z is preferably a shape with a curved inner edge and does not include a location where stress concentrates, but other shapes are also acceptable. The shape of the opening 26a as viewed in the thickness direction z is preferably a shape with a curved inner edge and does not include a location where stress concentrates, but other shapes are also acceptable. Furthermore, the metal layer 25, the opening 13a, and the opening 26a are preferably similar in shape to each other when viewed in the thickness direction z, but they do not have to be similar in shape.

[0047] 11 to 16 show other embodiments of the present disclosure. In these figures, elements that are the same as or similar to those in the above embodiment are denoted by the same reference numerals as those in the above embodiment.

[0048] Second Embodiment: Figure 11 is a diagram for explaining a semiconductor element A2 according to a second embodiment of the present disclosure. Figure 11 is a partially enlarged plan view showing the semiconductor element A2, and corresponds to Figure 9. The semiconductor element A2 of this embodiment differs from the first embodiment in that the opening 13a of the insulating layer 13 is rectangular when viewed in the thickness direction z. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment.

[0049] In this embodiment, too, the metal layer 25 has a circular shape when viewed in the thickness direction z, so that thermal stress acting on the surface protective film 26 is dispersed and does not concentrate in one area. This allows the semiconductor element A2 to suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z. Furthermore, in the semiconductor element A2, the opening 26a of the surface protective film 26 is enclosed in the opening 13a of the insulating layer 13 when viewed in the thickness direction z, so that the occurrence of cracks in the insulating layer 13 can be suppressed.

[0050] Third Embodiment: Figure 12 is a diagram for explaining a semiconductor element A3 according to a third embodiment of the present disclosure. Figure 12 is a partially enlarged plan view showing the semiconductor element A3, and corresponds to Figure 9. The semiconductor element A3 of this embodiment differs from the first embodiment in that the opening 26a is rectangular when viewed in the thickness direction z. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first and second embodiments described above may be combined in any desired manner.

[0051] In this embodiment, too, the metal layer 25 has a circular shape when viewed in the thickness direction z, so that thermal stress applied to the surface protective film 26 is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A3 can suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z. Also, in the semiconductor element A3, the opening 26a of the surface protective film 26 is enclosed in the opening 13a of the insulating layer 13 when viewed in the thickness direction z, so that cracks in the insulating layer 13 can be suppressed. Also, the opening 13a has a circular shape when viewed in the thickness direction z, so that thermal stress is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A3 can suppress the occurrence of cracks in the surface protective film 26 compared to when the opening 13a has a rectangular shape when viewed in the thickness direction z.

[0052] Fourth Embodiment: FIG. 13 is a diagram illustrating a semiconductor element A4 according to a fourth embodiment of the present disclosure. FIG. 13 is a partially enlarged plan view showing the semiconductor element A4, and corresponds to FIG. 9. The semiconductor element A4 of this embodiment differs from the first embodiment in that the openings 13a and 26a are rectangular when viewed in the thickness direction z. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the parts of the first to third embodiments described above may be combined in any desired manner.

[0053] In this embodiment, too, the metal layer 25 has a circular shape when viewed in the thickness direction z, so that thermal stress acting on the surface protective film 26 is dispersed and does not concentrate in one area. This allows the semiconductor element A4 to suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z. Furthermore, in the semiconductor element A4, the opening 26a of the surface protective film 26 is enclosed in the opening 13a of the insulating layer 13 when viewed in the thickness direction z, so that the occurrence of cracks in the insulating layer 13 can be suppressed.

[0054] Fifth Embodiment: FIGS. 14 and 15 are diagrams illustrating a semiconductor element A5 according to a fifth embodiment of the present disclosure. FIG. 14 is a partially enlarged plan view showing the semiconductor element A5, and corresponds to FIG. 9. FIG. 15 is a cross-sectional view taken along line XV-XV in FIG. 14, and corresponds to FIG. 10. The semiconductor element A5 of this embodiment differs from the first embodiment in that, when viewed in the thickness direction z, the opening 13a is contained within the opening 26a. The configuration and operation of other parts of this embodiment are similar to those of the first embodiment. Note that the respective parts of the first to fourth embodiments described above may be combined in any desired manner.

[0055] In this embodiment, too, the metal layer 25 has a circular shape when viewed in the thickness direction z, so that thermal stress applied to the surface protective film 26 is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A5 can suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z. In this embodiment, the opening 13a of the insulating layer 13 is contained within the opening 26a of the surface protective film 26 when viewed in the thickness direction z, so that cracks in the surface protective film 26 can be suppressed. Furthermore, although the opening 13a is contained within the opening 26a, the opening 26a has a circular shape when viewed in the thickness direction z, so that thermal stress is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A5 can suppress the occurrence of cracks in the insulating layer 13 compared to when the opening 26a has a rectangular shape when viewed in the thickness direction z. Furthermore, in the semiconductor element A5, the opening 13a of the insulating layer 13 when viewed in the thickness direction z is circular, which is similar to the opening 26a of the surface protective film 26. This allows the area of ​​contact between the metal layer 25 and the wiring layer 14 to be larger in the semiconductor element A5 than when the opening 13a is rectangular.

[0056] Sixth Embodiment: FIG. 16 is a diagram illustrating a semiconductor element A6 according to a sixth embodiment of the present disclosure. FIG. 16 is a partially enlarged plan view showing the semiconductor element A6, and corresponds to FIG. 9. The semiconductor element A6 of this embodiment differs from the fifth embodiment in that the opening 13a is rectangular when viewed in the thickness direction z. The configuration and operation of other parts of this embodiment are the same as those of the fifth embodiment. Note that the parts of the first to fifth embodiments described above may be combined in any desired manner.

[0057] In this embodiment, too, the metal layer 25 has a circular shape when viewed in the thickness direction z, so that thermal stress applied to the surface protective film 26 is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A6 can suppress the occurrence of cracks in the surface protective film 26 compared to when the metal layer 25 has a rectangular shape when viewed in the thickness direction z. In this embodiment, the opening 13a of the insulating layer 13 is contained within the opening 26a of the surface protective film 26 when viewed in the thickness direction z, so that cracks in the surface protective film 26 can be suppressed. Furthermore, although the opening 13a is contained within the opening 26a, the opening 26a has a circular shape when viewed in the thickness direction z, so that thermal stress is dispersed and does not concentrate in a specific area. As a result, the semiconductor element A6 can suppress the occurrence of cracks in the insulating layer 13 compared to when the opening 26a has a rectangular shape when viewed in the thickness direction z.

[0058] In the first to sixth embodiments, the semiconductor elements A1 to A6 are described as being LSIs, but this is not limiting. The semiconductor elements A1 to A6 may be discrete semiconductor elements. Furthermore, the type of the semiconductor device B1 is not limited.

[0059] The semiconductor element and semiconductor device according to the present disclosure are not limited to the above-described embodiments. The specific configurations of the components of the semiconductor element and semiconductor device according to the present disclosure can be freely modified in various ways. The present disclosure includes the embodiments described in the following appendices.

[0060] Supplementary Note 1: A semiconductor element (A1) comprising: an element body (10) having an element main surface (10a) facing one side in a thickness direction; a wiring layer (14) formed on the element main surface and conducting to the element body; an insulating layer (13) covering the element main surface and the wiring layer and having a first opening (13a) through which the wiring layer is exposed; a surface protective film (26) covering the insulating layer and having a second opening (26a) through which the wiring layer is exposed; and a metal layer (25) in contact with the wiring layer through the first opening and the second opening and overlapping the surface protective film as viewed in the thickness direction, wherein an outer edge (25a) of the metal layer is curved as viewed in the thickness direction. Supplementary Note 2: The semiconductor element (A1) according to Supplementary Note 1, wherein the metal layer is circular as viewed in the thickness direction. Supplementary Note 3: The semiconductor element according to any one of Supplementary Notes 1 or 2, wherein an inner edge of the first opening is curved when viewed in the thickness direction. Supplementary Note 4: The semiconductor element according to Supplementary Note 3, wherein a shape of the first opening is similar to a shape of the metal layer when viewed in the thickness direction. Supplementary Note 5: The semiconductor element according to any one of Supplementary Notes 1 to 4, wherein an inner edge of the second opening is curved when viewed in the thickness direction. Supplementary Note 6: The semiconductor element according to Supplementary Note 5, wherein a shape of the second opening is similar to a shape of the metal layer when viewed in the thickness direction. Supplementary Note 7: The semiconductor element according to any one of Supplementary Notes 1 to 6, wherein the second opening is contained within the first opening when viewed in the thickness direction. Supplementary Note 8: The semiconductor element according to any one of Supplementary Notes 1 to 7, wherein the metal layer comprises: a first layer (251) containing Ni; and a second layer (252) containing Pd and in contact with a surface of the first layer facing the element principal surface. Supplementary Note 9: The semiconductor element according to Supplementary Note 8, wherein the metal layer further comprises a third layer (253) in contact with a surface of the second layer facing the element principal surface and containing Au. Supplementary Note 10: The semiconductor element according to Supplementary Note 8 or 9, wherein the metal layer further comprises a fourth layer (254) interposed between the first layer and the wiring layer. Supplementary Note 11: The semiconductor element according to any of Supplements 1 to 10, wherein the surface protection film contains polyimide resin. Supplementary Note 12: The semiconductor element according to any of Supplements 1 to 11, wherein the wiring layer contains Al.Supplementary Note 13: A semiconductor element according to any one of Supplementary Notes 1 to 12, further comprising a back electrode (24) conductive to the element body, wherein the element body further has an element back surface (10b) facing opposite the element main surface in the thickness direction, and the back electrode is disposed on the element back surface. Supplementary Note 14: A semiconductor device (B1), comprising: the semiconductor element according to any one of Supplementary Notes 1 to 13; a conductive support member (5) supporting the semiconductor element and conductive to the semiconductor element; a connecting member (6) joined to the metal layer of the semiconductor element and the conductive support member; and a sealing resin (7) covering the semiconductor element, the connecting member, and a portion of the conductive support member. Supplementary Note 15: The semiconductor device according to Supplementary Note 14, wherein the connecting member is a bonding wire containing Cu.

[0061] A1 to A6: semiconductor element B1: semiconductor device 10: element body 10a: main surface 10b: back surface 11: semiconductor substrate 12: semiconductor layer 13: insulating layer 13a: opening 14: wiring layer 24: back surface electrode 25: metal layer 25a: outer edge 251: first layer 252: second layer 253: third layer 254: base layer 26: surface protective film 26a: opening 29: conductive bonding material 5: conductive support member 51: first lead 511: die pad portion 511a: die pad main surface 511b: die pad back surface 512: extension portion 52: second lead 521: pad portion 522: terminal portion 6: connection member 7: sealing resin 71: resin main surface 72: resin back surface 73: resin side surface 74: resin side surface

Claims

1. An element body having an element main surface facing in one direction in the thickness direction; a wiring layer formed on the main surface of the element and electrically connected to the element body; an insulating layer covering the element main surface and the wiring layer and having a first opening through which the wiring layer is exposed; a surface protection film covering the insulating layer and having a second opening through which the wiring layer is exposed; a metal layer that is in contact with the wiring layer through the first opening and the second opening and overlaps the surface protective film when viewed in the thickness direction; Equipped with When viewed in the thickness direction, the outer edge of the metal layer is curved. Semiconductor element.

2. When viewed in the thickness direction, the metal layer has a circular shape. The semiconductor device according to claim 1 .

3. When viewed in the thickness direction, the inner edge of the first opening is curved. The semiconductor device according to claim 1 .

4. When viewed in the thickness direction, a shape of the first opening is similar to a shape of the metal layer. The semiconductor device according to claim 3 .

5. When viewed in the thickness direction, the inner edge of the second opening is curved. The semiconductor device according to claim 1 .

6. When viewed in the thickness direction, a shape of the second opening is similar to a shape of the metal layer. The semiconductor device according to claim 5 .

7. When viewed in the thickness direction, the second opening is included in the first opening. The semiconductor device according to claim 1 .

8. The metal layer is A first layer including Ni; a second layer that is in contact with a surface of the first layer facing the element principal surface and contains Pd; Equipped with The semiconductor device according to claim 1 .

9. the metal layer is in contact with a surface of the second layer facing the element principal surface and further includes a third layer containing Au; The semiconductor device according to claim 8.

10. The semiconductor device according to claim 8 , wherein the metal layer further comprises a fourth layer interposed between the first layer and the wiring layer.

11. The surface protective film contains a polyimide resin. The semiconductor device according to claim 1 .

12. The wiring layer contains Al. The semiconductor device according to claim 1 .

13. Further comprising a back electrode electrically connected to the element body, The element body further has an element back surface facing the opposite side to the element main surface in the thickness direction, The back electrode is disposed on the back surface of the element. The semiconductor device according to claim 1 .

14. A semiconductor element according to any one of claims 1 to 13, a conductive support member that supports the semiconductor element and is electrically connected to the semiconductor element; a connecting member that is joined to the metal layer of the semiconductor element and the conductive support member; a sealing resin that covers the semiconductor element, the connection member, and a portion of the conductive support member; Equipped with Semiconductor device.

15. The connection member is a bonding wire containing Cu. The semiconductor device according to claim 14.