Manufacturing method of electronic components

Abstract

This electronic component comprises: an electronic component element; and a first external electrode. The electronic component element is provided with a plurality of internal electrodes. The first external electrode includes no glass component and is composed of a metal film having pores inside. The electronic component element has a second end surface and a first end surface at which the internal electrodes are exposed. The first external electrode is formed at least on the exposed portions of the internal electrodes and on the first and second end surfaces. The pore area rate on a cross section of the metal film is not less than 3% but less than 25%.

Description

Electronic component and method for manufacturing electronic component

[0001] The present invention relates to an electronic component having external electrodes on the end faces of an element body incorporating a laminate in which a plurality of elements are stacked.

[0002] Patent Document 1 describes an electrolytic capacitor. The electrolytic capacitor has a first electrode layer formed on an end surface of a capacitor element. A second electrode layer is further formed in contact with the first electrode layer. The first electrode layer is made of, for example, copper (Cu metal powder) and is formed using an aerosol deposition (AD) method. The second electrode layer is made of a conductive resin.

[0003] Patent Document 2 describes a multilayer ceramic capacitor. The external electrodes of the multilayer ceramic capacitor are formed by applying a conductive paste to the end faces of the dielectric ceramic and then firing the paste. The conductive paste is mainly composed of copper (Cu metal powder) and also contains glass frit.

[0004] Patent Document 3 describes a PML (Polymer Multilayer) capacitor. The capacitor element of the chip capacitor is formed by alternately laminating resin thin film layers that serve as dielectric layers and internal electrode layers. The electrodes provided on the end faces of the capacitor element include metal-containing portions formed by sputtering.

[0005] International Publication No. 2022 / 168768 Japanese Patent Application Laid-Open No. 2003-217969 Japanese Patent Application Laid-Open No. 2006-216603

[0006] However, in the configuration described in Patent Document 1, a second electrode layer is formed on top of a first electrode layer formed using the AD method. That is, multiple steps are required to form the external electrodes. Therefore, there is a risk that the number of steps for forming the external electrodes will increase.

[0007] Furthermore, in the configuration described in Patent Document 2, the dielectric ceramic reacts with the glass contained in the conductive paste, that is, a reaction layer is generated. The formation of this reaction layer may reduce the strength of the dielectric ceramic laminate.

[0008] In addition, in the configuration described in Patent Document 3, the external electrodes are formed by plating or sputtering. That is, the external electrodes have a high density and are less likely to have voids. Therefore, if a thermal shock is applied to the external electrodes, there is a risk that the external electrodes will peel off from the capacitor element due to the difference in thermal expansion.

[0009] SUMMARY OF THE INVENTION Therefore, an object of the present invention is to simplify the manufacturing process and realize highly reliable electronic components.

[0010] The electronic component of the present invention includes an electronic component body and a first external electrode. The electronic component body includes a plurality of internal electrodes. The first external electrode is made of a metal film that does not contain glass components and has pores therein. The electronic component body has a first end face and a second end face from which the internal electrodes are exposed. The first external electrode is formed on at least the exposed portions of the internal electrodes, as well as on the first and second end faces. The pore area ratio in the cross section of the metal film is 3% or more and less than 25%.

[0011] In this configuration, external electrodes made of glass-free electrode films are formed on the end faces of the electronic component body. Because the electrode films do not contain glass, no reaction layer is formed. This means that the strength of the element stack is not reduced. Furthermore, because the electrode films have pores inside, peeling between the element stack and the external electrodes due to the thermal expansion coefficient is suppressed even when thermal shock is applied.

[0012] The method for manufacturing an electronic component of the present invention includes the steps of: forming an electronic component body having a plurality of internal electrodes; and forming a first external electrode, which is made of a metal film containing no glass component and has pores therein, by an aerosol deposition (AD) method on at least exposed portions of the internal electrodes in the electronic component body and on a first end face and a second end face of the electronic component body. The pore area ratio in the cross section of the metal film is 3% or more and less than 25%.

[0013] In this method, a glass-free electrode film is formed on the end face of the electronic component element by the AD method. This electrode film is an external electrode. Because the electrode film does not contain glass, a reaction layer is not formed. In other words, the strength of the laminate is not reduced. Furthermore, because the electrode film has pores inside, peeling between the electronic component element and the electrode film due to the thermal expansion coefficient is suppressed even when thermal shock is applied. Furthermore, the external electrode can be formed using only the AD method, which simplifies the process.

[0014] According to the present invention, the process can be simplified and highly reliable electronic components can be realized.

[0015] FIG. 1 is an external perspective view of a multilayer ceramic capacitor according to a first embodiment of the present invention. FIG. 2 is a side cross-sectional view showing the configuration of the multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 3 is an enlarged plan view of an end face where an internal electrode is exposed in an electronic component body of the multilayer ceramic capacitor. FIG. 4(A) is a cross-sectional view of an electrode layer according to the first embodiment of the present invention, and FIG. 4(B) is a cross-sectional view of an electrode layer in a conventional configuration. FIG. 5 is a flowchart showing an example of a schematic flow of a method for manufacturing the multilayer ceramic capacitor according to the first embodiment of the present invention. FIG. 6 is a diagram showing the configuration of an electrode layer forming apparatus using the AD method. FIG. 7 is a table showing the relationship between pore area ratio, mechanical strength, and sealability. FIG. 8 is a side cross-sectional view showing the configuration of a multilayer ceramic capacitor according to a second embodiment of the present invention.

[0016] [First Embodiment] An electronic component and a method for manufacturing an electronic component according to a first embodiment of the present invention will be described with reference to the drawings. In each embodiment of the present invention, a multilayer ceramic capacitor will be described as an example of the electronic component. However, the configuration of this embodiment can be applied to any chip-type capacitor having external electrodes on the end surfaces of the electronic component body. For example, a chip-type capacitor has an electronic component body formed by laminating dielectric sheets. In a chip-type capacitor, a functional portion of the capacitor is formed inside the electronic component body. In a chip-type capacitor, electrodes of the functional portion of the capacitor are exposed from the end surfaces of the electronic component body, and external electrodes are formed on these exposed surfaces.

[0017] (Explanation of the configuration of multilayer ceramic capacitor 10) Fig. 1 is an external perspective view of a multilayer ceramic capacitor according to a first embodiment of the present invention. Fig. 2 is a side cross-sectional view showing the configuration of the multilayer ceramic capacitor according to the first embodiment of the present invention. Fig. 3 is an enlarged plan view of an end face at which internal electrodes are exposed in an electronic component body of the multilayer ceramic capacitor. Fig. 4(A) is a cross-sectional view of an electrode layer according to the first embodiment of the present invention, and Fig. 4(B) is a cross-sectional view of an electrode layer in a conventional configuration. Note that in Figs. 2 and 3, dimensions in each direction are appropriately exaggerated, and in particular, the dimension in the height direction (z-axis direction in the figures) is exaggerated, in order to clearly illustrate the configuration.

[0018] As shown in FIGS. 1 and 2, the multilayer ceramic capacitor 10 includes an element body 11, an electrode layer 61, and an electrode layer 62.

[0019] The element body 11 has a rectangular parallelepiped shape and has a top surface, a bottom surface, end surfaces 111 and 112, and two side surfaces. The element body 11 corresponds to an "electronic component element body" of the present invention. The end surface 111 corresponds to a "first end surface" of the present invention, and the end surface 112 corresponds to a "second end surface" of the present invention. Note that the top surface and bottom surface are used for convenience of explanation, and when the multilayer ceramic capacitor 10 is mounted on a circuit board, either surface may face the circuit board.

[0020] The element body 11 includes a plurality of internal electrodes 20, 30 and a multilayer ceramic layer 50. The multilayer ceramic layer 50 is formed by stacking dielectric sheets.

[0021] The internal electrode 30 is a flat film and has a first end face, a second end face, a flat film surface on the top face side, and a flat film surface on the bottom face side. The internal electrodes 20, 30 are made of, for example, nickel (Ni).

[0022] More specifically, the element body 11 is formed as follows: First, a conductive paste for the internal electrodes is printed in a predetermined pattern on a dielectric sheet using screen printing or the like, thereby forming the internal electrode pattern (internal electrodes 20, 30).

[0023] The element body 11 is formed by alternately stacking dielectric sheets (hereinafter referred to as first sheets) on which internal electrodes 20 are formed and dielectric sheets (hereinafter referred to as second sheets) on which internal electrodes 30 are formed. As shown in Fig. 2 , the internal electrodes 20 are exposed on an end face 111, and the internal electrodes 30 are exposed on an end face 112. Dielectric sheets on which no internal electrode patterns are formed are stacked so as to be located on the top and bottom faces of the element body 11.

[0024] Next, this element body 11 is fired. Furthermore, an electrode layer 61 is formed as an external electrode on an end surface 111 of the element body 11, and an electrode layer 62 is formed as an external electrode on an end surface 112 of the element body 11, thereby realizing a multilayer ceramic capacitor. The electrode layers 61 and 62 correspond to the "first external electrode" in the present invention. The configurations of the electrode layer 61 and the electrode layer 62 will be described later.

[0025] With this configuration, the internal electrodes 20 and 30 face each other with the dielectric sheet sandwiched between them, and function as a capacitor having a predetermined capacitance.

[0026] The first sheet and the second sheet are flat membrane-shaped. The multiple first sheets and the multiple second sheets are arranged so that their respective flat membrane surfaces are approximately parallel to the top and bottom surfaces of the element body 11. As described above, the multiple first sheets and the multiple second sheets are arranged alternately in a direction perpendicular to the top and bottom surfaces (the height direction of the element body 11 (z-axis direction in the figure)). Note that in FIG. 2, the number of the multiple first sheets is three and the number of the multiple second sheets is four, but this is not limited to this.

[0027] In this stacked state, the end faces 211 (see FIG. 2 ) of the multiple first sheet internal electrodes 20 are located at approximately the same position in side view. The end faces 311 of the multiple second sheet internal electrodes 30 are located at approximately the same position in side view. The end faces 211 of the multiple first sheet internal electrodes 20 protrude beyond the end faces 312 of the multiple second sheet internal electrodes 30. The end faces 311 of the multiple second sheet internal electrodes 30 protrude beyond the end faces 212 of the multiple first sheet internal electrodes 20.

[0028] As a result, the end faces 211 of the internal electrodes 20 of the first sheet are exposed to the outside of the element body 11 from the end face 111 of the element body 11. The internal electrodes 30 of the second sheet are exposed to the outside of the element body 11 from the end face 112 of the element body 11.

[0029] The electrode layers 61, 62 are composed of particles made of a metal material from the viewpoint of conductivity and the formation method described below. The electrode layers 61, 62 preferably contain at least one of copper, nickel, tin, and zinc. The electrode layers 61, 62 do not contain glass components such as glass frit. Note that the term "does not contain glass frit, etc." does not include a configuration in which glass components are inevitably mixed in during the manufacturing process.

[0030] As shown in Fig. 3, the electrode layer 61 is formed on the end face 111 of the element body 11. More specifically, the electrode layer 61 is formed on the end faces 211 of the multiple internal electrodes 20. The electrode layer 61 is also formed on the entire end face 111 of the element body 11. The electrode layer 61 is formed to a predetermined thickness (height) from the end face 111 of the element body 11. The thickness of the electrode layer 61 is preferably 3 µm or more and 25 µm or less. That is, the electrode layer 61 functions as an external electrode of the multilayer ceramic capacitor 10.

[0031] The electrode layer 62 is formed on the end face 112 of the element body 11. More specifically, the electrode layer 62 is formed on the end faces 311 of the multiple internal electrodes 30. The electrode layer 62 is also formed on the entire end face 112 of the element body 11. The electrode layer 62 is formed to a predetermined thickness (height) from the end face 112 of the element body 11. The thickness of the electrode layer 62 is preferably 3 μm or more and 25 μm or less. That is, the electrode layer 62 functions as an external electrode of the multilayer ceramic capacitor 10, similar to the electrode layer 61.

[0032] The multilayer ceramic capacitor 10 is realized by the above configuration.

[0033] 3, the electrode layers 61 and 62 are metal films having pores (voids) 60P. The pores 60P are formed in the electrode layers 61 and 62 at a predetermined ratio (hereinafter referred to as the pore area ratio).

[0034] More specifically, the electrode layer 61 is formed with a predetermined pore area (void) ratio on the surface of the end face 111 of the element body 11. Similarly, the electrode layer 62 is formed with a predetermined pore area (void) ratio on the surface of the end face 112 of the element body 11. The pore area ratio here is expressed as the ratio (percentage) of the area that includes the pores 60P in a cross section of the electrode layer 61 that is parallel to the end face 111 of the element body 11 (the YZ plane in FIG. 1 ), when the area of ​​this cross section is set to 100. The method of calculating the pore area ratio is the same for the electrode layer 62.

[0035] The pore area ratio is measured by exposing the end surface 111 of the element body 11 on which the electrode layers 61 are formed in the multilayer ceramic capacitor 10 shown in FIG. 3 and then observing the end surface 111 with an optical microscope. More specifically, the pore area ratio can be determined by analyzing the image shown in FIG. 4(A). The area of ​​the electrode layers 61 is calculated by binarizing the obtained image to distinguish between the electrode layers 61 and the electrode layers 61. As described above, the pore area ratio is calculated as the ratio of the area of ​​the pores 60P to the sum of the areas of the electrode layers 61 and the pores (voids) 60P where the electrode layers 61 are not formed. The pore area ratio of the electrode layers 62 is also calculated in a similar manner.

[0036] On the other hand, the configuration shown in Fig. 4(B) shows an electrode layer of a conventional configuration. Compared to Fig. 4(A), the electrode layer of Fig. 4(B) does not have pores (voids). More specifically, in the structure of Fig. 4(A) which is the configuration of the present invention, pores 60P are formed at a predetermined ratio (pore area ratio), so that the internal electrode 20 or the internal electrode 30 is exposed. On the other hand, in Fig. 4(B) which is the conventional configuration, the internal electrode is not exposed because there are no pores 60P.

[0037] 4(A) showing the configuration of the present invention with the conventional configuration of FIG. 4(B), the pores 60P in the configuration of the present invention alleviate internal stress. That is, stress caused by a difference in thermal expansion coefficient due to heat shock or the like is suppressed between the electrode layers 61, 62 and the element body 11. Therefore, peeling between the element body 11 and the electrode layers 61, 62 is suppressed.

[0038] The specific method of forming the electrode layers 61 and 62 and the specific shapes thereof will be described later.

[0039] (Method for manufacturing the multilayer ceramic capacitor 10) The multilayer ceramic capacitor 10 having the above-described configuration is manufactured, for example, as follows. Fig. 5 is a flowchart showing an example of a schematic flow of the method for manufacturing the multilayer ceramic capacitor according to this embodiment. Fig. 6 is a diagram of an apparatus for forming the electrode layers 61, 62 by the AD method.

[0040] The element body 11 is formed (S11). Specifically, first sheets on which the internal electrodes 20 are formed and dielectric sheets on which the internal electrodes 30 are formed are alternately laminated, and dielectric sheets on which no internal electrode patterns are formed are laminated on the top and bottom surfaces of the laminate. In this way, the element body 11 is formed. This process is performed in the state of a multi-substrate on which multiple element bodies 11 can be formed at once. By dividing this multi-substrate into individual element bodies 11, the internal electrodes 20 are exposed on the end surface 111 and the internal electrodes 30 are exposed on the end surface 112, as shown in FIG. 2 . This element body 11 is fired.

[0041] Next, electrode layers 61 are formed on the end faces 211 of the internal electrodes 20 of the first sheet and on the end faces 111 of the element body 11. The electrode layers 61 are formed using the AD method (S12). The electrode layers 61 function as external electrodes of the multilayer ceramic capacitor 10.

[0042] 6 , a plurality of element bodies 11 are fixed on a stage 92 and placed in a chamber 91. At least the tip (ejection end) of an aerosol generator 93 is inserted into the chamber 91. The aerosol generator 93 generates an aerosol by introducing copper powder (Cu powder) 600 into a carrier gas, and sprays the aerosol onto the end faces 111 of the element bodies 11.

[0043] At this time, by appropriately setting the aerosol specifications (e.g., the volume ratio of copper powder 600 contained in the carrier gas) and the spraying conditions (e.g., the number of sprays, the spraying strength, etc.), the copper powder 600 is struck against the end surface 111 of the base body 11 and piled up to a predetermined height (predetermined thickness).

[0044] As a result, the electrode layer 61 is formed on the end surface 111 of the element body 11 and the end surface 211 of the internal electrode 20 of the first sheet (see FIGS. 2 and 3). The end surface 211 corresponds to the "exposed portion" of the present invention. In this case, the particle size of the copper powder 600 is, for example, about 3 μm, but may be 2 μm or less.

[0045] By using the AD method, pores 60P are formed when forming the electrode layer 61. The pore area ratio when forming the pores 60P varies depending on the spraying conditions using the AD method. The pore area ratio is determined depending on the film formation rate, film formation time, etc.

[0046] Next, electrode layers 62 are formed using the AD method on the end faces 112 of the element body 11 and on the end faces 311 of the internal electrodes 30 of the second sheets (S13). The electrode layers 62 function as external electrodes of the multilayer ceramic capacitor 10. The method for forming the electrode layers 62 is the same as the method for forming the electrode layers 61, and therefore a description thereof will be omitted.

[0047] By using the manufacturing method described above, the multilayer ceramic capacitor 10 having the above-described configuration can be manufactured easily and more reliably.

[0048] The external electrodes of the multilayer ceramic capacitor 10 are realized by forming the electrode layers 61, 62 using the AD method. That is, some of the steps for forming the external electrodes can be omitted, and the external electrodes can be formed by a simple method.

[0049] Furthermore, the electrode layers 61 and 62 do not contain glass components, meaning that no reaction layer is formed between the multilayer ceramic layer 50 and the electrode layers 61 and 62. This prevents the strength of the multilayer ceramic capacitor 10 from decreasing.

[0050] (Relationship between pore area ratios of electrode layers 61 and 62) The detailed relationship between the pore area ratios of the electrode layers 61 and 62 will be described using Fig. 7. Fig. 7 is a table showing the relationship between the pore area ratio and mechanical strength and sealing property. The values ​​shown in Fig. 7 show the relationship when the electrode layers 61 and 62 are formed to a thickness of approximately 10 µm, as an example.

[0051] The mechanical strength and sealing property shown in Figure 7 are defined as follows. Mechanical strength is an evaluation of physical and mechanical strength in a heat cycle test and a heat shock test. Sealing property is an evaluation of the degree to which foreign matter is prevented from entering the inside of the element body 11 of the multilayer ceramic capacitor 10. The pore area ratio is determined by, for example, the film formation rate, film formation time, etc.

[0052] 7, if the composition does not contain glass and has a pore area ratio of 3% or more and less than 25%, the desired reliability can be reliably obtained in actual use. More specifically, by having a composition that does not contain glass and has a pore area ratio of 3% or more and less than 25%, it is possible to realize a multilayer ceramic capacitor 10 that suppresses a decrease in mechanical strength and has high sealing properties.

[0053] Second Embodiment A multilayer ceramic capacitor according to a second embodiment of the present invention will be described with reference to the drawings. The multilayer ceramic capacitor according to the second embodiment differs from the multilayer ceramic capacitor 10 according to the first embodiment in that it includes external electrodes 81 and 82. The other configuration of the ceramic capacitor according to the second embodiment is the same as that of the multilayer ceramic capacitor according to the first embodiment, and a description of similar parts will be omitted.

[0054] As shown in Fig. 8, the multilayer ceramic capacitor 10A includes external electrodes 81 and 82. The external electrode 81 has a laminated structure of an electrode film 811 and an electrode film 812. The electrode film 811 covers the outer surface of the electrode layer 61, and the electrode film 812 covers the outer surface of the electrode film 811. The external electrode 82 has a laminated structure of an electrode film 821 and an electrode film 822. The electrode film 821 covers the outer surface of the electrode layer 62, and the electrode film 822 covers the outer surface of the electrode film 821. The external electrodes 81 and 82 correspond to the "second external electrode" in this invention.

[0055] More specifically, the external electrode 81 is composed of an electrode film 811 and an electrode film 812, and is formed by plating. For example, the electrode film 811 is a nickel (Ni) plating layer, and the electrode film 812 is a tin (Sn) plating layer. The external electrode 82 is also formed by plating, like the external electrode 81; for example, the electrode film 821 is a nickel (Ni) plating layer, and the electrode film 822 is a tin (Sn) plating layer. The thickness of the terminal electrode composed of the electrode layer 61 and the external electrode 81, and the thickness of the terminal electrode composed of the electrode layer 62 and the external electrode 82, are preferably equal to or greater than 8 μm and less than 20 μm.

[0056] The electrode layers 61, 62 of the multilayer ceramic capacitor 10A have the pores 60P, which alleviates internal stress. That is, the difference in thermal expansion coefficient between the electrode layers 61, 62 and the element body 11 due to heat shock or the like is suppressed. Therefore, peeling between the element body 11 and the electrode layers 61, 62 is suppressed.

[0057] Furthermore, the electrode layers 61 and 62 do not contain glass components, meaning that no reaction layer is formed between the multilayer ceramic layer 50 and the electrode layers 61 and 62. This prevents a decrease in the strength of the multilayer ceramic capacitor 10A.

[0058] Furthermore, the multilayer ceramic capacitor 10A includes external electrodes 81 and 82. This further improves the sealing performance of the multilayer ceramic capacitor 10A.

[0059] DESCRIPTION OF SYMBOLS 10, 10A... Multilayer ceramic capacitor 11... Element body 20, 30... Internal electrode 50... Multilayer ceramic layer 60P... Pore 61, 62... Electrode layer 81, 82... External electrode 91... Chamber 92... Stage 93... Aerosol generator 111, 112, 211, 212, 311, 312... End surface 600... Copper powder 811, 812, 821, 822... Electrode film

Claims

1. forming an electronic component body having a plurality of internal electrodes; forming a first external electrode made of a metal film containing no glass component and having pores therein by an aerosol deposition (AD) method on at least the exposed portions of the internal electrodes in the electronic component element, and on a first end face and a second end face of the electronic component element; Equipped with The pore area ratio in the cross section of the metal film is 3% or more and less than 25%. Manufacturing methods for electronic components.

2. The thickness of the metal film is 3 μm or more and 25 μm or less. The method for manufacturing an electronic component according to claim 1 .

3. a second external electrode covering the first external electrode; The method for manufacturing an electronic component according to claim 1 , wherein the second external electrodes are formed by plating.