Data transfer apparatus, exposure apparatus, apparatus and device manufacturing method

Abstract

This data transfer apparatus is used in an exposure apparatus that controls a plurality of elements of a spatial light modulation element on the basis of rendering data and exposes a substrate. The data transfer apparatus comprises: a first processing unit that divides first data, which is the rendering data, to generate multiple pieces of second data, and transfers the multiple pieces of second data; a second processing unit that has a first storage unit having a first memory group including a plurality of first memories respectively storing the multiple pieces of second data transferred from the first processing unit, and transfers the second data from each of the plurality of first memories; and a third processing unit that has a second storage unit storing third data, which is the second data transferred from each of the plurality of first memories, and transfers the third data to the spatial light modulation element.

Description

Data transfer apparatus, exposure apparatus and electronic device

[0001] The present invention relates to a data transfer apparatus, an exposure apparatus, and an electronic device.

[0002] Conventionally, in the lithography process for manufacturing electronic devices (microdevices) such as liquid crystal or organic EL display panels and semiconductor elements (integrated circuits, etc.), a step-and-repeat projection exposure apparatus (a so-called stepper) or a step-and-scan projection exposure apparatus (a so-called scanning stepper (also called a scanner)) has been used. This type of exposure apparatus projects and exposes a mask pattern for the electronic device onto a photosensitive layer applied to the surface of an exposed substrate (hereinafter simply referred to as a substrate), such as a glass substrate, a semiconductor wafer, a printed wiring board, or a resin film.

[0003] Since it takes time and money to fabricate a mask substrate on which the mask pattern is fixedly formed, an exposure apparatus is known that uses a spatial light modulation element (variable mask pattern generator) such as a digital mirror device (DMD) in which a large number of micromirrors that are slightly displaced are regularly arranged instead of a mask substrate (see, for example, Patent Document 1). In the exposure apparatus disclosed in Patent Document 1, for example, illumination light obtained by mixing light from a laser diode (LD) with a wavelength of 375 nm and light from an LD with a wavelength of 405 nm through a multimode fiber bundle is irradiated onto the digital mirror device (DMD), and the reflected light from each of a large number of tilt-controlled micromirrors is projected onto the substrate for exposure via an imaging optical system and a microlens array.

[0004] It is desirable to transfer data for controlling a spatial light modulation element stably in a short time from a storage device that stores the data to a control unit of the spatial light modulation element.

[0005] Japanese Patent Application Laid-Open No. 2019-23748

[0006] According to a first aspect of the disclosure, a data transfer device is a data transfer device used in an exposure apparatus that exposes a substrate by controlling a plurality of elements of a spatial light modulation element based on drawing data, and includes: a first processing unit that divides first data, which is the drawing data, to generate a plurality of second data and transfers the plurality of second data; a first storage unit that has a first memory group including a plurality of first memories that respectively store the plurality of second data transferred from the first processing unit, and transfers the second data from each of the plurality of first memories; and a third processing unit that has a second storage unit that stores third data, which is the second data transferred from each of the plurality of first memories, and transfers the third data to the spatial light modulation element.

[0007] According to a second aspect of the disclosure, an exposure apparatus includes the above-described data transfer device.

[0008] According to a third aspect of the disclosure, an electronic device is an electronic device manufactured using the exposure apparatus described above.

[0009] The configurations of the embodiments described below may be modified as appropriate, and at least a portion of the configuration may be replaced with other components. Furthermore, components that are not particularly limited in terms of their placement may be placed in any position that can achieve their function, not limited to the placement disclosed in the embodiments.

[0010] FIG. 1 is a block diagram showing a schematic configuration of an exposure apparatus according to a first embodiment. FIG. 2 is a perspective view showing an outline of the external configuration of the main body of the exposure apparatus. FIG. 3 is a diagram showing an example of the arrangement of DMD projection areas projected onto a substrate by each projection unit of a group of multiple exposure modules. FIG. 4 is a diagram explaining the state of spliced ​​exposure by each of four specific projection areas in FIG. 3. FIG. 5 is an optical layout diagram showing a specific configuration of two exposure modules aligned in the X direction (scanning exposure direction) as viewed in the XZ plane. FIG. 6(A) is a diagram showing a schematic diagram of a DMD, FIG. 6(B) is a diagram showing the DMD when powered off, FIG. 6(C) is a diagram explaining the mirror in the ON state, and FIG. 6(D) is a diagram explaining the mirror in the OFF state. FIG. 7 is a diagram showing an example of data flow in the exposure apparatus according to the first embodiment. FIG. 8(A) is a diagram explaining the division of multiple micromirrors provided on the DMD into segments, and FIG. 8(B) is a diagram explaining the SLM data generated by the module PC. FIG. 9 is a block diagram showing an example of the configuration of a storage control board. FIG. 10 is a time chart showing the data transmission speed to the DMD control board, the read speed of the first memory, and the amount of data in the second storage unit. FIG. 11(A) is a diagram explaining another example of a DMD segment, FIG. 11(B) is a diagram explaining SLM data stored in multiple first memories, and FIG. 11(C) is a diagram explaining SLM data transferred from multiple first memories. FIG. 12 is a block diagram showing the configuration of a storage control board according to a second embodiment. FIG. 13(A) is a conceptual diagram showing the procedure for forming a pattern A on a substrate and then forming a pattern B different from pattern A on the substrate in the exposure apparatus according to the first embodiment. FIG. 13(B) is a conceptual diagram showing the procedure for forming a pattern A on a substrate and then forming a pattern B different from pattern A on the substrate in the exposure apparatus according to the second embodiment. FIG. 14 is a diagram showing an overview of an exposure system according to a third embodiment. FIGS. 15(A) and 15(B) are diagrams for explaining wiring patterns formed by the exposure system according to the third embodiment.FIG. 16(A) is a schematic diagram showing a wafer in which all chips are arranged in their designed positions, and FIG. 16(B) is a schematic diagram showing a wafer in which chips are arranged offset from their designed positions. FIG. 17 is a conceptual diagram of the FO-WLP wiring pattern formation procedure in the third embodiment. FIG. 18 is a diagram showing another example of the configuration of the module PC and storage control board in the first to third embodiments. FIG. 19(A) is a time chart showing changes in the amount of data in the second memory unit during exposure processing, and FIG. 19(B) is a diagram showing the first memory read speed relative to the total amount of data written and the minimum amount of data in the second memory unit during exposure. FIG. 20 is a functional block diagram of an anomaly detection device according to a fourth embodiment. FIG. 21 is another example of a functional block diagram of an anomaly detection device. FIG. 22 is a flowchart showing a portion of the manufacturing process for manufacturing a semiconductor device. FIG. 23 is a flowchart showing a portion of the manufacturing process for manufacturing a liquid crystal display element.

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, an XYZ Cartesian coordinate system is set up, and the positional relationship of each component will be described with reference to this XYZ Cartesian coordinate system. A predetermined direction in a horizontal plane is defined as the X-axis direction, a direction perpendicular to the X-axis direction in the horizontal plane is defined as the Y-axis direction, and a direction perpendicular to both the X-axis direction and the Y-axis direction (i.e., the vertical direction) is defined as the Z-axis direction. Furthermore, the directions of rotation (tilt) around the X-axis, Y-axis, and Z-axis are defined as the θX, θY, and θZ directions, respectively.

[0012] 1 is a block diagram showing a schematic configuration of an exposure apparatus EX according to Embodiment 1. The exposure apparatus EX comprises a main body unit MB, a substrate exchange unit PCU, and a data transfer device 1000.

[0013] [Configuration of Main Body MB] First, the configuration of the main body MB will be described. FIG. 2 is a perspective view showing an outline of the external configuration of the main body MB of the exposure apparatus EX. The exposure apparatus EX is an apparatus that projects exposure light, the intensity distribution of which is dynamically modulated in space by a spatial light modulator (SLM), onto an exposed substrate. Examples of spatial light modulators include liquid crystal elements, digital micromirror devices (DMDs), and magneto-optic spatial light modulators (MOSLMs). The exposure apparatus EX according to this embodiment is equipped with a DMD 10 as a spatial light modulator, but may also be equipped with other spatial light modulators.

[0014] In a specific embodiment, the exposure apparatus EX is a step-and-scan projection exposure apparatus (scanner) that exposes a rectangular (square) glass substrate used in a display device (flat panel display) or the like. The glass substrate is a substrate P for a flat panel display, with at least one side or diagonal length of 500 mm or more and a thickness of 1 mm or less. The exposure apparatus EX exposes a projected image of a pattern created by the DMD 10 onto a photosensitive layer (photoresist) formed with a constant thickness on the surface of the substrate P. The substrate P is transported from the exposure apparatus EX after exposure and is sent to a predetermined process step (film formation step, etching step, plating step, etc.) after a development step.

[0015] The main body MB is equipped with a stage device that includes a pedestal 2 placed on active vibration isolation units 1a, 1b, 1c, and 1d (1d not shown), a surface plate 3 placed on the pedestal 2, an XY stage 4A that is movable two-dimensionally on the surface plate 3, a substrate holder 4B that holds a substrate P on a plane by suction on the XY stage 4A, and laser length measurement interferometers (hereinafter simply referred to as interferometers) IFX, IFY1 to IFY4 that measure the two-dimensional movement position of the substrate holder 4B (substrate P). Such a stage device is disclosed, for example, in U.S. Patent Publication No. 2010 / 0018950 and U.S. Patent Publication No. 2012 / 0057140.

[0016] In FIG. 2, the XY plane of the Cartesian coordinate system XYZ is set parallel to the flat surface of the stage device's base 3, and the XY stage 4A is set to be able to translate within the XY plane. In this embodiment, the direction parallel to the X axis of the coordinate system XYZ is set as the scanning movement direction of the substrate P (XY stage 4A) during scan exposure. The movement position of the substrate P in the X axis direction is sequentially measured by the interferometer IFX, and the movement position in the Y axis direction is sequentially measured by at least one (preferably two or more) of the four interferometers IFY1 to IFY4. The substrate holder 4B is configured to be able to move slightly relative to the XY stage 4A in the Z axis direction, which is perpendicular to the XY plane, and to be able to tilt slightly in any direction relative to the XY plane, thereby actively adjusting the focus and leveling (parallelism) between the surface of the substrate P and the imaging plane of the projected pattern. Furthermore, the substrate holder 4B is configured to be able to rotate slightly (θz rotation) about an axis parallel to the Z axis in order to actively adjust the tilt of the substrate P in the XY plane.

[0017] The main body MB further includes an optical base 5 that holds a plurality of exposure (imaging) module groups MU(A), MU(B), and MU(C), and main columns 6a, 6b, 6c, and 6d (6d is not shown) that support the optical base 5 from the pedestal 2. Each of the plurality of exposure module groups MU(A), MU(B), and MU(C) is attached to the +Z direction side of the optical base 5. Each of the plurality of exposure module groups MU(A), MU(B), and MU(C) includes an illumination unit ILU that is attached to the +Z direction side of the optical base 5 and that receives illumination light from an optical fiber unit FBU, and a projection unit PLU that is attached to the -Z direction side of the optical base 5 and has an optical axis parallel to the Z axis. Furthermore, each of the exposure module groups MU(A), MU(B), and MU(C) includes a DMD 10 that serves as an optical modulation unit that reflects illumination light from the illumination unit ILU in the -Z direction and causes it to enter the projection unit PLU. The detailed configuration of the exposure module including the illumination unit ILU, the DMD 10, and the projection unit PLU will be described later.

[0018] A plurality of alignment systems (microscopes) ALG that detect alignment marks formed at a plurality of predetermined positions on the substrate P are attached to the -Z direction side of the optical surface plate 5 of the main body MB. Furthermore, a calibration reference unit CU for calibration is provided at the -X direction end of the substrate holder 4B. Calibration includes at least one of confirming the relative positional relationship in the XY plane of the detection fields of the alignment systems ALG (calibration), confirming the baseline error between the projection positions of the pattern images projected from the projection units PLU of each of the exposure module groups MU(A), MU(B), and MU(C) and the positions of the detection fields of the alignment systems ALG (calibration), and confirming the position and image quality of the pattern images projected from the projection units PLU. While some of the modules are not shown in FIG. 2 , in this embodiment, each of the exposure module groups MU(A), MU(B), and MU(C) includes, for example, nine modules arranged at regular intervals in the Y direction, although the number of modules may be more or less than nine. In addition, although three rows of exposure modules are arranged in the X-axis direction in FIG. 2, the number of rows of exposure modules arranged in the X-axis direction may be two or less, or may be four or more.

[0019] 3 is a diagram showing an example of the arrangement of the projection areas IAn of the DMD 10 projected onto the substrate P by the projection units PLU of each of the exposure module groups MU(A), MU(B), and MU(C), and the Cartesian coordinate system XYZ is set in the same way as in FIG. 2. In this embodiment, the first row of exposure module groups MU(A), the second row of exposure module groups MU(B), and the third row of exposure module groups MU(C), which are arranged spaced apart in the X direction, each comprise nine modules arranged in the Y direction. The exposure module group MU(A) comprises nine modules MU1 to MU9 arranged in the +Y direction, the exposure module group MU(B) comprises nine modules MU10 to MU18 arranged in the -Y direction, and the exposure module group MU(C) comprises nine modules MU19 to MU27 arranged in the +Y direction. All modules MU1 to MU27 have the same configuration, and when exposure module group MU(A) and exposure module group MU(B) are positioned opposite each other in the X direction, exposure module group MU(B) and exposure module group MU(C) are positioned back to back in the X direction.

[0020] 3, the shape of the projection areas IA1, IA2, IA3, ..., IA27 (sometimes represented as IAn, where n is 1 to 27) by each of the modules MU1 to MU27 is, as an example, a rectangle extending in the Y direction with an aspect ratio of approximately 1:2. In this embodiment, as the substrate P is scanned and moved in the +X direction, spliced ​​exposure is performed at the -Y direction end of each of the first row of projection areas IA1 to IA9 and the +Y direction end of each of the second row of projection areas IA10 to IA18. Then, areas on the substrate P that were not exposed by each of the first and second rows of projection areas IA1 to IA18 are spliced ​​and exposed by each of the third row of projection areas IA19 to IA27. The center point of each of the projection areas IA1 to IA9 in the first column is located on a line k1 parallel to the Y axis, the center point of each of the projection areas IA10 to IA18 in the second column is located on a line k2 parallel to the Y axis, and the center point of each of the projection areas IA19 to IA27 in the third column is located on a line k3 parallel to the Y axis. The distance in the X direction between lines k1 and k2 is set to a distance XL1, and the distance in the X direction between lines k2 and k3 is set to a distance XL2.

[0021] Here, assuming that the joint portion between the −Y direction end of projection area IA9 and the +Y direction end of projection area IA10 is OLa, the joint portion between the −Y direction end of projection area IA10 and the +Y direction end of projection area IA27 is OLb, and the joint portion between the +Y direction end of projection area IA8 and the −Y direction end of projection area IA27 is OLc, the state of the joint exposure will be described with reference to Figure 4. In Figure 4, the Cartesian coordinate system XYZ is set in the same way as in Figures 2 and 3, and the coordinate system X'Y' in projection areas IA8, IA9, IA10, and IA27 (and all other projection areas IAn) is set so as to be inclined at an angle θk with respect to the X and Y axes (lines k1 to k3) of the Cartesian coordinate system XYZ. That is, the entire DMD 10 is tilted by an angle θk in the XY plane so that the two-dimensional arrangement of the many micromirrors of the DMD 10 forms the coordinate system X'Y'.

[0022] 4, the circular area encompassing each of the projection areas IA8, IA9, IA10, and IA27 (and all other projection areas IAn) represents the circular image field PLf' of the projection unit PLU. At the joint OLa, the projected image of the micromirrors arranged diagonally (at an angle θk) at the end of the projection area IA9 in the -Y' direction is set to overlap with the projected image of the micromirrors arranged diagonally (at an angle θk) at the end of the projection area IA10 in the +Y' direction. At the joint OLb, the projected image of the micromirrors arranged diagonally (at an angle θk) at the end of the projection area IA10 in the -Y' direction is set to overlap with the projected image of the micromirrors arranged diagonally (at an angle θk) at the end of the projection area IA27 in the +Y' direction. Similarly, at the joint OLc, the projected image of the micromirror arranged diagonally (at an angle θk) at the end of the +Y' direction of the projection area IA8 and the projected image of the micromirror arranged diagonally (at an angle θk) at the end of the -Y' direction of the projection area IA27 are set to overlap.

[0023] [Configuration of the Illumination Unit] Figure 5 is an optical layout diagram showing the specific configuration of module MU18 in the exposure module group MU(B) shown in Figures 2 and 3 and module MU19 in the exposure module group MU(C) as viewed in the XZ plane. The Cartesian coordinate system XYZ in Figure 5 is set to be the same as the Cartesian coordinate system XYZ in Figures 2 to 4. As is clear from the arrangement of each module in the XY plane shown in Figure 3, module MU18 is shifted by a fixed distance in the +Y direction relative to module MU19, and they are installed back-to-back. Since the optical components in module MU18 and module MU19 are made of the same materials and configured identically, the optical configuration of module MU18 will be mainly described in detail here. Note that the optical fiber unit FBU shown in Figure 2 is composed of 27 optical fiber bundles FB1 to FB27, corresponding to the 27 modules MU1 to MU27 shown in Figure 3.

[0024] The illumination unit ILU of the module MU18 is composed of a mirror 100 that reflects illumination light ILm traveling in the −Z direction from the output end of the optical fiber bundle FB18, a mirror 102 that reflects the illumination light ILm from the mirror 100 in the −Z direction, an input lens system 104 that acts as a collimator lens, an illuminance adjustment filter 106, an optical integrator 108 that includes a micro fly's eye (MFE) lens, a field lens, etc., a condenser lens system 110, and an inclined mirror 112 that reflects the illumination light ILm from the condenser lens system 110 toward the DMD 10. The mirror 102, the input lens system 104, the optical integrator 108, the condenser lens system 110, and the inclined mirror 112 are arranged along an optical axis AXc that is parallel to the Z axis.

[0025] The optical fiber bundle FB18 is composed of a single optical fiber line or a bundle of multiple optical fiber lines. The numerical aperture (NA, also referred to as the divergence angle) of the illumination light ILm emitted from the output end of the optical fiber bundle FB18 (each optical fiber line) is set so that it can enter the downstream input lens system 104 without being eclipsed. The position of the front focal point of the input lens system 104 is designed to be the same as the position of the output end of the optical fiber bundle FB18. Furthermore, the position of the back focal point of the input lens system 104 is set so that the illumination light ILm from a single or multiple point light sources formed at the output end of the optical fiber bundle FB18 is superimposed on the incident surface of the MFE lens 108A of the optical integrator 108. Therefore, the incident surface of the MFE lens 108A is Koehler illuminated by the illumination light ILm from the output end of the optical fiber bundle FB18. In the initial state, the geometric center point of the output end of the optical fiber bundle FB18 in the XY plane is located on the optical axis AXc, and the chief ray (center line) of the illumination light ILm from the point light source at the output end of the optical fiber line is parallel to (or coaxial with) the optical axis AXc.

[0026] The illumination light ILm from the input lens system 104 is attenuated by an illuminance adjustment filter 106 to a value between 0% and 90%, and then passes through an optical integrator 108 (MFE lens 108A, field lens, etc.) and enters a condenser lens system 110. The MFE lens 108A is a two-dimensional array of numerous rectangular microlenses, each measuring several tens of micrometers square, and its overall shape is set to be approximately similar to the overall shape of the mirror surface of the DMD 10 (aspect ratio of approximately 1:2) in the XY plane. The position of the front focal point of the condenser lens system 110 is set to be approximately the same as the position of the exit surface of the MFE lens 108A. Therefore, each of the illumination light beams from the point light sources formed on the exit side of each of the numerous microlenses of the MFE lens 108A is converted into approximately parallel beams by the condenser lens system 110, reflected by an inclined mirror 112, and then superimposed on the DMD 10 to form a uniform illuminance distribution. A surface light source in which a large number of point light sources (light-converging points) are densely arranged two-dimensionally is generated on the exit surface of the MFE lens 108A, and therefore the MFE lens 108A functions as a surface light source member.

[0027] In module MU18 shown in FIG. 5 , optical axis AXc, which is parallel to the Z axis and passes through condenser lens system 110, is bent by tilted mirror 112 and reaches DMD 10. The optical axis between tilted mirror 112 and DMD 10 is referred to as optical axis AXb. In this embodiment, a neutral plane including the center points of each of the numerous micromirrors of DMD 10 is set parallel to the XY plane. Therefore, the angle between the normal to this neutral plane (parallel to the Z axis) and optical axis AXb is the angle of incidence θα of illumination light ILm with respect to DMD 10. DMD 10 is attached to the lower side of mount 10M, which is fixed to a support column of illumination unit ILU. Mount 10M is provided with a fine-motion stage combining a parallel link mechanism and an expandable piezoelectric element, such as that disclosed in International Patent Publication No. 2006 / 120927, to fine-tune the position and orientation of DMD 10.

[0028] [DMD Configuration] Fig. 6(A) is a diagram showing a schematic diagram of the DMD 10, Fig. 6(B) is a diagram showing the DMD 10 when the power is OFF, Fig. 6(C) is a diagram for explaining the mirrors in the ON state, and Fig. 6(D) is a diagram for explaining the mirrors in the OFF state. Note that in Figs. 6(A) to 6(D), mirrors in the ON state are indicated by hatching.

[0029] The DMD 10 has a plurality of micromirrors Ms whose reflection angles can be changed and controlled. In this embodiment, the DMD 10 is of a roll and pitch drive type that switches between an ON state and an OFF state by tilting the micromirrors Ms in the roll direction and in the pitch direction.

[0030] 6B, when the power is off, the reflective surface of each micromirror Ms is set parallel to the X'Y' plane. The arrangement pitch of each micromirror Ms in the X' direction is Pdx (μm), and the arrangement pitch in the Y' direction is Pdy (μm), but in practice, Pdx = Pdy.

[0031] Each micromirror Ms is turned ON by tilting around the Y' axis. FIG. 6C shows a case where only the central micromirror Ms is turned ON, while the other micromirrors Ms are in a neutral state (neither ON nor OFF). Each micromirror Ms is turned OFF by tilting around the X' axis. FIG. 6D shows a case where only the central micromirror Ms is turned OFF, while the other micromirrors Ms are in a neutral state. For simplicity, although not shown, the micromirrors Ms in the ON state are driven to tilt at a predetermined angle from the X'Y' plane so that illumination light irradiated onto the micromirrors Ms in the ON state is reflected in the X direction of the XZ plane. The micromirrors Ms in the OFF state are driven to tilt at a predetermined angle from the X'Y' plane so that illumination light irradiated onto the micromirrors Ms in the ON state is reflected in the Y direction of the YZ plane. The DMD 10 generates an exposure pattern by switching the ON and OFF states of each micromirror Ms.

[0032] The illumination light reflected by the mirror in the OFF state is absorbed by a light absorber (not shown).

[0033] Although the DMD 10 has been described as an example of a spatial light modulation element and is therefore a reflective type that reflects laser light, the spatial light modulation element may be a transmissive type that transmits laser light or a diffractive type that diffracts laser light. The spatial light modulation element can modulate laser light spatially and temporally.

[0034] 5, illumination light ILm irradiated onto micromirrors Ms of the DMD 10 that are in the ON state is reflected in the X direction within the XZ plane so as to head towards the projection unit PLU. On the other hand, illumination light ILm irradiated onto micromirrors Ms of the DMD 10 that are in the OFF state is reflected in the Y direction within the YZ plane so as not to head towards the projection unit PLU.

[0035] A movable shutter 114 is removably provided in the optical path between the DMD 10 and the projection unit PLU to block light reflected from the DMD 10 during non-exposure periods. As shown on the module MU19 side, the movable shutter 114 is rotated to an angular position where it is removed from the optical path during exposure periods, and as shown on the module MU18 side, it is rotated to an angular position where it is inserted obliquely into the optical path during non-exposure periods. A reflective surface is formed on the DMD 10 side of the movable shutter 114, and light reflected therefrom from the DMD 10 is irradiated onto a light absorber 117. The light absorber 117 absorbs light energy in the ultraviolet wavelength range (wavelengths of 400 nm or less) without re-reflecting it and converts it into thermal energy. For this reason, the light absorber 117 is also provided with a heat dissipation mechanism (heat dissipation fins and a cooling mechanism). Although not shown in Figure 5, the reflected light from the micromirror Ms of DMD 10, which is in the OFF state during the exposure period, is absorbed by a similar light absorber (not shown in Figure 5) installed in the Y direction (a direction perpendicular to the plane of the paper in Figure 5) with respect to the optical path between DMD 10 and projection unit PLU, as described above.

[0036] [Configuration of Projection Unit] The projection unit PLU attached to the underside of the optical surface plate 5 is configured as a double-telecentric imaging projection lens system composed of a first lens group 116 and a second lens group 118 arranged along an optical axis AXa parallel to the Z axis. The first lens group 116 and the second lens group 118 are configured to translate in the direction along the Z axis (optical axis AXa) by micro-motion actuators, respectively, relative to support columns fixed to the underside of the optical surface plate 5. The projection magnification Mp of the imaging projection lens system formed by the first lens group 116 and the second lens group 118 is determined by the relationship between the array pitch of the micromirrors on the DMD 10 and the minimum line width (minimum pixel dimension) Pg of the pattern projected within the projection area IAn (n = 1 to 27) on the substrate P.

[0037] As an example, if the required minimum line width (minimum pixel dimension) Pg is 1 μm and the micromirror array pitches Pdx and Pdy are each 5.4 μm, the projection magnification Mp is set to approximately 1 / 6, taking into consideration the tilt angle θk in the XY plane of the projection area IAn (DMD 10) described above in Figure 4. The imaging projection lens system consisting of lens groups 116 and 118 inverts / reflects a reduced image of the entire mirror surface of DMD 10 and forms an image on the projection area IA18 (IAn) on the substrate P.

[0038] The first lens group 116 of the projection unit PLU is capable of slight movement in the direction of the optical axis AXa by an actuator in order to finely adjust the projection magnification Mp (on the order of ±several tens of ppm), and the second lens group 118 is capable of slight movement in the direction of the optical axis AXa by an actuator in order to perform high-speed focus adjustment. Furthermore, in order to measure positional changes in the Z-axis direction of the surface of the substrate P with an accuracy of submicron or less, a plurality of oblique incidence focus sensors 120 are provided below the optical surface plate 5. The plurality of focus sensors 120 measure overall positional changes in the Z-axis direction of the substrate P, positional changes in the Z-axis direction of partial areas on the substrate P corresponding to each of the projection areas IAn (n = 1 to 27), partial tilt changes of the substrate P, etc.

[0039] As explained above in Figure 4, the illumination unit ILU and projection unit PLU described above require that the projection area IAn be tilted by an angle θk in the XY plane, and therefore the DMD 10 and illumination unit ILU in Figure 5 (at least the optical path portion from mirror 102 to inclined mirror 112 along the optical axis AXc) are arranged so that they are tilted overall by an angle θk in the XY plane.

[0040] In the main body MB configured as described above, the modules MUn (n=1 to 27) perform exposure processing based on data transferred from a data transfer device 1000 (described later), and form a desired pattern on the substrate P.

[0041] Returning to Figure 1, the substrate replacement unit PCU has a port PT, which transports the substrate P that has been exposed in the main body unit MB described above out of the main body unit MB, and transports the substrate P to be next exposed (unprocessed substrate P) into the main body unit MB.

[0042] [Configuration of Data Transfer Apparatus 1000] Next, we will explain the configuration of the data transfer apparatus 1000. As shown in Fig. 1, the data transfer apparatus 1000 includes module PCs (Personal Computers) 200-1 to 200-27, storage control boards 300-1 to 300-27, and DMD control boards 400-1 to 400-27.

[0043] Modules PC200-1 to 200-27, storage control boards 300-1 to 300-27, and DMD control boards 400-1 to 400-27 are provided to correspond to modules MU1 to MU27, respectively.

[0044] 7 is a diagram showing an example of data flow in the exposure apparatus EX according to the first embodiment. Modules PC200-n (n = 1 to 27) are connected to a mask data server MDS. CAD (Computer Aided Design) data representing a pattern to be exposed by the exposure apparatus EX is input to the mask data server MDS. The mask data server MDS converts the input CAD data into a bitmap (BMP) file. Because the capacity of this BMP file is enormous, for example, several tens of terabytes, the mask data server MDS compresses the BMP file to create compressed mask data (drawing data) (first data).

[0045] The module PC 200-n (n = 1 to 27) downloads compressed mask data created by the mask data server MDS. The module PC 200-n divides the downloaded compressed mask data to generate SLM data indicating the exposure pattern to be generated by the DMD 10 of the corresponding module MUn. The SLM data may be calculated at high speed not only by the module PC 200-n but also by a dedicated board such as a GPU or FPGA. The SLM data may also be calculated by a third processing unit 61 provided on the storage control board 300-n (described later). When an FPGA is used, the functions of the module PC may be incorporated into the storage control board.

[0046] Here, the SLM data generated by the module PC200-n will be described. Fig. 8A is a diagram for explaining the division into segments of the micromirrors Ms of the DMD 10 in this embodiment, and Fig. 8B is a diagram for explaining the SLM data generated by the module PC200-n.

[0047] 8A, in this embodiment, the DMD 10 has 2560 x 1600 micromirrors Ms. The module PC200-n divides the 2560 x 1600 micromirrors Ms into 4 segments (segments A to D) x 16 blocks (blocks 0 to 15). Note that the number of micromirrors Ms, segments, and blocks included in the DMD 10 are not limited to those in this embodiment.

[0048] The module PC200-n generates SLM data DnA to DnD corresponding to the plurality of segments A to D of the DMD 10, respectively, and writes the data to the storage control board 300-n.

[0049] A more detailed explanation will be given. The module PC200-n (n = 1 to 27) (first processing unit) creates SLM data Frame0 indicating an exposure pattern to be generated by the DMD 10 of the module MUn at a first timing, and divides the SLM data Frame0 to correspond to the above-mentioned segments A to D. The data divided into each segment of the SLM data Frame0 is referred to as divided data Frm0-DnA to Frm0-DnD. Next, the module PC200-n creates SLM data Frame1 indicating an exposure pattern to be generated by the DMD 10 of the module MUn at a second timing, and divides the SLM data Frame1 to correspond to segments A to D to create divided data Frm1-DnA to Frm1-DnD. For example, when module PC200-n creates SLM data up to SLM data Frame4N+3 (N is a natural number), divided data Frm4N+3-DnA to Frm4N+3-DnD are created from divided data Frm0-DnA to Frm0-DnD.

[0050] The module PC200-n transfers the created divided data for each segment to the storage control board 300-n as SLM data DnA to DnD.

[0051] [Configuration of storage control board 300-n (n = 1 to 27)] Next, the configuration of the storage control board 300-n (n = 1 to 27) will be described. Figure 9 is a block diagram illustrating the configuration of the storage control board 300-n (n = 1 to 27) according to the first embodiment.

[0052] 9, the storage control board 300-n (n=1 to 27) (second processing unit) includes a first storage unit 50 having a plurality of first memories 50-1 to 50-4, a second storage unit 60, and transmission terminals TX1 to TX4. The second storage unit 60 is mounted on a third processing unit 61.

[0053] 8A, and store the SLM data DnA to DnD transferred from the module PC200-n (n = 1 to 27). More specifically, the first memory 50-1 stores the SLM data DnA for segment A, the first memory 50-2 stores the SLM data DnB for segment B, the first memory 50-3 stores the SLM data DnC for segment C, and the first memory 50-4 stores the SLM data DnD for segment D.

[0054] The second storage unit 60 reads out the SLM data DnA to DnD from the first memories 50-1 to 50-4, stores them temporarily, and transmits (transfers) the temporarily stored SLM data DnA to DnD to the DMD control board 400-n.

[0055] Returning to FIG. 7, the DMD control board 400-n (n=1 to 27) converts the received SLM data DnA to DnD into a format that can be displayed by the DMD 10 included in the module MUn, creates data DMn, and transmits it to the module MUn.

[0056] The module MUn selectively drives the micromirrors Ms of the DMD 10 based on the received data DMn to generate exposure patterns corresponding to the data DMn, and projects and exposes the patterns onto the substrate P.

[0057] Next, the operation of the storage control board 300-n (n = 1 to 27) will be described in detail with reference to FIG. 9 . In this embodiment, the first memories 50-1 to 50-4 provided in the storage control board 300-n operate in parallel. That is, the first memories 50-1 to 50-4 can independently transfer the SLM data DnA to DnD to the second storage unit 60 without being affected by the other first memories. By providing multiple first memories 50-1 to 50-4 in parallel, the transfer time of SLM data (e.g., SLM data Frame 0) can be shortened even when using a first memory. In this embodiment, four first memories 50-1 to 50-4 are provided, so, for example, SLM data Frame 0 can be transferred in approximately one-quarter of the time it takes to transfer SLM data Frame 0 from one first memory.

[0058] Before exposure begins, the SLM data DnA to DnD stored in the first memories 50-1 to 50-4 are read out to the second storage unit 60 and accumulated therein. Then, when exposure begins, the SLM data DnA to DnD accumulated in the second storage unit 60 is transmitted via the transmission terminals TX1 to TX4 to the reception terminals RX1 to RX4 of the DMD control board 400-n (n = 1 to 27), respectively, and the SLM data DnA to DnD are sequentially read out from the first memories 50-1 to 50-4 to the second storage unit 60. Note that the transfer speed of the second storage unit 60 is slower than the transfer speed of the first memories 50-1 to 50-4. This embodiment is also effective when the transfer speed of the second storage unit 60 is faster than the transfer speed of the first memories 50-1 to 50-4. In this embodiment, the numbers of the transmitting terminals TX1 to TX4 and the receiving terminals RX1 to RX4 are set to match the number of segments, but the numbers of the transmitting terminals TX1 to TX4 and the receiving terminals RX1 to RX4 are not limited to this.

[0059] Here, the reason why the storage control board 300-n (n=1 to 27) includes the second storage unit 60 will be explained.

[0060] When the second storage unit 60 is not provided and SLM data is transmitted (transferred) from the first memory 50-m (m = 1 to 4) to the DMD control board 400-n, if the read speed of the first memory 50-m is slower than the data transmission speed of the SLM data to the DMD control board 400-n, the read speed of the first memory 50-m will be insufficient, resulting in loss of SLM data. Furthermore, if the first memory 50-m becomes busy, data transfer from the first memory 50-m may stop. Thus, when SLM data is transferred directly from the first memory 50-m to the DMD control board 400-n, there is a risk that loss will occur in the SLM data transmitted to the DMD control board 400-n, significantly reducing the stability of the exposure apparatus EX.

[0061] Therefore, in this embodiment, by providing the second storage unit 60, even if the read speed of the first memory 50-m varies and decreases, the transfer of SLM data is not affected. In other words, the second storage unit 60 functions as a buffer.

[0062] 10 is a time chart showing the data transmission speed to the DMD control board 400-n (n=1 to 27), the readout speed of the first memory 50-m (m=1 to 4), and the amount of data in the second storage unit 60. In FIG. 10, time t1 is the exposure start time, and time t5 is the exposure end time.

[0063] Before time t1, that is, before the start of exposure, a predetermined amount of SLM data (FULL) is stored in the second storage unit 60.

[0064] When exposure starts at time t1, the SLM data is read out from the second storage unit 60 and transmitted to the DMD control board 400-n at a transmission speed of r11.

[0065] Between time t1 and time t2, the readout speed r11 of the first memory 50-m is the same as the transmission speed r11, so the amount of data in the second storage unit 60 remains full. At time t2, when the readout speed of the first memory 50-m becomes r1, which is slower than the transmission speed r11, the amount of data transmitted from the second storage unit 60 is greater than the amount of data read from the first memory 50-m to the second storage unit 60, so the amount of data in the second storage unit 60 decreases. However, because the data in the second storage unit 60 is not depleted, no SLM data is lost and no exposure failure occurs.

[0066] Thereafter, at time t3, the read speed of first memory 50-m again becomes faster than transmission speed r11, increasing the amount of data in second storage unit 60. When reading of data from first memory 50-m ends at time t4, data is no longer read from first memory 50-m to second storage unit 60, so the amount of data in second storage unit 60 decreases and becomes 0 at time t5 when exposure ends.

[0067] In this way, by parallelizing the multiple first memories 50-1 to 50-4, the time required to transfer the SLM data can be reduced, and by providing the second storage unit 60, the SLM data can be stably transmitted to the DMD control board 400-n (n = 1 to 27) without any loss of SLM data, thereby preventing exposure defects due to loss of SLM data.

[0068] Next, the minimum required capacity of the second storage unit 60 will be described. In the following description, the capacity of the second storage unit 60 will be referred to as the buffer capacity, which is the amount of data that can be exposed without data loss while the exposure device is exposing, taking into account whether or not there is a decrease in the speed of the first memory. The minimum required buffer capacity can be calculated based on the read speed of the first memory 50-m (m = 1 to 4) and the data transmission speed to the DMD control board 400-n (n = 1 to 27).

[0069] When the data transfer rate to the DMD control board is greater than the nominal value of the first memory readout rate, the minimum required buffer capacity is calculated by the following formula (1): Minimum required buffer capacity = {(data transfer rate to the DMD control board - transfer rate when the first memory readout rate is reduced) × time during which the first memory readout rate is reduced} (1)

[0070] When the data transfer rate to the DMD control board is less than the nominal value of the first memory readout rate, the minimum required buffer capacity is calculated by the following formula (2): Minimum required buffer capacity = {data transfer rate to the DMD control board - nominal value of the first memory readout rate × scanning time} + {(data transfer rate to the DMD control board - transfer rate when the first memory readout rate has decreased) × time during which the first memory readout rate has decreased} (2) Note that in formulas (1) and (2), the "transfer rate when the first memory readout rate has decreased" may be replaced with the "transfer rate assuming a decrease in the first memory readout rate," and the "time during which the first memory readout rate has decreased" may be replaced with the "assumed time during which the first memory readout rate has decreased."

[0071] The minimum required buffer capacity is determined appropriately based on the specifications of the exposure apparatus EX and the specifications of the first memory to be installed.

[0072] As described above in detail, according to the first embodiment, the data transfer device 1000 is a data transfer device used in an exposure apparatus EX that controls a plurality of micromirrors Ms of a DMD 10 based on drawing data to expose a substrate P, and includes a module PC200-n that divides compressed mask data, which is drawing data, to generate SLM data DnA to DnD (n=1 to 27) and transfers the plurality of SLM data DnA to DnD; The storage control board 300-n has a plurality of first memories 50-1 to 50-4 that store the SLM data DnA to DnD transferred from the module PC 200-n, and transfers the SLM data DnA to DnD from each of the plurality of first memories 50-1 to 50-4, and a second storage unit 60 that stores the SLM data DnA to DnD transferred from the plurality of first memories 50-1 to 50-4 and transfers the SLM data DnA to DnD to the DMD 10.

[0073] By providing multiple first memories 50-1 to 50-4 that operate in parallel, the time required to transfer SLM data can be reduced, and the second storage unit 60 absorbs variations in the read speed of the first memories 50-1 to 50-4, so that the SLM data can be stably transmitted to the DMD control board 400-n (n = 1 to 27) without any loss of SLM data. This makes it possible to prevent exposure defects due to loss of SLM data.

[0074] Furthermore, in the first embodiment, the storage control board 300-n (n=1 to 27) transfers the SLM data DnA to DnD to the second storage unit 60 before exposure of the substrate P, and the second storage unit 60 stores the SLM data DnA to DnD before exposure of the substrate P. This makes it possible to prevent the SLM data sent to the DMD control board 400-n at the start of exposure from being lost, and to prevent exposure defects from occurring.

[0075] Furthermore, in the first embodiment, the storage control board 300-n (n=1 to 27) transfers part of the SLM data DnA to DnD to the second storage unit 60 before exposure of the substrate P. Compared to when all of the SLM data DnA to DnD is transferred to the second storage unit 60, the buffer capacity of the second storage unit 60 can be made smaller.

[0076] Furthermore, in the first embodiment, the module PC200-n divides the multiple micromirrors Ms into multiple segments A to D to generate the SLM data DnA to DnD, and generates, from the compressed mask data, the SLM data DnA to DnD corresponding to each of the multiple segments A to D. This allows the SLM data DnA to DnD to be transferred from the first memories 50-1 to 50-4 operating in parallel, respectively, thereby reducing the transfer time of the SLM data.

[0077] In the first embodiment, the first memories 50-1 to 50-4 are provided corresponding to the multiple segments of the DMD 10, but the method of dividing the DMD 10 into segments is not limited to that shown in Fig. 8A. For example, the DMD 10 may be divided into four segments as shown in Fig. 11A. The number of segments into which the DMD 10 is divided is not limited to four, but may be two, three, or five or more.

[0078] Furthermore, in the first embodiment described above, the SLM data Frame0 indicating the exposure pattern to be generated by the multiple micromirrors Ms at the first control timing is divided to correspond to the segments A to D into which the micromirrors Ms of the DMD 10 are divided, and the divided data Frm0-DnA to Frm0-DnD are stored in the first memories 50-1 to 50-4, respectively, but this is not limited to this.

[0079] The SLM data Frame 0 indicating the exposure pattern to be generated by the multiple micromirrors Ms of the DMD 10 at the first control timing may be stored, for example, in the first memory 50-1 without being divided, and the SLM data Frame 1 indicating the exposure pattern to be generated by the multiple micromirrors Ms of the DMD 10 at the second control timing may be stored, for example, in the first memory 50-2 without being divided.

[0080] Specifically, as shown in FIG. 11(B), the first memory 50-1 may store SLM data Frame 0, Frame 4, Frame 8, ..., Frame 4N (N is a natural number), the first memory 50-2 may store SLM data Frame 1, Frame 5, Frame 9, ..., Frame 4N+1, the first memory 50-3 may store SLM data Frame 2, Frame 6, Frame 10, ..., Frame 4N+2, and the first memory 50-4 may store SLM data Frame 3, Frame 7, Frame 11, ..., Frame 4N+3.

[0081] In this case, module PC200-n (n = 1 to 27) generates SLM data by allocating and transferring to each of a plurality of first memories 50-m (m = 1 to 4) SLM data Frame 0 (first control data in which multiple micromirrors Ms are controlled at a first control timing) indicating the exposure pattern to be generated by the micromirrors Ms of DMD 10 at a first control timing and SLM data Frame 2 (second control data in which multiple micromirrors Ms are controlled at a second control timing) indicating the exposure pattern to be generated by the micromirrors Ms of DMD 10 at a second control timing.

[0082] 11C is a diagram schematically illustrating the reading of SLM data from the first memories 50-1 to 50-4. As shown in FIG. 11C, first, Frame 0 of the SLM data at the first control timing is read from the first memory 50-1. When one-quarter of the SLM data Frame 0 has been read, reading of Frame 1 of the SLM data from the first memory 50-2 begins. Thereafter, when one-quarter of the SLM data Frame 1 has been read, reading of Frame 2 of the SLM data from the first memory 50-3 begins, and when one-quarter of the SLM data Frame 2 has been read, reading of Frame 3 of the SLM data from the first memory 50-4 begins.

[0083] In this way, SLM data indicating the exposure pattern to be generated by the micromirrors Ms of the DMD 10 may be transmitted in a time-division manner. Even with this configuration, it is possible to reduce the transfer time of SLM data corresponding to the entire pattern to be formed on the substrate P in one scan (exposure process) compared to when there is one first memory. When the SLM data is transmitted in a time-division manner, the SLM data is merged in the second storage unit 60.

[0084] Second Embodiment Next, a second embodiment will be described. In the second embodiment, the configuration of the storage control board 300A-n (n = 1 to 27) differs from that of the storage control board 300-n (n = 1 to 27) according to the first embodiment. Fig. 12 is a block diagram showing the configuration of the storage control board 300A-n according to the second embodiment.

[0085] The first storage unit 50A provided in the storage control board 300A-n according to the second embodiment includes a first memory group G1 including first memories 50-1 to 50-4, and a second memory group G2 including first memories 50-11 to 50-14. The second storage unit 60 is capable of switching its connection between the first memory group G1 and the second memory group G2.

[0086] In the second embodiment, for example, SLM data A-DnA to A-DnD for forming pattern A on substrate P, which is stored in the first memories 50-1 to 50-4 of the first memory group G1, is read into the second storage unit 60, and while the exposure process is being performed, SLM data B-DnA to B-DnD for forming pattern B (next lot) different from pattern A is written into the first memories 50-11 to 50-14 of the second memory group G2. In other words, the reading of the SLM data A-DnA to A-DnD from the first memories 50-1 to 50-4 of the first memory group G1 and the writing of the SLM data B-DnA to B-DnD into the first memories 50-11 to 50-14 of the second memory group G2 are performed in parallel. In this embodiment, the SLM data is written to the first memories 50-11 to 50-14 of the second memory group G2 during the exposure process, but the SLM data may also be written during substrate alignment or calibration of the exposure apparatus. Also, in the first embodiment, the SLM data may be transferred to the first memories 50-1 to 50-4 during substrate alignment or calibration of the exposure apparatus.

[0087] 13A is a conceptual diagram showing the procedure for forming a pattern A on a substrate and then forming a pattern B, which is different from pattern A, on the substrate in the exposure apparatus EX according to the first embodiment. In FIG. 13A, the SLM data for pattern A created in module PC200-n (n = 1 to 27) is written to the first memories 50-1 to 50-4 of the first memory group G1, and then the exposure process for pattern A begins. During the exposure process for pattern A, the first memories 50-1 to 50-4 are used to transfer the SLM data from the first memories 50-1 to 50-4 to the second storage unit 60, and therefore the SLM data for pattern B cannot be written to the first memories 50-1 to 50-4. 13A, for example, the process of writing the SLM data of pattern B into the first memories 50-1 to 50-4 is started after the exposure process of pattern A. Note that the process of writing the SLM data of pattern B into the first memories 50-1 to 50-4 may be started immediately after the transfer of the SLM data of pattern A is completed.

[0088] Figure 13 (B) is a conceptual diagram showing the procedure for forming a pattern B, which is different from pattern A, on a substrate in an exposure apparatus EX equipped with a storage control board 300A-n (n = 1 to 27) according to the second embodiment.

[0089] 13B , the SLM data for pattern A created in module PC200-n (n = 1 to 27) is written to the first memories 50-1 to 50-4 of the first memory group G1, and then the exposure process for pattern A begins. During the exposure process for pattern A, the second storage unit 60 is connected to the first memories 50-1 to 50-4 of the first memory group G1. As described above, during the exposure process for pattern A, data cannot be written to the first memories 50-1 to 50-4, but the first memories 50-11 to 50-14 of the second memory group G2 are not in use, so SLM data can be written thereto. Therefore, in the second embodiment, the SLM data for pattern B is written to the first memories 50-11 to 50-14 of the second memory group G2 in parallel with the transfer of SLM data to the second storage unit 60 and the exposure process for pattern A.

[0090] When the exposure process of pattern A is completed, the connection destination of the second storage unit 60 is changed to the first memories 50-11 to 50-14 of the second memory group G2, the SLM data is read from the first memories 50-11 to 50-14 to the second storage unit 60, and the exposure process of pattern B is performed.

[0091] In this way, by providing multiple memory groups each including multiple first memories, the exposure process and the process of writing SLM data to the first memories can be performed in parallel, thereby improving the throughput of the exposure apparatus EX as a whole.

[0092] As described above in detail, according to the second embodiment, the storage control board 300A-n has a first memory group G1 including a plurality of first memories 50-1 to 50-4 that store SLM data transferred from the module PC200-n, and a second memory group G2 including a plurality of first memories 50-11 to 50-14 that are different from the first memory group G1. While the SLM data A-DnA to A-DnD of pattern A stored in the plurality of first memories 50-1 to 50-4 of the first memory group G1 is being transferred to the second storage unit 60, the module PC200-n writes the SLM data B-DnA to B-DnD of pattern B, which is different from pattern A, to the first memories 50-11 to 50-14 of the second memory group G2. This allows the time-consuming process of writing the SLM data to the first memories to be performed behind the scenes of the exposure process, thereby improving the throughput of the exposure apparatus EX.

[0093] [Third Embodiment] The third embodiment describes the case where a rewiring layer that connects pads of a semiconductor chip is formed using an exposure apparatus EX in the manufacture of semiconductor device packages called FO-WLP (Fan Out Wafer Level Package) and FO-PLP (Fan Out Plate Level Package).

[0094] Fig. 14 is a diagram showing an overview of an exposure system EXS according to the third embodiment. The exposure system EXS is a system for forming wiring patterns that connect between semiconductor chips (hereinafter referred to as chips) arranged on a wafer WF as shown in Fig. 15(A) or between chips arranged on a substrate P as shown in Fig. 15(B).

[0095] In this embodiment, a wiring pattern is formed that connects between chips C1 and C2 included in each set (indicated by two-dot chain lines) of multiple chips arranged on the wafer WF or substrate P. Note that in this embodiment, the number of chips included in each set is two, but this is not limited to this and may be three or more.

[0096] In the following, a case where a wiring pattern for connecting chips arranged on a wafer WF is formed will be described.

[0097] 14, the exposure system EXS includes a wafer arrangement apparatus WA, a chip measurement station CMS, a coater developer apparatus CD, and an exposure apparatus EX. Note that in the third embodiment, the exposure apparatus EX includes the storage control board 300A-n according to the second embodiment.

[0098] The wafer arrangement device WA attaches a plurality of wafers WF, on which chips are arranged, to a base substrate B. The base substrate B, on which the plurality of wafers WF have been attached by the wafer arrangement device WA, is carried into the chip measurement station CMS.

[0099] The chip measurement station CMS is equipped with a plurality of measurement microscopes 81, and measures the positions of chips in different sets. Here, the positions of chips in different sets measured by the plurality of measurement microscopes 81 may be the positions of chips in different sets on the same wafer WF, or the positions of chips in each set on different wafers WF. In this embodiment, the plurality of measurement microscopes 81 measure the positions of chips in each set on different wafers WF.

[0100] Here, we will explain why the chip positions are measured in the chip measurement station CMS. FIG. 16A is a schematic diagram showing a wafer WF with all chips arranged in their designed positions (hereinafter referred to as "design positions"). As shown in FIG. 16A, a wiring pattern WL connecting chip C1 and chip C2 is exposed (formed) by an exposure apparatus EX. In FO-WLP, the chips are solidified on the wafer WF with a molding material such as resin, and as shown in FIG. 16B, the positions of individual chips may be shifted from their designed positions. In this case, if the DMD 10 is controlled to expose the wiring pattern using SLM data (hereinafter referred to as "design value data") indicating the wiring pattern connecting chips located in their designed positions, the wiring pattern may be shifted from the pad positions, resulting in poor connection or short circuits.

[0101] Therefore, in this embodiment, wiring pattern data is created by correcting part of the design value data based on the measurement results of the positions of the chips included in each set of a plurality of chips arranged on the wafer WF.

[0102] The chip position measurement results are transmitted to the module PC200-n (n = 1 to 27). Design value data is pre-stored in the module PC200-n (n = 1 to 27). The module PC200-n creates wiring pattern data based on the chip position measurement results received from the chip measurement station CMS. The wiring pattern data created by the module PC200-n is stored in a memory group different from the memory group that stores the wiring pattern data used to control the exposure of the substrate currently being exposed. That is, if the wiring pattern data used to control the exposure of the wafer WF currently being exposed is stored in the first memories 50-1 to 50-4 of the first memory group G1, the module PC200-n stores (transfers) the created wiring pattern data in the first memories 50-11 to 50-14 of the second memory group G2.

[0103] After the chip position measurement is completed, the wafer WF is loaded together with the base substrate B into the coater developer device CD, where it is coated with a photosensitive resist and then loaded into the port PT of the substrate exchange unit PCU. The wafer WF is then placed together with the base substrate B on the substrate holder 4B of the XY stage 4A.

[0104] FIG. 17 is a conceptual diagram of a procedure for forming a wiring pattern in FO-WLP in the third embodiment.

[0105] 17, in this embodiment, when the chip position is measured in the chip measurement station CMS, the module PC 200-n creates wiring pattern data based on the chip position measurement results, and then creates divided wiring pattern data by dividing the created wiring pattern data into segments. The module PC 200-n transfers the divided wiring pattern data to the first memories 50-1 to 50-4. As a result, the divided wiring pattern data is written to the first memories 50-1 to 50-4. The divided wiring pattern data stored in the first memories 50-1 to 50-4 is sequentially transferred to the DMD control board 400-n in synchronization with the start of exposure of the wafer WF.

[0106] While the main body MB is performing exposure processing, the chip measurement station CMS begins measuring the chip position of the wafer WF that will be next exposed by the main body MB. The module PC 200-n creates wiring pattern data based on the chip position measurement results, and then creates divided wiring pattern data by dividing the created wiring pattern data into segments. The module PC 200-n transfers the divided wiring pattern data to the first memories 50-11 to 50-14. The divided wiring pattern data stored in the first memories 50-11 to 50-14 are sequentially transferred to the DMD control board 400-n in synchronization with the start of exposure of the wafer WF on the substrate holder 4B.

[0107] In this way, by providing the first memory group G1 (first memories 50-1 to 50-4) and the second memory group G2 (first memories 50-11 to 50-14), the time required for measuring chip positions and creating and transferring wiring pattern data can be hidden in the time required for exposure processing. This improves the throughput in forming wiring patterns for FO-WLP. Such parallel processing is particularly effective when it takes a long time to create, transfer, and store wiring pattern data.

[0108] In the first to third embodiments, the first memories included in the first storage unit 50 or 50A may be solid-state drives (SSDs), dynamic random access memories (DRAMs), flash memories, hard disk drives (HDDs), magnetic random access memories (MRAMs), RAID storages, or network storages. The second storage unit 60 may be high-bandwidth memories (HBMs), dynamic random access memories (DRAMs), or static random access memories (SRAMs).

[0109] Furthermore, this embodiment is not limited to FO-WLP and FO-PLP, but can also be used when manufacturing semiconductor chips and flat panel displays. Semiconductor chips and flat panel displays are manufactured by overlaying several to several dozen different patterns on the chip C1, so accurate overlay exposure on the chip C1 is required. Therefore, when the chip position is measured in the chip measurement station CMS, the module PC200-n creates wiring pattern data based on the measurement results of the chip position, and then creates divided wiring pattern data by dividing the created wiring pattern data into segments. This enables the module MUn to expose at the correct position.

[0110] Furthermore, if the PC bus is sufficiently fast, the first memories 50-1 to 50-4 may be provided in the module PC 200B-n instead of the storage control board 300B-n, as shown in FIG.

[0111] Fourth Embodiment In the fourth embodiment, an abnormality detection for the first memory 50-m (m = 1 to 4, 11 to 14) used in the first to third embodiments will be described. If there is an error in the data stored in the first memory 50-m (m = 1 to 4, 11 to 14), the width of the exposed pattern may be narrowed, and sufficient exposure quality may not be obtained. Furthermore, a decrease in the read speed of the first memory reduces the amount of data in the second storage unit 60. When the remaining data in the second storage unit 60 reaches "0," data is depleted, resulting in exposure failure. Therefore, to avoid such a situation, it is desirable to prevent the various characteristics of the first memory from failing to satisfy the conditions necessary for executing the exposure process during the exposure process and to enable replacement of the first memory during maintenance or other timing.

[0112] Generally, the lifespan of a primary memory such as an SSD is specified in TBW (Total Bytes Written), which is defined as the total amount of written data that can be correctly retained for one year with the power turned off.

[0113] However, in the first memories 50-m (m=1 to 4, 11 to 14) used in exposure apparatus EX, SLM data is written to the first memories 50-m during the first processing of a lot, so the TBW condition of "being able to correctly retain data for one year" is excessive; it is sufficient if the data can be correctly retained temporarily (for example, for the processing time of one lot). Also, in order to prevent the read speed of the first memory from decreasing and the data in the second storage unit 60 from running out, it is necessary to maintain a predetermined first memory read speed that is not specified by TBW.

[0114] From the above, the total amount of data written that satisfies the following two conditions is defined as the life of the first memory in the exposure apparatus EX according to this embodiment: (1) Data can be held normally for at least one lot processing time. (2) A predetermined first memory read speed can be maintained. In the following explanation, the total amount of data written that represents the life of the first memory in the exposure apparatus EX according to the first to third embodiments will be referred to as special TBW to distinguish it from TBW.

[0115] (Special TBW Determination Method) Next, a method for determining the special TBW will be described.

[0116] Figure 19(A) is a time chart showing the change in the amount of data in the second memory unit 60 during exposure processing, and Figure 19(B) is a diagram showing the first memory read speed relative to the total amount of data written and the minimum amount of data in the second memory unit 60 during exposure.

[0117] 19A , after the exposure process starts at time t1, the amount of data in the second storage unit 60 remains full while the read speed of the first memory exceeds the data transfer speed from the second storage unit 60 (between time t1 and time t2). Then, for example, if the read speed of the first memory decreases or data reading from the first memory is temporarily stopped at time t2, causing the amount of data transferred from the first memory to the second storage unit 60 to fall below the amount of data transferred from the second storage unit 60, the amount of data in the second storage unit 60 decreases. Then, at time t3, when the read speed of the first memory again exceeds the data transfer speed from the second storage unit 60, the amount of data in the second storage unit 60 increases. In this way, the amount of data in the second storage unit 60 fluctuates during the exposure process. The minimum data amount is defined as the minimum value MIN of the amount of data in the second memory unit 60 during the period from when exposure begins until all of the SLM data in the first memory is transferred to the second memory unit 60 (the period from time t1 to time t4).

[0118] As shown in FIG. 19B, it is thought that the read speed of the first memory remains almost constant while the total amount of data written is less than the first amount TA1, and begins to gradually decrease once it exceeds the first amount TA1.

[0119] As a result, the minimum data amount in the second storage unit 60 also remains approximately constant until the total amount of written data reaches the first amount TA1, but gradually decreases once it exceeds the first amount TA1, and when it reaches the second amount TA2, the minimum data amount becomes 0. When the minimum data amount becomes 0, the data in the second storage unit 60 runs out, resulting in poor exposure. Therefore, it is desirable to replace the first memory when the total amount of written data is less than the second amount TA2.

[0120] Therefore, in this embodiment, in the durability test, the total amount of data written and the minimum amount of data in the second storage unit 60 during the exposure process are obtained, and the total amount of data written at which the data in the second storage unit 60 will be depleted (second amount TA2) is obtained. Then, to be safe, a total amount of data written TAth that is, for example, a predetermined percentage (e.g., 20% to 30%) lower than the second amount TA2 is set as the special TBW. Therefore, a special TBW is set as the lifespan for each of the first memories 50-m used in the exposure apparatus EX according to this embodiment. Theoretically, the value of the special TBW is equal to or greater than the value of TBW.

[0121] Next, an abnormality detection device for detecting an abnormality or replacement time of the first memories 50-m (m=1 to 4, 11 to 14) will be described. The abnormality detection device is provided in the data transfer device 1000, for example.

[0122] 20 is a functional block diagram of an abnormality detection device 600-n (n=1 to 27) according to this embodiment. In this embodiment, the abnormality detection device 600-n (n=1 to 27) is provided corresponding to each of the modules MUn (n=1 to 27).

[0123] The abnormality detection device 600-n (n=1 to 27) includes a consistency monitor 601, a read speed monitor 603, a total write amount monitor 605, an elapsed time / read count monitor 610, an abnormality determination unit 607, a log DB 609, and the like.

[0124] The log DB 609 stores logs that record various conditions, setting values, measurement values ​​during exposure processing of the substrate, and the timing when the abnormality judgment unit 607 detected an abnormality in the first memory 50-m (m = 1 to 4, 11 to 14).

[0125] The consistency monitor unit 601 checks whether the data written to the first memory 50-m (m = 1 to 4, 11 to 14) is correct. In this embodiment, the consistency monitor unit 601 checks whether the data written to the first memory 50-m (m = 1 to 4, 11 to 14) is correct by using CRC (Cyclic Redundancy Check), which is widely used as an error detection code.

[0126] Specifically, when transferring data from the module PC200-n (n=1 to 27) to the first memory 50-m (m=1 to 4, 11 to 14), the consistency monitor unit 601 stores the SLM data together with the CRC code calculated from the SLM data. When reading the following data (1) to (3), the consistency monitor unit 601 compares the CRC code recalculated from the read SLM data with the read CRC code to check the consistency of the data. Alternatively, the consistency of the data transferred from the module PC200-n (n=1 to 27) to the first memory 50-m (m=1 to 4, 11 to 14) with the following data (1) to (3) to check the consistency of the data. (1) Data transferred from the first memory 50-m (m=1 to 4, 11 to 14) (2) Data transferred from the second storage unit 60 (3) Data transferred from the DMD control board 400-n (n=1 to 27) to the DMD 10

[0127] More specifically, when transferring data from the module PC200-n (n = 1 to 27) to the first memory 50-m (m = 1 to 4, 11 to 14), the consistency monitor unit 601 stores the SLM data together with a CRC code calculated from the SLM data. When reading the following data (1) to (3), the consistency monitor unit 601 compares the CRC code recalculated from the read SLM data with the read CRC code, or compares the data transferred from the module PC200-n (n = 1 to 27) with the data (1) to (3), and calculates a bit error rate. In other words, the consistency monitor unit 601 compares the data before being stored in the storage control board 300-n with the data (1) to (3) to monitor for the presence or absence of different signals. The consistency monitor unit 601 outputs the calculated bit error rate to the abnormality determination unit 607.

[0128] The read speed monitor unit 603 monitors whether the read speed of the first memory 50-m (m = 1 to 4, 11 to 14) is maintained at a predetermined speed. In this embodiment, the read speed monitor unit 603 monitors the read speed of the first memory by monitoring the minimum value of the remaining amount of data (minimum data amount) in the second storage unit 60 during the exposure process. The read speed monitor unit 603 outputs the minimum data amount in the second storage unit 60 during the exposure process to the abnormality determination unit 607. Furthermore, the read speed monitor unit 603 may monitor the remaining amount of data in the second storage unit 60 in real time or at predetermined intervals.

[0129] The total write amount monitor unit 605 monitors the total amount of data written to each of the first memories 50 - m (m=1 to 4, 11 to 14 ), and outputs the result to the abnormality determination unit 607 .

[0130] The elapsed time and read count monitor unit 610 monitors the data write time or data read count for each of the first memories 50-m (m = 1 to 4, 11 to 14), and outputs the result to the abnormality determination unit 607. The first memories 50-m (m = 1 to 4, 11 to 14) have a shorter time available for high-speed readout when transferring SLM data to the second storage unit 60. Therefore, the elapsed time and read count monitor unit 610 monitors the time elapsed since the SLM data was written to the first memories 50-m (m = 1 to 4, 11 to 14).

[0131] The abnormality determination unit 607 compares the code error rate, minimum data amount (first memory read speed), total amount of data written, and elapsed time since the end of writing SLM data to the first memory 50-m (m = 1 to 4, 11 to 14) with their respective threshold values.

[0132] For example, when the bit error rate is equal to or greater than a preset threshold value BER (Bit Error Rate) th, the abnormality determination unit 607 determines that the first memory 50-m (m = 1 to 4, 11 to 14) needs to be replaced. In this case, in this embodiment, the abnormality determination unit 607 stores the timing at which the bit error rate becomes equal to or greater than the threshold value BERth in the log DB 609. The abnormality determination unit 607 may output an alert when the bit error rate becomes equal to or greater than the preset threshold value BERth. Note that the threshold value BERth is set to a value that can maintain the desired exposure quality.

[0133] Furthermore, for example, if the minimum data amount is equal to or less than a preset threshold MDAth, the abnormality determination unit 607 determines that the first memory 50-m (m = 1 to 4, 11 to 14) needs to be replaced. In this case, in this embodiment, the abnormality determination unit 607 not only stores the minimum data amount, but also the timing at which the minimum data amount became equal to or less than the threshold MDAth in the log DB 609. The abnormality determination unit 607 may output an alert if the minimum data amount is equal to or less than the preset threshold MDAth.

[0134] Furthermore, when the total amount of data written to the first memory 50-m (m = 1 to 4, 11 to 14) exceeds the special TBW described above, the abnormality determination unit 607 determines that the first memory 50-m (m = 1 to 4, 11 to 14) needs to be replaced. In this case, in this embodiment, the abnormality determination unit 607 stores the timing at which the total amount of data written exceeded the special TBW in the log DB 609. The abnormality determination unit 607 may output an alert when the total amount of data written exceeds the special TBW.

[0135] Furthermore, the abnormality determination unit 607 may output an alert if the elapsed time since the end of writing of SLM data to the first memory 50-m (m = 1 to 4, 11 to 14) exceeds a threshold time. Furthermore, a rewriting unit 611 included in the abnormality determination unit 607 may rewrite the SLM data to the first memory 50-m (m = 1 to 4, 11 to 14). Furthermore, as the total amount of SLM data written to the first memory 50-m (m = 1 to 4, 11 to 14) increases, the time during which the first memory 50-m (m = 1 to 4, 11 to 14) can correctly store data becomes shorter. Therefore, the number of times and timing of rewriting SLM data to the first memory 50-m (m = 1 to 4, 11 to 14) by the rewriting unit 611 are determined and controlled by the abnormality determination unit 607 based on the number of times SLM data is written to the first memory 50-m (m = 1 to 4, 11 to 14) monitored by the elapsed time / read count monitor unit 610 and the total elapsed writing time.

[0136] The alert may be output, for example, by outputting a message to a display device DSPLY such as a liquid crystal display provided in the exposure apparatus EX, or by displaying or printing out part of the data stored in the log DB 609 on the display device DSPLY. The alert may be output each time processing of one substrate is completed, or may be output for each lot. When output for each lot, it may be configured to output that a substrate on which an error has occurred has been present.

[0137] As described above in detail, according to the fourth embodiment, the abnormality detection device 600-n (n=1 to 27) provided in the data transfer device 1000 includes a read speed monitor unit 603 that monitors the amount of SLM data stored in the second storage unit 60. This makes it possible to determine whether or not the data in the second storage unit 60 has run out during the exposure process.

[0138] Furthermore, according to the fourth embodiment, a log DB 609 is provided that stores the timing when the amount of SLM data stored in the second storage unit 60 falls below the threshold MDAth, the timing when the difference in transfer speed between the SLM data (second data) from each first memory 50-m (m = 1 to 4, 11 to 14) and the SLM data (third data) transferred from the second storage unit 60 falls below the threshold, or the timing (number of frames) when the amount of data in the second storage unit 60 becomes zero. This makes it possible to confirm the timing when the data in the second storage unit 60 falls below the threshold MDAth. Furthermore, the log DB 609 also records settings during the exposure process and the status of each device, so that by using these other records, it is possible to analyze the situation when the data in the second storage unit 60 falls below the threshold MDAth. Furthermore, the exposure apparatus EX can provide users and maintenance personnel with information to determine when to replace the first memories 50-m (m = 1 to 4).

[0139] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n includes an abnormality determination unit 607 that displays a warning (alert) on the display device DSPLY (display screen) of the exposure apparatus EX when the amount of SLM data stored in the second storage unit 60 is equal to or less than a threshold MDAth, when the difference in transfer speed between the transfer speed of the SLM data from each first memory 50-m (m = 1 to 4, 11 to 14) and the transfer speed of the SLM data transferred from the second storage unit 60 is equal to or less than a threshold, or when the data amount in the second storage unit 60 is 0. This allows the operator of the exposure apparatus EX to know when it is necessary to replace the first memory 50-m.

[0140] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n includes a total write amount monitor unit 605 that monitors the total amount of SLM data stored in each of the plurality of first memories 50-m (m = 1 to 4, 11 to 14). This makes it possible to determine whether the total amount of data written exceeds the special TBW.

[0141] Furthermore, according to the fourth embodiment, each of the plurality of first memories 50-m (m = 1 to 4, 11 to 14) can correctly hold the SLM data stored in each of the plurality of first memories 50-m for a predetermined period (e.g., the processing period for one lot) even after the total amount of SLM data stored in each of the plurality of first memories 50-m exceeds the TBW set for each of the plurality of first memories 50-m. This allows the first memories 50-m to be used for a period longer than the lifespan defined by the TBW.

[0142] Furthermore, according to the fourth embodiment, a value (special TBW) equal to or greater than the TBW is set as the lifespan for each of the multiple first memories 50-m. Because the special TBW is greater than the TBW, the replacement interval for the first memories 50-m can be made longer compared to when the first memories 50-m are replaced based on the TBW. Therefore, the lifetime cost of the exposure apparatus EX can be reduced.

[0143] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n has a log DB 609 that records the total amount of data stored in each of the multiple first memories 50-m and stores the timing when the total amount of data becomes equal to or exceeds a threshold value (special TBW). This makes it possible to confirm the timing when the total amount of written data becomes equal to or exceeds the threshold value (special TBW). Furthermore, it is possible to provide the user or maintenance person of the exposure apparatus EX with information to determine when to replace the first memories 50-m (m = 1 to 4).

[0144] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n includes a consistency monitor unit 601 that compares the SLM data before it is stored in the storage control board 300-n with the SLM data transferred from the storage control board 300-n to calculate the bit error rate (monitors whether or not there are different signals). This makes it possible to check whether the consistency of the data is maintained.

[0145] Furthermore, according to the fourth embodiment, the consistency monitor unit 601 calculates the bit error rate by comparing the SLM data before being stored in the storage control board 300-n with the SLM data transferred from the second storage unit 60 (monitoring the presence or absence of different signals). This makes it possible to confirm whether the consistency of the data is maintained.

[0146] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n is provided with a log DB 609 that stores the timing when the bit error rate measured by the consistency monitor unit 601 becomes equal to or greater than the threshold BERth. This makes it possible to confirm the timing when the bit error rate becomes equal to or greater than the threshold BERth. Furthermore, it is possible to provide the user or maintenance person of the exposure apparatus EX with information to determine the timing of replacing the first memory 50-m (m = 1 to 4).

[0147] Furthermore, according to the fourth embodiment, the abnormality detection device 600-n includes an abnormality determination unit 607 that displays a warning (alert) on the display device DSPLY when the bit error rate measured by the consistency monitor unit 601 is equal to or greater than the threshold value BERth. This allows the operator of the exposure apparatus EX to know when to replace the first memory 50-m.

[0148] In the fourth embodiment, the special TBW is determined based on the minimum data amount in the second storage unit 60, but this is not limiting. If a correlation exists between the total amount of write data and the bit error rate, the special TBW may be determined based on the bit error rate. For example, if a relationship exists in which the bit error rate increases when the total amount of write data exceeds the first amount TA1, the total amount of data written at which the bit error rate exceeds a threshold value may be set as the special TBW. Alternatively, the special TBW may be determined using both the minimum data amount in the second storage unit 60 and the bit error rate.

[0149] In the fourth embodiment, the abnormality detection device 600 - n may have at least two of the consistency monitor 601 , the read speed monitor 603 , and the total write amount monitor 605 .

[0150] Furthermore, in the fourth embodiment, the temperature near the second storage unit 60 and the temperature near the first memory may be measured. At least one of an operational guarantee temperature and a performance guarantee temperature is provided for each component by the manufacturer. For example, if the first memory or the second storage unit 60 is used at a temperature outside the operational guarantee temperature, there is a risk of malfunction. Therefore, an error (alert) may be output when the temperature near the second storage unit 60 and the temperature near the first memory fall outside their respective operational guarantee temperatures.

[0151] In the first to fourth embodiments, there are cases where exposed SLM data remains in the first memory 50-m (m = 1 to 4, 11 to 14). In such cases, garbage collection processing is irregularly and asynchronously initiated within the first memory 50-m (m = 1 to 4, 11 to 14). If garbage collection processing is initiated during exposure, the transfer speed of SLM data from the first memory 50-m (m = 1 to 4, 11 to 14) may decrease or may be temporarily suspended. To prevent this phenomenon, as shown in FIG. 21 , the abnormality detection device 600-n may include an erasure unit 612 that erases exposed SLM data stored in the first memory 50-m (m = 1 to 4, 11 to 14). In addition, the erasure unit 612 may erase exposed SLM data stored in the first memory 50-m (m = 1 to 4, 11 to 14) during the switching from a processing lot in which multiple substrates are being processed to the next lot to be processed, or during the calibration time of the device.

[0152] In the first to fourth embodiments, if the first memory 50-1 of the first memories 50-m (m = 1 to 4, 11 to 14) becomes unusable, the SLM data DnA that was to be stored in the first memory 50-1 is divided and stored in the remaining first memories 50-2 to 50-4. This reduces the downtime during which the exposure apparatus cannot be used. This is not limited to the case where one first memory 50-m (m = 1 to 4, 11 to 14) becomes unusable, but is also true when multiple first memories 50-m (m = 1 to 4, 11 to 14) become unusable.

[0153] In the first to fourth embodiments, each of the first memories 50-m (m = 1 to 4, 11 to 14) can store the same SLM data at different addresses within the first memory 50-m (m = 1 to 4, 11 to 14). Specifically, the SLM data DnA is stored at two or more different addresses (first address, second address) within the first memory 50-1. If the data transfer rate of the SLM data DnA from the first address in the first memory 50-1 to the second storage unit 60 is slow for some reason, the transfer source is changed from the first address to the second address during data transfer, and the SLM data DnA is transferred to the second storage unit 60. This prevents delays in the data transfer rate. Furthermore, when the transfer source is changed from the first address to the second address, it is preferable that the data transferred from the second address be transferred from a location following the SLM data transferred from the first address.

[0154] In the first to fourth embodiments, the exposure position (imaging position) is corrected in each module MU1 to MU27, eliminating the need to modify the SLM data for adjusting the exposure position. The exposure position can be adjusted by adjusting the position of the lens in each module MU1 to MU27. Therefore, the same SLM data can be used for different substrates and different scan (product) areas. This eliminates the need for a data transfer process for each substrate, thereby shortening data transfer time and increasing device operating time. Furthermore, transferring exposure data for each substrate would require data transfer even during exposure, preventing the DMD from operating at high speed. This is because data transfer may not be able to keep up with the high-speed operation of the DMD, ultimately resulting in exposure failure. Furthermore, using this method allows for the use of large-capacity, high-speed, and inexpensive memory as the first memory 50-m (m = 1 to 4, 11 to 14).

[0155] In the first to fourth embodiments, when a nonvolatile memory such as an SSD or HDD is used as the first memory 50-m (m=1 to 4, 11 to 14), the data transfer rate from the first memory 50-m (m=1 to 4, 11 to 14) to the second storage unit 60 may be slower than the reference data transfer rate. This occurs because the data transfer rate may be slowed if data is repeatedly stored at the address of a specific memory element in the first memory 50-m (m=1 to 4, 11 to 14) that was used to store SLM data. In such a case, the first memory 50-m (m=1 to 4, 11 to 14) stores the address of the memory element with the slow data transfer rate, and stores the SLM data transferred from the module PC at a memory element address different from the address of the memory element with the slow data transfer rate. The first memory 50-m (m=1 to 4, 11 to 14) then transfers the SLM data to the second storage unit 60 from the changed memory element address. This makes it possible to prevent a decrease in data transfer speed.

[0156] The first to fourth embodiments can be applied to an exposure apparatus used in the manufacture of liquid crystal display elements, an exposure apparatus used in the manufacture of displays including semiconductor elements and the like to transfer a device pattern onto a semiconductor substrate, an exposure apparatus used in the manufacture of thin-film magnetic heads to transfer a device pattern onto a ceramic wafer, and an exposure apparatus used in the manufacture of imaging elements such as CCDs.

[0157] Next, an embodiment of a method for manufacturing a microdevice using the exposure apparatus according to the first to fourth embodiments in a lithography process will be described. FIG. 22 is a flowchart showing part of the manufacturing process when manufacturing semiconductor devices as microdevices. First, in step S501 of FIG. 22, a metal film is evaporated onto one lot of wafers. In the next step S502, a photoresist is applied to the metal film on the one lot of wafers. Then, in step S503, using the exposure apparatus EX shown in FIG. 1, an image of a pattern generated by the DMD 10 is sequentially exposed and transferred onto each shot area on the one lot of wafers via its projection optical system (projection system).

[0158] Then, in step S504, the photoresist on the wafers in that lot is developed (developing process), and then in step S505, etching is performed on the wafers in that lot using the resist pattern as a mask, thereby forming a circuit pattern corresponding to the pattern generated by DMD 10 in each shot area on each wafer. Thereafter, circuit patterns in upper layers are formed, and devices such as semiconductor elements are manufactured. According to the semiconductor device manufacturing method described above, semiconductor devices having extremely fine circuit patterns can be obtained with good throughput.

[0159] Furthermore, in each of the above exposure apparatuses, a liquid crystal display element can be obtained as a microdevice by forming a predetermined pattern (circuit pattern, electrode pattern, etc.) on the substrate P. An example of the technique for doing so will be described below with reference to the flowchart in Fig. 23. Fig. 23 is a flowchart showing part of the manufacturing process for manufacturing a liquid crystal display element as a microdevice.

[0160] 23, a so-called photolithography process is performed in which a pattern generated by the DMD 10 is transferred onto a photosensitive substrate (such as a glass substrate coated with resist) using an exposure apparatus EX or the like according to this embodiment. A predetermined pattern including a large number of electrodes and the like is formed on the photosensitive substrate through this photolithography process. The exposed substrate then undergoes various processes, such as a development process, an etching process, and a reticle peeling process, thereby forming the predetermined pattern on the substrate, and the process proceeds to the next color filter formation process S522.

[0161] Next, in the color filter formation step S522, a color filter is formed in which a large number of sets of three dots corresponding to R (Red), G (Green), and B (Blue) are arranged in a matrix, or in which a plurality of sets of three striped filters of R, G, and B are arranged in the horizontal scanning line direction. After the color filter formation step S522, a cell assembly step S524 is performed. In the cell assembly step S524, a liquid crystal panel (liquid crystal cell) is assembled using the substrate having the predetermined pattern obtained in the pattern formation step S520 and the color filter obtained in the color filter formation step S522.

[0162] In the cell assembly process S524, for example, a liquid crystal panel (liquid crystal cell) is manufactured by injecting liquid crystal between a substrate having a predetermined pattern obtained in the pattern formation process S520 and a color filter obtained in the color filter formation process S522. Then, in the module assembly process S526, various components such as an electrical circuit and a backlight that perform the display operation of the assembled liquid crystal panel (liquid crystal cell) are attached to complete the liquid crystal display element. The above-described method for manufacturing liquid crystal display elements allows for the production of liquid crystal display elements having extremely fine circuit patterns with good throughput.

[0163] The above-described embodiment is a preferred example of the present invention, but the present invention is not limited to this and can be modified in various ways without departing from the spirit of the present invention.

[0164] 4A XY stage 4B Substrate holder 10 DMD 50, 50A First memory section 50-1 to 50-4, 50-11 to 50-14 First memory 60 Second memory section 200-1 to 200-27 Module PC 300-1 to 300-27 Storage control board 600-n Abnormality detection device 601 Consistency monitor section 603 Read speed monitor section 605 Total write amount monitor section 607 Abnormality judgment section 610 Elapsed time / read count monitor section 612 Erasing section 1000 Data transfer device DSPLY Display device EX Exposure device G1 First memory group G2 Second memory group MB Main body section Ms Micromirror MU1 to MU27 Module P Substrate

Claims

1. 1. A data transfer device used in an exposure apparatus that controls a plurality of elements of a spatial light modulation element based on drawing data to expose a substrate, a first processing unit that divides first data, which is the drawing data, to generate a plurality of second data, and transfers the plurality of second data; a second processing unit including a first memory group including a plurality of first memories each storing the plurality of second data transferred from the first processing unit, and transferring the second data from each of the plurality of first memories; a third processing unit having a second storage unit that stores third data, which is the second data transferred from each of the plurality of first memories, and that transfers the third data to the spatial light modulation element; A data transfer device comprising:

2. The data transfer device according to claim 1 , wherein a transfer rate of the third data by the third processing unit is slower than a transfer rate of the second data by the second processing unit.

3. a monitor unit that monitors information related to the second data or the third data, The monitor unit monitoring the amount of the third data stored in the second storage unit; or monitoring a transfer rate difference between the second data transfer rate and the third data transfer rate; or monitoring the amount of the third data stored in the second storage unit at predetermined intervals; or storing the number of frames when the amount of data stored in the second storage unit becomes 0, or the timing when the amount of data of the third data becomes equal to or less than a threshold value when the amount of data of the third data becomes equal to or less than a threshold value, and storing the number of frames when the amount of data stored in the second storage unit becomes 0 during exposure of the substrate, the timing when the transfer speed difference between the transfer speed of the second data and the transfer speed of the third data becomes equal to or less than the threshold value, or When the amount of data stored in the second storage unit becomes 0, when the transfer speed difference between the transfer speed of the second data and the transfer speed of the third data is equal to or less than a threshold, or when the data amount of the third data is equal to or less than a threshold, a warning is displayed on a display screen of the exposure apparatus; or monitoring a total amount of the second data stored in each of the plurality of first memories; or recording a total data amount of the second data stored in each of the plurality of first memories, storing a timing when the total data amount of the second data becomes equal to or greater than a threshold, comparing the second data before being stored in the second processing unit with the third data transferred from the second processing unit to monitor whether a different signal exists, and comparing the second data before being stored in the second processing unit with the third data transferred from the third processing unit to monitor whether a different signal exists, or using the second data, including the error detection code, to monitor for the presence of a different signal during exposure; or monitoring an elapsed time since the second data was stored in the first memory, and restoring the second data to the first memory based on the elapsed time; or monitoring a total amount of the second data stored in the first memory, and restoring the second data to the first memory based on the total amount of the second data stored; and monitoring an elapsed time from the end of storing the second data in the first memory and the total amount of the second data stored in the first memory, and restoring the second data to the first memory based on the elapsed time and the total amount of the second data stored.

2. The data transfer device according to claim 1.

4. the first memory group includes at least two of the first memories, one of the first memories stores one of the plurality of second data, and the other of the first memories stores the other of the plurality of second data, and when one of the first memories becomes unavailable, the other of the first memories stores the one of the second data and the other of the second data; or the first memory stores one of the plurality of second data at a first address and a second address that are two or more different addresses in the first memory, and when a transfer speed of the one of the second data from the first address of the first memory is slower than a predetermined speed, the first memory suspends the transfer of the one of the second data from the first address and transfers the one of the second data from the second address; or When a transfer rate of the second data from the first memory to the second storage unit is slower than a reference transfer rate, the first memory stores the second data at an address of a memory element different from an address of a memory element of the first memory that has been used; or each of the plurality of first memories can correctly hold the first data in each of the plurality of first memories for a predetermined period even after a total data amount of the second data stored in each of the plurality of first memories exceeds a TBW (Total Bytes Written) set in each of the plurality of first memories; The data transfer device according to any one of claims 1 to 3.

5. A value equal to or greater than TBW is set as a lifespan for each of the plurality of first memories; or the second processing unit transfers an amount of data equal to or greater than an amount of data determined by a predetermined formula to the second storage unit before the exposure process; The predetermined formula is: When the data transfer rate to the control board of the spatial light modulation element is greater than the nominal value of the readout rate of the first memory, Minimum required buffer capacity={(data transfer rate to the control board of the spatial light modulation element−transfer rate assuming a decrease in the readout rate of the first memory))×estimated time for the decrease in the readout rate of the first memory} (1) and When the data transfer rate to the control board of the spatial light modulation element is less than the nominal value of the readout rate of the first memory, Minimum required buffer capacity={data transfer rate to the control board of the spatial light modulation element−nominal value of readout rate of the first memory×scanning time}+{(data transfer rate to the control board of the spatial light modulation element−transfer rate assuming a decrease in the readout rate of the first memory)×assumed time for decrease in the readout rate of the first memory} (2) That is, The data transfer device according to any one of claims 1 to 3.

6. the second processing unit transfers the second data to the third processing unit before exposure of the substrate, the third processing unit stores the third data in the second storage unit before exposure of the substrate, and the second processing unit transfers a portion of the second data to the third processing unit before exposure of the substrate, or The first processing unit divides the plurality of elements into a plurality of regions in order to generate the second data, and generates the second data corresponding to each of the plurality of regions from the first data; or the first processing unit generates the second data for allocating and transferring first control data for controlling the plurality of elements at a first timing and second control data for controlling the plurality of elements at a second timing to each of the plurality of first memories; or the second processing unit has a second memory group having a plurality of first memories different from the first memory group, the first processing unit transfers the plurality of second data to the second memory group, and the second processing unit transfers the plurality of second data to the third processing unit while the substrate is being aligned or the exposure apparatus is being calibrated; the first processing unit transfers the plurality of second data to the plurality of first memories of the second memory group while the second processing unit is transferring the second data stored in the plurality of first memories of the first memory group to the third processing unit; or while the second processing unit is transferring the second data corresponding to a first pattern to be formed on the substrate, which is stored in the plurality of first memories of the first memory group, to the third processing unit, the first processing unit transfers the second data corresponding to a second pattern different from the first pattern to the plurality of first memories of the second memory group; or an erasure unit that periodically erases used data stored in the plurality of first memories; The data transfer device according to any one of claims 1 to 3.

7. the first data is bitmap data, the spatial light modulation element is a digital micromirror device, and the element is a micromirror; The data transfer device according to any one of claims 1 to 3.

8. The data transfer device according to any one of claims 1 to 3; an illumination unit that illuminates a spatial light modulator controlled based on the third data transferred from the data transfer device with illumination light; a plurality of projection units that form images of the exposure light modulated by the spatial light modulator onto the substrate; and the plurality of projection units adjust an imaging position on the substrate for each projection unit, and image the exposure light on the substrate; Exposure device.

9. The exposure apparatus according to claim 8 , wherein the plurality of projection units adjust an imaging position on the substrate by adjusting an optical element that each projection unit has.

10. A plurality of first memories, each storing data; a second memory that stores a plurality of the data from the plurality of first memories and is connected to each of the first memories; Device.

11. The method of claim 10, wherein each of the plurality of first memories includes a non-volatile memory.

11. The apparatus of claim 10.

12. The second memory includes a random access memory.

11. The apparatus of claim 10.

13. Each of the plurality of first memories includes a non-volatile memory; the second memory includes a random access memory; 11. The apparatus of claim 10.

14. The capacity of the second memory is smaller than the sum of the capacities of the plurality of first memories.

11. The apparatus of claim 10.

15. The method of claim 1, wherein each of the plurality of first memories includes a non-volatile memory; the second memory includes a random access memory; The capacity of the second memory is smaller than the total capacity of the plurality of first memories.

11. The apparatus of claim 10.

16. A method for detecting a data error, comprising: the second memory is connected to each of the third memories and stores a plurality of the data from the plurality of third memories; the second memory is capable of switching a connection destination between the plurality of first memories and the plurality of third memories; 11. The apparatus of claim 10.

17. A storage control board on which the plurality of first memories and the second memory are mounted, 17. Apparatus according to any one of claims 10 to 16.

18. The second memory is connected to the spatial light modulation element so that second data based on the plurality of data from the second memory is sent to the spatial light modulation element.

17. Apparatus according to any one of claims 10 to 16.

19. A spatial light modulation element including a plurality of elements individually controlled based on the second data transmitted from the second memory of the device according to claim 18; A projection unit; Including, light from an element in a first state among the plurality of elements is incident on a substrate via the projection unit, and light from an element in a second state among the plurality of elements is incident on a location other than the projection unit; Exposure device.

20. Exposing an exposure object using the exposure apparatus according to claim 8; developing the exposed object; A device manufacturing method comprising: