Production method for substrate

Abstract

A production method for a substrate (1100) includes a preparation step S10 for preparing a substrate that includes a base substrate (10), a circuit layer (130), and a heat dissipation layer (120) that is between the base substrate (110) and the circuit layer (130) and a formation step S20 for providing a sealing material (150) opposite a first surface of the circuit layer (130) that is on the reverse side from the heat dissipation layer (120) and pressing the sealing material (150) toward the heat dissipation layer (120) while heating to form a sealing material layer (140) that seals the circuit layer (130).

Description

Substrate manufacturing method

[0001] The present invention relates to a method for manufacturing a substrate.

[0002] A method for forming a circuit layer of a circuit board has been to form a circuit pattern by forming a circuit layer and then etching it with a solvent.

[0003] Patent Document 1 describes a method for manufacturing a circuit board, which includes forming a circuit layer by partially dissolving and removing a circuit layer laminated on a support substrate with an etching solution.

[0004] Japanese Patent Application Laid-Open No. 2020-115594

[0005] However, when the circuit layer is thick, it becomes difficult to remove enough metal by etching, making it difficult to form the circuit layer by conventional etching.

[0006] One object of the present invention is to provide a method for manufacturing a substrate containing a thick circuit layer.

[0007] According to the present invention, there is provided the following method for manufacturing a substrate.

[0008] [1] A method for manufacturing a substrate, comprising: a preparation step of preparing a substrate having a base substrate, a circuit layer, and a heat dissipation layer located between the base substrate and the circuit layer; and a molding step of arranging a sealing material to face a first surface of the circuit layer opposite the heat dissipation layer, and pressing the sealing material toward the heat dissipation layer while heating it, thereby molding a sealing material layer that seals the circuit layer. [2] The method for manufacturing a substrate according to [1], wherein the sealing material has a melt viscosity η calculated by the following method, of 10 or more and 40 or less. [Method] Using a high-speed flow tester, a temperature of 175°C, a load of 40 kgf (piston area 1 cm) is measured. ２ The flow rate Q of the melted sealing material per unit time was measured under test conditions of a die hole diameter of 0.50 mm and a die length of 1.00 mm, and the melt viscosity η was calculated by the following formula: [Formula] η=(πD ４ P x 10 ３ / 128LQ) (Pa·sec) where D is the die hole diameter (mm), P is the test pressure (Pa), L is the die length (mm), and Q is the flow rate (cm ３ / second). [3] The method for manufacturing a substrate according to [1] or [2], wherein, in the molding step, when the sealing material is pressed toward the heat dissipation layer and heated, a reaction rate of the heat dissipation layer calculated from the measurement results of a DSC (differential scanning calorimeter) is more than 0% and not more than 60%. [4] The method for manufacturing a substrate according to any of [1] to [3], wherein the sealing material is in the form of a plate-like tablet when placed so as to face the circuit layer. [5] The method for manufacturing a substrate according to any of [1] to [4], wherein, in the molding step, the sealing material layer is molded so as to cover at least a portion of the first surface of the circuit layer. [6] The method for manufacturing a substrate according to [5], further comprising a removal step of removing the sealing material layer molded so as to cover at least a portion of the first surface of the circuit layer. [7] The method for manufacturing a substrate according to any one of [1] to [6], wherein in the preparation step, a sheet for holding the circuit layer on one side is prepared, a heat dissipation layer is arranged on one side of the base substrate, the circuit layer held by the sheet is pressed against the heat dissipation layer, and then the sheet is separated from the heat dissipation layer, thereby holding the circuit layer on the heat dissipation layer. [8] The method for manufacturing a substrate according to [7], wherein the sheet contains polyimide. [9] The method for manufacturing a substrate according to any one of [1] to [8], wherein the base substrate contains at least one of copper and aluminum.

[10] The method for manufacturing a substrate according to any one of [1] to [9], wherein the base substrate includes a heat dissipation portion provided on the surface opposite to the heat dissipation layer.

[0009] A method for manufacturing a substrate including a thick circuit layer can be provided.

[0010] Fig. 1 is a diagram showing an example of a cross section of a substrate according to the present embodiment; Fig. 2 is a diagram showing a second example of a cross section of a substrate according to the present embodiment; Fig. 3 is a process cross-sectional view showing a manufacturing process of a substrate according to the present embodiment; Fig. 4 is a process cross-sectional view showing a removal process; Fig. 5 is a process cross-sectional view showing a modified example of the manufacturing process of a substrate according to the present embodiment; Fig. 6 is a process cross-sectional view showing a specific example of a preparation process; Fig. 7 is a process cross-sectional view showing an example of a manufacturing method of a tape

[0011] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In all drawings, similar components are designated by similar reference numerals, and descriptions thereof will be omitted where appropriate. Note that the drawings are for illustrative purposes only. The shapes and dimensional ratios of the components in the drawings do not necessarily correspond to the actual products.

[0012] In this specification, the expression "a to b" in the description of a numerical range means from a to b, unless otherwise specified. For example, "1% by mass to 5% by mass" means "1% by mass or more and 5% by mass or less."

[0013] [Overview of Substrate 100] FIG. 1 is a diagram showing an example of a cross section of a substrate 100 according to this embodiment. The substrate 100 includes a base substrate 10, a heat dissipation layer 20, a circuit layer 30, and an encapsulating material layer 40. The heat dissipation layer 20 is disposed on one surface of the base substrate 10. The circuit layer 30 for mounting a semiconductor element is disposed on the surface of the heat dissipation layer 20 opposite the base substrate 10. The circuit layer 30 is encapsulated by the encapsulating material layer 40. The total thickness T0 of the substrate 100 is not particularly limited, but is preferably 0.7 mm to 7 mm, and more preferably 0.9 mm to 6 mm. Each component will be described in detail below.

[0014] <Base Substrate 10> The base substrate 10 holds the heat dissipation layer 20. As shown in FIG. 2, a heat dissipation member 11 such as a heat dissipation fin or a radiator is preferably attached to the surface of the base substrate 10 opposite the heat dissipation layer 20. This improves the heat dissipation performance of the substrate 100. The heat dissipation member 11 may be integrated with the base substrate 10. Alternatively, the heat dissipation member 11 may be attached externally to the base substrate 10.

[0015] The material for the base substrate 10 may be, for example, one or a combination of two or more selected from copper, copper alloys, aluminum, and aluminum alloys. Among these, it is preferable to include at least one of copper and aluminum from the viewpoint of strength.

[0016] The thickness T1 of the base substrate 10 is not particularly limited, but is preferably 30% or more and 70% or less of the total thickness T0.

[0017] The upper limit of the thickness T1 of the base substrate 10 is, for example, 5 mm or less, preferably 4 mm or less, and more preferably 3 mm or less. When the thickness T1 of the base substrate 10 is set to this value or less, the substrate 100 becomes thinner and the processability of the substrate 100 in contour processing, cutting processing, and the like is improved.

[0018] The lower limit of the thickness T1 of the base substrate 10 is, for example, 0.3 mm or more, preferably 0.5 mm or more, and more preferably 0.8 mm or more. When the thickness T1 of the base substrate 10 is set to this value or more, the heat dissipation properties of the substrate 100 can be improved.

[0019] <Heat Dissipation Layer 20> The material constituting the heat dissipation layer 20 according to this embodiment is, for example, a thermosetting resin. The thermosetting resin may be one or a combination of two or more selected from the group consisting of epoxy resin, phenol resin, urea resin, melamine resin, polyester (unsaturated polyester) resin, polyimide resin, silicone resin, and polyurethane resin.

[0020] It is preferable to mix a filler composed of particles having electrical insulation and high thermal conductivity into the heat dissipation layer 20. The constituent material of the filler particles can be, for example, at least one of a metal oxide such as alumina and a nitride such as boron nitride.

[0021] The thickness T2 of the heat dissipation layer 20 is set appropriately depending on the purpose. From the viewpoint of more effectively transferring heat from the semiconductor element to the base substrate 10 while improving mechanical strength and heat resistance, the thickness T2 of the heat dissipation layer 20 is preferably 30 μm or more and 300 μm or less. From the viewpoint of even better balance between heat dissipation and insulation properties throughout the substrate 100, the thickness T2 of the heat dissipation layer 20 is more preferably set to 50 μm or more and 200 μm or less. By setting the thickness T2 of the heat dissipation layer 20 to the above upper limit or less, heat from the semiconductor element can be easily transferred to the base substrate 10. Furthermore, by setting the thickness T2 of the heat dissipation layer 20 to the above lower limit or more, the heat dissipation layer 20 can sufficiently mitigate thermal stress caused by the difference in thermal expansion coefficients between the base substrate 10 and the heat dissipation layer 20. Furthermore, the insulation properties of the substrate 100 are improved.

[0022] Furthermore, the heat dissipation layer 20 according to this embodiment preferably has a thermal conductivity of 3 W / (m·K) or more, more preferably 7 W / (m·K) or more, and even more preferably 12 W / (m·K) or more, thereby improving the heat dissipation properties of the substrate 100.

[0023] <Circuit Layer 30> The circuit layer 30 is made of a conductive metal material and, for example, a semiconductor element is mounted on it. The metal material constituting the circuit layer 30 can be, for example, one or a combination of two or more selected from copper, copper alloys, aluminum, and aluminum alloys. This allows the circuit layer 30 to have a relatively low resistance. More preferably, the circuit layer 30 is a copper-containing layer that contains copper. Note that at least a portion of the circuit layer 30 may be covered with a resist material.

[0024] The lower limit of the thickness T3 of the circuit layer 30 is, for example, 0.3 mm or more, preferably 0.5 mm or more, more preferably 1.0 mm or more, and even more preferably 2.0 mm or more. The upper limit of the thickness T3 of the circuit layer 30 is, for example, 3.0 mm or less, preferably 2.5 mm or less, and even more preferably 2.0 mm or less. The method for manufacturing the substrate 100 according to this embodiment, which will be described later, allows for the formation of a circuit section 30 having a thickness equal to or greater than the above-mentioned lower limit. Furthermore, by setting the thickness T3 of the circuit layer 30 equal to or greater than the above-mentioned lower limit, heat generation in the circuit pattern can be suppressed even in applications requiring high current. Furthermore, by setting the thickness T3 of the circuit layer 30 equal to or less than the above-mentioned upper limit, the method for manufacturing the substrate according to this embodiment can be applied.

[0025] <Sealing Material Layer 40> The sealing material layer 40 seals the circuit layer 30. In Fig. 1 , the sealing material layer 40 is formed so as not to cover the first surface 31 of the circuit layer 30 opposite the heat dissipation layer 20, but the sealing material layer 40 may be formed so as to cover at least a part of the first surface 31.

[0026] The encapsulating material layer 40 is formed, for example, from a cured thermosetting resin. The thermosetting resin may be one or a combination of two or more selected from the group consisting of epoxy resin, phenolic resin, polyimide resin, bismaleimide resin, urea resin, melamine resin, polyurethane resin, cyanate ester resin, silicone resin, oxetane resin (oxetane compound), (meth)acrylate resin, unsaturated polyester resin, diallyl phthalate resin, and benzoxazine resin. In particular, when the material constituting the heat dissipation layer 20 includes an epoxy resin, it is preferable that the thermosetting resin includes an epoxy resin. When both the heat dissipation layer 20 and the encapsulating resin layer 40 include an epoxy resin, the adhesion between the heat dissipation layer 20 and the encapsulating resin layer 40 is improved.

[0027] More specific examples of thermosetting resins include novolac-type phenolic resins such as phenol novolac resin, cresol novolac resin, bisphenol A-type novolac resin, and triazine skeleton-containing phenol novolac resin; resol-type phenolic resins such as unmodified resol phenolic resin and oil-modified resol phenolic resin modified with tung oil, linseed oil, walnut oil, etc.; aralkyl-type phenolic resins such as phenol aralkyl resin and biphenyl aralkyl-type phenolic resin; and triphenylmethane-type phenolic resin; bisphenol-type epoxy resins such as bisphenol A-type epoxy resin, bisphenol F-type epoxy resin, tetramethylbisphenol F-type epoxy resin, bisphenol S-type epoxy resin, bisphenol E-type epoxy resin, bisphenol M-type epoxy resin, bisphenol P-type epoxy resin, and bisphenol Z-type epoxy resin; and novolac-type epoxy resins such as phenol novolac-type epoxy resin and cresol novolac-type epoxy resin; One or a combination of two or more selected from the following can be used: epoxy resins such as biphenyl-type epoxy resins, biphenylaralkyl-type epoxy resins, arylalkylene-type epoxy resins, naphthalene-type epoxy resins, anthracene-type epoxy resins, phenoxy-type epoxy resins, dicyclopentadiene-type epoxy resins, norbornene-type epoxy resins, adamantane-type epoxy resins, fluorene-type epoxy resins, and trisphenylmethane-type epoxy resins; resins having a triazine ring such as urea resins and melamine resins; unsaturated polyester resins; maleimide resins such as bismaleimide compounds; polyurethane resins; diallyl phthalate resins; silicone-based resins; benzoxazine resins; polyimide resins; polyamide-imide resins; and cyanate ester resins such as benzocyclobutene resins, novolac-type cyanate resins, bisphenol A-type cyanate resins, bisphenol E-type cyanate resins, and tetramethylbisphenol F-type cyanate resins.

[0028] The sealing material layer 40 may also contain a filler. Examples of materials constituting the filler include silica, alumina, kaolin, talc, clay, mica, rock wool, wollastonite, glass powder, glass flakes, glass beads, glass fiber, silicon carbide, silicon nitride, aluminum nitride, carbon black, graphite, titanium dioxide, calcium carbonate, calcium sulfate, barium carbonate, magnesium carbonate, magnesium sulfate, barium sulfate, cellulose, aramid, and wood, and the like can be used alone or in combination.

[0029] [Method of Manufacturing Substrate 100] A method of manufacturing the substrate 100 according to this embodiment will be described with reference to Fig. 3. Fig. 3 is a cross-sectional view showing the manufacturing process of the substrate 100.

[0030] <S10: Preparation Step> In the preparation step S10, the substrate 100 having the base substrate 10, the circuit layer 30, and the heat dissipation layer 20 located between the base substrate 10 and the circuit layer 30, as described above, is prepared.

[0031] <S20: Molding Step> In the molding step S20, the sealing material 50 is placed so as to face the first surface 31 of the circuit layer 30, which is the surface opposite to the heat dissipation layer 20, and the sealing material 50 is pressed toward the heat dissipation layer 20 and heated to form the sealing material layer 40 that seals the circuit layer 30. In the molding step S20, the sealing material layer 40 is formed by, for example, compression molding. For example, as shown in Fig. 3 , the substrate 100 is placed in the mold 1 and heated at a heating temperature of 175°C for a heating time of 180 seconds while the sealing material 50 is pressed toward the heat dissipation layer 20 at a pressure of 10 MPa.

[0032] The sealing material 50 is, for example, the above-described thermosetting resin before hardening. The sealing material 50 may be in the form of, for example, granules, powder, a plate-like tablet, or a sheet. A plate-like tablet is particularly preferable from the viewpoint of uniform pressure applied to each circuit layer 30. The sealing material 50 may also contain the above-described filler.

[0033] The sealing material 50 preferably has a melt viscosity η calculated under the following conditions of 10 or more and 40 or less, and more preferably 20 or more and 40 or less. [Method] Using a Koka type flow tester, the flow rate Q of the melted sealing material per unit time is measured under test conditions of a temperature of 175°C, a load of 40 kgf (piston area of ​​1 cm2), a die hole diameter of 0.50 mm, and a die length of 1.00 mm, and the melt viscosity η is calculated by the following formula. [Formula] η=(πD ４ P x 10 ３ / 128LQ) (Pa·sec) where D is the die hole diameter (mm), P is the test pressure (Pa), L is the die length (mm), and Q is the flow rate (cm ３ / second). This allows the sealing material 50 to seal the heat dissipation layer 20 and the circuit layer 30 without any gaps in the molding step S20. As the high-speed flow tester, for example, a CFT-500C manufactured by Shimadzu Corporation can be used.

[0034] Furthermore, in the molding step S20, when the sealing material 50 is pressed toward the heat dissipation layer 20 and heated, the heat dissipation layer 20 is preferably in a B-stage state. The B-stage state refers to, for example, a reaction rate of the heat dissipation layer 20 calculated from the results of a DSC (differential scanning calorimeter) measurement that is greater than 0% and less than 60%. In this case, the heat dissipation layer 20 is in a pre-pressure-bonded state with the circuit layer 30 before heating. The heat dissipation layer 20 is then heated together with the sealing material 50, and the sealing material layer 40 is formed and hardened to bond to the circuit layer 30. In this case, since the circuit layer 30 is sealed with the sealing material 50 (sealing material layer 40) when the heat dissipation layer 20 hardens, the position of the circuit layer 30 is fixed and does not move even if the heat dissipation layer 20 shrinks.

[0035] 3 , the sealing material layer 40 is formed so as to cover at least a portion of the first surface 31 of the circuit layer 30 opposite the heat dissipation layer 20, but may be formed so as not to cover the first surface 31. However, from the viewpoint of uniformly applying pressure to each circuit layer 30, it is preferable that the sealing material layer 40 be formed so as to cover at least a portion of the first surface 31 of the circuit layer 30 opposite the heat dissipation layer 20.

[0036] In addition, the manufacturing method of the substrate 100 according to this embodiment may further include a removal step S30 when, in the molding step S20, the sealing material layer 40 is molded to cover at least a portion of the first surface 31 of the circuit layer 30 opposite the heat dissipation layer 20.

[0037] 4 is a cross-sectional view showing the removing step S30, which follows the molding step S20. As shown in FIG. 4, in the removing step S30, the sealing material layer 40 covering the first surface 31 is removed by, for example, grinding the sealing material layer 40. This makes it possible to expose the first surface 31 of the circuit layer 30 or increase the exposed area.

[0038] Furthermore, as described above, when the sealing material layer 40 is molded to cover at least a portion of the first surface 31 in the molding step S20, it is possible to uniformly apply pressure to each circuit layer 30. Therefore, compared to when the sealing material layer 40 is simply molded so as not to cover the first surface 31 in the molding step S20, when the sealing material layer 40 is molded to cover at least a portion of the first surface 31 in the molding step S20 and then the sealing material layer 40 covering the first surface 31 is removed in the removing step S30, a substrate 100 can be obtained in which the height difference between the circuit layers 30 is small.

[0039] Next, a modified example of the method for manufacturing a substrate 100 according to this embodiment is shown in FIG. 5. In this modified example, in a preparation step S10, a substrate 100 is prepared in which the circuit layers 30 include bridges 32 that secure the circuit layers 30 to one another. For example, the bridges 32 are made of the same material as the circuit layers 30. Then, in a molding step S20, an encapsulating material layer 40 that encapsulates the bridges 32 and the circuit layers 30 is molded. Then, in a removal step S30, the encapsulating material layer 40 that covers the bridges 32 and the bridges 32 are removed by grinding or the like, thereby separating the circuit layers 30.

[0040] According to the above-described modified example, the circuit layers 30 are fixed to one another by the bridges 32, so that the circuit layers 30 can be more effectively prevented from shifting when the sealing material layer 40 is formed.

[0041] The circuit layer 30 having the bridges 32 can be obtained, for example, by bending the portions of a metal plate that is the material for the circuit layer 30 that will become the bridges 32. At this time, the degree of curvature is set to be approximately the same as the thickness of the metal plate. After that, the metal plate is pressed and punched to obtain the circuit layer 30 having the bridges 32.

[0042] Next, a specific example of the preparation step S10 will be described. FIG. 6 is a cross-sectional view showing a specific example of the preparation step S10. In the preparation step S10 shown in FIG. 6, first, a sheet 2 is prepared to hold the circuit layer 30 on one side (S11). The sheet 2 includes, for example, an adhesive layer that adheres and holds the circuit layer 30, and a base layer for holding the adhesive layer. Next, a heat dissipation layer 20 is disposed on one side of the base substrate 10 (S12). Specifically, for example, a B-stage material for the heat dissipation layer 20 is applied. Alternatively, a sheet-like B-stage material for the heat dissipation layer 20 is disposed. Then, the circuit layer 30 held by the sheet 2 is pressed and fixed against the heat dissipation layer 20, and the sheet 2 is then released (S13).

[0043] A method for manufacturing the tape 2 that holds the circuit layer 30 on one surface will now be described with reference to Fig. 7. Fig. 7 is a cross-sectional view showing steps in one example of the method for manufacturing the tape 2.

[0044] First, one surface (the bottom surface in the drawing) of a metal plate 4 is covered with masking tape 3 (S1). The masking tape 3 is not particularly limited as long as it is resistant to the etching in the next step (S2). Next, the other surface (the top surface in the drawing) of the metal plate 4 that is not covered with the masking tape 3 is etched to obtain a grooved metal plate 4 in which grooves 5 of a desired pattern are formed to a predetermined depth.

[0045] Next, the surface of the grooved metal plate 4 on which the grooves 5 are formed is covered with tape 2, and the masking tape 3 is removed (S3).

[0046] Next, the grooved metal plate 4 covered with the tape 2 is turned over so that the tape 2 is facing downwards to adjust its orientation (S4), and then the top surface of the grooved metal plate 4 (i.e., the surface opposite to the tape 2) is etched to remove and open the top surfaces of the grooves 5, thereby forming the circuit layer 30 (S5). This results in the tape 2 holding the circuit layer 30 on one surface.

[0047] Note that various resin tapes can be used as the tape 2 as long as it can adequately cover the surface of the metal plate 4 and can be adequately peeled off during the manufacturing process of the substrate 100. Polyimide resin tape is preferred as the resin tape, and more specifically, a two-layer film member having an adhesive layer on one side of a polyimide layer serving as a base material is preferred. The thickness of the polyimide layer serving as a base material can be, for example, about 25 μm. Furthermore, for example, acrylic resin, epoxy resin, or silicone resin can be used as the adhesive layer.

[0048] As described above, the manufacturing method of the substrate 100 according to this embodiment provides the following advantages. First, the manufacturing method of the substrate 100 according to this embodiment forms the circuit layer 30 by attaching a pre-formed circuit layer 30 to the heat dissipation layer 20. Then, as described with reference to FIG. 7 , it is possible to attach the circuit layer 30 formed by, for example, performing an etching process on both sides. Therefore, compared to conventional manufacturing methods of substrates in which a metal plate is attached and then etched to form the circuit layer 30, it is possible to form a thicker circuit layer 30. Furthermore, the manufacturing method of the substrate 100 according to this embodiment simplifies the manufacturing process because the formation of the circuit layer 30 and the curing of the heat dissipation layer 20 can be performed simultaneously. Furthermore, as shown in FIG. 3 , when the substrate 100 is pressed vertically (from above in the example of FIG. 3 ) in the molding step S20, misalignment of the circuit layers 30 can be suppressed.

[0049] Although the embodiments of the present invention have been described above with reference to the drawings, these are merely examples of the present invention, and various other configurations can also be adopted.

[0050] This application claims priority based on Japanese Patent Application No. 2023-114674, filed on July 12, 2023, the disclosure of which is incorporated herein by reference in its entirety.

[0051] REFERENCE SIGNS LIST 100 Substrate 10 Base substrate 20 Heat dissipation layer 30 Circuit layer 31 First surface 32 Bridge 40 Sealing material layer 50 Sealing material 1 Mold 2 Tape 3 Masking tape 4 Metal plate 5 Groove

Claims

1. A preparation step of preparing a substrate having a base substrate, a circuit layer, and a heat dissipation layer located between the base substrate and the circuit layer; a molding process of disposing a sealing material so as to face a first surface of the circuit layer, the first surface being a surface opposite to the heat dissipation layer, and pressing the sealing material toward the heat dissipation layer while heating the sealing material to form a sealing material layer that seals the circuit layer; A method for manufacturing a substrate, comprising:

2. The thickness of the circuit layer is 0.3 mm or more and 3 mm or less. A method for manufacturing the substrate according to claim 1 .

3. The encapsulating material has a melt viscosity η of 10 or more and 40 or less, the melt viscosity being calculated by the following method. The method for manufacturing the substrate according to claim 1 or 2. [method] Using a high-performance flow tester, the temperature was 175°C, the load was 40 kgf (piston area 1 cm ２ ), a die hole diameter of 0.50 mm, and a die length of 1.00 mm, the flow rate Q of the molten sealing material per unit time is measured, and the melt viscosity η is calculated by the following formula. [formula] n = (πD) 4 P×10 ３ / 128LQ)(1・seconds) where D is the die hole diameter (mm), P is the test pressure (Pa), L is the die length (mm), and Q is the flow rate (cm ３ / sec).

4. In the molding step, when the sealing material is pressed against the heat dissipation layer and heated, the reaction rate of the heat dissipation layer calculated from the measurement results of a DSC (differential scanning calorimeter) is more than 0% and not more than 60%. The method for manufacturing the substrate according to claim 1 or 2.

5. The sealing material is in a plate-like tablet shape when disposed opposite the circuit layer. The method for manufacturing the substrate according to claim 1 or 2.

6. In the molding step, the encapsulating material layer is molded to cover at least a portion of the first surface of the circuit layer. The method for manufacturing the substrate according to claim 1 or 2.

7. The method further includes a step of removing the encapsulant layer molded to cover at least a portion of the first surface of the circuit layer. The method for manufacturing a substrate according to claim 6 .

8. In the preparation step, preparing a sheet holding the circuit layer on one side; A heat dissipation layer is disposed on one surface of the base substrate; pressing the circuit layer held by the sheet against the heat dissipation layer, and then separating the sheet from the heat dissipation layer to hold the circuit layer on the heat dissipation layer; The method for manufacturing the substrate according to claim 1 or 2.

9. The sheet includes polyimide. The method for manufacturing a substrate according to claim 8 .

10. The base substrate includes at least one of copper and aluminum. The method for manufacturing the substrate according to claim 1 or 2.

11. The base substrate includes a heat dissipation portion provided on a surface opposite to the heat dissipation layer. The method for manufacturing the substrate according to claim 1 or 2.