Uninterruptible power supply device

Abstract

The uninterruptible power supply device includes a converter (1), a bidirectional chopper (2), an inverter (3), a control device (5), and a reference voltage generation circuit (50). The converter (1) converts AC power supplied from a first AC power supply (6) into DC power and supplies it to a DC bus (Lp, Ln). The bidirectional chopper (2) is connected between the power storage device (B1) and the DC bus (Lp, Ln), and supplies DC power from the power storage device (B1) to the DC bus (Lp, Ln) when a power outage occurs in the first AC power supply (6). The inverter (3) converts the DC power received from the DC bus (Lp, Ln) into AC power and supplies it to a load (8). The control device (5) controls any one of the converter (1), the bidirectional chopper (2), and the inverter (3) according to the power supply mode of the uninterruptible power supply device so that the DC voltage of the DC bus (Lp, Ln) becomes a reference voltage. The reference voltage generation circuit (50) generates a reference voltage so as to satisfy the DC voltage required by each of the converter (1), the bidirectional chopper (2), and the inverter (3).

Description

Technical Field

[0001] The present disclosure relates to an uninterruptible power supply device, and more particularly to an uninterruptible power supply device that converts AC power supplied from an AC power source into DC power, and then converts the DC power back into AC power to supply a load.

Background Art

[0002] For example, International Publication No. 2016 / 092613 (Patent Document 1) discloses an uninterruptible power supply device including a converter that converts AC power supplied from an AC power source into DC power and supplies it to a DC bus, a bidirectional chopper that exchanges DC power between the DC bus and a power storage device, an inverter that converts the DC power received from the DC bus into AC power and supplies it to a load, and a control device that controls the converter, the bidirectional chopper, and the inverter.

[0003] When the AC power source is normal, the control device controls the converter so that the DC voltage of the DC bus becomes a reference voltage, and controls the bidirectional chopper to store the DC power of the DC bus in the power storage device. Also, the control device controls the inverter to output a sinusoidal AC voltage.

[0004] When a power outage occurs in the AC power source, the control device stops the operation of the converter, controls the bidirectional chopper so that the DC voltage of the DC bus becomes a reference voltage, and controls the inverter to output a sinusoidal AC voltage.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] In the above-described uninterruptible power supply device, it is necessary to set the DC voltage of the DC bus (i.e., the reference voltage) higher than the floating charge voltage of the power storage device. Further, in order to supply a sine-wave AC voltage to the load, it is necessary to set the DC voltage of the DC bus (i.e., the reference voltage) higher than the voltage that is twice the amplitude of the AC voltage.

[0007] Therefore, conventionally, the reference voltage has been set to the maximum value of the DC voltage that the converter can stably output. However, when the DC voltage of the DC bus (i.e., the reference voltage) is increased, the switching losses of the transistors included in each of the converter, the bidirectional chopper, and the inverter increase, so there is concern that the efficiency of the uninterruptible power supply device will decrease.

[0008] On the other hand, when the reference voltage is decreased, it becomes difficult to suppress the vibration generated in the DC voltage of the DC bus depending on the magnitude of the AC voltage supplied from the AC power source or the type of load, and there is concern that the power supply reliability of the uninterruptible power supply device will decrease.

[0009] The present disclosure has been made to solve such problems, and an object thereof is to provide an uninterruptible power supply device capable of improving efficiency while maintaining high power supply reliability.

Means for Solving the Problems

[0010] The uninterruptible power supply device according to the present disclosure includes a plurality of power supply modes for a load. The uninterruptible power supply device includes a converter, a bidirectional chopper, an inverter, a control device, and a reference voltage generation circuit. The converter converts AC power supplied from a first AC power source into DC power and supplies it to a DC bus. The bidirectional chopper is connected between the power storage device and the DC bus, and supplies DC power from the power storage device to the DC bus when a power outage occurs in the first AC power source. The inverter converts DC power received from the DC bus into AC power and supplies it to the load. The control device controls any one of the converter, the bidirectional chopper, and the inverter according to the power supply mode of the uninterruptible power supply device so that the DC voltage of the DC bus becomes a reference voltage. The reference voltage generation circuit generates a reference voltage so as to satisfy the DC voltage required by each of the converter, the bidirectional chopper, and the inverter.

Advantages of the Invention

[0011] According to the present disclosure, it is possible to provide an uninterruptible power supply device capable of improving efficiency while maintaining high power supply reliability.

Brief Description of the Drawings

[0012]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Embodiments for Carrying Out the Invention

[0013] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[0014] <Configuration of the Uninterruptible Power Supply Device> FIG. 1 is a circuit block diagram showing the configuration of an uninterruptible power supply device according to an embodiment of the present disclosure. As shown in FIG. 1, the uninterruptible power supply device includes capacitors C1 to C6, Cd, reactors L1 to L6, current detectors CT1 to CT7, converter 1, DC positive bus Lp, DC negative bus Ln, bidirectional chopper 2, inverter 3, switches S1 to S6, operation unit 4, and control device 5.

[0015] The uninterruptible power supply device receives three-phase AC power at commercial frequency from the commercial AC power supply 6 and the bypass AC power supply 7, and supplies three-phase AC power at commercial frequency to the load 8. The commercial AC power supply 6 outputs three-phase AC voltages Vu1, Vv1, and Vw1 to the AC output terminals 6a to 6c, respectively. The commercial AC power supply 6 corresponds to an example of "the first AC power supply", and the three-phase AC voltages Vu1, Vv1, and Vw1 correspond to an example of "the first AC input voltage".

[0016] The instantaneous values of the three-phase AC voltages Vu1, Vv1, and Vw1 are detected by the control device 5. The control device 5 determines whether a power failure has occurred in the commercial AC power supply 6 based on the AC input voltages Vu1, Vv1, and Vw1 from the commercial AC power supply 6.

[0017] The bypass AC power supply 7 outputs three-phase AC voltages Vu2, Vv2, and Vw2 to the AC output terminals 7a to 7c, respectively. The bypass AC power supply 7 corresponds to an embodiment of the "second AC power supply", and the three-phase AC voltages Vu2, Vv2, and Vw2 correspond to an embodiment of the "second AC input voltage". The bypass AC power supply 7 may be a commercial AC power supply or a generator. The instantaneous values of the three-phase AC voltages Vu2, Vv2, and Vw2 are detected by the control device 5.

[0018] The AC input terminals 8a to 8c of the load 8 receive a three-phase AC voltage from the uninterruptible power supply. The load 8 is driven by the three-phase AC power supplied from the uninterruptible power supply.

[0019] The first electrodes of the capacitors C1 to C3 are respectively connected to the AC output terminals 6a to 6c of the commercial AC power supply 6, and their second electrodes are connected to each other. The first terminals of the reactors L1 to L3 are respectively connected to the AC output terminals 6a to 6c of the commercial AC power supply 6, and their second terminals are respectively connected to the three AC nodes of the converter 1.

[0020] The capacitors C1 to C3 and the reactors L1 to L3 constitute an AC filter F1. The AC filter F1 is a low-pass filter that allows an AC current of the commercial frequency to flow from the commercial AC power supply 6 to the converter 1 and prevents a signal of the switching frequency from flowing from the converter 1 to the commercial AC power supply 6. The current detectors CT1 to CT3 detect the AC currents I1 to I3 (hereinafter, also referred to as "AC input currents I1 to I3") flowing through the reactors L1 to L3, respectively, and give a signal indicating the detected value to the control device 5.

[0021] The positive DC node of the converter 1 is connected to the positive DC node of the inverter 3 via the DC positive bus Lp. The negative DC node of the converter 1 is connected to the negative DC node of the inverter 3 via the DC negative bus Ln. The capacitor Cd is connected between the DC buses Lp and Ln to smooth the DC voltage VDC between the DC buses Lp and Ln. The instantaneous value of the DC voltage VDC is detected by the control device 5.

[0022] Converter 1 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by a control device 5. Converter 1 can be configured using a multi-level circuit such as a two-level circuit or a three-level circuit. When three-phase AC power is normally supplied from a commercial AC power source 6 (when the commercial AC power source 6 is healthy), converter 1 converts the three-phase AC power from the commercial AC power source 6 into DC power. The DC power generated by converter 1 is supplied to DC buses Lp and Ln. When the supply of the three-phase AC power from the commercial AC power source 6 is stopped (during a power outage of the commercial AC power source 6), the operation of converter 1 is stopped.

[0023] Bidirectional chopper 2 is connected between battery B1 and DC buses Lp and Ln, and performs bidirectional DC voltage conversion between battery B1 and DC buses Lp and Ln. Bidirectional chopper 2 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by a control device 5. When the commercial AC power source 6 is healthy, bidirectional chopper 2 stores the DC power generated by converter 1 in battery B1, and supplies the DC power of battery B1 to DC buses Lp and Ln in response to the occurrence of a power outage of the commercial AC power source 6.

[0024] Battery B1 corresponds to an embodiment of a "power storage device" that stores DC power. The instantaneous value of the voltage VB across the terminals of battery B1 (hereinafter also referred to as "battery voltage VB") is detected by control device 5. Instead of battery B1, an electric double layer capacitor or a flywheel may be connected to the uninterruptible power supply device. Current detector CT7 detects the current IB flowing through battery B1 (hereinafter also referred to as "battery current IB") and gives a signal indicating the detected value to control device 5.

[0025] Inverter 3 is a well-known device including a plurality of transistors and a plurality of diodes, and is controlled by a control device 5. Inverter 3 can be configured using a multi-level circuit such as a two-level circuit or a three-level circuit. Inverter 3 converts the DC power received from DC buses Lp and Ln into three-phase AC power at commercial frequency.

[0026] The three AC nodes of the inverter 3 are respectively connected to the first terminals of the reactors L4 to L6. The second terminals of the reactors L4 to L6 are respectively connected to the first terminals of the switches S1 to S3, and the second terminals of the switches S1 to S3 are respectively connected to the AC input terminals 8a to 8c of the load 8. The first electrodes of the capacitors C4 to C6 are respectively connected to the second terminals of the reactors L4 to L6, and the second electrodes of the capacitors C4 to C6 are both connected to the second electrodes of the capacitors C1 to C3.

[0027] The capacitors C4 to C6 and the reactors L4 to L6 constitute an AC filter F2. The AC filter F2 is a low-pass filter that allows a commercial-frequency AC current to flow from the inverter 3 to the load 8 and prevents a switching-frequency signal from flowing from the inverter 3 to the load 8. In other words, the AC filter F2 converts the three-phase rectangular-wave voltage output from the inverter 3 into sinusoidal three-phase AC voltages Vu, Vv, and Vw. The instantaneous values of the three-phase AC voltages Vu, Vv, and Vw (hereinafter also referred to as "AC output voltages Vu, Vv, and Vw") are detected by the control device 5.

[0028] The first terminals of the switches S4 to S6 are respectively connected to the AC output terminals 7a to 7c of the bypass AC power supply 7, and their second terminals are connected to the AC input terminals 8a to 8c of the load 8. The switches S1 to S6 are controlled by the control device 5.

[0029] Current detectors CT4 to CT6 detect the three-phase AC currents Iu, Iv, and Iw (hereinafter also referred to as "load currents Iu, Iv, and Iw") flowing between the inverter 3 and the load 8, and give a signal indicating the detected value to the control device 5. Specifically, the current detector CT4 detects the AC current Iu flowing between the first AC node of the inverter 3 and the AC input terminal 8a of the load 8. The current detector CT5 detects the AC current Iv flowing between the second AC node of the inverter 3 and the AC input terminal 8b of the load 8. The current detector CT6 detects the AC current Iw flowing between the third AC node of the inverter 3 and the AC input terminal 8c of the load 8.

[0030] In the normal inverter power supply mode in which the three-phase AC power generated by the inverter 3 is supplied to the load 8, the control device 5 turns on the switches S1 to S3 and turns off the switches S4 to S6.

[0031] In the normal bypass power supply mode in which the three-phase AC power from the bypass AC power supply 7 is supplied to the load 8, the control device 5 turns on the switches S1 to S3 and turns on the switches S4 to S6. The power supply mode of the uninterruptible power supply device will be described in detail later.

[0032] The operation unit 4 includes a plurality of buttons operated by the user of the uninterruptible power supply device, a display for displaying various information, and the like. By the user operating the operation unit 4, it is possible to turn on and off the power of the uninterruptible power supply device, and to select either the normal inverter power supply mode or the normal bypass power supply mode.

[0033] The control device 5 controls the entire uninterruptible power supply device based on signals from the operation unit 4, AC input voltages Vu1, Vv1, Vw1, AC input currents I1 to I3 from the commercial AC power supply 6, DC voltage VDC between the DC bus Lp and Ln, battery voltage VB, load currents Iu, Iv, Iw, AC output voltages Vu, Vv, Vw, AC input voltages Vu2, Vv2, Vw3 from the bypass AC power supply 7, and the like.

[0034] FIG. 2 is a block diagram showing an example of the hardware configuration of the control device 5. Typically, the control device 5 can be configured by a microcomputer in which a predetermined program is stored in advance.

[0035] In the example of FIG. 2, the control device 5 includes a CPU (Central Processing Unit) 10, a memory 12, and an input / output (I / O) circuit 14. The CPU 10, the memory 12, and the I / O circuit 14 can exchange data with each other via a bus 16. A program is stored in a partial area of the memory 12, and by executing the program by the CPU 10, various functions described later can be realized. The I / O circuit 14 inputs and outputs signals and data to and from the outside of the control device 5.

[0036] Alternatively, different from the example of FIG. 2, at least a part of the control device 5 can be configured using a circuit such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). Also, at least a part of the control device 5 can be configured by an analog circuit.

[0037] <Power supply mode of the uninterruptible power supply device> FIG. 3 is a circuit block diagram showing the power supply mode of the uninterruptible power supply device. In FIG. 3, for the sake of simplicity of the drawing and explanation, only the part related to one of the three phases is shown, and only switches S1 and S4 among switches S1 to S6 are shown. Also, the illustration of AC filters F1 and F2, current detectors CT1 to CT6, etc. is omitted.

[0038] FIG. 3(A) is a circuit block diagram showing the constant inverter power supply mode. When the constant inverter power supply mode is selected during the normal operation of the commercial AC power supply 6, the switch S1 is turned on and the switch S4 is turned off, and the load current Iu is supplied from the inverter 3 to the load 8 via the switch S1.

[0039] The control device 5 controls the converter 1 so as to convert the AC power supplied from the commercial AC power supply 6 into DC power and supply it to the DC buses Lp and Ln. Specifically, the control device 5 controls the converter 1 so that the voltage VDC between the terminals of the capacitor Cd (i.e., the DC voltage VDC between the DC buses Lp and Ln) becomes the reference voltage VDCr.

[0040] Also, the control device 5 controls the bidirectional chopper 2 so as to store the DC power of the DC buses Lp and Ln in the battery B1. Specifically, the control device 5 controls the bidirectional chopper 2 so that the battery voltage VB becomes the reference voltage VBr.

[0041] Furthermore, the control device 5 controls the inverter 3 so as to convert the DC power supplied from the converter 1 via the DC buses Lp and Ln into AC power and supply it to the load 8. Specifically, the control device 5 controls the inverter 3 so as to generate sinusoidal AC output voltages Vu, Vv, and Vw.

[0042] In this case, most of the AC input current I1 supplied from the commercial AC power supply 6 is converted into the load current Iu by the converter 1 and the inverter 3 and supplied to the load 8, and a part of the AC input current I1 is converted into the charging current IB by the bidirectional chopper 2 and supplied to the battery B1.

[0043] Note that in the case where the inverter 3 or the converter 1 fails during the constant inverter power supply mode, the switch S4 is turned on and the switch S1 is turned off, and AC current is supplied from the bypass AC power supply 7 to the load 8 via the switch S4.

[0044] Fig. 3(B) is a circuit block diagram showing the constant bypass power supply mode. When the constant bypass power supply mode is selected when the bypass AC power supply 7 is healthy, the switch S1 is turned on and the switch S4 is turned on. AC power is supplied from the bypass AC power supply 7 to the load 8 via the switch S4.

[0045] The control device 5 stops the operation of the converter 1 and controls the inverter 3 to convert the AC power supplied from the bypass AC power supply 7 via the switch S4 into DC power and supply it to the DC buses Lp and Ln. Specifically, the control device 5 controls the inverter 3 so that the voltage VDC between the terminals of the capacitor Cd (i.e., the DC voltage VDC between the DC buses Lp and Ln) becomes the reference voltage VDCR. This is to turn off the switch S4 when a power failure occurs in the bypass AC power supply 7 and immediately supply the sinusoidal AC output voltage Vu generated by the inverter 3 to the load 8.

[0046] In order for the inverter 3 to generate a sinusoidal AC output voltage Vu, it is necessary to make the DC voltage VDC between the DC buses Lp and Ln higher than the voltage twice the amplitude of the AC output voltage Vu. On the other hand, a discharge resistor (not shown) for consuming the residual charge of the capacitor Cd after the operation of the uninterruptible power supply device is connected in parallel with the capacitor Cd between the DC buses Lp and Ln. Therefore, in the normal bypass power supply mode, when the operation of the converter 1 is stopped, the charge accumulated in the capacitor Cd is discharged by the discharge resistor, and the DC voltage VDC decreases. As a result, it may become impossible to generate the sinusoidal AC output voltage Vu. To suppress such a decrease in the DC voltage VDC, the control device 5 controls the inverter 3 so that the DC voltage VDC between the DC buses Lp and Ln becomes the reference voltage VDCR during the normal bypass power supply mode.

[0047] In addition, the control device 5 controls the bidirectional chopper 2 to store the DC power of the DC buses Lp and Ln in the battery B1. Specifically, the bidirectional chopper 2 is controlled so that the battery voltage VB becomes the reference voltage VBr.

[0048] In this case, most of the AC current supplied from the bypass AC power supply 7 is supplied to the load 8 via the switch S4, and a part of the AC current is converted into a charging current IB by the inverter 3 and supplied to the battery B1.

[0049] In the normal inverter power supply mode as described above, the three-phase AC voltages Vu1, Vv1, and Vw1 supplied from the commercial AC power supply 6 are converted into a DC voltage VDC by the converter 1, and the DC voltage VDC is converted into three-phase AC voltages Vu, Vv, and Vw by the inverter 3 and supplied to the load 8. Therefore, high-quality three-phase AC voltages Vu, Vv, and Vw can be supplied to the load 8. However, in the constant inverter power supply mode, power losses always occur in the converter 1 and the inverter 3, so there is a concern that the power loss will increase.

[0050] On the other hand, in the constant bypass power supply mode, the three-phase AC voltages Vu2, Vv2, and Vv3 from the bypass AC power supply 7 are directly supplied to the load 8, so the quality of the three-phase AC voltage supplied to the load 8 deteriorates. However, in the normal bypass power supply mode, the power losses in the converter 1 and the inverter 3 are smaller than those in the normal inverter power supply mode. For this reason, the normal bypass power supply mode is also referred to as the "eco mode".

[0051] FIG. 4 is a circuit block diagram showing the power supply mode when a power failure occurs in the commercial AC power supply 6 or the bypass AC power supply 7. In the normal inverter power supply mode, when a power failure occurs in the commercial AC power supply 6, the control device 5 stops the operation of the converter 1 and controls the bidirectional chopper 2 to supply the DC power of the battery B1 to the DC buses Lp and Ln. Also, in the normal bypass power supply mode, when a power failure occurs in the bypass AC power supply 7, the control device 5 controls the bidirectional chopper 2 to supply the DC power of the battery B1 to the DC buses Lp and Ln. Specifically, the control device 5 controls the bidirectional chopper 2 so that the DC voltage VDC between the DC buses Lp and Ln becomes the reference voltage VDCR.

[0052] In addition, the control device 5 controls the inverter 3 to convert the DC power supplied from the bidirectional chopper 2 via the DC buses Lp and Ln into AC power and supply it to the load 8. Specifically, the control device 5 controls the inverter 3 to generate sinusoidal AC output voltages Vu, Vv, and Vw.

[0053] In this case, all of the discharge current IB of the battery B1 is converted into the load current Iu by the inverter 3 and supplied to the load 8.

[0054] As described above, the control device 5 controls any one of the converter 1, the bidirectional chopper 2, and the inverter 3 according to the power supply mode and the presence or absence of a power outage so that the DC voltage VDC becomes the reference voltage VDCR.

[0055] Conventionally, the reference voltage VDCR in the control of this DC voltage VDC has been set to the maximum value of the DC voltage VDC that the converter 1 can stably output based on the rated values of the AC input voltages Vu1, Vv1, Vw1, the rated values of the AC output voltages Vu, Vv, Vw, and the floating charge voltage of the battery B1. However, when the DC voltage VDC (i.e., the reference voltage VDCR) between the DC buses Lp and Ln is increased, the switching losses of the transistors included in each of the converter 1, the bidirectional chopper 2, and the inverter 3 increase, so there is concern that the efficiency of the uninterruptible power supply device will decrease.

[0056] Therefore, in the present embodiment, the reference voltage VDCR is set so as to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. According to this, the DC voltage VDC (i.e., the reference voltage VDCR) can be set to a value lower than the maximum value of the DC voltage VDC that the converter 1 can stably output. Therefore, it is possible to reduce the switching losses of the transistors included in the converter 1, the bidirectional chopper 2, and the inverter 3 and improve the efficiency of the uninterruptible power supply device.

[0057] <Control Configuration of Uninterruptible Power Supply Device> FIG. 5 is a block diagram showing the configuration of the control device 5. As shown in FIG. 5, the control device 5 includes voltage detectors 21 to 24, a reference voltage generation circuit 50, a converter control unit 55, a bidirectional chopper control unit 56, an inverter control unit 57, a power outage detector 58, and a mode setting unit 59.

[0058] The voltage detector 21 detects the instantaneous values of the AC input voltages Vu1, Vv1, and Vw1 from the commercial AC power supply 6 and outputs a signal indicating the detected values. The voltage detector 22 detects the DC voltage VDC between the DC buses Lp and Ln and outputs a signal indicating the detected values. The voltage detector 23 detects the battery voltage VB and outputs a signal indicating the detected values. The voltage detector 24 detects the instantaneous values of the AC output voltages Vu, Vv, and Vw from the inverter 3 and outputs a signal indicating the detected values.

[0059] The reference voltage generation circuit 50 generates a reference voltage VDCr based on the AC input voltages Vu1, Vv1, Vw1, the battery voltage VB, the battery current IB, and the load currents Iu, Iv, and Iw. Specifically, the reference voltage generation circuit 50 includes a first calculation unit 51, a second calculation unit 52, a third calculation unit 53, and a maximum value calculation unit 54.

[0060] The first calculation unit 51 calculates the minimum allowable voltage VDC_cnv required for power conversion in the converter 1 based on the AC input voltages Vu1, Vv1, Vw1. The second calculation unit 52 calculates the minimum allowable voltage VDC_chp required for DC voltage conversion in the bidirectional chopper 2 based on the battery voltage VB and the battery current IB. The third calculation unit 53 calculates the minimum allowable voltage VDC_inv required for power conversion in the inverter 3 based on the load currents Iu, Iv, Iw. The minimum allowable voltage VDC_cnv corresponds to an embodiment of the "first minimum allowable voltage", the minimum allowable voltage VDC_chp corresponds to an embodiment of the "second minimum allowable voltage", and the minimum allowable voltage VDC_inv corresponds to an embodiment of the "third minimum allowable voltage".

[0061] The maximum value calculation unit 54 calculates the maximum value among the calculated minimum allowable voltages VDC_cnv, VDC_chp, and VDC_inv. The maximum value calculation unit 54 provides the calculated maximum value as the reference voltage VDCr to the converter control unit 55, the bidirectional chopper control unit 56, and the inverter control unit 57.

[0062] The power failure detector 58 detects whether a power failure of the commercial AC power supply 6 has occurred based on the AC input voltages Vu1, Vv1, and Vw1, and outputs a power failure detection signal PF indicating the detection result. Specifically, when the AC input voltages Vu1, Vv1, and Vw1 are higher than a predetermined threshold voltage, it is determined that the commercial AC power supply 6 is normal, and a power failure detection signal PF at the "L" level of the deactivation level is output. When the AC input voltages Vu1, Vv1, and Vw1 are lower than a predetermined threshold voltage, it is determined that a power failure of the commercial AC power supply 6 has occurred, and a power failure detection signal PF at the "H" level of the activation level is output.

[0063] The mode setting unit 59 sets the power supply mode of the uninterruptible power supply based on the signal from the operation unit 4, and outputs a mode signal MD indicating the set power supply mode.

[0064] The converter control unit 55 controls the converter 1 based on the reference voltage VDCr from the reference voltage generation circuit 50, the power failure detection signal PF from the power failure detector, the mode signal MD from the mode setting unit 59, the AC input currents I1 to I3 indicated by the output signals of the current detectors CT1 to CT3, the AC input voltages Vu1, Vv1, and Vw1 detected by the voltage detector 21, the DC voltage VDC between the DC bus Lp and Ln detected by the voltage detector 22, and the like.

[0065] The bidirectional chopper control unit 56 controls the bidirectional chopper 2 based on the reference voltage VDCr from the reference voltage generation circuit 50, the power failure detection signal PF from the power failure detector, the DC voltage VDC between the DC bus Lp and Ln detected by the voltage detector 22, the battery voltage VB detected by the voltage detector 23, and the like.

[0066] The inverter control unit 57 controls the inverter 3 based on the mode signal MD from the mode setting unit 59, the load currents Iu, Iv, and Iw indicated by the output signals of the current detectors CT4 to CT6, the AC output voltages Vu, Vv, and Vw detected by the voltage detector 24, the DC voltage VDC between the DC bus Lp and Ln detected by the voltage detector 22, and the like.

[0067] (Reference voltage generation circuit 50) Next, with reference to FIGS. 6 to 9, the detailed configuration of the reference voltage generation circuit 50 shown in FIG. 5 will be described. Here, the detailed configurations of the first arithmetic unit 51, the second arithmetic unit 52, and the third arithmetic unit 53 will be described.

[0068] (1) First arithmetic unit 51 FIG. 6 is a block diagram showing a configuration example of the first arithmetic unit 51 shown in FIG. 5. As shown in FIG. 6, the first arithmetic unit 51 includes an effective value arithmetic unit 510, a maximum value arithmetic unit 512, and a minimum allowable voltage generation unit 514.

[0069] The effective value arithmetic unit 510 obtains the effective values Vu1rms, Vv1rms, Vw1rms of the AC input voltages Vu1, Vv1, Vw1, and outputs the effective values to the maximum value arithmetic unit 512.

[0070] The maximum value arithmetic unit 512 obtains the maximum value V1rms of the effective values Vu1rms, Vv1rms, Vw1rms, and outputs the maximum value V1rms to the minimum allowable voltage generation unit 514.

[0071] The minimum allowable voltage generation unit 514 generates a minimum allowable voltage VDC_cnv based on the maximum value V1rms of the effective values of the AC input voltages. In a certain aspect, the minimum allowable voltage generation unit 514 has a reference value of the reference voltage VDCr obtained from the rated value V1r of the AC input voltages Vu1, Vv1, Vw1. The minimum allowable voltage generation unit 514 generates the minimum allowable voltage VDC_cnv by multiplying this reference value by the ratio (V1rms / V1r) of the maximum value V1rms to the rated value V1r.

[0072] As described above, the converter 1 converts the AC input voltages Vu1, Vv1, Vw1 into a DC voltage VDC. A voltage ripple occurs in the DC voltage VDC depending on the state of the load 8 and the like. In order to suppress this voltage ripple by controlling the DC voltage VDC by the converter 1, the reference value of the reference voltage VDCr is set to be higher than the value of the DC voltage VDC obtained from the rated value V1r of the AC input voltages.

[0073] However, when the commercial AC power supply 6 is unstable and the effective values of the AC input voltages Vu1, Vv1, and Vw1 are high, the value of the DC voltage VDC also becomes high due to the rectifying action of the converter 1. In this case, it may be difficult for the converter 1 to suppress the voltage ripple and control the DC voltage VDC to the reference value.

[0074] Therefore, when the effective values of the AC input voltages Vu1, Vv1, and Vw1 become large, the first arithmetic unit 51 sets the minimum allowable voltage VDC_cnv to a value higher than the reference value in order to ensure a margin for controlling the DC voltage VDC in the converter 1.

[0075] (2) Second arithmetic unit 52 FIG. 7 is a block diagram showing a configuration example of the second arithmetic unit 52 shown in FIG. 5. As shown in FIG. 7, the second arithmetic unit 52 includes a multiplier 520, an adder 522, and a minimum allowable voltage generation unit 524.

[0076] The multiplier 520 multiplies the battery current IB detected by the current detector CT7 by the conversion coefficient ki to calculate the voltage drop amount that can occur in the bidirectional chopper 2. This voltage drop amount corresponds to the voltage drop amount generated by transistors, reactors, etc. included in the bidirectional chopper 2. The conversion coefficient ki for calculating the voltage drop amount from the battery current IB can be preset by experiment or calculation according to the circuit configuration of the bidirectional chopper 2.

[0077] The adder 522 adds the voltage drop amount from the multiplier 520 and the battery voltage VB detected by the voltage detector 23. The minimum allowable voltage generation unit 524 generates a minimum allowable voltage VDC_chp based on the output signal of the adder 522. The minimum allowable voltage VDC_chp is a value obtained by adding a voltage value capable of compensating for the voltage drop amount generated in the bidirectional chopper 2 to the battery voltage VB.

[0078] When the bidirectional chopper 2 stores the DC voltage in the battery B1, it steps down the DC voltage VDC between the DC buses Lp and Ln and supplies it to the battery B1. Also, when the bidirectional chopper 2 supplies the DC voltage of the battery B1 to the inverter 3, it steps up the battery voltage VB and outputs it between the DC buses Lp and Ln. Therefore, it is necessary to make the DC voltage VDC higher than the battery voltage VB. Conventionally, the reference voltage VBr is set based on the floating charge voltage of the battery B1, and the reference voltage VDCr is set to be equal to or higher than a value obtained by adding a predetermined margin voltage to this reference voltage VBr.

[0079] On the other hand, in the present embodiment, the minimum allowable voltage VDC_chp is generated so as to compensate for the voltage drop amount generated in the bidirectional chopper 2 in proportion to the battery current IB. The minimum allowable voltage VDC_chp can be made lower than the conventional reference voltage VDCr.

[0080] (3) Third arithmetic unit 53 FIG. 8 is a block diagram showing a first configuration example of the third arithmetic unit 53 shown in FIG. 5. As shown in FIG. 8, the third arithmetic unit 53 includes a moving average circuit 530, 532, a subtractor 534, a comparator 536, and a minimum allowable voltage generation unit 538.

[0081] The moving average circuit 530 calculates the one-cycle moving average value of the load currents Iu, Iv, Iw detected by the current detectors CT4 to CT6.

[0082] The moving average circuit 532 calculates the half-cycle moving average value of the load currents Iu, Iv, Iw detected by the current detectors CT4 to CT6.

[0083] The subtractor 534 calculates the harmonic components included in the load currents Iu, Iv, Iw by subtracting the half-cycle moving average value of the load current from the one-cycle moving average value of the load current.

[0084] Comparator 536 compares the harmonic components of the calculated load currents Iu, Iv, Iw with a predetermined threshold value X1, and sets the flag φF based on the comparison result. When the harmonic components of the load currents Iu, Iv, Iw are smaller than the threshold value X1, comparator 536 sets the flag φF to the "L" level of the non-activated level. When the harmonic components of the load current are larger than the threshold value X1, comparator 536 sets the flag φF to the "H" level of the activated level.

[0085] The minimum allowable voltage generation unit 538 generates the minimum allowable voltage VDC_inv based on the flag φF given from the comparator 536. Specifically, when the flag φF is at the "L" level, the minimum allowable voltage generation unit 538 sets the minimum allowable voltage VDC_inv to a predetermined reference value. This reference value is set to a value higher than the voltage that is twice the amplitude of the AC output voltages Vu, Vv, Vw. This is because when the DC voltage VDC becomes lower than the voltage that is twice the amplitude of the AC output voltages Vu, Vv, Vw, the inverter 3 cannot generate the sinusoidal AC output voltages Vu, Vv, Vw.

[0086] When the flag φF is at the "H" level, the minimum allowable voltage generation unit 538 sets the minimum allowable voltage VDC_inv to a value higher than the reference value. In one aspect, the minimum allowable voltage generation unit 538 generates the minimum allowable voltage VDC_inv by adding a certain value to the reference value. In another aspect, the minimum allowable voltage generation unit 538 generates the minimum allowable voltage VDC_inv by adding a value corresponding to the magnitude of the harmonic components of the load current to the reference value. In this case, as the harmonic components of the load currents Iu, Iv, Iw increase, the minimum allowable voltage VDC_inv increases.

[0087] When the load 8 is a half-wave rectified load, the load currents Iu, Iv, and Iw are not sinusoidal but have an asymmetric waveform with positive and negative values, so the DC voltage VDC oscillates. When the DC voltage VDC oscillates and falls below the reference value, the inverter 3 may not be able to generate sinusoidal AC output voltages Vu, Vv, and Vw. Also, in response to the DC voltage VDC oscillating and falling below the reference value, the bidirectional chopper 2 may output the DC voltage of the battery B1 between the DC buses Lp and Ln to compensate for the drop in the DC voltage VDC. In this case, the charge and discharge of the battery B1 will be repeated along with the oscillation of the DC voltage VDC, which may cause deterioration of the battery B1.

[0088] Therefore, in the first configuration example, when it is determined from the load currents Iu, Iv, and Iw that the load 8 is a half-wave rectified load, the minimum allowable voltage VDC_inv is increased to suppress the DC voltage VDC from dropping below the reference value.

[0089] FIG. 9 is a block diagram showing a second configuration example of the third arithmetic unit 53 shown in FIG. 5. As shown in FIG. 9, the third arithmetic unit 53 includes an effective value arithmetic unit 540, a maximum value arithmetic unit 542, a minimum value arithmetic unit 544, a subtractor 546, a comparator 548, and a minimum allowable voltage generation unit 550.

[0090] The effective value arithmetic unit 540 calculates the effective value Iurms of the load current Iu detected by the current detector CT4. The effective value arithmetic unit 540 calculates the effective value Ivrms of the load current Iv detected by the current detector CT5. The effective value arithmetic unit 540 calculates the effective value Iwrms of the load current Iw detected by the current detector CT6.

[0091] The maximum value arithmetic unit 542 calculates the maximum value Irmsmax among the effective values Iurms, Ivrms, and Iwrms of the load current. The minimum value arithmetic unit 544 calculates the minimum value Irmsmin among the effective values Iurms, Ivrms, and Iwrms of the load current.

[0092] The subtractor 546 subtracts the minimum value Irmsmin from the maximum value Irmsmax to obtain the difference ΔIrms between the maximum value Irmsmax and the minimum value Irmsmin.

[0093] The comparator 548 compares the difference ΔIrms with a predetermined threshold value X2 and sets the flag φF based on the comparison result. When the difference ΔIrms is smaller than the threshold value X2, the comparator 548 sets the flag φF to the "L" level of the non-activated level. When the difference ΔIrms is larger than the threshold value X2, the comparator 548 sets the flag φF to the "H" level of the activated level.

[0094] The minimum allowable voltage generation unit 550 generates the minimum allowable voltage VDC_inv based on the flag φF given from the comparator 548. Specifically, when the flag φF is at the "L" level (ΔIrms < X2), the minimum allowable voltage generation unit 550 sets the minimum allowable voltage VDC_inv to a predetermined reference value. This reference value is set to a value higher than the voltage that is twice the amplitude of the AC output voltages Vu, Vv, Vw.

[0095] When the flag φF is at the "H" level (ΔIrms > X2), the minimum allowable voltage generation unit 550 sets the minimum allowable voltage VDC_inv to a value higher than the reference value. In one aspect, the minimum allowable voltage generation unit 550 generates the minimum allowable voltage VDC_inv by adding a constant value to the reference value. In another aspect, the minimum allowable voltage generation unit 550 sets the minimum allowable voltage VDC_inv by adding a value proportional to the magnitude of the difference ΔIrms to the reference value. In this case, as the difference ΔIrms increases, the minimum allowable voltage VDC_inv increases.

[0096] When the load 8 is an unbalanced load, the load currents Iu, Iv, and Iw become unbalanced, causing the DC voltage VDC to oscillate. When the DC voltage VDC oscillates, as described with reference to FIG. 8, the inverter 3 cannot generate sinusoidal AC output voltages Vu, Vv, and Vw, and there is a possibility of causing deterioration of the battery B1. Therefore, in the second configuration example, when it is determined from the load currents Iu, Iv, and Iw that the load 8 is an unbalanced load, the minimum allowable voltage VDC_inv is increased to suppress the DC voltage VDC from dropping below the reference value.

[0097] As described above, the third arithmetic unit 53 is configured to determine the type of the load 8 from the load currents Iu, Iv, and Iw and generate the minimum allowable voltage VDC_inv according to the type of the load 8.

[0098] As shown in FIG. 5, the maximum value arithmetic unit 54 calculates the maximum value among the minimum allowable voltages VDC_cnv, VDC_chp, and VDC_inv respectively calculated by the three arithmetic units 51 to 53. The maximum value arithmetic unit 54 provides the calculated maximum value to the converter control unit 55, the bidirectional chopper control unit 56, and the inverter control unit 57 as the reference voltage VDCr.

[0099] The reference voltage VDCr corresponds to the minimum value of the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. The reference voltage VDCr is set to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3 according to the AC input voltages Vu1, Vv1, Vw1, the load currents Iu, Iv, Iw, and the state of the battery B1. Therefore, while ensuring the stable operation of the converter 1, the bidirectional chopper 2, and the inverter 3, the DC voltage VDC can be set to a low value, improving the efficiency of the uninterruptible power supply device.

[0100] Next, with reference to FIGS. 10 to 12, the detailed configurations of the converter control unit 55, the bidirectional chopper control unit 56, and the inverter control unit 57 shown in FIG. 5 will be described.

[0101] (Converter control unit 55) FIG. 10 is a block diagram showing a configuration example of the converter control unit 55. As shown in FIG. 10, the converter control unit 55 includes a voltage command generation circuit 30, a sine wave generation circuit 37, a PWM (Pulse Width Modulation) circuit 38, and a gate circuit 39.

[0102] The voltage command generation circuit 30 includes subtractors 31, 34A to 34C, a DC voltage control circuit 32, multipliers 33A to 33C, a current control circuit 35, and adders 36A to 36C. The subtractor 31 calculates a deviation ΔVDC = VDCr - VDC between the reference voltage VDCr from the reference voltage generation circuit 50 and the DC voltage VDC detected by the voltage detector 22.

[0103] The DC voltage control circuit 32 calculates a current command value I* for controlling the current flowing into the input side of the converter 1 so that the deviation ΔVDC becomes 0. The DC voltage control circuit 32 calculates the current command value I* by, for example, performing a proportional operation or a proportional-integral operation on the deviation ΔVDC.

[0104] The sine wave generation circuit 37 outputs a sine wave signal in phase with the AC input voltage Vu1 from the commercial AC power supply 6, a sine wave signal in phase with the AC input voltage Vv1, and a sine wave signal in phase with the AC input voltage Vw1. The three sine wave signals are respectively input to the multipliers 33A to 33C and multiplied by the current command value I*. As a result, current command values I1*, I2*, and I3* in phase with the AC input voltages Vu1, Vv1, and Vw1 are generated.

[0105] The subtractor 34A calculates a deviation ΔI1 = I1* - I1 between the current command value I1* and the AC input current I1 detected by the current detector CT1. The subtractor 34B calculates a deviation ΔI2 = I2* - I2 between the current command value I2* and the AC input current I2 detected by the current detector CT2. The subtractor 34C calculates a deviation ΔI3 = I3* - I3 between the current command value I3* and the AC input current I3 detected by the current detector CT3.

[0106] The current control circuit 35 generates voltage command values Vu1a*, Vv1a*, and Vw1a* such that the deviations ΔI1, ΔI2, and ΔI3 all become zero. The current control circuit 35 generates the voltage command values Vu1a*, Vv1a*, and Vw1a* by amplifying the deviations ΔI1, ΔI2, and ΔI3 according to proportional control or proportional-integral control, for example.

[0107] The adder 36A adds the voltage command value Vu1a* and the AC input voltage Vu1 detected by the voltage detector 21 to generate a voltage command value Vu1c*. The adder 36B adds the voltage command value Vv1a* and the AC input voltage Vv1 detected by the voltage detector 21 to generate a voltage command value Vv1c*. The adder 36C adds the voltage command value Vw1a* and the AC input voltage Vw1 detected by the voltage detector 21 to generate a voltage command value Vw1c*.

[0108] The PWM circuit 38 generates PWM control signals for each phase based on the power failure detection signal PF from the power failure detector 58, the mode signal MD from the mode setting unit 59, and the voltage command values Vu1c*, Vv1c*, and Vw1c*.

[0109] Specifically, when the constant inverter power supply mode is selected and the power failure detection signal PF is at the non-activated level "L" level (when the commercial AC power supply 6 is normal), the PWM circuit 38 generates PWM control signals for each phase based on the voltage command values Vu1c*, Vv1c*, and Vw1c*. The gate circuit 39 generates control signals for controlling the transistors included in each phase arm of the converter 1 based on the PWM control signals for each phase.

[0110] On the other hand, when the constant inverter power supply mode is selected and the power failure detection signal PF is at the activated level "H" level (when there is a power failure in the commercial AC power supply 6), the PWM circuit 38 stops the operation of the converter 1. Also, when the constant bypass power supply mode is selected, the PWM circuit 38 stops the operation of the converter 1.

[0111] (Bidirectional Chopper Control Unit 56) FIG. 11 is a block diagram showing a configuration example of the bidirectional chopper control unit 56. As shown in FIG. 11, the bidirectional chopper control unit 56 includes control circuits 560 and 562.

[0112] The control circuit 560 is activated when the power failure detection signal PF is at the non-activated level “L” level (when the commercial AC power supply 6 is sound), and controls the bidirectional chopper 2 based on the DC voltage VDC, the battery voltage VB, and the battery current IB so that the battery voltage VB becomes the reference voltage VBr.

[0113] The control circuit 562 is activated when the power failure detection signal PF is at the activated level “H” level (when a power failure occurs in the commercial AC power supply 6), and controls the bidirectional chopper 2 based on the DC voltage VDC, the battery voltage VB, and the battery current IB so that the DC voltage VDC becomes the reference voltage VD Cr given from the reference voltage generation circuit 50.

[0114] Specifically, the control circuit 562 includes subtracters 40 and 42, a voltage control circuit 41, a current control circuit 43, a PWM circuit 44, and a gate circuit 45. The subtracter 40 obtains a deviation ΔVDC = VD Cr - VDC between the reference voltage VD Cr given from the reference voltage generation circuit 50 and the DC voltage VDC detected by the voltage detector 22.

[0115] Based on the battery voltage VB detected by the voltage detector 23, the voltage control circuit 41 obtains a current command value IB* at a level corresponding to the deviation ΔVDC. The voltage control circuit 41 obtains the current command value IB* by, for example, performing a proportional operation or a proportional integral operation on the deviation ΔVDC.

[0116] The subtracter 42 obtains a deviation ΔIB = IB* - IB between the current command value IB* generated by the voltage control circuit 41 and the battery current IB indicated by the output signal of the current detector CT7. The current control circuit 43 generates a voltage command value V* based on the deviation ΔIB. The current control circuit 43 obtains the voltage command value V* by, for example, performing a proportional operation or a proportional integral operation on the deviation ΔIB.

[0117] The PWM circuit 44 is activated when the power failure detection signal PF is at the "H" level (when the commercial AC power supply 6 is healthy), and generates a PWM control signal based on the voltage command value V*. The gate circuit 45 generates a control signal for controlling the transistors included in the bidirectional chopper 2 based on the PWM control signal. The bidirectional chopper 2 supplies the DC power of the battery B1 to the inverter 3 via the DC buses Lp and Ln.

[0118] The PWM circuit 44 is deactivated when the power failure detection signal PF is at the "L" level (when the commercial AC power supply 6 is healthy), and does not perform PWM control of the bidirectional chopper 2. When the commercial AC power supply 6 is healthy, the bidirectional chopper 2 is controlled by the control circuit 560 to store DC power in the battery B1.

[0119] (Inverter control unit 57) FIG. 12 is a block diagram showing a configuration example of the inverter control unit 57. As shown in FIG. 12, the inverter control unit 57 includes a voltage command generation circuit 60, a control circuit 61, a PWM circuit 62, and a gate circuit 63.

[0120] The voltage command generation circuit 60 generates voltage command values for each of the U-phase, V-phase, and W-phase. The voltage command values are sine wave signals. The frequency of the sine wave corresponds to the frequency of the AC output voltages Vu, Vv, and Vw.

[0121] The control circuit 61 includes voltage control circuits 71 and 73, subtractors 72, 75U, 75V, and 75W, a switching circuit 74, a current control circuit 76, and adders 77U, 77V, and 77W. The voltage control circuit 71 generates current command values Iu*, Iv*, and Iw* based on the voltage command values from the voltage command generation circuit 60. The current command values Iu*, Iv*, and Iw* are respectively associated with the U-phase, V-phase, and W-phase.

[0122] The subtractor 72 calculates the deviation ΔVDC = VDCr - VDC between the reference voltage VDCr supplied from the reference voltage generation circuit 50 and the DC voltage VDC detected by the voltage detector 22. The voltage control circuit 73 generates current command values Iu*, Iv*, and Iw* based on the deviation ΔVDC. The voltage control circuit 73 obtains the current command values Iu*, Iv*, and Iw* by, for example, performing proportional calculation or proportional-integral calculation on the deviation ΔVDC.

[0123] The switching circuit 74 selects and outputs either the current command values Iu*, Iv*, and Iw* generated by the voltage control circuit 71 or the current command values Iu*, Iv*, and Iw* generated by the voltage control circuit 73 based on the mode signal MD from the mode setting unit 59. Specifically, when the constant inverter power supply mode is selected, the switching circuit 74 selects and outputs the current command values Iu*, Iv*, and Iw* generated by the voltage control circuit 71. When the normal bypass power supply mode is selected, the switching circuit 74 selects and outputs the current command values Iu*, Iv*, and Iw* generated by the voltage control circuit 73.

[0124] The subtractor 75U calculates the deviation ΔIu = Iu* - Iu between the current command value Iu* and the load current Iu detected by the current detector CT4. The subtractor 75V calculates the deviation ΔIv = Iv* - Iv between the current command value Iv* and the load current Iv detected by the current detector CT5. The subtractor 75W calculates the deviation ΔIw = Iw* - Iw between the current command value Iw* and the load current Iw detected by the current detector CT6.

[0125] The current control circuit 76 generates voltage command values Vua*, Vva*, and Vwa* such that the deviations ΔIu, ΔIv, and ΔIw all become zero. The current control circuit 76 generates the voltage command values Vua*, Vva*, and Vwa* by, for example, amplifying the deviations ΔIu, ΔIv, and ΔIw according to proportional control or proportional-integral control.

[0126] The adder 77U adds the voltage command value Vua* and the AC output voltage Vu detected by the voltage detector 24 to generate a voltage command value Vu*. The adder 77V adds the voltage command value Vv* and the AC output voltage Vv detected by the voltage detector 24 to generate a voltage command value Vv*. The adder 77W adds the voltage command value Vwa* and the AC output voltage Vw detected by the voltage detector 24 to generate a voltage command value Vw*.

[0127] The PWM circuit 62 generates PWM control signals for each phase based on the voltage command values Vu*, Vv*, Vw*. The gate circuit 63 generates control signals for controlling the transistors included in each phase arm of the inverter 3 based on the PWM control signals for each phase.

[0128] <Effect> As described above, in the uninterruptible power supply device according to the present embodiment, the reference voltage VDCR, which is the target value of the DC voltage VDC between the DC buses Lp and Ln, is set so as to satisfy the DC voltage VDC required by each of the converter 1, the bidirectional chopper 2, and the inverter 3. According to this, while ensuring the stable operation of the converter 1, the bidirectional chopper 2, and the inverter 3, the DC voltage VDC (that is, the reference voltage VDCR) can be set to a value lower than the maximum value of the DC voltage VDC that the converter 1 can stably output. Therefore, while maintaining the high power supply reliability of the uninterruptible power supply device, it is possible to reduce the switching loss of the transistors included in the converter 1, the bidirectional chopper 2, and the inverter 3 and improve the efficiency of the uninterruptible power supply device.

[0129] It should be considered that the embodiments disclosed this time are illustrative in all respects and not restrictive. The scope of the present disclosure is shown not by the above description but by the claims, and it is intended that all modifications within the meaning and scope equivalent to the claims are included.

Description of Reference Numerals

[0130] 1 Converter, 2 Bidirectional Chopper, 3 Inverter, 4 Operation Unit, 5 Control Device, 6 Commercial AC Power Supply, 7 Bypass AC Power Supply, 8 Load, 10 CPU, 12 Memory, 14 I / O Circuit, 16 Bus, 21 - 24 Voltage Detector, 30, 60 Voltage Command Generation Circuit, 31, 34A - 34C, 40, 42, 72, 75U - 75W, 534, 546 Subtractor, 32 DC Voltage Control Circuit, 33A - 33C, 520 Multiplier, 35, 43, 76 Current Control Circuit, 36A - 36C, 77U - 77W, 522 Adder, 37 Sine Wave Generation Circuit, 38, 44, 62 PWM Circuit, 39, 45, 63 Gate Circuit, 41, 71, 73 Voltage Control Circuit, 50 Reference Voltage Generation Circuit, 51 First Arithmetic Unit, 52 Second Arithmetic Unit, 53 Third Arithmetic Unit, 54, 512, 542 Maximum Value Arithmetic Unit, 55 Converter Control Unit, 56 Bidirectional Chopper Control Unit, 57 Inverter Control Unit, 58 Power Failure Detector, 59 Mode Setting Unit, 61, 560, 562 Control Circuit, 74 Switching Circuit, 510, 540 RMS Value Arithmetic Unit, 514, 524, 538, 550 Minimum Allowable Voltage Generation Unit, 536, 548 Comparator, 544 Minimum Value Arithmetic Unit, C1 - C6, Cd Capacitor, CT1 - CT7 Current Detector, F1, F2 AC Filter, L1 - L6 Reactor, Lp DC Positive Bus, Ln DC Negative Bus.

Claims

1. An uninterruptible power supply device having a plurality of power supply modes for a load, comprising: a converter that converts AC power supplied from a first AC power supply into DC power and supplies the DC power to a DC bus; a bidirectional chopper connected between a power storage device and the DC bus, and supplying DC power from the power storage device to the DC bus when the first AC power supply fails; an inverter that converts DC power received from the DC bus into AC power and supplies the AC power to the load; a control device that controls any one of the converter, the bidirectional chopper, and the inverter according to the power supply mode of the uninterruptible power supply device so that the DC voltage of the DC bus becomes a reference voltage; an uninterruptible power supply device comprising a reference voltage generation circuit that generates the reference voltage so as to satisfy the DC voltage required by each of the converter, the bidirectional chopper, and the inverter.

2. The reference voltage generation circuit: calculates a first minimum allowable voltage of the DC voltage required for power conversion in the converter; calculates a second minimum allowable voltage of the DC voltage required for DC voltage conversion in the bidirectional chopper; calculates a third minimum allowable voltage of the DC voltage required for power conversion in the inverter; The uninterruptible power supply device according to claim 1, wherein the reference voltage is generated based on the maximum value among the calculated first to third minimum allowable voltages.

3. The reference voltage generation circuit calculates the first minimum allowable voltage based on a first AC input voltage from the first AC power supply. The uninterruptible power supply device according to claim 2.

4. The reference voltage generation circuit increases the first minimum allowable voltage in response to the first AC input voltage rising above the rated voltage of the first AC power supply. The uninterruptible power supply device according to claim 3.

5. The reference voltage generation circuit calculates the second minimum allowable voltage based on the current flowing through the power storage device. The uninterruptible power supply device according to claim 2.

6. The reference voltage generation circuit calculates a voltage drop amount in the bidirectional chopper based on the current flowing through the power storage device, and calculates the second minimum allowable voltage so as to compensate for the calculated voltage drop amount. The uninterruptible power supply device according to claim 5.

7. The reference voltage generation circuit calculates the third minimum allowable voltage based on the load current flowing between the inverter and the load. The uninterruptible power supply device according to claim 2.

8. The reference voltage generation circuit increases the third minimum allowable voltage when it is determined from the load current that the load is a half-wave rectified load or an unbalanced load. The uninterruptible power supply device according to claim 7.

9. The plurality of power supply modes includes a constant inverter power supply mode in which AC power generated by the inverter is supplied to the load. When the constant inverter power supply mode is selected, when the first AC power supply is healthy, the control device controls the converter so that the DC voltage becomes the reference voltage. The uninterruptible power supply device according to any one of claims 1 to 8.

10. When the constant inverter power supply mode is selected, when the first AC power supply fails, the control device controls the bidirectional chopper so that the DC voltage becomes the reference voltage. The uninterruptible power supply device according to claim 9.

11. The plurality of power supply modes includes a constant bypass power supply mode in which AC power from a second AC power supply is supplied to the load. When the constant bypass power supply mode is selected, the control device stops the operation of the converter and is configured to control the inverter to convert the AC power supplied from the second AC power supply into DC power and supply it to the DC bus. The control device controls the inverter so that the DC voltage becomes the reference voltage. The uninterruptible power supply device according to any one of claims 1 to 8.