Sensor for monitoring lateral etching

Abstract

A sensor for real-time monitoring of etching is presented. In one aspect, the sensor monitors etch rate distribution on a horizontal plane on the wafer. In another aspect, the sensor monitors etch rate distribution on horizontal planes with different offsets from the wafer. In a further embodiment, the sensor monitors time distribution of partial etch end-points for pre-defined lateral etch lengths. In another embodiment, the sensor is self-powered using energy derived from the etching reactions.

Description

SENSOR FOR MONITORING LATERAL ETCHINGCROSS REFERENCE TO RELATED APPLICATIONS

[0001] This application claims priority to U.S. Provisional Patent Application Serial No. 63 / 522,476, filed June 22, 2023, the entirety of which is incorporated herein.BRIEF SUMMARY

[0002] A sensor for real-time monitoring of etching is presented. In one aspect, the sensor monitors etch rate distribution on a horizontal plane on the wafer. In another aspect, the sensor monitors etch rate distribution on horizontal planes with different offsets from the wafer. In a further embodiment, the sensor monitors time distribution of partial etch end-points for predefined lateral etch lengths. In another embodiment, the sensor is self-powered using energy derived from the etching reactions.

[0003] The above embodiments are exemplary only. Other embodiments as described herein are within the scope of the disclosed subject matter.BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

[0004] So that the manner in which the features of the disclosure can be understood, a detailed description may be had by reference to certain embodiments, some of which are illustrated in the accompanying drawings. It is to be noted, however, that the drawings illustrate only certain embodiments and are therefore not to be considered limiting of its scope, for the scope of the disclosed subject matter encompasses other embodiments as well. The drawings are not necessarily to scale, emphasis generally being placed upon illustrating the features of certain embodiments. In the drawings, like numerals are used to indicate like parts throughout the various views, in which:

[0005] FIG. 1 illustrates non-uniform etch rates of a blanket layer on a semiconductor wafer, and non-uniform lateral etch of Silicon Germanium layers for spacer deposition in a gate-all-around nanosheet FET; in accordance with one or more aspects set forth herein;.

[0006] FIG. 2 illustrates a prior art mass spectrometer;

[0007] FIG. 3 illustrates a sensor wafer, in accordance with one or more aspects set forth herein;

[0008] FIG. 4 illustrates sensor elements on the sensor wafer of FIG. 3, in accordance with one or more aspects set forth herein;

[0009] FIG. 5 illustrates details of sensor elements on the sensor wafer of FIG. 3, in accordance with one or more aspects set forth herein;

[0010] FIG. 6 illustrates a sweep pattern to address sensors on the sensor wafer of FIG. 3, in accordance with one or more aspects set forth herein; and

[0011] FIG. 7 illustrates a self-powered sensor wafer, in accordance with one or more aspects set forth herein.

[0012] Corresponding reference characters indicate corresponding parts throughout several views. The examples set out herein illustrate several embodiments, but should not be construed as limiting in scope in any manner.DETAILED DESCRIPTION

[0013] The present disclosure relates to monitoring lateral etching in a semiconductor fabrication process. For instance, the present technique is applicable to etch rate distribution monitoring for gate-all-around field effect transistor fabrication processes.

[0014] In one aspect, this is achieved by deploying a sensor, such as a wafer sensor, for real-time monitoring of etching in the semiconductor process chamber. In one aspect, the sensor monitors etch rate distribution on a horizontal plane on the wafer. In another aspect, the sensor monitors etch rate distribution on horizontal planes with different vertical offsets from the wafer-bottom. In a further embodiment, the sensor monitors time distribution of partial etch end-points for a given plane for pre-defined lateral etch lengths. In another embodiment, the sensor is self-powered using energy derived from the etching reactions including the chamber process and energy resources driving the etch reaction.

[0015] Advantageously, the present disclosure enables a process engineer to see the etch rate distribution on the wafer for the entire active process volume through the use of the innovative sensor and method that does not exist for gate all-around metal oxide semiconductor field effect transistor (MOSFET) fabrication or 3-D device architecture today

[0016] Today’s state of the art chip fabrication involves nearly 50% of etch steps using remote plasmas. Chemically reactive and kinetically energized species generated in the remote plasma are transported first to a chamber with wafer. The species then travel towards the wafer plane by a combination of diffusion, convection, or drift currents. These species etch a selective material layer(s) on the wafer in order to remove it (them) entirely or to reduce its (their) dimensions. Theetch process is designed to ensure the surrounding layers are non-selective to etch. Etching, in general, is very complex in that etch-rates depend on multitudes of parameters such as gas chemistry, radio-frequency (RF) Power, condition of the chamber where the plasma is generated, chamber pressure, gas mixing ratios, RF excitation frequency, etc. Changes to any of these parameters can drift the real etch rate from the best known rate programmed in a recipe step.

[0017] The pursuit of scaling up device-density and increasing processing speeds has led the current technology fronts to gate-all-around field effect transistors (gate-all-around FETs) in logic device fabrication and 3D-NAND-Flash in memory device fabrication. These new technologies require selective material removal from a stack of horizontal layers along a direction parallel to the wafer plane. For example, a horizontal etch step is used to remove all Silicon Nitride layers placed between the Silicon Oxide layers to fill it with a gate metal in gate-last 3D NAND Flash memory fabrication. Another example is the lateral indentation (etching horizontally inwards from opposite directions) of Silicon-Germanium layers to define a uniform gate length, according to design, on all horizontally stacked channels of a gate-all-around nanosheet field effect transistors.

[0018] While a wet etch can be tolerated in the 3D-NAND feature sizes existing today , a remote plasma dry etch is required for gate-all-around FETs. The channels in these devices are too thin (~ 2nm) to survive from collapsing due to surface tension force of a wet etchant. The horizontal etch requires the energized species to react isotopically, which means that ionized species in the generated plasma are filtered and only the radicals are allowed to reach the wafer.

[0019] It is clear from the foregoing paragraphs that a fixed-time based etch cannot be employed. Hence, there is a need for a sensor to monitor both etch end-points and partial etch-end-points. Radio-frequency based sensors (RF sensors) used to indicate direct plasma etch end-points are useless for monitoring end-point events in a remote plasma etch. An optical emission spectrometer (OES) which uses the change in the intensity of emission lines of a target material to detect end point is not useful in the remote plasma as well. Sensors such as self-plasma OES, Mass spectrometers, and Quartz Crystal Microbalance (QCM) integrated to the process chamber may be useful to indicate end-points. Regardless of whether useful or not, all these sensors seldom have a sharp change in their respective end point signals as etch rates are not uniform across large wafers. Even for a hypothetical scenario where the density of etching species is uniform across the wafer,the local etch-rates depend on feature-density on the wafer and the etch-front location within high aspect ratio features, resulting in broad end-point signals.

[0020] Conventional sensors fail to detect partial-etch-end-points as there are no interfaces involved in a partial-etch which could act as the logical stopping point for such sensors. There is a need to monitor the indentation etch of gate-all-around FET fabrication. Current practice in the industry is to dispose a blanket layer of material selective to the etch recipe and perform a timed etch. The thickness map on the wafer, called the metrology wafer, is generated ex-situ using an ellipsometer. The thickness map and etch duration is used to generate an etch rate map for the given process. While this gives some useful information about vertical etch-rate distribution on the wafer it doesn’t allow a process engineer to control process parameters mentioned above real time to optimize the uniformity. Moreover, if a process drifts many times within a day and requires metrology wafer runs to correct process parameters it is not sustainable for production. Most importantly, the metrology wafer does not provide lateral etch rate information, leaving a gap for a critical sensor.

[0021] Disadvantageously, conventional techniques to monitor the lateral etch across the wafer and for a given device vertically requires a process engineer to perform analysis using transmission electron microscopy (TEM) after the device is fabricated. TEM is a very tedious and time consuming process and only done for lamellas selected from few areas from the wafer. For a 300mm diameter wafer, the results constructed from TEM results is inadequate to represent the wafer uniformity. Besides, this is not practical when there is an issue and the process engineer needs to figure out and correct for rates and uniformity both across the wafer and in a vertical plane on a local area of the wafer. There are millions of combinations of the process parameters mentioned above. In brief, conventional systems cannot monitor in real-time a) horizontal etch rate distribution on the wafer, b) etch rate distribution on horizontal planes with different offset from the wafer bottom, c) partial etch end-point in a direction horizontal to the wafer plane for a given vertical offset

[0022] FIG. 1 illustrates non-uniform etch rates of a blanket layer on a semiconductor wafer. The heat map 102 shows the non-uniform etch rates of a blanket layer on a 200mm wafer. The schematic 104 provides an example non-uniform indentation etch of silicon germanium (SiGe) Layers.

[0023] FIG. 2 illustrates, for reference, a prior art neutral radical mass spectrometer to detect radical concentration, from U.S. Patent Publication No. 2022 / 0392812A1, the entirety of which is incorporated herein for all purposes.

[0024] FIG. 3 illustrates a sensor wafer 300. As seen in FIG. 3, there are eight radial arrays of sensors 400 emanating from the center of the wafer. As explained in further detail below, the sensor wafer 300 allows monitoring of lateral etching by monitoring in-situ and in real-time a) etch rate distribution on a horizontal plane on the wafer, b) etch rate distribution on horizontal planes with different offset from the wafer bottom, and c) time-distribution of partial etch endpoints for pre-defined lateral etch lengths. Advantageously, wafer 300 enables the process engineer to see the etch rate distribution on the wafer for the entire active process volume by providing an innovative sensor and method that does not exist for gate all-round MOSFET fabrication today. Although sensor wafer 300 is described below with respect to a specific implementation geometry and using specific sensor elements, the geometry and specific sensor technologies can be varied and still fall within the scope of the invention. For instance, sensor wafer could use multitudes of physical wires attached to the different sensor elements dispersed on the wafer. The wires would be to use resonance frequencies of the sensor elements.

[0025] The sensor wafer 300 of Fig.3 consists of multitudes of acoustic resonator sensor elements 400, for example film bulk acoustic resonators (FBARs), that are dispersed over the wafer in a manner the resonance frequencies of each FBAR indicates the unique location it occupies on the wafer. During an etch process, the selective material disposed on the sensor electrode etch away thereby increasing the resonance frequency of a given resonator. The rate of change of resonance frequency is proportional to the rate of material etch. Because the sensors are disposed with its base frequency providing a locating pattern where each resonator sits on the wafer monitoring the eth rates of all sensors result in the generation of an etch rate map. Further by orienting the sensor array pattern with respect to a notch or a flat on the wafer locations of the sensors within the chamber can be triangulated for the purpose of chamber matching. Therefore, unlike in the use of a typical metrology wafer where the wafer has to be withdrawn from the chamber at the end of a process to generate a thickness map, ex-situ, the invention allows the process engineer to adjust process parameters and to monitor etch rate velocity map of the wafer. This facilitates learningetch-rate trends and allows the process engineer to home-in an optimized process parameter combination for improving etch uniformity.

[0026] FIG. 4 illustrates sensor elements 400, and specifically sensor elements SI S2, S3 and S4 located on the sensor wafer 300. As shown in the embodiment of Fig. 4, a given location on the wafer has a group of four sensor elements S1-S4. Three of them, SI though S3, have different heights with the material selective to etch disposed over the electrodes. The heights serves two purposes. The first being to have a resonance frequency that uniquely identifies the sensor and the second being the vertical height offset from the wafer plane where the etching will take place once placed in the etch chamber.

[0027] FIG. 5 illustrates details of the fourth sensor element S4 labeled “Lateral” has the material selective to etch disposed between a non-selective hat layer at the top and a non-selective electrode material layer at the bottom as illustrated in Fig. 5. The legend boxes in the figure show the types of material used. The non-selective material forms a cladding layer around the FBAR sensor in this case with the sidewall thickness defined by an Atomic Layer Deposition conformal coating. The thickness can be set equal to an indentation length to monitor partial etch end-point. When the lateral etch-front of the indentation reaches the vertical interface between the cladding and the active area of the FBAR the resonance frequency starts to change noticeably indicating the partial etch end-point. The Fourth sensor element S4 on the group may be used to monitor partial etch end-point in the lateral direction. The FBAR is only an example and can be replaced with any other sensors which produces a signal as a function of an etch-selective dielectric layer incorporated with the sensor.

[0028] A network analyzer or a similar instrument that can monitor the resonance frequency of a resonator is used to scan the resonance frequencies of all the sensors 400 dispersed on the wafer 300. The base resonance frequencies uniquely identify the location on the wafer of the sensor being interrogated, thereby translating the frequency shifts recorded to an etch rate map. All sensors on the wafer are connected in parallel in that all the top electrodes are tied to a common electrode on the wafer and all bottom electrodes are connected to another common electrode. These common electrodes are tied to electrodes within the chamber that is accessible from outside. The monitor wafer can also be connected to the chamber electrodes by multiple ways. The monitor wafer can also be connected to the other structures that can come in to close proximity or directly contacting.For example, the pedestal height can be adjusted to capacitive couple the Electrodes, the larger conical area shown in the sensor wafer shown in Fig. 3 is designed so it is about 75% of the wafer surface of a 300 mm wafer, which means when the chuck is raised close towards the showerhead its RF source port can be tapped to couple to one of the electrodes on the wafer. The electrodes can be connected to the pedestal on which the wafer sits.

[0029] In different embodiments, there are multiple other ways to connect the sensors to a network analyzer including Electrostatic-chuck contacts and wafer lift pins intentionally left in the position to connect wrap-around electrodes of the sensor wafer.

[0030] FIG. 6 illustrates a sweep pattern 600 to address sensors on the sensor wafer 300. The Lateral portion 604 of the sweep interrogate the partial etch end-point to create a etch end-point time distribution across for similar lateral etch across the wafer. The other three saw-tooth sweep cycles 601-603 address the different etch planes. The sweep 600 may be performed continuously in the given pattern or reduced to pick a plane or even a portion on the wafer by selecting the base frequency span in order to monitor a desired plane or area at a faster speed.

[0031] FIG. 7 illustrates a self-powered sensor wafer 700. In the embodiment of FIG. 7, The capacitive areas defined can store charges from thermoelectric displacement current due to radicals imparting heat to a catalytic metal. The wafer 700 can also be powered by the Radicals impinging on the wafer as shown in Fig.7. An example embodiment of a self-powered Sensor wafer is shown in Fig. 7. The figure shows a radical rain shower on the monitor wafer. Only one area 702 of a plurality of the areas are shown with the radical shower form the shower head of the process chamber.

[0032] Using the radical density to generate a thermoelectric current that flows across the shaded region from + labeled area to the - labeled area. The unshaded areas are coupled to the top and bottom of the shaded area designed as a capacitor. The region where the capacitor is formed on the monitor wafer is covered with Alumina or other suitable material to stop the molecules from dissociative adsorption to its surface. The “+” and marked region are designed to have areas so that “+” area is larger compared to area to induce a displacement current due to asymmetric radical heating. The time of radical pulse can be selected to prevent the overheating of pertinent areas triggering fouling of the catalytic areas (for example Nickel Fluoride formation). Thermoelectric displacement current charges the capacitance to cross above a threshold voltage.Such threshold voltage is sufficient to trigger a beacon containing the resonance frequency information of the sensor elements. Such a beacon can be detected with a receiver attached to the window of a view-port or a view port configured to serve the dual purpose of providing view-port functionality and a receiving antenna. The radical pulse time can be elongated so that a plurality of beacons are emitted each time the threshold voltage is crossed. A simple antenna can be placed on the view port to pick out the beacons and the information it carries about the etch rate.

[0033] In other embodiments, which are within the scope of the invention, an optical method may be used, for example, by means of 3D optical reconstruction of vertical and lateral etch profile. In such a case, a moving lateral etch front would be constructed to monitor the etching rate.

Claims

CLAIMSWhat is claimed is:

1. A sensor wafer for monitoring etching in a process chamber, the sensor wafer comprising a plurality of sensor elements, the plurality of sensor elements having differing vertical heights.

2. The sensor wafer of claim 1, wherein each sensor element comprises a film bulk acoustic resonator having a different resonant frequency to facilitate identification of the location on the wafer corresponding to the sensor element when interrogated using a network analyzer.

3. The sensor wafer of claim 1, wherein each sensor element changes a base signal in response to an etch selective material layer incorporated with the sensor element.

4. The sensor wafer of claim 1, wherein the sensor wafer uses energy available within the chamber to energize each sensor element and transmits a state as a signal that encodes etch rate information.

5. The sensor wafer of claim 1, wherein each sensor element is configured to monitor etch rate distribution on a horizontal plane of the wafer, monitor etch rate distribution on horizontal planes with different offsets from the wafer, and monitor time distribution of partial etch end-points for pre-defined lateral etch lengths.

6. A sensor wafer for monitoring etching in a process chamber, the sensor wafer comprising: a plurality of sensor elements, the plurality of sensor elements having differing vertical heights; and at least one power generating region, the power generating region being configured to derive power from heat energy from the etching reactions taking place on the at least one power generating region.

7. A method for monitoring etching in a process chamber using a sensor wafer comprising a plurality of sensor elements having differing vertical heights, the method comprising:monitoring etch rates on planes located at different vertical offsets from the bottom of the sensor wafer; geometrically locating positions of the sensor elements for etch distribution purposes; triangulating rate information within a given chamber for chamber matching, the triangulating including locating the sensors with reference to a notch or flat feature on the wafer; and deriving the rate information from several planes simultaneously.

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