Power-taking circuit and electronic device

Abstract

Provided in the present application are a power-taking circuit and an electronic device. The power-taking circuit comprises: an antenna, which is used for receiving energy from an environment and converting the energy into electric energy; a rectifier bridge circuit, which is connected to the antenna and is used for rectifying the electric energy; a memory, which is connected to the rectifier bridge circuit and is used for storing rectified electric energy; a direct-current (DC) conversion circuit, which is used for being connected to the memory, wherein when the voltage of the memory reaches a preset voltage, the DC conversion circuit starts and processes the electric energy stored in the memory, so as to output a stable DC signal; a load circuit, which is connected to the DC conversion circuit; and an NFC chip, which is connected to the antenna, and processes the electric energy and then outputs same, so as to supply power to the load circuit before the DC conversion circuit starts.

Description

Power circuits and electronic equipment

[0001] This application claims priority to Chinese patent applications filed with the China Patent Office on June 28, 2023, with application number 202321674830.3, filed with the China Patent Office on February 28, 2024, with application number 202420366643.7, and filed with the China Patent Office on April 2, 2024, with application number 202420677486.1. The entire contents of the above applications are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of electronic technology, and in particular to a power supply circuit and electronic equipment. Background Art

[0003] Currently, NFC products mainly include active NFC products and passive NFC products. Active NFC products include batteries, main control circuits, and NFC circuits. The main control circuits constantly consume battery energy. Once the battery energy is exhausted, the battery needs to be replaced, which is inconvenient and environmentally friendly. Passive NFC products do not require batteries. The NFC circuit of passive NFC products can obtain energy from other devices to power the passive NFC circuit. Technical issues

[0004] However, the energy obtained by the NFC circuit of the passive NFC product is unstable, and the circuit inside the passive NFC product operates unstable. Technical Solutions

[0005] In a first aspect, an embodiment of the present application provides a power supply circuit, the power supply circuit comprising:

[0006] Antenna, used to receive energy from the environment and convert it into electrical energy;

[0007] a rectifier bridge circuit, connected to the antenna, for rectifying the electric energy;

[0008] a memory, connected to the rectifier bridge circuit, for storing rectified electric energy;

[0009] A DC conversion circuit is connected to the memory, and when the voltage of the memory reaches a preset voltage, the DC conversion circuit starts and processes the electric energy stored in the memory to output a stable DC signal;

[0010] a load circuit connected to the DC conversion circuit, wherein the load circuit is powered by the DC signal provided by the DC conversion circuit;

[0011] The NFC chip circuit is connected to the antenna and processes the electric energy and outputs it to power the load circuit before the DC conversion circuit is started.

[0012] In a second aspect, an embodiment of the present application provides an electronic device, which includes a power supply circuit, and the power supply circuit is the power supply circuit described above. Beneficial effects

[0013] The power supply circuit provided in this application receives energy from the environment through an antenna and converts it into electrical energy, thereby realizing passive power supply of the power supply circuit. The NFC chip can process the electrical energy obtained by the antenna to power the load. The rectifier bridge circuit can rectify the electrical energy obtained by the antenna, the memory stores the rectified electrical energy, and the DC conversion circuit processes the electrical energy stored in the memory to output a stable DC signal, thereby providing a stable DC signal to the load circuit. The DC signal provided by the load circuit is more stable and has greater power than the energy provided by the NFC chip, which enables the load circuit to operate stably and can drive a higher-power load circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] FIG1 is a schematic diagram of the first structure of the power supply circuit provided in an embodiment of the present application.

[0015] Figure 2 is a schematic diagram of the structure of the NFC chip circuit in the power supply circuit shown in Figure 1

[0016] FIG3 is a second structural diagram of the power supply circuit provided in an embodiment of the present application.

[0017] FIG4 is a third structural diagram of the power supply circuit provided in an embodiment of the present application.

[0018] FIG5 is a fourth structural diagram of the power supply circuit provided in an embodiment of the present application.

[0019] FIG6 is a schematic diagram of the structure of the memory and DC conversion circuit provided in an embodiment of the present application.

[0020] FIG7 is a fifth structural diagram of the power supply circuit provided in an embodiment of the present application.

[0021] FIG8 is a sixth structural diagram of the power supply circuit provided in an embodiment of the present application.

[0022] FIG9 is a schematic diagram of a first structure of the current speed-changing circuit shown in FIG8 .

[0023] FIG10 is a schematic diagram of a second structure of the current speed-changing circuit shown in FIG8 .

[0024] FIG11 is a schematic diagram of a third structure of the current speed-changing circuit shown in FIG8 .

[0025] FIG12 is a schematic diagram of a fourth structure of the current speed-changing circuit shown in FIG8 .

[0026] FIG13 is a fifth structural diagram of the current speed-changing circuit shown in FIG8 .

[0027] FIG14 is a schematic diagram of the first structure of an electronic device provided in an embodiment of the present application.

[0028] FIG15 is a schematic diagram of a second structure of an electronic device provided in an embodiment of the present application.

[0029] FIG16 is a third structural diagram of the electronic device provided in an embodiment of the present application.

[0030] Reference numerals:

[0031] 100. Electronic equipment;

[0032] 10. Power supply circuit;

[0033] 11. Antenna, 112. First antenna, 114. Second antenna;

[0034] 12. Rectifier bridge circuit; 121. First resonant matching circuit

[0035] 13. Memory;

[0036] 14. DC conversion circuit, 142. DC conversion chip, 144. LC circuit;

[0037] 15. Load circuit, 152. Main control chip, 154. Drive circuit;

[0038] 16. NFC chip circuit; 161. second resonant matching circuit.

[0039] 17. Current speed change circuit. Modes for Carrying Out the Invention

[0040] In the description of this application, unless otherwise specified or limited, the terms "connected," "connect," and "fixed" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integration; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and can refer to internal communication between two components or interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0041] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or the first and second features being in contact not directly but through another feature between them. Furthermore, a first feature being "above," "above," and "above" a second feature includes the first feature being directly above and obliquely above the second feature, with the first feature having a higher horizontal height than the second feature. A first feature being "below," "below," and "below" a second feature includes the first feature being directly below and obliquely below the second feature, with the first feature having a lower horizontal height than the second feature.

[0042] In the description of this embodiment, terms such as "upper," "lower," "left," "right," "front," and "rear" are used to refer to positions or locations based on the positions or locations shown in the accompanying drawings. These terms are intended to facilitate description and simplify operation, and are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and do not have any special meanings.

[0043] Referring to Figure 1 , which is a schematic diagram of a first embodiment of a power supply circuit provided in an embodiment of the present application, the present application provides a power supply circuit 10 , which includes an antenna 11 , a rectifier bridge circuit 12 , a memory 13 , a DC conversion circuit 14 , a load circuit 15 , and an NFC chip circuit 16 .

[0044] The antenna 11 is used to receive energy from the environment and convert it into electrical energy. The antenna 11 may be an NFC antenna 11 , that is, the antenna 11 utilizes NFC technology to obtain corresponding radio frequency signals from the environment and convert the radio frequency signals into electrical energy.

[0045] The NFC chip circuit 16 is connected to the antenna 11 and processes the electrical energy and outputs it to power the load circuit 15 .

[0046] A rectifier bridge circuit 12 is connected to antenna 11 and is used to rectify electrical energy. Specifically, rectifier bridge circuit 12 includes two input terminals and two output terminals. The two input terminals are respectively connected to the two ports of antenna 11, and the two output terminals are used to output the rectified signal. In some examples, rectifier bridge circuit 12 can rectify the sinusoidal signal output by antenna 11 and output a half-wave signal.

[0047] Memory 13 is connected to the rectifier bridge circuit 12 and is used to store rectified electrical energy. Memory 13 and rectifier bridge circuit 12 work together to rectify the sinusoidal AC signal generated by antenna 11 and, in the form of a charge pump, boost the energy generated by NFC antenna 11 and store it in memory 13.

[0048] The DC conversion circuit 14 is connected to the memory 13. When the voltage of the memory 13 reaches a preset voltage, the DC conversion circuit 14 starts and processes the electric energy stored in the memory 13 to output a stable DC signal.

[0049] The load circuit 15 is connected to the DC conversion circuit 14 , and the load circuit 15 is powered by a DC signal provided by the DC conversion circuit 14 .

[0050] Among them, before the DC conversion circuit 14 supplies power to the load circuit 15, the NFC chip circuit 16 supplies power to the load circuit 15. After the DC conversion circuit 14 can output a stable DC signal, the power supply of the load circuit 15 is switched from the NFC chip circuit 16 to the DC conversion circuit 14.

[0051] In this embodiment, the antenna 11 receives energy from the environment and converts it into electrical energy, thereby realizing passive power supply of the power supply circuit 10. The NFC chip circuit 16 can process the electrical energy obtained by the antenna 11 to power the load. The rectifier bridge circuit 12 can rectify the electrical energy obtained by the antenna 11, the memory 13 stores the rectified electrical energy, and the DC conversion circuit 14 processes the electrical energy stored in the memory 13 to output a stable DC signal, thereby providing a stable DC signal to the load circuit 15. The DC signal provided by the load circuit 15 is more stable and has greater power than the energy provided by the NFC chip circuit 16, enabling the load circuit 15 to operate stably and at the same time being able to drive a higher-power load circuit 15.

[0052] In some embodiments, the load circuit 15 includes a main control chip 152. The main control chip 152 first receives power from the NFC chip circuit 16 to start up, and then receives power from the DC converter circuit 14. The main control chip 152 first receives power from the NFC chip circuit 16 to start up and operate, such as performing initialization or wireless communication with external devices. The main control chip 152 can be connected to the output of the DC converter circuit 14 via a pin and monitor the signal on this pin in real time. When this pin detects a stable DC signal, the main control chip 152 switches its power supply from the NFC chip circuit 16 to the DC converter circuit 14. In some examples, the main control chip 152 includes a first pin and a second pin. The first pin is connected to the NFC chip circuit 16. When the signal provided by the NFC chip circuit 16 meets a certain standard, the main control chip 152 starts up. The second pin is connected to the output of the DC converter circuit 14. When the DC converter circuit outputs a stable DC signal, the first pin of the main control chip 152 disconnects the power supply channel from the NFC chip circuit 16, and the second pin supplies power to the main control chip 152 through the energy supply channel connected to the DC converter circuit 14.

[0053] Please refer to Figure 2, which is a structural diagram of the NFC chip circuit in the power extraction circuit shown in Figure 1. In some examples, the NFC chip circuit 16 may include an NFC chip U4, which can obtain electrical energy through the antenna 11. The NFC chip U4 has an integrated energy processing circuit to process the energy provided by the antenna 11 and power the NFC chip U4 itself. It can also power other devices such as the load circuit 15, so that the load circuit 15 can obtain data signals through the NFC chip circuit 16.

[0054] In some examples, the NFC chip U4 includes a first input pin IN1 and a second input pin IN2, and the first input pin IN1 and the second input pin IN2 are used to connect to the antenna 11 to obtain power to power the NFC chip U4 and the like.

[0055] The NFC chip U4 may further include pins for I2C communication, such as an SDA pin and an SCL pin, where the SDA pin is used to transmit a data signal and the SCL pin is used to transmit a clock signal.

[0056] NFC chip U4 may include a power output pin, VOUT, that can output a power signal (e.g., 3.3V) to power other components. Optionally, a capacitor (e.g., capacitor C41) can be connected to the power output pin VOUT to filter the output power signal. Optionally, a reverse current protection element (e.g., diode D6) can be connected to the power output pin VOUT to prevent signal backflow.

[0057] In some examples, the NFC chip U4 also includes a power input terminal VCC, which can also be powered by a power signal (such as a 3.3V voltage) input from other components. Optionally, the power input terminal VCC is connected to a capacitor (such as capacitor C51) to filter the input power signal.

[0058] Please refer to Figures 3 and 4. Figure 3 is a second structural diagram of the power extraction circuit provided in an embodiment of the present application, and Figure 4 is a third structural diagram of the power extraction circuit provided in an embodiment of the present application. In some examples, the second resonant matching circuit 161 cooperates with the antenna 11 to achieve energy acquisition. The second resonant matching circuit 161 can be set as needed. For example, the second resonant matching circuit 161 may include four capacitors, one end of capacitor C35 is connected to one end of the antenna 11, one end of capacitor C36 is connected to the other end of the antenna 11, capacitor C20 and capacitor C21 are connected between the other end of capacitor C35 and the other end of capacitor C36, and the other end of capacitor C35 and the other end of capacitor C36 are connected to the back-end circuit such as an NFC chip.

[0059] The NFC chip U4 can obtain electrical energy through the second resonant matching circuit 161 and the antenna 11. The second resonant matching circuit 161 can improve the efficiency of the energy acquisition of the antenna 11. It can be understood that the closer the frequency matching between the transmitting antenna and the receiving antenna, the higher the efficiency of wireless energy transmission. The second resonant matching circuit 161 can make the antenna 11 more closely match the frequency of the radio frequency signal transmitted by the external device, thereby improving the efficiency of the energy acquisition of the antenna 11.

[0060] In some embodiments, the memory 13 includes a storage capacitor C2, one end of which is connected to the input end of the DC conversion circuit 14, and the other end of the storage capacitor C2 is grounded. The rectifier bridge circuit 12 rectifies the sinusoidal AC signal generated by the antenna 11 and stores the energy of the antenna 11 in the storage capacitor C2 at the back end by boosting the voltage in the form of a charge pump. The temporarily stored energy is stored in the storage capacitor C2, and the energy formula is: E=1 / 2CV^2, where C is the capacitance of the storage capacitor C2 and V is the voltage of the storage capacitor C2.

[0061] Please refer to Figures 3 and 4. Figure 3 is a third schematic diagram of the power extraction circuit provided in an embodiment of the present application, and Figure 4 is a fourth schematic diagram of the power extraction circuit provided in an embodiment of the present application. In some embodiments, the DC conversion circuit 14 includes a DC conversion chip 142 and an LC circuit. The LC circuit includes a first inductor L1 and a first capacitor C1. One end of the first inductor L1 is connected to the output terminal of the DC conversion chip 142, and the other end of the first inductor L1 is connected to the load circuit 15. One end of the first capacitor C1 is connected to the other end of the first inductor L1, and the other end of the first capacitor C1 is grounded. The DC conversion chip 142 and the LC circuit cooperate to stabilize the voltage of the electrical energy stored in the memory 13 and convert it to direct current. For example, when the voltage of the memory 13 is boosted to a preset voltage (e.g., 2V, 3V, or 3.3V), the DC conversion chip 142 and the LC circuit stabilize the voltage of the electrical energy stored in the memory 13 and convert it to direct current, outputting a stable direct current signal. In some examples, the DC conversion chip 142 can adjust the voltage of the electrical signal output by the memory 13, such as by boosting the voltage of the electrical signal output by the memory 13. For example, the DC conversion chip 142 boosts the voltage of the electrical signal output by the memory 13 , such as boosting the voltage of 2V to 3.3V.

[0062] Please refer to Figure 5, which is a schematic diagram of the fourth structure of the power extraction circuit provided in an embodiment of the present application. In some embodiments, antenna 11 includes a first antenna 112 and a second antenna 114. First antenna 112 transmits an energy signal, and second antenna 114 transmits a data signal. The two independent antennas are used to transmit the energy signal and the data signal, respectively. The data signal is less likely to be interfered with by the energy signal, and the energy signal can be transmitted without considering the data signal, facilitating the rapid and high-power transmission of the energy signal.

[0063] In some embodiments, please refer to FIG. 6 , which is a schematic structural diagram of a memory and a DC conversion circuit according to an embodiment of the present application.

[0064] One end of the memory 13 is connected to the output end of the antenna 11, and the other end of the memory 13 is grounded. The memory 13 can store the electrical energy output by the antenna 11. The memory 13 can include one or more energy storage capacitors. The number of energy storage capacitors can be set as needed, and the parameters of the energy storage capacitors, such as capacitance and rated voltage, can also be set as needed.

[0065] An input terminal of the DC conversion circuit 14 is connected to one terminal of the memory 13 , and a voltage outputted by an output terminal of the DC conversion circuit 14 is different from a voltage of the memory 13 .

[0066] In some examples, the rated voltage of the memory 13 can be set higher, such as 5V, 8V, 10V, 12V, 15V, 18V, or even higher transformer circuits. In some examples, the rated voltage of the memory 13 is between 5V-18V, 12V-18V, or 16-18V.

[0067] In some examples, memory 13 may include three capacitors connected in parallel, such as capacitor C22 , capacitor C23 , and capacitor C24 .

[0068] Of course, it can also be understood that the memory 13 may include only three capacitors in parallel, namely capacitor C22, capacitor C23 and capacitor C24, or may include four, five, six, seven, eight or even more capacitors in parallel, and the embodiments of the present application are not limited to this.

[0069] In some examples, the DC conversion circuit 14 includes a transformer chip U3, an input terminal of the transformer chip U3 is connected to one terminal of the memory 13, an output terminal of the transformer chip U3 outputs a voltage signal, and an enable terminal EN of the transformer chip U3 is connected to the main control chip 152. The main control chip 152 can output different signals to the enable terminal EN of the transformer chip U3 as needed, so that the output terminal of the transformer chip U3 outputs a voltage signal or does not output a voltage signal.

[0070] In some examples, the DC conversion circuit 14 also includes a first filter circuit connected between the input terminal of the transformer chip U3 and ground, and the first filter circuit filters the signal input to the transformer chip U3. The first filter circuit may include one or more filter capacitors, one end of each filter circuit is connected to the input terminal of the transformer chip, and the other end of each filter capacitor is grounded. It is understood that the parameters of the filter capacitor can be set as needed. For example, the first filter circuit may include capacitors C18 and C19 connected in parallel.

[0071] In some embodiments, a voltage stabilizing circuit may be provided between the memory 13 and the DC conversion circuit 14 to stabilize the voltage output by the memory 13. In some examples, the voltage stabilizing circuit may include a voltage stabilizing diode. In other examples, the voltage stabilizing circuit may employ other voltage stabilizing circuits, and this embodiment does not limit the voltage stabilizing circuit.

[0072] In some embodiments, please refer to Figure 7, which is a fifth structural diagram of the power extraction circuit provided in an embodiment of the present application. The power extraction circuit 10 also includes a first resonant matching circuit 121, which is connected between the antenna 11 and the rectifier bridge circuit 12. The first resonant matching circuit 121 cooperates with the antenna 11 to achieve energy acquisition. The first resonant matching circuit 121 can be set as needed. For example, the first resonant matching circuit 121 can include 4 capacitors, and the 4 capacitors include capacitor C37, capacitor C38, capacitor C3, and capacitor C4. One end of capacitor C37 is connected to one end of the antenna 11, one end of capacitor C38 is connected to the other end of the antenna 11, capacitor C3 and capacitor C4 are connected between the other end of capacitor C37 and the other end of capacitor C38, and the other end of capacitor C37 and the other end of capacitor C38 are connected to the back-end circuit such as the rectifier bridge circuit 12.

[0073] The first resonant matching circuit 121 can improve the efficiency of energy acquisition by the antenna 11. It is understood that the closer the frequency matching between the transmitting antenna and the receiving antenna, the higher the efficiency of wireless energy transmission. The first resonant matching circuit 121 can make the antenna 11 more closely match the frequency of the RF signal transmitted by the external device, thereby improving the efficiency of energy acquisition by the antenna 11.

[0074] In some embodiments, the power supply circuit 10 further includes a current speed conversion circuit 17, which includes a current limiting resistor R15 and a second switch Q2. The current limiting resistor R15 is connected between the output of the antenna 11 and one end of the memory 13. The input of the second switch Q2 is connected to the output of the antenna 11, the output of the second switch Q2 is connected to one end of the memory 13, and the control end of the second switch Q2 is connected to the main control chip 152.

[0075] When the second switch Q2 is off, the power from the antenna 11 charges the memory 13 via the current-limiting resistor R15, which can be understood as slow charging of the memory 13. When the second switch Q2 is on, the antenna 11 and the memory 13 are directly connected. The power from the antenna 11 does not need to pass through the current-limiting resistor R15 but can directly charge the memory 13. This can be understood as fast charging of the memory 13. That is, there are two different charging methods for the memory 13: slow charging and fast charging. During fast charging, the power input from the antenna 11 to the memory 13 is greater than the power input from the antenna 11 to the memory 13 during slow charging.

[0076] The main control chip 152 is connected to the control end of the second switch tube Q2, that is, the main control chip 152 can control the switching between slow charging and fast charging. In some examples, the antenna 11 obtains the radio frequency signal of an external device such as a mobile phone and converts it into electrical energy. The antenna 11 is connected to the memory 13 through the current limiting resistor R15. The antenna 11 slowly charges the memory 13. At the same time, the NFC chip in the NFC chip circuit 16 can also obtain electrical energy through the antenna 11 and communicate with the outsourced device through the antenna 11, such as establishing a communication connection, authentication, data signal transmission, etc. At this time, the antenna 11 does not fast charge the memory 13. Therefore, during fast charging, the power circuit 10 will divert the power of the antenna 11, and the NFC chip may not be able to obtain enough power to work. Moreover, during fast charging, the power circuit 10 will cause greater interference to the communication. When the NFC chip circuit 16 completes communication with the external device through the antenna 11, such as the transmission of the data signal of the display content that needs to be changed, the main control chip 152 controls the second switch tube Q2 to turn on, so that the power of the antenna 11 does not need to pass through the current limiting resistor R15 but can directly charge the memory 13, that is, enter fast charging, and can charge the memory 13 faster. After the memory 13 is full or charged to a certain level, it can drive the update of the display content, thereby reducing the user's waiting time.

[0077] In some examples, the current speed change circuit 17 may further include a third resistor R36 , where the third resistor R36 is connected between the control terminal of the second switch tube Q2 and the input terminal of the second switch tube Q2 .

[0078] In some examples, the current speed conversion circuit 17 may further include a third switch tube Q3, wherein the input end of the third switch tube Q3 is connected to the control end of the second switch tube Q2, the output end of the third switch tube Q3 is grounded, and the control end of the third switch tube Q3 is connected to the main control chip 152. The main control chip 152 controls the conduction or disconnection of the second switch tube Q2 via the third switch tube Q3. In some examples, the second switch tube Q2 is a field-effect transistor, and the third switch tube Q3 is a triode. In other examples, the second switch tube Q2 and the third switch tube Q3 can be selected as appropriate devices as needed, such as both being field-effect transistors or triodes.

[0079] It can also be understood that, in some examples, the current speed conversion circuit 17 may not be provided with the third switch tube Q3, and the main control chip 152 directly controls the second switch tube Q2, which is not limited in the embodiment of the present application.

[0080] In some embodiments, the current speed-changing circuit 17 has multiple states, and the impedance of the current speed-changing circuit 17 in different states is different, thereby changing the current transmitted to the memory 13. By changing the impedance of the current speed-changing circuit 17 located between the rectifier bridge circuit 12 and the memory 13, the current transmitted to the memory 13 is changed.

[0081] In some examples, the current speed-varying circuit 17 includes multiple branches, each having a different impedance, and one of the multiple branches is selectively connected between the rectifier bridge circuit 12 and the memory 13. Different branches have different impedances, and by selecting different branches to be connected between the rectifier bridge circuit 12 and the memory 13, the current speed-varying circuit 17 can provide different charging currents.

[0082] In some examples, please refer to FIG9 in conjunction with FIG8 . FIG8 is a sixth structural schematic diagram of the power supply circuit provided in an embodiment of the present application, and FIG9 is a first structural schematic diagram of the current speed change circuit in the power supply circuit shown in FIG8 . The current speed change circuit 17 includes a first branch and a second branch. The first branch includes a first resistor R1, and the second branch includes a first switch K1. When the first branch is connected between the rectifier bridge circuit 12 and the memory 13, that is, when the first switch K1 of the second branch is disconnected, the electrical signal output by the rectifier bridge circuit 12 passes through the first resistor R1 and outputs the first current to the memory 13. When the second branch is connected between the rectifier bridge circuit 12 and the memory 13, that is, when the second switch K1 is turned on, the electrical signal output by the rectifier bridge circuit 12 does not pass through the first resistor R1, but instead passes through the branch after the second switch K1 is turned on (at this time, the impedance of the second branch is much smaller than the impedance of the first branch) to output the first current to the memory 13.

[0083] In some examples, the current speed-changing circuit 17 includes multiple branches, each of which includes a resistor and a switch. For example, please refer to Figure 10, which is a second structural schematic diagram of the current speed-changing circuit in the power supply circuit shown in Figure 8. The multiple branches include a first branch and a second branch, the first branch including a first resistor R1 and a first switch K1, and the second branch including a second resistor R2 and a second switch K2. When the first switch K1 is turned on and the second switch K2 is turned off, the electrical signal output by the rectifier bridge circuit 12 outputs the first current to the memory 13 after passing through the first resistor R1. When the first switch K1 is turned off and the second switch K2 is turned on, the electrical signal output by the rectifier bridge circuit 12 outputs the first current to the memory 13 after passing through the second resistor R2. It can be understood that, please refer to Figure 11, which is a third structural schematic diagram of the current speed-changing circuit in the power supply circuit shown in Figure 8. The current speed-changing circuit 17 can also include more branches, such as a third branch, a fourth branch, etc. Alternatively, in some other examples, one branch may have no switch but only one resistor, or one branch may have no resistor but only one switch, or one branch may have no switch but only one resistor, and the other branch may have no resistor but only one switch.

[0084] In other examples, two or more of the multiple branches can be connected between the rectifier bridge circuit 12 and the memory 13. For example, referring to Figure 10 or Figure 11, the current speed change circuit 17 includes multiple branches, each branch including a resistor and a switch, such as a first branch consisting of a first resistor R1 and a first switch K1, and a second branch consisting of a second resistor R2 and a second switch K2. In addition to controlling the first switch K1 to be turned on and the second switch K2 to be turned off, or controlling the first switch K1 to be turned off and the second switch K2 to be turned on, the first switch K1 can also be controlled to be turned on and the second switch K2 to be turned on, so that the electrical signal output by the rectifier bridge circuit 12 is output to the memory 13 after passing through the first resistor R1 and the second resistor R2 connected in parallel.

[0085] In some examples, the current speed-changing circuit 17 may also have other circuit structures. In some examples, please refer to Figure 12, which is a schematic diagram of the fourth structure of the current speed-changing circuit in the power supply circuit shown in Figure 8. The current speed-changing circuit 17 includes a first resistor R1 and a second resistor R2 connected in series, with both ends of the first resistor R1 connected to a first switch K1, and both ends of the second resistor R2 connected to a second switch K2. Controlling the first switch K1 and the second switch K2 can enable the current speed-changing circuit 17 to have four states, and the impedance of the four states are respectively the first resistor R1, the second resistor R2, the first resistor R1 and the second resistor R2 connected in series, and no resistance.

[0086] Specifically, the first state is when the first switch K1 is off and the second switch K2 is on, making the impedance of the current speed change circuit 17 equal to the first resistor R1; the second state is when the first switch K1 is on and the second switch K2 is off, making the impedance of the current speed change circuit 17 equal to the second resistor R2; the third state is when both the first switch K1 and the second switch K2 are off, making the impedance of the current speed change circuit 17 equal to the sum of the first resistor R1 and the second resistor R2 connected in series; and the fourth state is when both the first switch K1 and the second switch K2 are on, making the impedance of the current speed change circuit 17 almost zero. It can also be understood that the current speed change circuit 17 includes four branches, and the components in the four branches can be reused in different branches, thereby changing the impedance of the current speed change circuit 17 between the rectifier bridge circuit 12 and the memory 13, that is, changing the charging current of the memory 13.

[0087] In some other examples, the current speed-changing circuit 17 may include more resistors and switches connected in parallel with the resistors. The multiple resistors are arranged in series, and each switch is connected in parallel with one of the resistors.

[0088] In some examples, the current speed change circuit 17 includes multiple branches, each with a different impedance. The main control chip 152 changes the conduction time of at least one of the multiple branches to change the current transmitted to the memory 13.

[0089] In some examples, at least one branch has a switching circuit, which is connected to the main control chip 152. The main control chip 152 can change the opening and closing time of the switching circuit to change the conduction time of the branch where the switching circuit is located, thereby changing the impedance of the current speed change circuit 17 between the rectifier bridge circuit 12 and the memory 13, thereby changing the charging current for charging the memory 13.

[0090] For example, referring to FIG9 , the current speed-changing circuit 17 includes a first branch and a second branch. The first branch includes a first resistor R1, and the second branch includes a first switch K1. The first switch K1 is connected in parallel with the first resistor R1. The main control chip 152 is connected to the first switch K1 and can control the on or off of the first switch K1. The main control chip 152 can dynamically adjust the on time of the first switch K1 so that the first branch and the second branch combine to form different impedances. Specifically, the main control chip 152 can control the on and off time of the first switch K1 through a PWM signal. When the first switch K1 is off, the electrical signal output by the rectifier bridge circuit 12 passes through the first resistor R1 and is output to the storage circuit; when the first switch K1 is on, the electrical signal output by the rectifier bridge circuit 12 passes through the branch where the first switch K1 is located and is output to the storage branch; the impedance between the rectifier bridge circuit 12 and the storage circuit can be equivalent to the impedance of the first branch and the second branch combined. The duty cycle of the PWM signal is different, and the impedance after integration of the first branch and the second branch is also different, so that the current of the current speed change circuit 17 can be adjusted steplessly according to the PWM signal.

[0091] It is understood that the current speed-changing circuit 17 may also adopt other circuit structures. For example, referring to Figure 13, Figure 13 is a schematic diagram of the fifth structure of the current speed-changing circuit in the power supply circuit shown in Figure 8. The current speed-changing circuit 17 includes a first branch and a second branch. The first branch includes a first resistor R1 and a first switch K1, and the second branch includes a second resistor R2. The main control chip 152 can control the on-off time of the first switch K1 via a PWM signal, thereby combining the first branch and the second branch to produce different impedances. For another example, referring to Figure 6, the current speed-changing circuit 17 includes a first branch and a second branch. The first branch includes a first resistor R1 and a first switch K1, and the second branch includes a second resistor R2 and a second switch K2. The main control chip 152 can control the on-off time of the first switch K1 and the second switch K2 via different PWM signals, thereby combining the first branch and the second branch to produce different impedances. The current speed-changing circuit 17 may also adopt other circuit structures, as long as at least one of the branches has a switch, and the main control chip 152 controls the on-off time of the switch via PWM.

[0092] It should be noted that the switches (such as the first switch and the second switch) in the above embodiments can be configured as needed. For example, the switch can be a single switching transistor, such as a triode or a field-effect transistor, and the switch can be controlled by a microprocessor. Another example is that the switch can consist of a switching transistor A1 and a switching transistor A2, with switching transistor A1 connected to the circuit, the control terminal of switching transistor A1 connected to switching transistor A2, and switching transistor A2 controlled by the microprocessor to control the conduction or disconnection of switching transistor A1. Switching transistor A1 can be a triode or a field-effect transistor, and switching transistor A2 can be a diode, a triode, or a field-effect transistor.

[0093] In some embodiments, the power supply circuit 10 further includes a Bluetooth circuit, which is connected to the memory 13 and the main control chip 152. The main control chip 152 can wirelessly communicate with external devices via the Bluetooth circuit. The main control chip 152 can also wirelessly communicate with external devices via the Bluetooth circuit, such as obtaining control instructions and transmitting data signals. The data transmission rate of the Bluetooth circuit is greater than that of the NFC chip, allowing for faster transmission of larger data signals.

[0094] In some embodiments, the load circuit 15 further includes a drive circuit 154, which is connected to the main control chip 152 and the DC conversion circuit 14. The drive circuit 154 is controlled by the main control chip 152 to start or shut down using the DC signal provided by the DC conversion circuit 14. It is understandable that the energy provided by the NFC chip circuit 16 is small and unstable, and is not suitable for powering the drive circuit 154. Otherwise, it is easy to cause abnormalities in the drive circuit 154. After the DC conversion circuit 14 is able to output a stable DC signal, the DC signal of the DC conversion circuit 14 can be used to drive the drive circuit 154, so that the drive circuit 154 can have sufficient and stable energy to operate. The main control chip 152 can control the start or shut down of the drive circuit 154. For example, when the main control chip 152 knows that the power supply circuit 10 has stored enough energy and outputs a stable DC signal through the DC conversion circuit 14, it can control the DC conversion circuit 14 to supply power to the drive circuit 154. Otherwise, the main control chip 152 controls the DC conversion circuit 14 not to supply power to the drive circuit 154, such as controlling the DC conversion circuit 14 and the drive circuit 154 to be disconnected through a switch tube.

[0095] The driving circuit 154 can be set as needed. For example, the driving circuit 154 can be a circuit for driving a motor to rotate, the driving circuit 154 can also be a circuit for driving an electronic paper or ink screen display, the driving circuit 154 can also be a circuit for driving a sensor to work, or the driving circuit 154 can also be other circuits. This embodiment does not limit the driving circuit 154.

[0096] In some embodiments, the driving circuit 154 may be a driving interface that outputs the energy output by the DC conversion circuit 14 to a corresponding functional device, such as a motor, electronic paper, ink screen, or sensor.

[0097] In some embodiments, the main control chip 152 can communicate wirelessly with an external device via the NFC chip circuit 16 and antenna 11. The main control chip 152, NFC chip circuit 16, and antenna 11 utilize NFC technology to communicate wirelessly with the external device, thereby enabling wireless data communication between the power supply circuit 10 and the external device. It should be noted that the external device can communicate wirelessly with the power supply circuit 10 via NFC, and at the same time, the external device and the power supply circuit 10 can also perform NFC energy transmission.

[0098] In some examples, antenna 11 can receive 13.56 MHz radio frequency energy, and antenna 11 can also perform wireless communication through the 13.56 MHz radio frequency signal.

[0099] In some other examples, the operating frequency range of the antenna 11 is 15M to 20M, that is, the antenna 11 can receive radio frequency energy from 15M to 20M, so that the antenna 11 has the ability to better acquire radio frequency energy and adaptively acquire radio frequency energy within the range of 15M to 20M.

[0100] In some other examples, the operating frequency range of antenna 11 is 5M to 20M, that is, antenna 11 can receive radio frequency energy from 5M to 20M, so that antenna 11 has the ability to better acquire radio frequency energy and adaptively acquire radio frequency energy within the range of 5M to 20M.

[0101] In some other examples, the operating frequency range of antenna 11 is 8M to 15M, that is, antenna 11 can receive radio frequency energy from 8M to 15M, so that antenna 11 has the ability to better acquire radio frequency energy and adaptively acquire radio frequency energy within the range of 8M to 15M.

[0102] In some embodiments, the number of antennas 11 is one, and the antenna 11 can transmit data signals and energy signals in a time-sharing or simultaneous manner. One antenna 11 can realize both the function of data transmission and the function of energy transmission, reducing the space occupied by the antenna 11, which is conducive to the miniaturization of the power supply circuit 10. Through a single antenna 11, QI wireless energy transmission can also be realized on the basis of NFC energy transmission, using a single 13.56M radio frequency to provide a maximum charging power of 1W, and a single antenna 11 realizes both communication and charging functions. While realizing the NFC standard function through a single antenna 11, the QI charging protocol uses a 5M~20M radio frequency to provide a charging function of about 1W.

[0103] Understandably, existing technologies use NFC chips to power the entire circuit, providing limited energy, typically only a few hundred MW. This energy is also consumed by the main control chip and other functional circuits, leaving limited energy available for other functional modules. Furthermore, they cannot provide sustained, stable energy output for extended periods. Typical IoT products require several joules of power output for tens of seconds for data exchange or motion control, which is particularly problematic for high-power electrical devices like motors.

[0104] The power supply circuit 10 of this embodiment draws energy directly from the antenna 11 (e.g., an NFC induction coil). Compared to the energy output of the NFC chip circuit 16, it can obtain higher-power RF energy and higher RF conversion energy, such as approximately 1W. This effectively reduces the number of electronic components by temporarily storing the high-frequency sinusoidal energy in a large storage capacitor C2. Once the energy reaches a threshold voltage, it outputs a stable DC signal (i.e., a DC power supply) through the DC conversion circuit 14. This power supply circuit 10 can meet the needs of functional devices with instantaneous current requirements of hundreds of mA, such as starting a motor.

[0105] Please refer to Figure 14, which is a schematic diagram of the first structure of an electronic device provided in an embodiment of the present application. This embodiment of the present application also provides an electronic device 100, which includes a power supply circuit 10. The power supply circuit 10 can be the power supply circuit in any embodiment, and the specific structure of the power supply circuit 10 is not repeated here.

[0106] Please refer to Figures 15 and 16. Figure 15 is a schematic diagram of the second structure of the electronic device provided in an embodiment of the present application. Figure 16 is a schematic diagram of the third structure of the electronic device provided in an embodiment of the present application. In some examples, the electronic device 100 can be a passive NFC lock, which includes a lock body and a power circuit 10. The power circuit 10 can obtain radio frequency energy from the environment and then convert it into a stable DC signal. When the energy stored in the power circuit 10 is sufficient, the power circuit 10 uses the DC signal to drive a motor to control the lock body to unlock or lock.

[0107] In some examples, the electronic device may be a passive NFC display device, which includes a display and a power supply circuit. The display may be a low-power electronic paper or ink screen. The power supply circuit may obtain radio frequency energy from the environment and then convert it into a stable DC signal. When the energy stored in the power supply circuit is sufficient, the power supply circuit uses the DC signal to control the display to update the display content.

[0108] In some examples, the electronic device may be a passive NFC detection device, which includes a sensor and a power circuit. The sensor may be at least one of a low-power temperature sensor, a humidity sensor, and a photoelectric sensor. The power circuit may obtain radio frequency energy from the environment and then convert it into a stable DC signal. When the energy stored in the power circuit is sufficient, the power circuit uses the DC signal to drive the sensor to control the sensor to collect corresponding signals, such as ambient temperature, ambient humidity, ambient brightness, etc.

[0109] In some examples, the electronic device 100 includes an ink screen 101, which is connected to the memory of the power supply circuit 10. When the ink screen updates the display content, the memory provides power to the ink screen.

[0110] In some examples, the load circuit 15 is connected to the NFC chip circuit 16 , and the load circuit 15 is used to obtain a data signal sent by an external device through the NFC chip circuit 16 , and drive the ink screen 101 to update the display content according to the data signal.

[0111] In some embodiments, the electronic device 100 includes a protective shell 102 , which is used to be mounted on a mobile terminal. The ink screen is installed on the protective shell. The protective shell 102 can serve as a rear shell of the electronic device 100 .

Claims

1. A power supply circuit, the power supply circuit comprising: Antenna, used to receive energy from the environment and convert it into electrical energy; A rectifier bridge circuit, connected to the antenna, for rectifying the electric energy; A memory, connected to the rectifier bridge circuit, for storing rectified electric energy; A DC conversion circuit is connected to the memory, and when the voltage of the memory reaches a preset voltage, the DC conversion circuit starts and processes the electric energy stored in the memory to output a stable DC signal; A load circuit connected to the DC conversion circuit, wherein the load circuit is powered by the DC signal provided by the DC conversion circuit; The NFC chip circuit is connected to the antenna and processes the electric energy and outputs it to power the load circuit before the DC conversion circuit is started.

2. The power taking circuit according to claim 1, wherein: The load circuit comprises: The main control chip first receives the electric energy transmitted by the NFC chip circuit to start, and then receives the DC signal from the DC conversion circuit to supply power.

3. The power taking circuit according to claim 2, wherein: The DC conversion circuit comprises: DC conversion chip; The LC circuit includes a first inductor and a first capacitor, wherein one end of the first inductor is connected to the output end of the DC conversion chip, the other end of the first inductor is connected to the load circuit, one end of the first capacitor is connected to the other end of the first inductor, and the other end of the first capacitor is grounded.

4. The power taking circuit according to claim 3, wherein: The DC conversion circuit further includes: A transformer chip, wherein an input end of the transformer chip is connected to one end of the memory, an output end of the transformer chip outputs a voltage signal, and an enable end of the transformer chip is connected to the main control chip; The first filter circuit is connected between the input end of the voltage conversion chip and the ground.

5. The power taking circuit according to claim 2, wherein: The power taking circuit also includes: The current speed-changing circuit is arranged between the rectifier bridge circuit and the memory, and the current speed-changing circuit can change the current transmitted to the memory.

6. The power taking circuit according to claim 5, wherein: The current speed-changing circuit has a plurality of states, and the impedance of the current speed-changing circuit in different states is different so as to change the current transmitted to the memory.

7. The power taking circuit according to claim 5, wherein: The current speed-changing circuit includes a plurality of branches, each of which has a different impedance, and one of the plurality of branches is selectively connected between the rectifier bridge circuit and the memory.

8. The power taking circuit according to claim 5, wherein: The current speed-changing circuit includes a plurality of branches, and impedances of different branches are different; The main control chip changes the conduction time of at least one of the multiple branches to change the current transmitted to the memory.

9. The power taking circuit according to claim 5, wherein: The current speed-changing circuit includes a plurality of branches, at least one of which has a switch circuit, and the switch circuit is connected to the main control chip. The main control chip can change the opening and closing time of the switch circuit to change the conduction time of the branch where the switch circuit is located.

10. The power taking circuit according to claim 5, wherein: The current and speed changing circuit comprises: A current limiting resistor connected between the output end of the antenna and one end of the memory; A second switch tube, wherein the input end of the second switch tube is connected to the output end of the antenna, the output end of the second switch tube is connected to one end of the memory, and the control end of the second switch tube is connected to the main control chip.

11. The power taking circuit according to claim 5, wherein: The current speed-changing circuit further includes: A third switch tube, wherein the input end of the third switch tube is connected to the control end of the second switch tube, the output end of the third switch tube is grounded, and the control end of the third switch tube is connected to the main control chip.

12. The power taking circuit according to claim 5, wherein: The current and speed changing circuit also includes: The Bluetooth circuit is connected to the DC conversion circuit and the main control chip, and the main control chip can communicate wirelessly with an external device through the Bluetooth circuit.

13. The power taking circuit according to claim 2, wherein: The load circuit further includes: The driving circuit is connected to the main control chip and the DC conversion circuit. The driving circuit is started or shut down by the main control chip using a direct current signal provided by the DC conversion circuit.

14. The power taking circuit according to claim 2, wherein: The main control chip performs wireless communication with an external device through the NFC chip circuit and the antenna.

15. The power extraction circuit according to claim 1, wherein: The working frequency range of the antenna is 5M to 20M.

16. The power extraction circuit according to claim 1, wherein: The antenna transmits the data signal and the energy signal in time division or simultaneously.

17. The power extraction circuit according to claim 1, wherein: The antenna includes a first antenna and a second antenna, the first antenna transmits an energy signal, and the second antenna transmits a data signal.

18. The power extraction circuit according to claim 1, wherein: The memory includes a storage capacitor, one end of which is connected to the input end of the DC conversion circuit, and the other end of which is grounded.

19. An electronic device, wherein: The electronic device comprises: the power supply circuit described in any one of claims 1-18.

20. The electronic device according to claim 19, wherein: The electronic device comprises: The ink screen is connected to the memory of the power taking circuit, and when the ink screen updates the display content, the memory supplies power to the ink screen.

21. The electronic device according to claim 20, wherein: The load circuit is connected to the NFC chip circuit, and the load circuit is used to obtain a data signal sent by an external device through the NFC chip circuit, and drive the ink screen to update display content according to the data signal.

22. The electronic device according to claim 21, wherein: The electronic device comprises: a protective shell, the protective shell is used for sleeve-connecting a mobile terminal, and the ink screen is installed on the protective shell.

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