Qubit initialisation method and device

Abstract

A method for qubit initialisation comprising the steps of: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state. Determining the qubit state as the target state includes performing one or more Pauli-spin blockade (PSB) checks, and at least one two-qubit state conversion operation, on the pair of spin qubits.

Description

"Qubit method and device" Cross Reference

[0001] The present application claims priority from Australian Provisional Patent Application No 2023902138 filed on 3 July 2023, the contents of which are incorporated herein by reference in their entirety. The contents of the document Huang [1] are incorporated herein by reference in their entirety. Technical Field

[0002] This disclosure relates to qubit initialisation in a quantum computing device that is realisable in current quantum technology, such as for example a metal-oxide- semiconductor compatible quantum processor. Background

[0003] Quantum computation is an emerging technology developed to outperform current classical transistor-based computation and enable certain tasks in science, engineering, finance, and defence. Having abundant properties and capabilities, quantum bits (qubits) are also more susceptible to noise and difficult to realise compared to classical bits.

[0004] Recently, spin qubits in semiconductor have been identified as a relatively suitable implementation with balanced advantages in gate fidelity, interconnectivity, and industrial compatibility. The main challenge drawing most efforts so far is the provision of a low-noise environment, which used to rely on extreme cryogenic cooling to several tens of milli-kelvin and operation at high magnetic fields.

[0005] Recent works in strongly confined quantum dots have shown workable qubit control and readout above 1 kelvin at low magnetic field. These relaxed conditions herald a substantial reduction in cryogenic and electronic hardware cost, and moreover enable the integration of a quantum processor in a single cryogenic setup. Qubitinitialisation is concerned with preparing a state of one or more qubits, such as spin states, to a target value (i.e., a predetermined desired state). The ability to perform high fidelity qubit initialisation is strongly influenced by the thermal and field conditions. Despite the improvements in qubit control and readout methods, qubit initialisation remains an open challenge.

[0006] Any discussion of documents, acts, materials, devices, articles or the like which has been included in the present specification is solely for the purpose of providing a context for the present disclosure. It is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present disclosure as it existed before the priority date of each claim of this application.

[0007] Throughout this specification the word "comprise", or variations such as "comprises" or "comprising", will be understood to imply the inclusion of a stated element, integer or step, or group of elements, integers or steps, but not the exclusion of any other element, integer or step, or group of elements, integers or steps. Summary

[0008] There is provided a method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein determining the qubit state as the target state includes performing one or more Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation on the pair of spin qubits.

[0009] In some embodiments, the two-qubit state is reset by performing step (i) in response to one of the one or more PSB checks determining that the two-qubit state is unblockaded.

[0010] In some embodiments, each of PSB checks comprises performing a readout operation on the spin qubits of the pair within a PSB lifetime to maintain the two-qubit state in response to the two-qubit state being a blockaded state.

[0011] In some embodiments, the qubit state associated with the pair of spin qubits is a single-qubit state of one of the spin qubits of the pair.

[0012] In some embodiments, the qubit state associated with the pair of spin qubits is the two-qubit state and the target state is a blockaded state.

[0013] In some embodiments, each two-qubit state conversion operation includes a two-qubit gate configured to convert the two-qubit state to an unblockaded state, in response to the two-qubit state being a blockaded state and a different state to the target state.

[0014] In some embodiments, each of the PSB checks is a parity PSB check performed over two-qubit basis states of |↓↓^, |↓↑^, |↑↓^, and |↑↑^.

[0015] In some embodiments, the target state is an even spin parity state, being one of the |↑↑^ and |↓↓^ states, and wherein the two-qubit gate converts the other of the even states |↑↑^ and |↓↓^ into an odd parity state, being one of the |↑↓^ and |↓↑^ states.

[0016] In some embodiments, the target state is |↓↓^ and the two-qubit gate is a zero- control-not gate (zCNOT) configured to convert |↑↑^ into |↑↓^.

[0017] In some embodiments, the two-qubit state is determined to be: an even parity state, being one of |↓↓^ and |↑↑^, if a first PSB check indicates a blockade; or an odd parity state, being one of |↓↑^ and |↑↓^, if the first PSB check indicates the absence of a blockade.

[0018] In some embodiments, the two- state is determined to be: even parity state |↓↓^ if a second PSB check indicates a blockade; or odd parity state |↑↓^ if the second PSB check indicates the absence of a blockade.

[0019] In some embodiments, each of the PSB checks is a singlet-triplet (ST) PSB check performed over two-qubit basis states of |↓↓^, |S^, |T0^, and |↑↑^, where states |S^ and |T0^ are the singlet and triplet states respectively.

[0020] In some embodiments, determining the two-qubit state as the target state includes performing: a first PSB check, one or more single-qubit rotations on the spin qubits to convert |T0^ into |S^, a second PSB check, a two-qubit gate, and a third PSB check, on the pair of spin qubits.

[0021] In some embodiments, the target state is |↓↓^ and the two-qubit gate is a zero- control-not gate (zCNOT) configured to convert |↑↑^ into |S^.

[0022] In some embodiments, the two-qubit state is determined to be one of |↓↓^, |↑↑^, and |T0^, if the first PSB check indicates a blockade, or state |S^ if the first PSB check indicates the absence of a blockade.

[0023] In some embodiments, the two-qubit state is determined to be one of |↓↓^, and |↑↑^, if the second PSB check indicates a blockade, or state |S^ if the second PSB check indicates the absence of a blockade.

[0024] In some embodiments, the two-qubit state is determined to be the target state if the third PSB check indicates a blockade, or state |S^ if the third PSB check indicates the absence of a blockade.

[0025] In some embodiments, the two-qubit state is set at step (i) by pulsing the two spin qubits from a (m+2, n) or (m, n+2) charge state to a (m+1, n+1) charge state, where m and n are arbitrary even numbers.

[0026] In some embodiments, the spin are formed from an electron or hole spin of a silicon quantum dot.

[0027] There is also provided a quantum processing device, comprising: a plurality of spin qubits; and a control arrangement comprising one or more gate electrodes arranged to control the spin state for the plurality of spin qubits, wherein the control arrangement is configured to initialise a pair of spin qubits of the plurality to a target state by: (i) setting the two-qubit state of the pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein determining the qubit state as the target state involves the control arrangement conducting one or more Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation, on the pair of spin qubits.

[0028] In some embodiments, the one or more gate electrodes are arranged to set a single-qubit state of each qubit of the pair of spin qubits, and to construct single-qubit logic gates for the pair of spin qubits.

[0029] In some embodiments, the one or more gate electrodes are arranged to form the pair of spin qubits by creating an exchange coupling between the two spins of the respective spin qubits.

[0030] In some embodiments, the quantum processing device further comprises a plurality of quantum dots in which the plurality of spin qubits are formed.

[0031] In some embodiments, the one or more gate electrodes are arranged to have a voltage applied to electrically isolate and confine one or more electrons or holes in a silicon layer of the quantum processing device to form the corresponding quantum dots.

[0032] In some embodiments, the control arrangement is configured to perform any of the qubit initialisation methods disclosed herein.

[0033] There is also provided a method verifying a two-qubit state of a pair of spin qubits against a blockaded target state, the method comprising the steps of: (i) performing a first Pauli-spin blockade (PSB) check; (ii) in response to determining, from the first PSB check, that the two-qubit state is blockaded, performing at least one two-qubit state conversion operation on the pair of qubits; (iii) performing at least one additional PSB check; and (iv) in response to performing the at least one additional PSB check, verifying the two-qubit state as the target state by determining that the two- qubit state is still blockaded.

[0034] In some embodiments, the target state is |↓↓^ and the two-qubit gate is a zero- control-not gate (zCNOT) two-qubit gate.

[0035] In some embodiments, verifying the two-qubit state as the target state includes performing in sequence: the first PSB check, a first two-qubit state conversion operation as one or more single-qubit rotations performed on the spin qubits to convert |T0^ into |S^, a second PSB check, a second two-qubit state conversion operation as the two-qubit gate, and a third PSB check, on the pair of spin qubits.

[0036] There is also provided a method for qubit initialisation , comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein the qubit state is the two-qubit state of the pair of spin qubits and the target state is a blockaded state, and wherein determining the qubit state as the target state includes performing at least a first Pauli-spin blockade (PSB) check, a two-qubit state conversion operation, and a second PSB check, in sequence on the pair of spin qubits.

[0037] There is also provided a method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeatingsteps (i) to (ii) until the qubit state is as the target state, wherein the qubit state is a single-qubit state of one of the spin qubits of the pair of spin qubits, and determining the qubit state as the target state includes performing a PSB check, and a two-qubit state conversion operation, in sequence on the pair of spin qubits.

[0038] There is also provided a method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein determining the qubit state as the target state includes: in response to the qubit state being the two-qubit state of the pair of spin qubits and the target state being a blockaded state, performing at least a first Pauli-spin blockade (PSB) check, a two- qubit state conversion operation, and a second PSB check, in sequence on the pair of spin qubits; and in response to the qubit state being a single-qubit state of one of the spin qubits of the pair of spin qubits, performing at least a PSB check, and a two-qubit state conversion operation, in sequence on the pair of spin qubits. Brief Description of Drawings

[0039] Some embodiments of the disclosure will now be described with reference to the accompanying drawings, in which:

[0040] Fig.1a is a flow diagram of a method for performing deterministic initialisation of a qubit state of a pair of qubits in accordance with some embodiments;

[0041] Fig.1b is a flow diagram of setting and verification steps of performing deterministic initialisation of a two-qubit state of the method of Fig.1a;

[0042] Fig.1c is a flow diagram of a method for verifying a two-qubit state of a pair of spin qubits against a target state in accordance with some embodiments;

[0043] Fig.1d is a schematic diagram exemplary steps of a two-qubit initialisation method for a parity PSB check implementation of Fig.1b;

[0044] Fig.1e is a schematic diagram of exemplary steps of a two-qubit initialisation method for a singlet-triplet (ST) PSB check implementation of Fig.1b;

[0045] Fig.1f is a flow diagram of setting and verification steps of performing deterministic initialisation of a single-qubit state of the method of Fig.1a;

[0046] Fig.1g is a schematic diagram of exemplary steps of a single-qubit initialisation method for an implementation of Fig.1f;

[0047] Fig.2a is a top view of a quantum processing device configured to perform the deterministic qubit initialisation and verification methods of Figs.1a-1g;

[0048] Fig.2b is a cross-sectional view of the quantum processing device of Fig.2a;

[0049] Fig.3 is a schematic energy level diagram of an anti-crossing between a double-quantum-dot charge state with paired spins and a charge state with unpaired spins, in accordance with some embodiments;

[0050] Fig.4 is a visualisation of a tune-up procedure beginning with charge state measurement for the quantum processing device of Fig.2a;

[0051] Fig.5a is a visualisation of a Pauli spin blockade (PSB) region in a gate voltage plot of the quantum processing device of Fig.2a;

[0052] Fig.5b is a visualisation of a Pauli spin blockade (PSB) region in a gate voltage plot with constant background signal of the quantum processing device of Fig. 2a;

[0053] Fig.6 is a graph of a qubit probability over time as a gate duration is calibrated from the respective resonantly driven Rabi oscillations, in accordance with some embodiments;

[0054] Fig.7 is a graph of a qubit blockade probability over time measured over a sequence exchange, in accordance with some embodiments;

[0055] Fig.8 is a graph of electron spin resonance (ESR) transitions at each stage of the deterministic initialisation method of Fig.1d, in accordance with some embodiments;

[0056] Fig.9a is a graph of the average number of iterations for the initialisation method of Fig.1d having only steps corresponding to a first stage of initialisation, in accordance with some embodiments; and

[0057] Fig.9b is a graph of the average number of iterations for the initialisation method of Fig.1d having steps corresponding to both the first stage of initialisation and a second stage of initialisation, in accordance with some embodiments. Description of Embodiments

[0058] Conventional approaches to qubit initialisation rely on spin polarisation, and in some cases on single-qubit rotations combined with spin polarisation (see Philips [2]). The effectiveness of these methods strongly depends on the spin physics, and thus the initialisation fidelity is significant. This is particularly the case for initialising a two- qubit state, as resulting from the coupling of a pair of individual qubits each with a corresponding single-qubit state.

[0059] In operation above 1 kelvin and low magnetic fields, the thermal energy will eventually surpass the qubit energies, comprising the Zeeman energies and the exchange coupling energy, in the context of a two-qubit system. Spin depolarisation begins to dominate due to thermalisation, and a pure two-qubit state therefore cannot beobtained by adiabatically or diabatically two spins into two quantum dots (i.e., to set the spin state of each quantum dot). Instead, the initialised two-qubit state tends to be a mixed occurrence of the single-qubit spin up and spin down states with arbitrary probability. It is therefore desired to devise techniques that ameliorate these drawbacks, or one or more other drawbacks of the prior art, or that at least provide a useful alternative. Overview

[0060] Disclosed herein are devices and methods for deterministically initialising a qubit state associated with a pair of spin qubits, where the qubit state is the two-qubit state of the spin qubit pair, or a single-qubit state of one of the spin qubits, by: i) setting a two-qubit state of the pair of qubits to any one of the possible two-qubit states without certainty; ii) verifying the qubit state against a target state (i.e., a predetermined state that is desired for the initialisation); and iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state. Determination of the qubit state as the target state is achieved by performing one or more Pauli-spin blockade (PSB) checks, and at least one two-qubit state conversion operation, on the pair of spin qubits.

[0061] In one aspect, the qubit state associated with the pair of spin qubits is the two- qubit state, and the devices and methods disclosed herein are configured for deterministically initialising the two-qubit state by: i) setting a two-qubit state of the pair of spin qubits to any state (e.g., to any one of the two-qubit states without certainty); ii) verifying the two-qubit state against a target state (i.e., a predetermined state that is desired for the initialisation); and iii) in response to determining, at step (ii), that the two-qubit state is not the target state, repeating steps (i) to (ii) until the two- qubit state is determined as the target state. Determination of the two-qubit state as the target state includes performing a plurality of Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation on the pair of spin qubits.

[0062] The target state may be selected as a PSB blockaded state of the two-qubit basis state set (e.g., as the two-qubit spin down or spin up states respectively). In step(i), the two-qubit state is set to any state, can include any mixed or pure state of the two-qubit basis states with an arbitrary probability of occurrence, as achieved for example by loading spins onto corresponding charge carriers. The re-setting of the two- qubit state to any state (by performing a repetition of step (i)) is conditional on the outcome of any of the PSB checks (at step (ii)). Each PSB check determines if the two- qubit state (as currently set) is an unblockaded state of the two-qubit basis state set, and if so then the two-qubit state is reset to any state. A “blockaded” or “unblockaded” two- qubit state is a state having individual qubit spins that prevent or permit energetic tunnelling of the individual qubits respectively.

[0063] The repetition of steps (i) to (iii) is continued until it is determined, at step (iii), that the two-qubit state is set to the target state. Following initialisation of the selected target state, any arbitrary two-qubit state can be deterministically achieved by applying single- or two-qubit gate(s) as needed on the selected target state. This advantageously enables the initialisation of a desired target two-qubit state, for a spin qubit based quantum computation device, without reliance on spin polarisation, and which is therefore functional at elevated temperatures.

[0064] In some embodiments, each PSB check involves performing a readout operation on the pair of spin qubits. The readout operation includes performing a measurement of the two-qubit spin state by utilising the property that tunnelling of an underlying qubit charge carrier (e.g., an electron or hole of a quantum dot encoding a single qubit spin) occurs conditionally in the presence of a dissimilarity of the spins of the coupled qubits.

[0065] The PSB checks may be performed according to different PSB mechanisms including, for example, parity PSB readout and singlet-triplet (ST) PSB readout. Furthermore, in the blockaded case, the two-qubit state is not disrupted by the readout operation provided that the readout time is within the PSB lifetime. Readout operations thereby enable the detection of an unblockaded two-qubit state to be followed by a resetting of the state since it is desirable to preserve only the blockaded target state in each iteration.

[0066] At least one two-qubit state operation is performed to convert the current state with respect to remaining non-target states in a given iteration. In some embodiments, each two-qubit state conversion operation is performed in response to a respective PSB check. For example, a two-qubit state conversion operation may be performed following a first PSB check, and itself may be followed by a second PSB check. In this example, the two-qubit state conversion operation converts the current two-qubit state, which is known to be a blockaded state from the result of a previously performed PSB check, to an unblockaded state. Conversion does not change the two- qubit state to which the conversion operation is applied when this two-qubit state is the target state. A two-qubit state conversion operation may include a two-qubit gate, a single-qubit gate, and / or a set of single-qubit rotations, depending on the PSB check mechanism and the corresponding two-qubit basis state set.

[0067] In one embodiment, the PSB checks are parity checks used to determine the parity of the two-qubit state at a point in the initialisation procedure. Operation occurs over the two-qubit basis set of {|↓↓^ , |↓↑^ , |↑↓^ , |↑↑^}, where ↓ and ↑ denote spin- down and spin-up of the individual qubits, and the two-qubit state is one of the spin down-down (|↓↓^), spin down-up (|↓↑^), spin up-down (|↑↓^), and spin up-up (|↑↑^) states.

[0068] The parity of the two-qubit state provides an indication of whether the two individual qubit spins have the same orientation (i.e., an even parity state |↓↓^, |↑↑^) or opposing spin orientations (i.e., an odd parity state |↓↑^, |↑↓^). For example, a parity PSB readout operation may be configured to indicate that the two-qubit state is an even parity state, being one of (|↓↓^, |↑↑^), if a PSB blockade is detected (e.g., from a zero or ‘flat’ readout signal). Conversely, a parity PSB readout operation may be configured to indicate that the two-qubit state is an odd parity state, being one of (|↓↑^, |↑↓^), if the operation indicates the absence of a PSB blockade (e.g., from a readout signal having a non-zero magnitude).

[0069] The two-qubit conversion operation(s) are selected and configured according to the PSB mechanism and the desired target state. In some embodiments using parityPSB checks, a two-qubit gate is applied the parity of the two-qubit state when the state has the same parity as the target state, but is a different state to the target state. The two-qubit gate leaves the state unchanged if the state is equal to the target state.

[0070] For example, the target state may be chosen as an even parity two-qubit state (e.g., one of the |↑↑^ and |↓↓^ states), and the two-qubit gate converts the other of the even states (e.g., |↑↑^ or |↓↓^^ into an odd parity state, being one of the |↑↓^ and |↓↑^ states. In one implementation, the target state is the spin down state (|↓↓^) and the two- qubit gate is a zero-control-not gate (zCNOT) configured to convert |↑↑^ into |↑↓^. It will be appreciated that a zCNOT gate is sometimes referred to in the literature as a not-control-not-gate (NCNOT).

[0071] In another implementation, the target state is the spin up state (|↑↑^) and the two-qubit gate is a control-not gate (CNOT) configured to convert |↓↓^ into |↓↑^. Any arbitrary unblockaded state |↑↓^ and |↓↑^ can be prepared from the deterministically initialised blockaded state (e.g., when starting from initialised state |↓↓^, by applying a control signal to the first or second qubit).

[0072] The two-qubit state initialisation methods proposed herein are advantageous in that for a two-qubit state initialised to the mixed state, being one of the basis states (e.g., |↓↓^, |↓↑^, |↑↓^ and |↑↑^^ without certainty, the existence (i.e., positive verification) of the target state can be achieved with two parity PSB checks and a two- qubit conversion operation. Otherwise, a negative verification may proceed with a single parity PSB check, thereby enabling an iterative process that restarts (i.e., with a re-setting of the two-qubit state to any state) conditionally based on the result of the parity PSB checks.

[0073] In an alternative embodiment, each of the PSB checks is a singlet-triplet (ST) PSB check performed over two-qubit basis states of |↓↓^, |S^, |T0^, and |↑↑^, where states |S^ and |T0^ are the singlet and triplet states respectively defined as |S^ = (|↓↑^ - |↑↓^) / √2, and |T0^ = (|↓↑^ + |↑↓^) / √2. During a ST PSB readout check, one of theindividual qubits tunnels to pair with the qubit, if the spins of the two qubits are in the singlet state |S^ which is an unblockaded state. The two-qubit state is blockaded if the two spins are in the triplet state |T0^, or in either of the even states |↓↓^ and |↑↑^.

[0074] Relative to the use of parity PSB checking, initialising the two-qubit state with singlet-triplet states involves an additional two-qubit state conversion operation where a set of single-qubit rotations are applied to convert state |T0^ into state |S^. An additional PSB check is performed (i.e., resulting in three total checks) to detect the converted state as a condition for re-setting the two-qubit state to any state. Accordingly, determining the two-qubit state as the target state includes performing: a first PSB check, one or more single-qubit rotations on the spin qubits to convert |T0^ into |S^, a second PSB check, a two-qubit gate, and a third PSB check, on the pair of spin qubits. Each of the PSB checks may be performed as ST readout checks.

[0075] In one example, the target state is selected as the blockaded state |↓↓^ and the two-qubit gate is a zero-control-not gate (zCNOT) configured to convert state |↑↑^ into state |S^. The first PSB check is a ST readout that indicates a blockade if the two-qubit state is one of |↓↓^, |↑↑^, and |T0^. The second ST readout check indicates a blockade if the two-qubit state is determined to be one of |↓↓^ and |↑↑^. The third ST readout check indicates a blockade if the two-qubit state is determined to be the target state of |↓↓^. Each of the first, second and third checks indicate the absence of a blockade (i.e., an unblockaded two-qubit state) if the two-qubit state is state |S^. The respective two-qubit state conversion operations (i.e., the two-qubit gate and the single-qubit rotation set) may be performed in arbitrary order to eliminate the |↑↑^ and |T0^ states, provided that the operations are performed intermediately with respect to the first and final (third) PSB checks.

[0076] In another aspect, the qubit state associated with the pair of spin qubits is the single-qubit state of one of the qubits of the pair, and the devices and methods disclosed herein are configured for deterministically initialising the single-qubit state by: i) setting a two-qubit state of the pair of qubits to any state (being any one of the possible two-qubit states without certainty); ii) verifying the single-qubit state against atarget state (i.e., a predetermined state is desired for the initialisation); and iii) in response to determining, at step (ii), that the single-qubit state is not the target state, repeating steps (i) to (ii) until the single-qubit state is determined as the target state. Determination of the single-qubit state as the target state is achieved by performing one Pauli-spin blockade (PSB) check and one two-qubit state conversion operation on the pair of spin qubits.

[0077] For example, a parity PSB check may be performed to determine that the spin qubits are blockaded, and therefore in either the even spin up (|↓↓^^ or even spin down (|↑↑^^ two-qubit state, prior to the application of a two-qubit state conversion operation. Subsequently performing a two-qubit state conversion operation to selectively convert the state of a particular individual qubit of the pair to the desired target state, therefore achieves the deterministic initialisation of the individual spin qubit. The two-qubit state conversion operation may include a two-qubit gate operation or a single-qubit gate depending on the PSB check mechanism and the corresponding set of two-qubit basis states. This advantageously provides a means for the deterministic initialisation of a single-qubit state of a spin qubit of the pair of qubits.

[0078] In some embodiments the techniques described herein are performed for the purpose of verifying a two-qubit state, or a single-qubit state, against the corresponding target state (i.e., as a single pass through step (ii) without resetting the two-qubit state to any state). For example, in response to the initialisation of the two-qubit state by an alternative initialisation method, the verification method is performed to provide positive or negative verification of the initialised two-qubit (or single-qubit) state against a desired target state. In embodiments directed to verification of the two-qubit state, a first Pauli-spin blockade (PSB) check, at least one two-qubit state conversion operation, and at least one additional PSB check is performed on the pair of spin qubits, in accordance with the techniques described for embodiments performing deterministic initialisation of the two-qubit state. Positive verification of the two-qubit state as equal to the target state is provided as a result of determining that the two-qubit state is still blockaded after performing the above sequence.

[0079] Deterministic two-qubit or initialisation may be performed by a quantum processing device configured to perform quantum computations with a plurality of spin qubits. For example, the processing device may deterministically prepare a two-qubit state of even parity, i.e., |↓↓^ or |↑↑^, by repeatedly verifying the parity and re-initialising the state until a blockaded readout is obtained across both the first and second parity PSB checks. The processing device performs a two-qubit gate operation according to the desired pure (i.e., blockaded) target state. For example, to initialise the |↓↓^ target state the processing device selects, from a two-qubit gate library, a zero-control-not (zCNOT) gate to convert |↑↑^ into |↑↓^, while leaving |↓↓^ unchanged. Conversion of the unwanted pure state |↑↑^ into state |↑↓^ is then detected as an unblockaded state to trigger the re-initialisation to any two-qubit state.

[0080] Experimental evaluation of a processing device demonstrates that the deterministic initialisation of a pair of qubits in accordance with the proposed techniques exhibits robustness to the variabilities in qubit properties, and to physical conditions such as temperature and magnetic field. For example, deterministic two- qubit state initialisation may proceed even during the operation of the quantum processing device at cryogenic temperatures of less than or equal to 4 kelvin. Method for two-qubit initialisation

[0081] Fig.1a illustrates a method 100 for performing deterministic initialisation of a qubit state of a pair of spin qubits. The method involves the repeated application of two-qubit state conversion and PSB check operations to process a two-qubit state that is initially set to any state. The two-qubit state conversion and PSB checks are repeated until the predetermined target state is reached. In the described examples, the method 100 performs deterministic initialisation of the two-qubit state where the target state is the spin down state |↓↓^. However, it will be appreciated that the same processes may be applied toinitialise alternative states, including the spin up state |↑↑^.

[0082] Optionally, the method includes configuration (at step 101). In some embodiments, configuration includes specifying one or more parameters or rules for: selecting the qubit pair for which the two-qubit state is to be initialised; determining the target state; and configuring the operations used to perform the checks (e.g., PSB mechanism and readout operations). In some embodiments, configuration involves selection of an appropriate two-qubit gate, single-qubit gate, and / or single- qubit rotations to perform state conversion. A two-qubit gate may be selected from a function library based on the configured target state (e.g., the zero-control-not gate (zCNOT) when the target state is |↓↓^).

[0083] At step 102 the two-qubit state is set to any state. The method 100 subsequently verifies the two-qubit state against the target state at step 104. The method 100 repeats steps 102 and 104 until positive verification of the target state is achieved.

[0084] Fig.1b illustrates the setting 102 and verification 104 steps of method 100 for performing deterministic initialisation of a two-qubit state. In a first embodiment, the PSB checks are parity PSB checks where initialisation is performed over two-qubit basis states of |↓↓^, |↓↑^, |↑↓^, and |↑↑^. Determining the two-qubit state as the target state includes performing: a first PSB check, a two-qubit conversion operation, and a second PSB check, on the pair of spin qubits. Each of the first and second PSB checks are parity checks (e.g., as determined by a readout signal).

[0085] Setting of the two-qubit state comprises preparing single spin states for each of the qubits of the qubit pair (at step 112). A two-qubit state is formed and the two-qubit state is set to any state non-deterministically (at step 113) by a mechanism such as charge pulsing the single spin states. Exchange coupling is performed between the two spins of the single qubits to form the two-qubit state as one of the four possible states |↓↓^, |↓↑^, |↑↓^ and |↑↑^ with arbitrary probabilities.

[0086] Steps 114, 116, and 118 verify the two-qubit state to determine whether or not it is equivalent to the target state, and include a first PSB check 114, a conversionoperation 116 and a second PSB check In some cases, the target state, and therefore the parity of the target state, are predetermined (e.g., by configuration in step 101). In response to the two-qubit state having a parity other than the parity of the target state at either PSB check 114, 118, the two-qubit state is reset to any state non- deterministically at step 113.

[0087] A first two-qubit state conversion operation 116 is applied to the pair of spin qubits given that, as a result of first PSB check 114, the two-qubit state is a state that has the same parity as the target state (the “target parity”), being an even state (i.e., one of |↓↓^ and |↑↑^) or an odd state (i.e., one of |↓↑^ and |↑↓^). Given the condition on the two-qubit state as being purely odd or even, the first conversion operation 116 is a two- qubit gate configured to convert the two-qubit state to a state with opposite parity, only if the two-qubit state is not equal to the target state. Then, at step 118 the second PSB check forces a reset of the two-qubit state if the check indicates that the parity is not the same as the target parity (i.e., if the state experienced conversion by the two-qubit gate 116, and was therefore not equal to the target state).

[0088] In a second embodiment, each of the PSB checks is a singlet-triplet (ST) PSB check performed over two-qubit basis states of |↓↓^, |S^, |T0^, and |↑↑^, where states |S^ and |T0^ are the singlet and triplet states respectively. Relative to the first embodiment, there is an additional (third) PSB check 122 and a second two-qubit state conversion operation 120 performed between the second PSB check 118 and the third PSB check 122. The first conversion operation 116 is a set of single-qubit rotations configured to convert |T0^ into |S^. The second conversion operation 120 is a two-qubit gate configured to convert the non-target state of states |↓↓^ or |↑↑^ into |S^, and to leave the target state unchanged.

[0089] Fig.1c illustrates a method 130 for verifying a two-qubit state of a pair of spin qubits against a target state. Solid lines in Fig.1c show the steps for performing verification using a parity PSB readout implementation. Dashed lines in Fig.1c show the additional steps for performing verification using a ST PSB readout implementation. The verification method 130 may be performed to verify a two-qubitstate initialised from an alternative process, for example to determine that the two-qubit state has been correctly initialised to a selected blockaded target state (positive verification), or that the two-qubit state was not set to the target state (negative verification).

[0090] At step 132, a first PSB check of the two-qubit state is performed. The result of the first PSB check is processed at step 133 (e.g., by processing a signal of the readout operation). In response to determining, from the processing of the first PSB check at step 133, that the two-qubit state is blockaded, at step 134 a two-qubit conversion operation is performed on the qubits. As discussed above, for a parity PSB readout check the conversion operation 134 is a two-qubit gate is configured to convert a non-target state having the target parity to a state with a different parity. For a ST PSB readout, the first conversion operation is a set of single-qubit rotations. At step 136, following performing the first conversion operation 134, a second PSB check of the two-qubit state is performed. The result of the second PSB check is processed at step 137.

[0091] For parity PSB readout checking, in response to determining, from processing the result of the second PSB check at step 137, that the two-qubit state is still blockaded, the two-qubit state is verified as the target state (i.e., at step 138). For ST PSB readout checking, a second state conversion operation 140 is performed if the two- qubit state remains blockaded in response to the second PSB check. The second conversion operation 140 is a two-qubit gate to convert the non-target state into the singlet state, and to leave the target state unchanged. At step 142, following the second conversion operation 134, a third PSB check of the two-qubit state is performed.

[0092] The result of the third PSB check is processed at step 143. In response to determining, from processing the result of the third PSB check at step 137, that the two- qubit state is still blockaded, the two-qubit state is verified as the target state (i.e., at step 138). In response to any of the PSB checks 133, 137, 143 indicating that the two- qubit state is unblockaded, the two-qubit state is verified not equal to the target state (i.e., at step 139).

[0093] Fig.1d schematically illustrates steps of a two-qubit initialisation method 150 for a parity PSB check implementation of Fig.1b (i.e., where readout measurements are conducted to determine the qubit state parity based on the Pauli-spin blockade). The target state for deterministic initialisation is configured as even spin down state |↓↓^ and the two-qubit gate is the zCNOT gate.

[0094] Initialisation commences at step 151. At step 152 the two-qubit state is initialised to any state by pulsing from (m+2, n) or (m, n+2) charge state to (m+1, n+1) charge state, where m and n are arbitrary even numbers. Step 153 shows the electron potentials of individual qubits Q1 and Q2 for the set of |↓↓^, |↓↑^, |↑↓^ and |↑↑^ spin states when the thermal energy is much larger than the exchange coupling and the Zeeman energy difference.

[0095] At steps 154 and 155 the first readout is performed. The readout signal is processed to determine the two-qubit state as blockaded or unblockaded, where the presence of a charge indicates the occurrence of tunnelling and therefore an unblockaded two-qubit state. At step 154, the two-qubit state is unblockaded and thus determined as odd parity (|↓↑^, |↑↓^), and the two-qubit state is reset (at step 152). Alternatively, at step 155 the two-qubit state is blockaded and thus determined as even parity (|↓↓^, |↑↑^), and the initialisation proceeds to the next stage.

[0096] Step 156 shows the electron potentials of individual qubits Q1 and Q2 for the even states |↓↓^ and |↑↑^ remaining after step 155. At step 157, a zCNOT gate is performed to convert |↑↑^ into |↑↓^ and leaving target state |↓↓^ unchanged.

[0097] At steps 158 and 159 the second readout is performed. At step 158, the two- qubit state is unblockaded and thus determined as |↑↓^, and the two-qubit state is reset (at step 152). Alternatively, at step 159 the two-qubit state is blockaded and thus determined as target state |↓↓^, At step 160, the initialisation is completed . A high purity |↓↓^ state may therefore be achieved with one or more repetitions of the aforementioned steps, provided that the zCNOT gate and PSB readout operations are faster than the spin depolarisation time.

[0098] Fig.1e schematically illustrates steps of a two-qubit initialisation method 180 for a ST PSB check implementation of Fig.1b (i.e., where readout measurements are conducted to determine singlet-triplet states based on the Pauli-spin blockade). The target state for deterministic initialisation is configured as even spin down state |↓↓^ and the two-qubit conversion gate is the zCNOT gate.

[0099] Initialisation commences at step 181. At step 182 the spins are prepared. The two-qubit state is non-deterministically initialised to any state by pulsing from (m+2, n) or (m, n+2) charge state to (m+1, n+1) charge state, where m and n are arbitrary even numbers. This results in the two-qubit state being set to one of the possible two-qubit basis states without certainty, where the basis states consist of the |↓↓^, |S^, |T0^ and |↑↑^ states as shown at step 183.

[0100] At steps 184 and 185 the first ST readout check is performed. At step 184, the state is unblockaded and thus determined as singlet, i.e., |S^, and the two-qubit state is reset (at step 182). Alternatively, at step 185 the state is blockaded and thus determined as one of |↓↓^, |↑↑^ or |T0^, and the initialisation proceeds to the next stage.

[0101] At step 186 the two-qubit state is in one of candidate states of |↓↓^, |↑↑^ or|T0^. At step 187, single-qubit rotations are performed to convert |T0^ into |S^. Therotations may be implemented as, for example, a X(π) operation on Q1 and a Y(π) operation on Q2, or a Y(π) operation on Q1 and a X(π) operation on Q2. As a result of the rotations, state |↓↓^ becomes |↑↑^, and |↑↑^ becomes |↓↓^.

[0102] At steps 188 and 189 the second ST readout check is performed. At step 188, the state is unblockaded and thus determined as |S^, and the two-qubit state is reset (at step 182). Alternatively, at step 189 the state is blockaded and thus determined as state |↓↓^ or |↑↑^, and the initialisation proceeds to the next stage.

[0103] At step 190 the two-qubit state is in one of candidate states of |↓↓^ or |↑↑^. At step 191, a zCNOT gate is performed, with Q1 being the control qubit and Q2 being the target qubit, to convert |↑↑^ into |S^, and leave |↓↓^ unchanged.

[0104] At steps 192 and 193 the third readout check is performed. At step 192, the state is unblockaded and thus determined as |S^, and the two-qubit state is reset (at step 182). Alternatively, at step 193 the state is blockaded and thus determined as target state |↓↓^, at step 194. The initialisation is completed at step 195. A |↓↓^ state can be initialised deterministically, provided that the one-qubit gates, two-qubit gates and the readout are much faster than the spin depolarisation rate or the PSB decay rate, and provided there is visibility of the one- and two-qubit gates and the readout.

[0105] In response to deterministically realising the target state, the methods 150, 180 may be configured to create any other state. That is, other two-qubit states can be prepared starting from either of the |↓↓^ or |↑↑^ blockaded target states by the application of single- or two-qubit gates (i.e., as additional steps following step 160) to one or both of the qubits Q1, Q2. For example, starting from the |↑↑^ state, application of an X( ^^ / 2) gate on Q1 will yield |↓↑^ and application of an X( ^^ / 2) gate on Q2 will yield |↑↓^. The |↑↑^ two-qubit state can also be prepared from the deterministically initialised |↓↓^ state with the application of an X( ^^ / 2) gate on both qubits. Likewise, any superposition state or entangled state can be prepared by applying other forms of one- and / or two-qubit gates to any of the |↓↓^ , |↑↑^, |↓↑^, or |↑↓^ states initialised as described herein. Method for single qubit initialisation

[0106] In another aspect, the method 100 is configured to perform deterministic initialisation of a single-qubit state of a selected one of the qubits of the pair of spin qubits. In some examples, the target state is the spin down state |↓^. However, it will be appreciated that the same processes may be applied to deterministically initialise the spin up state |↑^.

[0107] With reference to Fig.1a, at step 102 the two-qubit state is set to any state. At step 104, the single-qubit state of the selected qubit is subsequently verified against the target state. The method 100 repeats the setting and verifying steps 102 and 104 until positive verification of the target state is achieved.

[0108] Fig.1f illustrates the setting verification 104 steps of method 100 for performing deterministic initialisation of a single-qubit state. Initialisation is performed over two-qubit basis states of |↓↓^, |↓↑^, |↑↓^, and |↑↑^. Determining the single-qubit state as the target state includes performing: a PSB check and a two-qubit conversion operation on the pair of spin qubits, where the PSB check is a parity check (e.g., as determined by a readout signal).

[0109] The method 100 sets the two-qubit state by preparing single spin states for each of the qubits of the qubit pair (at step 112), and forming a two-qubit state that is set to any state (at step 113), as performed for two-qubit state initialisation. The two- qubit state is set, at steps 112 and 113, non-deterministically.

[0110] At steps 114 and 116, the method 100 verifies the single-qubit state to determine whether or not it is equivalent to the target state. Verification is performed by a sequence of operations including a PSB check 114, and a conversion operation 116. The target state, and therefore the parity of the target state, are predetermined (e.g., by configuration step 101). In response to the single-qubit state having a parity other than the parity of the target state at the PSB check 114, the two-qubit state is reset to any state via step 113.

[0111] A two-qubit state conversion operation 116 is applied to the pair of spin qubits with the knowledge that, as a result of the PSB check 114, the two-qubit state is an even state (i.e., one of |↓↓^ and |↑↑^). The conversion operation 116 is a two-qubit gate, single-qubit gate, or transformation operation configured to convert the single-qubit state of the selected qubit to the opposite state, only if the single-qubit state is not equal to the corresponding single-qubit target state (e.g., |↑^ converted to target state |↓^, resulting in |↑↑^ converted to |↑↓^ when the selected qubit is the second qubit of the pair). Consequently, at the completion of the two-qubit state conversion operation 116, the single-qubit state of the selected qubit is equal to the target state across the two- qubit states of the pair (i.e., one of |↓↓^ and |↑↓^).

[0112] Fig.1g schematically illustrates steps of a single-qubit initialisation method 170 for an implementation of Fig.1f. Readout measurements are conducted to determine parity of the two-qubit state based on the Pauli-spin blockade. The single- qubit target state for deterministic initialisation of a selected individual qubit is configured as spin down state |↓^, and the qubit state conversion operation is a two- qubit zCNOT gate operating on both qubits of the pair. In the example described, the selected qubit is the second qubit (Q2) of the qubit pair (Q1, Q2).

[0113] Initialisation commences at step 171. At step 172 the two-qubit state is initialised to any state by pulsing from (m+2, n) or (m, n+2) charge state to (m+1, n+1) charge state, where m and n are arbitrary even numbers. Step 173 shows the electron potentials of individual qubits Q1 and Q2 for the set of |↓↓^, |↓↑^, |↑↓^ and |↑↑^ spin states when the thermal energy is much larger than the exchange coupling and the Zeeman energy difference.

[0114] At steps 174 and 175 the first readout is performed. The readout signal is processed to determine the two-qubit state as blockaded or unblockaded, where the presence of a charge indicates the occurrence of tunnelling and therefore an unblockaded two-qubit state. At step 174, the two-qubit state is unblockaded and thus determined as odd parity (|↓↑^, |↑↓^), and the two-qubit state is reset (at step 172). Alternatively, at step 175 the two-qubit state is blockaded and thus determined as even parity (|↓↓^, |↑↑^), and the initialisation proceeds to the next stage.

[0115] Step 176 shows the electron potentials of individual qubits Q1 and Q2 for the even states |↓↓^ and |↑↑^ remaining after step 175. At step 177, a zCNOT gate is performed to convert |↑↑^ into |↑↓^ and leaving state |↓↓^ unchanged. In doing so, the zCNOT gate converts the state of the second qubit Q2 into the target state from the alternative state (i.e., single-qubit state |↑^ is converted to |↓^ for Q2). Therefore, the effect of the parity PSB check and the zCNOT conversion gate is to ensure that the single-qubit state of the selected qubit (Q2) is the target state (i.e., |↓^) irrespective of the two-qubit state of the pair of qubits (Q1, Q2). The single-qubit initialisation procedure terminates at step 179.Quantum processing device

[0116] Figs.2a and 2b illustrate top and cross-sectional views respectively of at least part of a quantum processing device 200 configured to perform the deterministic two- qubit initialisation 100, 150, 170, 180 and verification 130 methods. In an exemplary configuration, the quantum processing device 200, comprises a plurality of spin qubits and a control arrangement comprising one or more gate electrodes 212, 216 arranged to control the spin state for the plurality of spin qubits. The control arrangement is configured to deterministically initialise, and / or verify, a two-qubit state of a pair of spin qubits 220, 222 (Q1, Q2), or to deterministically initialise any single-qubit state of one qubit 220 (Q1) or 222 (Q2) of the pair of spin qubits 220, 222, to a target state by performing the steps of the methods 100, 130, 150, 180, 170 of Figs.1a-1g.

[0117] The quantum processing device 200 is configured to select the spin qubit pair 220, 222 for initialisation, and subsequent quantum computations, arbitrarily from the plurality of spin qubits. In some embodiments, the one or more gate electrodes 212, 216 are arranged to set a single-qubit state of each qubit 220, 222, and to construct single- qubit logic gates for at least the pair 220, 222 of the plurality of spin qubits. In one exemplary configuration, the quantum processing device 200 is operated in a cryogenic system at a temperature less than or equal to 4 kelvin. The operating temperature of the quantum processing device 200 is preferably between 1 and 4 kelvin, and more preferably between 2 and 4 kelvin, and even more preferably between 3 and 4 kelvin. The plurality of qubits are formed by unpaired spins located underneath the gate electrodes which may be lithographically defined. An integrated magnet in the cryogenic system generates a constant magnetic field to create the Zeeman energy, which defines the spin up and spin down states for single-qubits. These physical spin up and spin down states project to the 0 and 1 states for quantum computation.

[0118] The control arrangement controls single-qubit states of the device 200 with an AC electric or magnetic field to construct single-qubit logic gates. In some embodiments, the one or more gate electrodes 212, 216 are arranged to control the pair of spin qubits 220, 222 by creating an exchange coupling between the two spins of therespective qubits. For example, coupled on the collective state of two neighbouring qubits is realised by switching on the exchange coupling between the two spins. Combined with single-qubit gates, this may be used for constructing two-qubit logic gates. The single- and two-qubit logic gates are executed in multiple qubits to form a universal logic capability of the quantum processing device 200.

[0119] In some embodiments, the quantum processing device 200 comprises a plurality of quantum dots in which the spin qubits 220, 222 are formed. The logical state of a qubit is encoded onto the natural spin of an electron (or hole) that is delocalised within the conduction band of a semiconductor material (e.g., silicon). In one configuration, the electrons or holes are injected into the material by the implantation of individual dopant atoms (for example phosphorus). In some embodiments, the quantum processing device 200 is a metal-oxide-semiconductor device in which one or more gate electrodes are arranged to have a voltage applied to electrically isolate and confine the one or more electrons or holes in the semiconductor material to form the corresponding quantum dots (also referred to as “artificial” quantum dots).

[0120] Previous studies have demonstrated the benefits of a quantum device in which spin qubits are formed from artificial quantum dots in a semiconductor material (see Huang [3], and Yang [4]). Important figures of merit such as qubit coherence times, control, and measurement fidelity have been shown to outperform other types of quantum computing systems. Single-qubit operation above 1 kelvin have shown a relatively small reduction of qubit coherence times and control fidelity, but a greater degradation in the qubit initialisation and measurement fidelity.

[0121] With reference to Figs.2b, the exemplary quantum processing device 200 comprises a silicon substrate 202 and a layer of silicon oxide 204, above which the gate electrodes 210, 212, 214, 216 are fabricated with multi-layer gate stack technology. The silicon substrate 202 may be a layer of isotopically purified silicon, or natural silicon, or a combination thereof. The gate electrodes 210, 212, 214, 216 are made from aluminium and insulated from one another with thermally grown aluminium oxide. Anon-chip antenna is configured to signals for single-qubit control. In this example, the on-chip antenna produces microwave control signals to control electron spins of the quantum processing device 200. In some other examples, the on-chip antenna produces radio frequency (RF) control signals to control nuclear spins of the quantum processing device 200. During control, the two qubits are located under the two plunger gates 212 and 216. The exchange gate 214 modulates the amount of wavefunction overlap between the two spins to provide on-demand two-qubit exchange, which forms the basis of two-qubit control. A nearby radio-frequency single- electron transistor 220 serves as the charge sensor for measuring the qubit states through spin-to-charge conversion.

[0122] Conventional quantum processing devices may be configured to perform spin qubit initialisation and readout based on energy-dependent tunnelling processes, for example by either electron / hole reservoir (Elzerman) readout, or readout based on PSB occurring between two quantum dots (see Lai [5]). However, only PSB readout is feasible at temperatures above 1 kelvin and low magnetic fields, since it does not rely on the qubit energies being greater than the thermal energy. Furthermore, the inter-dot process is less coupled to the environmental thermal noise compared to that between a quantum dot and the reservoir.

[0123] With reference to Figs.2a and 2b, qubit readout is performed pairwise by a readout operation. During readout, one of the spins is physically brought towards the other via voltage pulsing on the one or more gate electrodes 212, 216. The spin is energetically allowed to tunnel to pair with the other spin, if the two spins are of different states, i.e., |↓↑^ or |↑↓^. The spin is energetically forbidden to tunnel and stays blockaded if the two spins are of the same states, i.e., |↓↓^ or |↑↑^. In a single shot, this provides a measurement of the parity of the two-220, 222. Furthermore, in the blockaded case, the two-qubit state is not disrupted by the measurement provided that the readout time is within the PSB lifetime.

[0124] Fig.3 illustrates a schematic energy level diagram 300 of an anti-crossing 302 between a double-quantum-dot charge state with paired spins, denoted as (m, n+2), anda charge state with unpaired spins, as (m+1, n+1), where m and n are even numbers. Segments 304a, 304b illustrate the energies for the |↓↓^ state, segments 306a, 306b illustrate the energies for the |↓↑^ state, segments 308a, 308b illustrate energies for the |↑↓^ state, and segments 310a, 310b illustrate energies for the |↑↑^ state. Segments 312a, 312b, 312c, and 312d represent the | ^^^,^ାଶ^ state. At milli-kelvin temperatures, moving from the charge state (m, n+2) to (m+1, n+1) at different rates results in different proportions of the four two-qubit states, |↓↓^, |↓↑^, |↑↓^, and |↑↑^ or their superposition states, depending on the spin basis of the system. This movement is realised by ramping the voltage on the 212gates.

[0125] In conventional techniques, by optimising ramp rates, electrostatic confinement, and magnetic field conditions, high-fidelity |↓↓^ or |↓↑^ initialisation may be realised in some instances of a two-qubit system. For example, at milli-kelvin temperatures, this configuration permits deterministic initialisation of the two-qubit state to at least even state |↓↓^ by tuning to a relaxation hotspot created by the energy level crossing with an state, and waiting for the spins to fully relax into thelowest-energy spin-down state. The wait time typically varies between 100 micro- second and 100 milli-second, depending on the spin physics at the hotspot. Once one of the four states is prepared, the other states can be initialised by flipping the qubits via single-qubit control.

[0126] However, when the two-qubit system is operated above 1 kelvin and low magnetic fields, such that the thermal energy is greater than the qubit energies, both the spin relaxation and the spin excitation process occur. As the spins tend to depolarise into random states, the conventional initialisation methods become ineffective at attaining a high initialisation fidelity. Experimental evaluation

[0127] The quantum processing device 200 is evaluated for the deterministic two- state initialisation method 150 (i.e., full parity PSB readout), using a cryogenicmeasurement setup for the operation of or more spin qubits, and targeting the |↓↓^ state. The spin carriers are electrons.

[0128] The quantum processing device 200 is operated at less than or equal to 4 kelvin, and an arbitrary constant magnetic field, typically below 1 tesla. DC voltages are applied on the gate electrodes to control the quantum dots of qubits 220, 222. Dynamic voltage pulses, typically between 1 ns and 1 ms, are also applied on the gate electrodes to perform the pulsing during initialisation, control, and readout. Microwave signals are applied to generate single-qubit control at the relevant magnetic fields.

[0129] Initialisation of the two-qubit state is performed via a field programmable gate array (FPGA) with real-time logic capabilities. The decision on whether the initialisation is complete or to be restarted, based on the readout outcome, is executed during the experiment runtime in the FPGA.

[0130] Single-qubit X / 2 and Y / 2 gates are implemented by resonantly driving the relevant qubit for π / 2 duration, about the x and y axes respectively. Single-qubit Z / 2 gates are implemented by shifting the phase by π / 2 in the microwave timing, equivalent to a π / 2 rotation on the qubit frame. CZ, the control-Z gate, is a native two-qubit gate resulting from pulsing exchange for π / 2 duration and correcting any Stark shifts. The zCNOT gate used in the initialisation has the form X / 2-NCZ-X / 2 or X / 2-CZ-NX / 2, where NCZ and NX / 2 are the negative CZ and X / 2 gates. It can also be constructed from other forms of exchange gates, such as the decoupled-CZ (DCZ) gate.

[0131] The charge sensor for qubit readout takes the form of a single-electron transistor (SET). A RF-SET is preferred for its faster and lower-noise readout, especially above 1 kelvin, where the noise levels and spin depolarisation rates are greater than those at milli-kelvin temperatures. A typical readout integration time lies between 50 micro-seconds and 200 micro-seconds. Other readout methods, such as the gate dispersive readout, are possible.

[0132] Fig.4 illustrates a visualisation of a tune-up procedure beginning with charge state measurement for the quantum processing device 200 using a RF-SET as the charge sensor. The qubits are formed by the unpaired spins in the (m+1, n+1) charge state, where m and n are even numbers. The qubit control point is situated in the centre of the (m+1, n+1) state (triangle in visualisation 400). The readout point is at the inter-dot charge transition between (m+1, n+1) and (m, n+2) (star in visualisation 400). Readout between (m+1, n+1) and (m+2, n) is also possible.

[0133] Fig.5a illustrates a visualisation 500 of a PSB region in a gate voltage plot of the quantum processing device 200. Locating the PSB region may involve, for example, preparing a mixed state, which has some probability of |↓↓^ or |↑↑^, or triplet states at ultra-low magnetic fields, to indicate the PSB region at the anti-crossing.

[0134] Alternatively, it is possible to first prepare a state with a greater probability of having odd parity or being a singlet, and subsequently one with a greater probability of having even parity or being a triplet. The blockade probability, ^^^^^^^^ௗ^, is averaged from all single shots for the two initialisation types. Finally, the ^^^^^^^^ௗ^for the first initialisation is subtracted from that for the second initialisation. Fig.5b illustrates a visualisation 550 of the resulting PSB region with a constant background signal.

[0135] In Figs.5a and 5b, an additional latch readout region can also be seen in the bottom-left of the PSB region. The latch readout involves tunneling to the reservoir, but is not used in the initialisation method of the described embodiments.

[0136] The readout point may be set in the centre of the PSB region. The first stage of the initialisation, as shown in steps 152 to 155 of Fig.1d, is then employed to initialise to the even parity states of |↓↓^ or |↑↑^ with high fidelity. Spin resonances, which drive the transition between |↓↓^, and |↓↑^, and between |↓↓^, and |↑↓^, are now measured with high visibility through PSB. Fig.6 illustrates a graph 600 of qubit blockade probability, ^^^^^^^^ௗ^, over time measured as the X / 2 gate duration is calibrated from the respective resonantly driven Rabi oscillations. The NX / 2 gate is implemented withthe same gate duration and an opposite A non-zero difference in the |↓↓^ and |↑↑^ probabilities allows for exchange oscillations to be seen.

[0137] Fig.7 illustrates a graph 700 of qubit blockade probability, ^^^^^^^^ௗ^, over time as measured over the sequence X / 2-exchange on-NX / 2. The zCNOT gate is calibrated from the projected exchange oscillations for |↓↓^ and |↑↑^ initialisation, and this enables the second stage of the initialisation (i.e., starting at step 156 of Fig.1d).

[0138] Fig.8 illustrates a graph 800 of the electron spin resonance (ESR) transitions at each stage of the deterministic initialisation process, measured at 1 kelvin and 85 milli-tesla. The thermal energy is 86.14 micro-electron-volt at 1 kelvin, and the Zeeman energy is 9.84 micro-electron-volt at 85 milli-tesla. That is, the operation takes place in a condition where the Zeeman energy is only 11.4 % of the thermal energy.

[0139] The experiment involves the application of the initialisation to different stages, followed by a microwave pulse of roughly π duration with the exchange on, before the qubits are read out. When the exchange is on, a total of four spin resonances are possible, corresponding to the four single-qubit transitions between the four two-qubit states, |↓↓^, |↓↑^, |↑↓^, and |↑↑^, as labelled in the graph 800. Each experiment is performed with 100 single shots. The resulting binary outcomes of blockaded or unblockaded readout are averaged over the 100 shots to provide the ^^^^^^^^ௗ^.

[0140] The initialised states are indicated by the subset of the four resonances observed, together with the background ^^^^^^^^ௗ^. Due to the complications in the control and readout visibilities, only the qualitative effects of the initialisation are seen.

[0141] With respect to Fig.8, the top curve 802 corresponds to the conventional ramped initialisation, and the ESR resonances are barely visible with ^^^^^^^^ௗ^near 0.5. This indicates an almost equal proportion of the |↓↓^, |↓↑^, |↑↓^, and |↑↑^ states in the mixed state, as shown at step 153 in Fig.1d.curve 804, which has a high background ^^^^^^^^ௗ^, indicates that the states are mostly even parity. The observation of four resonances with similar heights suggests the existence of both ofthe even parity states, |↓↓^ and |↑↑^, proportions. This corresponds to step 156 in Fig.1d, an outcome of the first stage of the initialisation. In the bottom curve 806, only the two resonances pertaining to |↓↓^ are seen. This corresponds to step 159 in Fig.1d, which leads to the desired outcome of the initialisation (i.e., where |↓↓^ is initialised).

[0142] When only the first stage is involved (i.e., steps 152 to 155 of Fig.1d), the time cost for each iteration of the initialisation (i.e., the execution of all steps between re-setting to any state non-deterministically at step 152 and verifying the state with one or more subsequent steps) is equal to the ramp time for preparing the unpaired spins, plus the readout integration time. In this experiment, both are set to 50 micro-seconds, totalling 100 micro-seconds. When the second stage is involved (i.e., steps 156 to 159 of Fig.1d), the time cost also includes the zCNOT gate time, which is 1.27 micro- seconds in this experiment. The real-time logics in the FPGA consume 0.2 micro- seconds per conditional statement on the PSB check.

[0143] Figs.9a and 9b illustrate graphs 900, 950 of the average number of iterations, ^^^௧^^^௧^^^, for the initialisation having only the first stage and having both stages, respectively. In the experiment involving only the first stage, the average time cost is thus 50 × 2.01 = 100.5 micro-seconds. In the experiment involving both stages, the average number of iterations ^^^௧^^^௧^^^increases from 2.01 to 2.98. Assuming the output of the first stage is always |↓↓^, such that the algorithm always proceeds to the second stage, then the average time cost is (50 + 1.27 + 50) × 2.98 = 301.8 micro- seconds. Assuming the output of the first stage is always |↑↑^ until the last iteration, then the average time cost is 50 × 1.98 + (50 + 1.27 + 50) × 1 = 200.3 micro-seconds. Hence, the completion of the initialisation process takes between 200.3 and 301.8 micro-seconds on average in this experiment.

[0144] It will be appreciated that the time costs depend heavily on the ramp time for preparing the unpaired spins, and the readout integration time. Changing these two durations not only directly changes the per iteration time, but also affects the averagenumber of iterations ^^^௧^^^௧^^^, as the of |↓↓^, |↓↑^, |↑↓^, and |↑↑^ of the mixed state shown at step 153 of Fig.1d are likely to change.

[0145] It will be appreciated by persons skilled in the art that numerous variations and / or modifications may be made to the above-described embodiments, without departing from the broad general scope of the present disclosure. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive. References [1] Huang, J.Y., Su, R.Y., Lim, W.H. et al. High-fidelity spin qubit operation and algorithmic initialization above 1 K. Nature 627, 772–777 (2024). https: / / doi.org / 10.1038 / s41586-024-07160-2et al. Universal control of a six- qubit quantum processor in silicon. Nature 609, 919–924 (2022). https: / / doi.org / 10.1038 / s41586-022-05117-x [3] Huang, W., Yang, C.H., Chan, K.W. et al. Fidelity benchmarks for two-qubit gates in silicon. Nature 569, 532–536 (2019). https: / / doi.org / 10.1038 / s41586- 019-1197-0 [4] Yang, C.H., Leon, R.C.C., Hwang, J.C.C. et al. Operation of a silicon quantum processor unit cell above one kelvin. Nature 580, 350–354 (2020). https: / / doi.org / 10.1038 / s41586-020-2171-6Tunable Silicon Double Quantum Dot, Scientific Reports, volume 1, Article number: 110 (2011), https: / / www.nature.com / articles / srep00110

Claims

CLAIMS:

1. A method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein determining the qubit state as the target state includes performing one or more Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation, on the pair of spin qubits.

2. The method of claim 1, wherein the two-qubit state is reset by performing step (i) in response to one of the one or more PSB checks determining that the two-qubit state is unblockaded.

3. The method of claim 2, wherein each of the PSB checks comprises performing a readout operation on the spin qubits of the pair within a PSB lifetime to maintain the two-qubit state in response to the two-qubit state being a blockaded state.

4. The method of any of claims 1 to 3, wherein the qubit state associated with the pair of spin qubits is a single-qubit state of one of the spin qubits of the pair.

5. The method of any of claims 1 to 3, wherein the qubit state associated with the pair of spin qubits is the two-qubit state and the target state is a blockaded state.

6. The method of claim 5, wherein each two-qubit state conversion operation includes a two-qubit gate configured to convert the two-qubit state to an unblockaded state, in response to the two-qubit state being a blockaded state and a different state to the target state.

7. The method of claim 6, of the PSB checks is a parity PSB check performed over two-qubit basis states of |↓↓^, |↓↑^, |↑↓^, and |↑↑^.

8. The method of claim 7, wherein the target state is an even spin parity state, being one of the |↑↑^ and |↓↓^ states, and wherein the two-qubit gate converts the other of the even states |↑↑^ and |↓↓^ into an odd parity state, being one of the |↑↓^ and |↓↑^ states.

9. The method of claim 8, wherein the target state is |↓↓^ and the two-qubit gate is a zero-control-not gate (zCNOT) configured to convert |↑↑^ into |↑↓^.

10. The method of claim 9, wherein the two-qubit state is determined to be: an even parity state, being one of |↓↓^ and |↑↑^, if a first PSB check indicates a blockade; or an odd parity state, being one of |↓↑^ and |↑↓^, if the first PSB check indicates the absence of a blockade.

11. The method of claim 10, wherein the two-qubit state is determined to be: even parity state |↓↓^ if a second PSB check indicates a blockade; or odd parity state |↑↓^ if the second PSB check indicates the absence of a blockade.

12. The method of claim 6, wherein each of the PSB checks is a singlet-triplet (ST) PSB check performed over two-qubit basis states of |↓↓^, |S^, |T0^, and |↑↑^, where states |S^ and |T0^ are the singlet and triplet states respectively.

13. The method of claim 12, wherein determining the two-qubit state as the target state includes performing: a first PSB check, one or more single-qubit rotations on the spin qubits to convert |T0^ into |S^, a second PSB check, a two-qubit gate, and a third PSB check, on the pair of spin qubits.

14. The method of claim 13, wherein the target state is |↓↓^ and the two-qubit gate is a zero-control-not gate (zCNOT) configured to convert |↑↑^ into |S^.

15. The method of claim 14, wherein the two-qubit state is determined to be one of |↓↓^, |↑↑^, and |T0^, if the first PSB check indicates a blockade, or state |S^ if the first PSB check indicates the absence of a blockade.

16. The method of claim 15, wherein the two-qubit state is determined to be one of |↓↓^, and |↑↑^, if the second PSB check indicates a blockade, or state |S^ if the second PSB check indicates the absence of a blockade.

17. The method of claim 16, wherein the two-qubit state is determined to be the target state if the third PSB check indicates a blockade, or state |S^ if the third PSB check indicates the absence of a blockade.

18. The method of any of claims 1 to 17, wherein the two-qubit state is set at step (i) by pulsing the two spin qubits from a (m+2, n) or (m, n+2) charge state to a (m+1, n+1) charge state, where m and n are arbitrary even numbers.

19. The method of any of claims 1 to 18, wherein the spin qubits are formed from an electron or hole spin of a silicon quantum dot.

20. A quantum processing device, comprising: a plurality of spin qubits; and a control arrangement comprising one or more gate electrodes arranged to control the spin state for the plurality of spin qubits, wherein the control arrangement is configured to initialise a pair of spin qubits of the plurality to a target state by: (i) setting the two-qubit state of the pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state,wherein determining the qubit as the target state involves the control arrangement conducting one or more Pauli-spin blockade (PSB) checks and at least one two-qubit state conversion operation, on the pair of spin qubits.

21. The quantum processing device of claim 20, wherein the one or more gate electrodes are arranged to set a single-qubit state of each qubit of the pair of spin qubits, and to construct single-qubit logic gates for the pair of spin qubits.

22. The quantum processing device of claim 21, wherein the one or more gate electrodes are arranged to form the pair of spin qubits by creating an exchange coupling between the two spins of the respective spin qubits.

23. The quantum processing device of claim 22, further comprising a plurality of quantum dots in which the plurality of spin qubits are formed.

24. The quantum processing device of claim 23, wherein the one or more gate electrodes are arranged to have a voltage applied to electrically isolate and confine one or more electrons or holes in a silicon layer of the quantum processing device to form the corresponding quantum dots.

25. The quantum processing device of any of claims 20 to 24, wherein the control arrangement is configured to perform the qubit initialisation method of any of claims 1 to 19.

26. A method for verifying a two-qubit state of a pair of spin qubits against a blockaded target state, the method comprising the steps of: (i) performing a first Pauli-spin blockade (PSB) check; (ii) in response to determining, from the first PSB check, that the two-qubit state is blockaded, performing at least one two-qubit state conversion operation on the pair of qubits; (iii) performing at least one additional PSB check; and(iv) in response to performing at least one additional PSB check, verifying the two-qubit state as the target state by determining that the two-qubit state is still blockaded.

27. The method of claim 26, wherein each of the PSB checks comprises performing a readout operation on the spin qubits of the pair within a PSB lifetime to maintain the two-qubit state in response to the two-qubit state being a blockaded state.

28. The method of claim 27, wherein the at least one two-qubit state conversion operation includes a two-qubit gate configured to convert the two-qubit state to an unblockaded state, in response to the two-qubit state being a blockaded state and a different state to the target state.

29. The method of claim 28, wherein the target state is |↓↓^ and the two-qubit gate is a zero-control-not gate (zCNOT) two-qubit gate.

30. The method of any of claims 28 to 29, wherein each of the PSB checks is a parity PSB check performed over two-qubit basis states of |↓↓^, |↓↑^, |↑↓^, and |↑↑^.

31. The method of any of claims 28 to 29, wherein each of the PSB checks is a singlet-triplet (ST) PSB check performed over two-qubit basis states including a singlet state and a triplet state.

32. The method of claim 31, wherein verifying the two-qubit state as the target state includes performing in sequence: the first PSB check, a first two-qubit state conversion operation as one or more single-qubit rotations performed on the spin qubits to convert |T0^ into |S^, a second PSB check, a second two-qubit state conversion operation as the two-qubit gate, and a third PSB check, on the pair of spin qubits.

33. A method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state;(ii) verifying a qubit state with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein the qubit state is the two-qubit state of the pair of spin qubits and the target state is a blockaded state, and wherein determining the qubit state as the target state includes performing at least a first Pauli-spin blockade (PSB) check, a two-qubit state conversion operation, and a second PSB check, in sequence on the pair of spin qubits.

34. A method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein the qubit state is a single-qubit state of one of the spin qubits of the pair of spin qubits, and determining the qubit state as the target state includes performing a PSB check, and a two-qubit state conversion operation, in sequence on the pair of spin qubits.

35. A method for qubit initialisation, comprising: (i) setting a two-qubit state of a pair of spin qubits to any state; (ii) verifying a qubit state associated with the pair of spin qubits against a corresponding target state; and (iii) in response to determining, at step (ii), that the qubit state is not the target state, repeating steps (i) to (ii) until the qubit state is determined as the target state, wherein determining the qubit state as the target state includes: in response to the qubit state being the two-qubit state of the pair of spin qubits and the target state being a blockaded state, performing at least a first Pauli-spin blockade (PSB) check, a two-qubit state conversion operation, and a second PSB check, in sequence on the pair of spin qubits; andin response to the qubit being a single-qubit state of one of the spin qubits of the pair of spin qubits, performing at least a PSB check, and a two- qubit state conversion operation, in sequence on the pair of spin qubits.

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