Memory page fault handling method and system

By introducing pages request processing devices in the data processing device, the IMMU does not support the processing link of the processing link caused by the I/O lack function, and realizes the more efficient I/O memory pages. Visit the delay of memory.

WO2025016253A1PCT designated stage expired Publication Date: 2025-01-23HANGZHOU ALICLOUD FEITIAN INFORMATION TECH CO LTD
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Patent Information

Application Number
PCT/CN2024/104511
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-07-19
Filing Date
2024-07-09
Publication Date
2025-01-23

AI Technical Summary

Technical Problem

In the prior art, IOMMU does not support the I/O page-deficiency function, resulting in a long processing link for I/O memory page-deficiency recovery, which increases the delay in device access memory.

Method used

Introduce the lack of page request processing devices in the data processing device. By sending the device to the page request processing device to send a lack of page requests, the I/O page request interface that does not rely on IOMMU will be reduced, and the processing chain of the I/O memory page deficiency page recovery chain will be shortened. road.

Benefits of technology

Improves the processing efficiency of I/O memory page fault recovery and reduces device access memory latency.

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Abstract

Provided in the embodiments of the present disclosure are a memory page fault handling method and system. The method comprises: after determining that a page fault occurs in a memory page corresponding to an I / O access sent by means of a virtual machine, a data processing device sending a page fault request to a page fault request processing device; the page fault request processing device sending a page fault message to a page fault abnormality queue on the basis of the page fault request; a virtual machine manager acquiring the page fault message in the page fault abnormality queue, performing page fault handling on the basis of the page fault message, so as to obtain a faulty memory page, and sending the faulty memory page to the page fault request processing device; and the page fault request processing device updating a mapping page table on the basis of the faulty memory page, such that the data processing device performs I / O access processing on the basis of the updated mapping page table.
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Description

Memory page fault processing method and system

[0001] Cross-reference

[0002] This disclosure claims priority to the Chinese patent application filed with the China Patent Office on July 19, 2023, application number 202310890608.5, and application name “Memory Page Fault Processing Method and System,” the entire contents of which are incorporated by reference into this disclosure. Technical Field

[0003] The present disclosure relates to the field of computer technology, and in particular to a method for processing a memory page fault. Background Art

[0004] In a virtual machine scenario with passthrough enabled, address translation is required in the IOMMU (Input / Output Memory Management Unit). The IOMMU connects the Direct Memory Access (DMA) I / O (Input / Output) bus and the host's memory to convert virtual addresses for device accesses into physical addresses.

[0005] In actual applications, the Virtual Machine Manager (VMM) reclaims physical memory, stores the data stored in physical memory on the hard disk, and releases the physical memory pages for use by other processes. When the process accessing I / O needs memory again, an I / O memory page fault occurs.

[0006] The IOMMUs of mainstream CPUs (Central Processing Units) currently in service do not support the I / O page fault function. When an I / O memory page fault occurs, the IOMMU cannot directly send a page fault request to the VMM. Instead, it returns a page fault exception message to a pass-through device, such as a PCI device. The pass-through device then relies on the IOMMU to send a page fault request to the VMM based on the page fault exception message to recover the missing memory page. This increases the processing chain for I / O memory page fault recovery, prolongs the recovery time, and causes significant latency in device memory access.

[0007] Summary of the Invention

[0008] In view of this, embodiments of the present disclosure provide a method for handling memory page faults. One or more embodiments of the present disclosure also relate to a memory page fault handling system, a page fault request processing device, a computing device, a computer-readable storage medium, and a computer program to address technical deficiencies in the prior art.

[0009] According to a first aspect of an embodiment of the present disclosure, a method for processing a memory page fault is provided, comprising:

[0010] The data processing device, when determining that a memory page corresponding to the I / O access sent by the virtual machine is missing, sends the page missing request to the page missing request processing device;

[0011] The page fault request processing device sends a page fault message to a page fault exception queue according to the page fault request;

[0012] The virtual machine manager obtains the page fault message in the page fault exception queue, performs page fault processing according to the page fault message, obtains the missing memory page, and sends a processing completion instruction for the missing memory page to the page fault request processing device;

[0013] The page fault request processing device updates a status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

[0014] According to a second aspect of an embodiment of the present disclosure, a memory page fault processing system is provided, comprising:

[0015] The data processing device is configured to send the page fault request to the page fault request processing device when determining that the memory page corresponding to the I / O access sent by the virtual machine is missing;

[0016] The page fault request processing device is configured to send a page fault message to a page fault exception queue according to the page fault request;

[0017] The virtual machine manager is configured to obtain the page fault message in the page fault exception queue, perform page fault processing according to the page fault message, obtain the missing memory page, and send a processing completion instruction for the missing memory page to the page fault request processing device;

[0018] The page fault request processing device is configured to update a status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

[0019] According to a third aspect of an embodiment of the present disclosure, a page fault request processing device is provided, including a page fault message sending module and a status table updating module, wherein:

[0020] The page fault message sending module is configured to send a page fault message to the page fault exception queue according to the page fault request, wherein the page fault message is sent by the data processing device when it is determined that the memory page corresponding to the I / O access sent by the virtual machine is missing;

[0021] The status table update module is configured to update the status table according to a processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table, wherein the processing completion instruction is sent by the virtual machine manager after obtaining a page fault message in the page fault exception queue and performing page fault processing according to the page fault message to obtain the missing memory page, and the status table includes the existence status of the missing memory page.

[0022] According to a fourth aspect of an embodiment of the present disclosure, there is provided a computing device, including:

[0023] memory and processor;

[0024] The memory is configured to store computer-executable instructions, and the processor is configured to execute the computer-executable instructions. When the computer-executable instructions are executed by the processor, the steps of the above-mentioned memory page fault processing method are implemented.

[0025] According to a fifth aspect of an embodiment of the present disclosure, a computer-readable storage medium is provided, which stores computer-executable instructions, and when the instructions are executed by a processor, the steps of the above-mentioned memory page fault processing method are implemented.

[0026] According to a sixth aspect of an embodiment of the present disclosure, a computer program is provided, wherein when the computer program is executed in a computer, the computer is caused to execute the steps of the above-mentioned memory page fault processing method.

[0027] An embodiment of the present disclosure provides a method for processing a memory page fault, which is applied to a memory page fault processing system. The memory page fault processing system includes a host, a virtual machine and a virtual machine manager running on the host, a data processing device deployed in the host to process I / O access of the virtual machine, and a page fault request processing device deployed in the host to process page fault requests sent by the data processing device. The method includes: the data processing device, upon determining that a memory page corresponding to an I / O access sent by the virtual machine is missing, sending the page fault request to the page fault request processing device; the page fault request processing device, sending a page fault message to a page fault exception queue based on the page fault request; the virtual machine manager, obtaining the page fault message in the page fault exception queue, performing page fault processing based on the page fault message, obtaining the missing memory page, and sending a processing completion instruction for the missing memory page to the page fault request processing device; the page fault request processing device, updating a status table based on the processing completion instruction, so that the data processing device performs the I / O access processing based on the updated status table, wherein the status table includes the existence status of the missing memory page.

[0028] Specifically, the memory page fault processing method introduces a page fault request processing device into a data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request, thereby realizing an I / O page fault request interface that is independent of the IOMMU, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device access memory delay. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] FIG1 is a schematic diagram of a scenario of a method for processing a memory page fault provided by an embodiment of the present disclosure;

[0030] FIG2 is a flowchart of a method for processing a memory page fault provided by an embodiment of the present disclosure;

[0031] FIG3 is a schematic diagram of a VPRI architecture in a DPU-assisted virtualization architecture to which a memory page fault processing method is applied, provided by one embodiment of the present disclosure;

[0032] FIG4 is a flowchart of a method for processing a memory page fault provided by an embodiment of the present disclosure;

[0033] FIG5 is a schematic structural diagram of a page fault request processing device provided by an embodiment of the present disclosure;

[0034] FIG6 is a schematic diagram of the structure of a memory page fault processing system provided by an embodiment of the present disclosure;

[0035] FIG7 is a structural block diagram of a computing device provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] The following description sets forth many specific details to facilitate a full understanding of the present disclosure. However, the present disclosure can be implemented in many other ways than those described herein, and those skilled in the art can make similar generalizations without violating the scope of the present disclosure. Therefore, the present disclosure is not limited to the specific implementations disclosed below.

[0037] The terms used in one or more embodiments of the present disclosure are for the purpose of describing specific embodiments and are not intended to limit one or more embodiments of the present disclosure. The singular forms "a," "the," and "the" used in one or more embodiments of the present disclosure and the appended claims are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used in one or more embodiments of the present disclosure refers to and includes any or all possible combinations of one or more associated listed items.

[0038] It should be understood that although the terms first, second, etc. may be used to describe various information in one or more embodiments of the present disclosure, such information should not be limited to these terms. These terms are used to distinguish information of the same type from each other. For example, without departing from the scope of one or more embodiments of the present disclosure, the first may also be referred to as the second, and similarly, the second may also be referred to as the first. Depending on the context, the word "if" as used herein may be interpreted as "at the time of" or "when" or "in response to determining".

[0039] In addition, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data set for analysis, stored data, displayed data, etc.) involved in one or more embodiments of the present disclosure are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0040] First, the terms involved in one or more embodiments of the present disclosure are explained.

[0041] DMA: Direct Memory Access, direct memory access is a function provided by some computer bus architectures, which enables data to be sent directly from an attached device (such as a disk drive) to the memory of the computer motherboard.

[0042] ATS: Address Translation Service (ATS) is an address translation service. ATS in PCIe is CPU-centric. Devices on the PCIe bus can use ATS to request the physical address mapping corresponding to untranslated addresses, along with corresponding attributes, permissions, and other information, from the host.

[0043] IOPF: I / O Page Fault, an I / O page fault request directly initiated by the PCI device.

[0044] PCI: Peripheral Component Interconnect, a standard set to define a local bus.

[0045] PCI Function: PCI function is designed as a logical level within each device.

[0046] VMM: The full name is Virtual Machine Monitor, a virtual machine monitoring system, also called a hypervisor, which is a specific implementation of the virtualization layer and centrally manages physical resources. Each virtual processor system needs to access physical resources through the VMM.

[0047] MMIO: Memory-mapped I / O, which is part of the PCI specification.

[0048] MSI-X Interrupt: Extended Message Signaled Interrupt (MSI-X) is an enhanced version of the MSI interrupt. MSI (Message Signaled Interrupt) is a PCI device that triggers a DPU interrupt by writing a specific message to a specific address. The MSI-X interrupt mechanism aims to expand the number of interrupt vectors used by PCIe devices while resolving the MSI interrupt requirement that interrupt vectors must be continuous.

[0049] PRI: Page Request Interface is a standard PCI device capability defined by PCI-SIG. Combined with ATS, PRI eliminates the need to pin I / O memory used by devices in memory, alleviating the problem of virtual machines occupying excessive fixed memory and reducing the bottleneck of the host's overall allocatable memory.

[0050] To address the technical issue of long I / O memory page fault recovery times, which results in significant latency in device access to memory, in some embodiments of the present disclosure, a bypass PCI Function for page fault request services is added to the device side, providing IOPF functionality for hosts without IOMMUs that have PRI functionality. This allows for recovery of large-block I / O memory page faults corresponding to large blocks of data, allowing the device to access the recovered memory pages. Compared to existing memory page fault processing methods, this eliminates the need to rely on IOMMU hardware, shortens the memory page fault recovery processing chain, and helps reduce the I / O memory page fault recovery time, thereby reducing device access to memory latency.

[0051] In the present disclosure, a memory page fault processing method is provided. The present disclosure also relates to a memory page fault processing system, a computing device, and a computer-readable storage medium, which are described in detail one by one in the following embodiments.

[0052] 1 , which shows a scenario diagram of a method for processing a memory page fault provided by an embodiment of the present disclosure, including: a host machine 102 , a virtual machine 104 , a pass-through device 106 , and a VPRI-PCI device 108 .

[0053] The host machine 102 can be understood as a computer device with computing, storage, and communication functions. For example, the host machine 102 can be a server-side device. For example, the host machine 102 can be a single server device or a cloud-based server array. Of course, the host machine 102 can also be a terminal device such as a mobile phone, tablet computer, personal computer, or wearable device.

[0054] In the embodiment of the present application, a host machine 102 is deployed with a virtual machine (VM) 104. The virtual machine 104 can also be referred to as a guest of the host machine 102. The virtual machine 104 has an independent CPU, memory, network, and disk.

[0055] Pass-through device 106 can be understood as an I / O hardware device mounted on host machine 102, and may include a network card, storage media, etc. The storage media may be a persistent storage medium such as a disk or hard drive. Pass-through device 106 can be connected to host machine 102 via a communication interface. Depending on the form of the communication interface, pass-through device 106 can be implemented as a PCI device, PCIe device, etc.

[0056] The VMM can be understood as a logical node that manages virtual machines 104. It can be deployed on the host machine 102 or on another physical machine that communicates with the host machine 102. When the VMM is deployed on the host machine 102, it can run on the processing unit of the host machine 102. The VMM can schedule tasks, load balance, and monitor the status of virtual machines 104. The processing unit of the host machine 102 can be a CPU, DPU, etc.

[0057] In pass-through technology, a virtual machine 104 can directly access a pass-through device 106 mounted on a host machine 102 through the VMM. This allows the virtual machine 104's I / O operation path to be virtually identical to that in a non-virtualized environment. Pass-through devices 106 can access the host machine 102's memory via direct memory access (DMA). DMA establishes a data path between the pass-through device 106 and the host machine 102's memory, enabling direct data transfer between the pass-through device 106 and the host machine 102's memory. The host machine 102's CPU is not required to participate in the data transfer process between the pass-through device 106 and the host machine 102's memory.

[0058] In virtualization technology, the operating system (guest OS) running on the virtual machine 104 is usually unaware of the physical memory address of the host machine it accesses, which can also be called the host physical address (HPA), or simply the physical address. If a DMA operation is to be performed, it is possible to corrupt the memory. Because the direct device 106 can obtain the physical memory address of the virtual machine, which is simply called the virtual address (VA), or the guest physical address (GPA), the direct device 106 does not know the mapping relationship between the GPA and the HPA. Therefore, in an embodiment of the present application, an IOMMU is introduced into the direct technology.

[0059] The IOMMU can be communicatively connected between the pass-through device 106 and the host machine 102 memory. Optionally, the IOMMU can be communicatively connected to the pass-through device 106 and the host machine 102 memory via a communication interface bus. The serial interface bus can be a PCI interface bus, a PCIe interface bus, etc. The IOMMU can ensure that the pass-through device 106 can access the host machine 102 memory when performing DMA operations.

[0060] For a host machine 102 without an IOMMU, the pass-through device 106 can access the entire memory address space of the host machine 102 through DMA. For a host machine equipped with an IOMMU, the CPU of the virtual machine 104 can allocate a GPA accessible to the pass-through device 106, and the VMM can allocate a corresponding HPA for the GPA. The IOMMU can maintain a mapping table between the GPA and the HPA, which can also be called a page table. The page table records the correspondence between the GPA and the HPA. When the pass-through device 106 accesses the memory of the host machine 102 through DMA, the VMM can capture the DMA request issued by the pass-through device 106 and pass the DMA request transparently to the IOMMU. The IOMMU can obtain the GPA to be accessed from the DMA request; then, the GPA to be accessed is matched in the page table stored in the IOMMU to obtain the HPA corresponding to the GPA to be accessed. For the pass-through device 106, the memory space corresponding to the host machine 102 memory can be accessed through the HPA corresponding to the GPA to be accessed.

[0061] In actual application, VMM will reclaim physical memory, store the data stored in physical memory in the hard disk, and release physical memory pages for use by other processes. When the process of the direct device 106 needs memory again, an I / O memory page fault will occur.

[0062] Taking the pass-through device 106 as a DPU as an example, the memory page fault processing method provided by the embodiment of the present disclosure is described in detail.

[0063] In an embodiment of the present disclosure, a VPRI-PCI device 108 is introduced into the DPU, wherein the VPRI-PCI device 108 is a bypass PCI Function independent of the DPU 106. The VPRI-PCI device can be embedded in the pass-through device 106 or connected to the pass-through device 106 through an interface, and the present disclosure does not limit this. The VPRI-PCI device 108 can store the presence status (present state) of a memory page (4K / 2M / 1G) corresponding to the GPA, and one bit is used to record the presence status of one page. If the presence status is "1", it indicates that the memory page corresponding to the GPA exists; if the presence status is "0", it indicates that the memory page corresponding to the GPA is missing.

[0064] After the virtual machine 104 sends an I / O access to the DPU, the DPU searches the status table in the VPRI-PCI device 108 and finds that an I / O memory page is missing. The DPU then sends a page fault request to the VPRI-PCI device 108. The VPRI-PCI device 108 can send a page fault message to the VMM based on the page fault request, so that the VMM performs page fault processing based on the page fault message to obtain the missing memory page, and sends a processing completion instruction for the missing memory page to the VPRI-PCI device 108. The processing completion instruction is a data communication instruction, which is configured to convey the message that the missing memory page has been obtained through the VMM's page fault processing, so as to update the status table in the VPRI-PCI device 108. Before the page fault processing, the existence status of the missing memory page in the status table is 0, while the existence status of the missing memory page in the status table after the processing is completed is 1, indicating that the missing memory page has been obtained. The DPU can then perform I / O access processing based on the updated status table.

[0065] Based on this, the memory page fault processing method provided by the embodiment of the present disclosure introduces a page fault request processing device in the data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request, thereby realizing an I / O page fault request interface that is independent of the IOMMU. That is, when page fault processing is required, there is no need for the IOMMU to send a page fault message to the data processing device, and then the data processing device relies on the IOMMU to send a page fault request to perform page fault processing; the page fault request processing device in the data processing device can directly send a page fault request, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device access memory delay.

[0066] Refer to Figure 2, which shows a flowchart of a memory page fault processing method provided by an embodiment of the present disclosure. The memory page fault processing method is applied to a memory page fault processing system, which includes a host, a virtual machine and a virtual machine manager running in the host, a data processing device deployed in the host to process I / O access of the virtual machine, and a page fault request processing device deployed in the host to process page fault requests sent by the data processing device. The method specifically includes the following steps.

[0067] Step 202: When the data processing device determines that a memory page corresponding to the I / O access sent by the virtual machine is missing, the data processing device sends the page missing request to the page missing request processing device.

[0068] Among them, the data processing device can be understood as the pass-through device 106 in Figure 1, that is, the PCI I / O hardware device, such as the standard network card NIC (Network Interface Card), data processor DPU (Data Processing Unit), etc.; the virtual machine can be understood as the software implementation of the host machine running in the host machine that can run programs like a real machine; I / O (Input / Output, that is, input / output, usually refers to the input and output of data between internal memory and external memory or other peripheral devices) access can be understood as input / output access. For example, when a virtual machine performs I / O access to a disk, I / O access can be understood as the virtual machine's read and write access to the disk.

[0069] Memory pages can be understood as physical memory space being divided into segments of fixed size, storing physical addresses; a page fault request processing device can be understood as the VPRI-PCI device 108 in FIG1 ; in actual applications, the page fault request processing device can be understood as a device that sends a page fault request, wherein a page fault request can be understood as a page fault request for a memory page fault in the above-mentioned I / O access.

[0070] In one or more embodiments of the present disclosure, before determining that a memory page corresponding to an I / O access sent by the virtual machine is missing, the data processing device must first receive the I / O access. A virtual machine can send multiple I / O accesses. To enable the data processing device to process the I / O accesses in an orderly manner, the received I / O accesses are added to an I / O queue. To determine whether a memory page is missing, the virtual address corresponding to the I / O access must first be obtained. Only after obtaining the virtual address can the physical address corresponding to the virtual address be checked. The specific implementation is as follows:

[0071] Before determining that a memory page corresponding to the I / O access sent by the virtual machine is missing, the method further includes:

[0072] The data processing device receives the I / O access sent by the virtual machine, adds the I / O access to an I / O queue, and determines a virtual address corresponding to the I / O access;

[0073] Calling a status table in the page fault request processing device to search for an existence status of a memory page corresponding to the virtual address;

[0074] Accordingly, determining that a memory page corresponding to the I / O access sent by the virtual machine is missing includes:

[0075] The data processing device determines, based on the existence status of the memory page, that a memory page corresponding to the I / O access sent by the virtual machine is missing.

[0076] Among them, the I / O queue can be understood as a queue for storing the I / O access of a virtual machine, following the first-in-first-out principle; the status table can be understood as a table that stores the existence status of the memory page corresponding to the GPA; the virtual address can be understood as the GPA; and the memory page can be understood as the physical address corresponding to the virtual address.

[0077] The memory page fault processing method provided by the embodiment of the present disclosure is that the data processing device can add the received I / O access to the I / O queue so as to perform I / O access processing in an orderly manner, and the data processing device can directly call the status table in the page fault request processing device to check the existence status of the memory page corresponding to the virtual address, thereby improving the efficiency of finding memory page faults.

[0078] In one or more embodiments of the present disclosure, before determining that a memory page corresponding to an I / O access sent by the virtual machine is missing, the virtual machine first sends the I / O access to identify the access object of the I / O access. The access object is located in a data processing device, and the access object of the I / O access sent by the virtual machine is a data processing component in the data processing device, so as to obtain data in the data processing component. The specific implementation is as follows:

[0079] The data processing device includes a data processing component;

[0080] Accordingly, before receiving the I / O access sent by the virtual machine and determining the virtual address corresponding to the I / O access, the method further includes:

[0081] The virtual machine sends an I / O access to the data processing component to the data processing device.

[0082] Among them, data processing components can be understood as network devices, disk devices, etc. in data processing devices, such as virtio-net, rdma, virtio-blk, NVMe, etc.

[0083] The memory page fault processing method provided by the embodiment of the present disclosure can obtain data in the data processing component by sending it to the data processing device and targeting the I / O access of the data processing component.

[0084] For ease of understanding, the following embodiments all take the data processing device as a DPU, the page fault request processing device as a VPRI-PCI device, and the I / O access as the read and write access to the disk device virtio-blk as an example to describe in detail a memory page fault processing method provided by the embodiments of the present disclosure.

[0085] The virtual machine sends a read / write access to the disk device virtio-blk in the DPU to the DPU. The DPU receives the I / O access sent by the virtual machine, adds the I / O access to the I / O queue corresponding to the virtual machine, and determines the virtual address corresponding to the I / O access. The DPU can call the status table in the VPRI-PCI device to find the existence status of the memory page corresponding to the virtual address. If the existence status of the corresponding memory page is "0", that is, the DPU determines that the memory page corresponding to the I / O access sent by the virtual machine is missing, it sends a page fault request to the VPRI-PCI device.

[0086] In one or more embodiments of the present disclosure, after determining that a memory page corresponding to an I / O access sent by a virtual machine is missing, other I / O accesses in the I / O queue that follow the I / O access are interrupted, so that subsequent I / O accesses and the I / O access query the updated mapping page table together, thereby reducing the probability of memory page missing for other I / O accesses and improving thread execution efficiency. The specific implementation method is as follows:

[0087] After determining that the memory page corresponding to the I / O access sent by the virtual machine is missing, the method further includes:

[0088] The page fault request processing device interrupts the processing of the I / O access in the I / O queue and the processing of other I / O accesses in the I / O queue, wherein the other I / O accesses are located after the I / O access in the I / O queue.

[0089] In actual applications, the processing of the I / O access in the I / O queue and the processing of other I / O access in the I / O queue can be interrupted through the MSI-X interrupt mode of the VPRI-PCI device.

[0090] For example, if a memory page fault occurs during read / write access to the disk device virtio-blk, the VPRI-PCI device interrupts the I / O queue where the read / write access to the disk device virtio-blk resides and suspends the I / O access following the read / write access in the I / O queue. If there are multiple I / O queues for the disk device virtio-blk, the other queues under the disk device virtio-blk can continue to operate; similarly, the I / O access in the I / O queue of another device (such as virtio-net) continues to operate and is not affected by the page fault status of the disk device virtio-blk (unless the memory accessed by this queue itself also encounters a page fault).

[0091] In the memory page fault processing method provided by the embodiment of the present disclosure, a page fault request processing device interrupts the processing of the I / O access in the I / O queue, as well as the processing of other I / O accesses in the I / O queue, so that subsequent other I / O accesses and the I / O access uniformly query the updated mapping page table, thereby reducing the probability of memory page faults in other I / O accesses and improving thread execution efficiency.

[0092] Step 204: The page fault request processing device sends a page fault message to a page fault exception queue according to the page fault request.

[0093] Among them, the page fault message can be understood as a message corresponding to the page fault request, which carries the virtual address information corresponding to the missing memory page; the page fault exception queue can be understood as a queue storing all virtual machine I / O access page fault messages.

[0094] Continuing with the above example, the page fault request processing device sends a page fault message to the page fault exception queue according to the page fault request. It can be understood that the VPRI-PCI device sends a message carrying the virtual address information corresponding to the missing memory page to the page fault exception queue according to the page fault request sent by the DPU.

[0095] In one or more embodiments of the present disclosure, a page fault message is sent to a page fault exception queue based on a page fault request. The page fault exception queue is a shared memory residing in the host memory. Shared memory can be understood as a large-capacity memory accessible by different data processors in a multi-processor computer system. It is a high-speed communication channel between VPRI-PCI devices and the VMM, and can complete I / O page fault processing with minimal delay. The specific implementation method is as follows:

[0096] The sending of a page fault message to a page fault exception queue according to the page fault request includes:

[0097] The page fault request processing device sends a page fault message to the page fault exception queue of the shared memory in the host memory according to the page fault request.

[0098] Continuing with the above example, the page fault request processing device sends a page fault message to the page fault exception queue of the shared memory in the host memory according to the page fault request. It can be understood that the VPRI-PCI device sends a page fault message to the page fault exception queue of the shared memory in the host memory according to the page fault request.

[0099] The memory page fault processing method provided by the embodiment of the present disclosure can complete I / O page fault processing with minimal delay by sending a page fault message to a page fault exception queue of a shared memory in the host memory.

[0100] Step 206: The virtual machine manager obtains the page fault message in the page fault exception queue, performs page fault processing according to the page fault message, obtains the missing memory page, and sends a processing completion instruction for the missing memory page to the page fault request processing device.

[0101] Among them, the virtual machine manager can be understood as the VMM in the above embodiment; page fault processing can be understood as obtaining the virtual address in the page fault message, allocating a physical address to the virtual address, and other operations; the processing completion instruction can be understood as a completion instruction for allocating the corresponding physical address to the virtual address in the page fault message.

[0102] During specific implementation, the VMM obtains the page fault message in the page fault exception queue, performs page fault processing according to the virtual address in the page fault message, obtains the physical address corresponding to the virtual address in the page fault message, and sends a completion instruction to the VPRI-PCI device to allocate the physical address to the virtual address in the page fault message.

[0103] In one or more embodiments of the present disclosure, a page fault request handling driver corresponding to a page fault request handling device is included in the virtual machine manager. The page fault request handling driver is a special program that enables the computer and the page fault request handling device to communicate with each other, equivalent to a hardware interface. The page fault request handling driver is used to obtain page fault messages from the page fault exception queue. The specific implementation method is as follows:

[0104] The virtual machine manager includes a page fault request processing driver corresponding to the page fault request processing device;

[0105] Correspondingly, obtaining the page fault message in the page fault exception queue includes:

[0106] The virtual machine manager obtains the page fault message in the page fault exception queue through the page fault request processing driver.

[0107] Among them, the page fault request processing driver can be understood as a page fault request processing driver corresponding to the page fault request processing device in the host. The page fault request processing driver can be understood as an interface between the page fault request processing device and the operating system. The operating system can control the operation of the page fault request processing device through this interface.

[0108] That is, after the VPRI-PCI device sends a page fault message to the page fault exception queue, the VPRI-PCI driver corresponding to the VPRI-PCI device in the VMM obtains the page fault message sent by the VPRI-PCI device from the page fault exception queue.

[0109] The memory page fault processing method provided by the embodiment of the present disclosure obtains the page fault message in the page fault exception queue through the page fault request processing driver, so as to connect the VPRI-PCI device with the operating system, thereby facilitating the operating system to control the VPRI-PCI device.

[0110] In one or more embodiments of the present disclosure, the virtual manager performs page fault processing, and the memory management unit in the virtual machine manager performs page fault processing. The memory management unit obtains the virtual address corresponding to the missing memory page in the page fault message, and allocates a physical address to the virtual address to obtain the missing memory page. The specific implementation method is as follows:

[0111] The performing page fault processing according to the page fault message to obtain the missing memory page includes:

[0112] The memory management unit in the virtual machine manager determines the memory page corresponding to the virtual address according to the virtual address corresponding to the missing memory page carried in the page fault message.

[0113] The memory management unit can be understood as a software functional unit that manages and allocates memory.

[0114] In actual applications, the VMM recovers the missing memory page through the memory management unit in the VMM based on the virtual address corresponding to the missing memory page carried in the page fault message. Specifically, the memory management unit in the VMM allocates a physical address to the virtual address corresponding to the missing memory page carried in the page fault message, obtains the memory page corresponding to the virtual address, modifies the IOMMU page table of the virtual machine, and updates the GPA memory mapping status of the virtual machine and the mapped physical address.

[0115] The memory page fault processing method provided by the embodiment of the present disclosure performs page fault processing through the memory management unit in the virtual machine manager, so that the memory management unit allocates a reasonable physical address to the virtual address corresponding to the missing memory page carried in the page fault message, and obtains the memory page corresponding to the virtual address.

[0116] Step 208: The page fault request processing device updates a status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

[0117] Still taking the page fault request processing device as a VPRI-PCI device as an example, the memory page fault processing method provided by the embodiment of the present disclosure is described in detail.

[0118] The page fault request processing device updates the status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table. It can be understood that after obtaining the missing memory page, the VMM sends a processing completion instruction to the VPRI-PCI device. After receiving the processing completion instruction, the VPRI-PCI device updates the status table, such as setting the status corresponding to the missing memory page to "1" to indicate that the memory page exists. The DPU performs the I / O access processing of the above-mentioned virtual machine according to the updated status table.

[0119] In one or more embodiments of the present disclosure, after the page fault request processing device completes the status table update, it sends a processing completion notification to the data processing device, so that the data processing device can quickly process the I / O access in the I / O queue based on the processing completion notification. The specific implementation method is as follows:

[0120] The updating of the status table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table includes:

[0121] The page fault request processing device updates a status table according to the processing completion instruction, and sends an update completion instruction for the updated status table to the data processing device;

[0122] The data processing device, in response to the update completion instruction, performs the I / O access processing according to the updated status table.

[0123] In actual applications, the VPRI-PCI device updates the status table in the VPRI-PCI device according to the processing completion instruction obtained from the VMM, and sends an update completion instruction to the DPU; the DPU responds to the update completion instruction and processes the I / O access according to the updated status table.

[0124] In the memory page fault processing method provided by the embodiment of the present disclosure, after the page fault request processing device completes the status table update, it sends an update completion instruction to the data processing device. The data processing device receives the update completion instruction and quickly processes the I / O access in the I / O queue according to the update completion instruction.

[0125] In one or more embodiments of the present disclosure, there may be one or more virtual machines. In the case of multiple virtual machines, page fault requests corresponding to I / O access sent by multiple virtual machines may be processed concurrently to achieve more efficient memory page fault processing efficiency. The specific implementation method is as follows:

[0126] There are at least two virtual machines;

[0127] Correspondingly, sending a page fault message to a page fault exception queue according to the page fault request includes:

[0128] The page fault request processing device sends at least two page fault messages to a page fault exception queue according to the at least two page fault requests, wherein the at least two page fault requests are sent to the page fault request processing device by the data processing device when it is determined that the memory pages corresponding to the I / O accesses sent by the at least two virtual machines are both missing;

[0129] Accordingly, the acquiring the page fault message in the page fault exception queue, performing page fault processing according to the page fault message, obtaining the missing memory page, and sending a processing completion instruction for the missing memory page to the page fault request processing device includes:

[0130] The virtual machine manager obtains the at least two page fault messages in the page fault exception queue, performs page fault processing according to the at least two page fault messages, obtains the at least two missing memory pages, and sends a processing completion instruction for the at least two missing memory pages to the page fault request processing device.

[0131] Accordingly, updating the status table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table includes:

[0132] The page fault request processing device updates at least two status tables according to the processing completion instruction, so that the data processing device performs the at least two I / O access processes according to the updated at least two status tables, wherein the status tables include the existence status of the at least two missing memory pages.

[0133] In an actual application, two virtual machines are virtual machine A and virtual machine B; I / O access is virtual machine A reading and writing access A to disk A, and virtual machine B reading and writing access B to disk B. For example, a detailed description is given.

[0134] When the DPU determines that the memory pages corresponding to the read and write access A and read and write access B sent by virtual machines A and B are both missing, it sends page fault request A and page fault request B to the VPRI-PCI device. The VPRI-PCI device sends page fault messages A and page fault messages B to the page fault exception queue based on page fault request A and page fault request B.

[0135] The VMM obtains the page fault message A and the page fault message B in the page fault exception queue, and performs page fault processing according to the two page fault messages, obtains the missing memory page A corresponding to the page fault message A, and the missing memory page B corresponding to the page fault message B, and sends a processing completion instruction for the missing memory page A and the missing memory page B to the VPRI-PCI device.

[0136] The VPRI-PCI device updates the status of the missing memory page A in the state table A corresponding to virtual machine A and updates the status of the missing memory page B in the state table B corresponding to virtual machine B according to the processing completion instruction, so that the DPU performs read and write access A and read and write access B according to the updated state table A and the updated state table B.

[0137] The memory page fault processing method provided by the embodiment of the present disclosure can process page fault requests corresponding to I / O access sent by multiple virtual machines when there are multiple virtual machines, so as to achieve more efficient memory page fault processing efficiency.

[0138] In one or more embodiments of the present disclosure, when there are multiple virtual machines, after obtaining multiple missing memory pages corresponding to the multiple virtual machines, the state tables corresponding to the respective virtual machines are updated. After the update is completed, the corresponding update completion instructions can be sent out of order to the data processing device via the page missing request processing interface, so that the data processing device can quickly process the I / O access corresponding to the multiple virtual machines. The specific implementation method is as follows:

[0139] The page fault request processing device includes a page fault request processing interface;

[0140] Accordingly, updating at least two status tables according to the processing completion instruction so that the data processing device performs the at least two I / O access processes according to the updated at least two status tables includes:

[0141] The page fault request processing device updates at least two status tables according to the processing completion instruction, and sends at least two update completion instructions for the updated at least two status tables to the data processing device through the page fault request processing interface;

[0142] The data processing device performs the I / O access processing according to the at least two subsequent status tables in response to the at least two update completion instructions.

[0143] The page fault request processing interface may be understood as a page response interface, and the page response interface is configured to send an update completion instruction to a data processing device.

[0144] Specifically, continuing with the above example, in the VPRI-PCI device, after updating the status table A according to the processing completion instruction for the missing memory page A and updating the status table B according to the processing completion instruction for the missing memory page B, the update completion instruction A corresponding to the updated status table A and the update completion instruction B corresponding to the updated status table B can be sent to the DPU through the page response interface of the VPRI-PCI device; the DPU responds to the update completion instruction A and the update completion instruction B, and performs read and write access A and read and write access B according to the updated status table A and the updated status table B.

[0145] In actual applications, the page response interface of the VPRI-PCI device can send the update completion instruction A corresponding to the updated state table A and the update completion instruction B corresponding to the updated state table B out of order. It is not necessary to send the update completion instructions in the order in which they are taken out from the page fault exception queue, thereby improving processing efficiency.

[0146] The memory page fault processing method provided by the embodiment of the present disclosure sends corresponding update completion instructions to the data processing device in a disorderly manner through the page fault request processing interface, so that the data processing device can quickly process the I / O accesses corresponding to multiple virtual machines.

[0147] Based on this, the memory page fault processing method provided by the embodiment of the present disclosure introduces a page fault request processing device in a data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request, thereby realizing an I / O page fault request interface that is independent of the IOMMU, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device access memory delay.

[0148] 3 , which shows a schematic diagram of a VPRI architecture under a DPU-assisted virtualization architecture to which a memory page fault processing method is applied, provided by an embodiment of the present disclosure. A specific embodiment will be described below.

[0149] The figure shows a VPRI architecture under a DPU-assisted virtualization architecture that applies a memory page fault processing method. Specifically, it includes a server and a DPU. The server includes a host, multiple virtual machines running in the host, such as virtual machine 1, virtual machine 2...virtual machine N, etc., and a virtual machine manager connected to the DPU through a device interface. The DPU includes a DPU IO engine, a VPRI-PCI device, and some other PCI devices, such as network, storage, and disk devices.

[0150] The VPRI architecture has an independent PCI function, the VPRI-PCI device. The VPRI-PCI device is one of the PCI devices that the DPU provides or emulates along with all other network and storage PCI devices. The VPRI-PCI device is independent of any other PCI devices on the DPU.

[0151] However, the IO engines behind other PCI devices rely on the VPRI-PCI device to detect the presence of memory pages. This is because the VPRI-PCI device provides a method for detecting whether a memory page is mapped. For example, the VPRI-PCI device stores a status table that records the mapping presence status (mapped / unmapped) of each memory page for each virtual machine, such as the status table for virtual machine 1, the status table for virtual machine 2, and so on, the status table for virtual machine N. Therefore, before performing DMA, other PCI devices must first check the page mapping information in the VPRI-PCI device's status table to determine whether the memory they are about to access is in a page fault state. It should be noted that the VPRI-PCI device can send IOPF messages to the virtual machine manager.

[0152] The VPRI-PCI device provides an MMIO device interface and standard MSI-X interrupts. MMIO can be understood as a PCI device register, which is memory-mapped for the host CPU to access the PCI device. Building upon this basic PCI model, an IOPF shared memory queue negotiation is implemented between the virtual machine manager and the VPRI-PCI device. This queue is called the Page Fault Queue (PFQ), the same as the page fault exception queue in the aforementioned embodiment. The PFQ can be understood as shared memory residing in host memory. Paired with the MSI-X interrupt, the PFQ can be understood as a high-speed communication channel between the VPRI-PCI device and the VMM, enabling I / O page fault processing with minimal latency.

[0153] Specifically, the virtual machine can directly access the PCI devices in the DPU through device passthrough. For example, virtual machine 1 can directly access the network, storage, and disk devices corresponding to virtual machine 1 in the DPU. When virtual machine 1 performs I / O access to these PCI devices, these PCI devices are processed through I / O, that is, the DPU I / O engine calls the state table corresponding to virtual machine 1 in the VPRI-PCI device to perform page search. When it is determined that the memory page corresponding to the I / O access sent by virtual machine 1 is missing, the DPU I / O engine sends a page request to the VPRI-PCI device. The VPRI-PCI device enqueues the page fault message in the page request into the PFQ. The VPRI-PCI driver corresponding to the VPRI-PCI device takes the page fault message from the PFQ, dequeues the message, and sends the page fault message to the virtual machine manager. The virtual machine manager performs page fault processing, obtains the missing memory page, performs mapping update, and completes the state table update.

[0154] Based on this, the memory page fault processing method provided by the embodiment of the present disclosure adds a bypass function independent of the DPU in the DPU. When a memory page fault occurs, a page fault message is sent according to this bypass function, thereby realizing the bypass PCI function that does not rely on the IOMMU PRI to provide PRI request service, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device access memory delay.

[0155] Referring to FIG. 4 , FIG. 4 shows a flowchart of a processing method for processing a memory page fault provided by an embodiment of the present disclosure.

[0156] Based on the architecture in FIG3 , the memory page fault processing method is described in detail for a specific processing process when a memory page fault corresponding to an I / O access of a virtual machine is encountered.

[0157] Among them, virtual machine A and virtual machine B in Figure 4 can be replaced by virtual machine 1 and virtual machine 2 in Figure 3. When virtual machine A reads and writes disk A through DMA, and virtual machine B reads and writes disk B through DMA, a DMA job can be understood as an I / O request in the above embodiment, and a DMA queue can be understood as the I / O queue in the above embodiment.

[0158] Step 1: Encountered a page error.

[0159] When the DPU's IO engine identifies, through some means (such as ATS translation or page table mirroring on the device), that an IO request in one of the IO queues (such as virtio-net, virtio-blk, NVMe, or RDMA) encounters a page fault, for example, a DMA job in the DMA queue corresponding to virtual machine A and a DMA job in the DMA queue corresponding to virtual machine B in the figure experience a page fault; encountering a page fault means that the memory page corresponding to the I / O access sent by the virtual machine in the above embodiment is missing.

[0160] Specifically, the I / O engine of the DPU identifies that an I / O request in the I / O queue encounters a page fault.

[0161] Step 2: Submit the page request.

[0162] The page request may be understood as the page fault request in the above embodiment.

[0163] When a page fault occurs, the I / O engine generates an IOPF message, sends the IOPF message to the PFQ queue, and interrupts the I / O processing through the VPRI-PCI device. According to the queuing order of the DMA queue, the DMA job below the page fault DMA job is locked.

[0164] Specifically, to ensure the semantic consistency of the I / O queues, the I / O queue that encounters the IOPF device is stopped before the page fault is processed. The I / O engine only pauses the I / O queue where the IOPF occurs, and other I / O queues are not affected.

[0165] The specific implementation can be found in the above embodiments, which will not be described again here.

[0166] Step 3: Concurrently process IOPFs.

[0167] Specifically, based on the queuing order of page faults, IOPFs are processed concurrently, and page request A corresponding to virtual machine A and page request B corresponding to virtual machine B are processed simultaneously in the page request thread pool of the virtual machine manager. Page request A of virtual machine A is processed in page request thread A, and page request B of virtual machine B is processed in page request thread B.

[0168] Step 4: Out-of-order page responses.

[0169] The page response can be understood as the update completion instruction in the above embodiment.

[0170] Specifically, the page response interface provided by the VPRI-PCI device can handle out-of-order IOPF completion events to ensure that there is no congestion or interference between virtual machines.

[0171] The specific implementation can be found in the above embodiments, which will not be described again here.

[0172] Step 5: Process the next I / O.

[0173] After the I / O access that caused the page fault is completed, the interruption of the I / O queue is released, and the next I / O is processed according to the queuing order of the I / O queue.

[0174] The specific implementation can be found in the above embodiments, which will not be described again here.

[0175] The memory page fault processing method provided by the embodiment of the present disclosure introduces a page fault request processing device into a data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request, thereby realizing an I / O page fault request interface that is independent of the IOMMU, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device access memory delay.

[0176] Referring to FIG5 , FIG5 is a schematic diagram showing the structure of a device for processing page fault requests according to an embodiment of the present disclosure. As shown in FIG5 , the device includes:

[0177] The page fault message sending module 502 is configured to send a page fault message to the page fault exception queue according to the page fault request, wherein the page fault message is sent by the data processing device when it is determined that the memory page corresponding to the I / O access sent by the virtual machine is missing.

[0178] The status table update module 504 is configured to update the status table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table, wherein the processing completion instruction is sent by the virtual machine manager when obtaining the page fault message in the page fault exception queue and performing page fault processing according to the page fault message to obtain the missing memory page, and the status table includes the existence status of the missing memory page.

[0179] Specifically, the page fault request processing device can send a page fault message to the virtual machine manager according to the page fault request, implement an I / O page fault request interface that is independent of the IOMMU, shorten the processing link of I / O memory page fault recovery, improve the processing efficiency of I / O memory page fault recovery, and reduce the device's memory access delay.

[0180] Corresponding to the above method embodiment, the present disclosure also provides a memory page fault system embodiment. FIG6 shows a schematic diagram of the structure of a memory page fault system provided by an embodiment of the present disclosure. As shown in FIG6 , the system includes:

[0181] The data processing device 602 is configured to send the page fault request to the page fault request processing device when determining that the memory page corresponding to the I / O access sent by the virtual machine is missing;

[0182] A page fault request processing device 604 is configured to send a page fault message to a page fault exception queue according to the page fault request;

[0183] The virtual machine manager 606 is configured to obtain the page fault message in the page fault exception queue, perform page fault processing according to the page fault message, obtain the missing memory page, and send a processing completion instruction for the missing memory page to the page fault request processing device;

[0184] The page fault request processing device 604 is configured to update a status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

[0185] Optionally, the data processing device 602 is further configured to:

[0186] receiving an I / O access request sent by the virtual machine, adding the I / O access request to an I / O queue, and determining a virtual address corresponding to the I / O access request;

[0187] Calling a status table in the page fault request processing device to search for an existence status of a memory page corresponding to the virtual address;

[0188] According to the existence state of the memory page, it is determined that the memory page corresponding to the I / O access sent by the virtual machine is missing.

[0189] Optionally, the system further includes:

[0190] The virtual machine is configured to send I / O access to the data processing component to the data processing device.

[0191] Optionally, the page fault request processing device 604 is further configured to:

[0192] Processing of the I / O access in the I / O queue and processing of other I / O accesses in the I / O queue that are subsequent to the I / O access in the I / O queue are interrupted.

[0193] Optionally, the virtual machine manager 606 is further configured to:

[0194] The page fault message in the page fault exception queue is acquired by the page fault request processing driver.

[0195] Optionally, the virtual machine manager 606 is further configured to:

[0196] According to the virtual address corresponding to the missing memory page carried in the page fault message, a memory page corresponding to the virtual address is determined.

[0197] Optionally, the page fault request processing device 604 is further configured to:

[0198] updating a status table according to the processing completion instruction, and sending an update completion instruction for the updated status table to the data processing device;

[0199] The data processing device, in response to the update completion instruction, performs the I / O access processing according to the updated status table.

[0200] Optionally, the system further includes:

[0201] The page fault request processing device sends at least two page fault messages to a page fault exception queue according to the at least two page fault requests, wherein the at least two page fault requests are sent to the page fault request processing device by the data processing device when it is determined that the memory pages corresponding to the I / O accesses sent by the at least two virtual machines are both missing;

[0202] The virtual machine manager obtains the at least two page fault messages in the page fault exception queue, performs page fault processing according to the at least two page fault messages, obtains the at least two missing memory pages, and sends a processing completion instruction for the at least two missing memory pages to the page fault request processing device.

[0203] The page fault request processing device updates at least two status tables according to the processing completion instruction, so that the data processing device performs the at least two I / O access processes according to the updated at least two status tables, wherein the status tables include the existence status of the at least two missing memory pages.

[0204] The page fault request processing device updates at least two status tables according to the processing completion instruction, and sends at least two update completion instructions for the updated at least two status tables to the data processing device through the page fault request processing interface;

[0205] The data processing device, in response to the at least two update completion instructions, performs the I / O access processing according to the at least two updated status tables.

[0206] Optionally, the page fault request processing device 604 is further configured to:

[0207] A page fault message is sent to a page fault exception queue of a shared memory in the host memory according to the page fault request.

[0208] Specifically, the memory page fault processing system introduces a page fault request processing device into a data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request, thereby realizing an I / O page fault request interface that is independent of the IOMMU, shortening the processing link of I / O memory page fault recovery, improving the processing efficiency of I / O memory page fault recovery, and reducing the device's memory access delay.

[0209] The above is a schematic scheme of a memory page fault system of this embodiment. It should be noted that the technical scheme of this memory page fault system and the technical scheme of the above-mentioned memory page fault system are of the same concept. For details not described in detail in the technical scheme of the memory page fault system, please refer to the description of the technical scheme of the above-mentioned memory page fault method.

[0210] Figure 7 shows a block diagram of a computing device 700 according to one embodiment of the present disclosure. Components of the computing device 700 include, but are not limited to, a memory 710 and a processor 720. The processor 720 is connected to the memory 710 via a bus 730, and a database 750 is configured to store data.

[0211] The computing device 700 also includes an access device 740 that enables the computing device 700 to communicate via one or more networks 760. Examples of such networks include a public switched telephone network (PSTN), a local area network (LAN), a wide area network (WAN), a personal area network (PAN), or a combination of communication networks such as the Internet. The access device 740 may include one or more of any type of network interface (e.g., a network interface card (NIC)) whether wired or wireless, such as an IEEE 802.11 wireless local area network (WLAN) wireless interface, a Worldwide Interoperability for Microwave Access (Wi-MAX) interface, an Ethernet interface, a universal serial bus (USB) interface, a cellular network interface, a Bluetooth interface, or a near field communication (NFC) interface.

[0212] In one embodiment of the present disclosure, the aforementioned components of computing device 700 and other components not shown in FIG7 may also be connected to each other, for example, via a bus. It should be understood that the computing device structure block diagram shown in FIG7 is for illustrative purposes only and does not limit the scope of the present disclosure. Those skilled in the art may add or replace other components as needed.

[0213] Computing device 700 may be any type of stationary or mobile computing device, including a mobile computer or mobile computing device (e.g., a tablet computer, personal digital assistant, laptop computer, notebook computer, netbook computer, etc.), a mobile phone (e.g., a smartphone), a wearable computing device (e.g., a smartwatch, smart glasses, etc.), or other types of mobile devices, or a stationary computing device such as a desktop computer or personal computer (PC). Computing device 700 may also be a mobile or stationary server.

[0214] The processor 720 is configured to execute the following computer executable instructions, which implement the steps of the above-mentioned memory page fault method when executed by the processor.

[0215] The above is a schematic solution of a computing device of this embodiment. It should be noted that the technical solution of this computing device and the technical solution of the above-mentioned memory page fault method are based on the same concept. For details not described in detail in the technical solution of the computing device, please refer to the description of the technical solution of the above-mentioned memory page fault method.

[0216] An embodiment of the present disclosure further provides a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the steps of the above-mentioned memory page fault method.

[0217] The above is a schematic scheme of a computer-readable storage medium of this embodiment. It should be noted that the technical scheme of this storage medium and the technical scheme of the memory page fault method described above are based on the same concept. For details not described in detail in the technical scheme of the storage medium, please refer to the description of the technical scheme of the memory page fault method described above.

[0218] An embodiment of the present disclosure further provides a computer program, wherein when the computer program is executed in a computer, the computer is caused to execute the steps of the above-mentioned memory page fault method.

[0219] The above is a schematic scheme of a computer program of this embodiment. It should be noted that the technical scheme of this computer program and the technical scheme of the above-mentioned memory page fault method are based on the same concept. For details not described in detail in the technical scheme of the computer program, please refer to the description of the technical scheme of the above-mentioned memory page fault method.

[0220] The foregoing description describes specific embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in an order different from that described in the embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order shown or the sequential order to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0221] The computer instructions include computer program code, which may be in source code form, object code form, executable file, or some intermediate form. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, mobile hard disk, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal, and software distribution medium. It should be noted that the content contained in the computer-readable medium may be appropriately increased or decreased according to the requirements of patent practice. For example, in some regions, according to patent practice, computer-readable media does not include electric carrier signals and telecommunication signals.

[0222] It should be noted that for the aforementioned method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present disclosure are not limited by the order of the actions described, because according to the embodiments of the present disclosure, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the disclosed embodiments are all preferred embodiments, and the actions and modules involved are not necessarily required by the embodiments of the present disclosure.

[0223] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant description of other embodiments.

[0224] The preferred embodiments of the present disclosure disclosed above are only used to help illustrate the present disclosure. The optional embodiments do not describe all details in detail, nor do they limit the invention to the specific implementation methods described. Obviously, many modifications and changes can be made based on the content of the embodiments of the present disclosure. The present disclosure selects and specifically describes these embodiments in order to better explain the principles and practical applications of the embodiments of the present disclosure, so that those skilled in the art can better understand and utilize the present disclosure. The present disclosure is limited by the claims and their full scope and equivalents. Industrial Applicability

[0225] The disclosed embodiments provide a method and system for processing a memory page fault. The method introduces a page fault request processing device into a data processing device. When the data processing device sends a page fault request to the page fault request processing device, the page fault request processing device sends a page fault message to the virtual machine manager according to the page fault request. This method implements an I / O page fault request interface that is independent of the IOMMU, shortens the processing link for I / O memory page fault recovery, improves the processing efficiency of I / O memory page fault recovery, and reduces the device's memory access latency.

Claims

1. A method for processing a memory page fault, applied to a memory page fault processing system, the memory page fault processing system comprising a host, a virtual machine and a virtual machine manager running in the host, a data processing device deployed in the host to process I / O access of the virtual machine, and a page fault request processing device deployed in the host to process a page fault request sent by the data processing device, wherein: The method comprises: The data processing device, when determining that a memory page corresponding to the I / O access sent by the virtual machine is missing, sends the page missing request to the page missing request processing device; The page fault request processing device sends a page fault message to a page fault exception queue according to the page fault request; The virtual machine manager obtains the page fault message in the page fault exception queue, performs page fault processing according to the page fault message, obtains the missing memory page, and sends a processing completion instruction for the missing memory page to the page fault request processing device; The page missing request processing device updates a status table according to the processing completion instruction, so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

2. The method for processing a memory page fault according to claim 1, before determining that a memory page corresponding to the I / O access sent by the virtual machine is missing, further comprising: The data processing device receives the I / O access sent by the virtual machine, adds the I / O access to an I / O queue, and determines a virtual address corresponding to the I / O access; Calling a status table in the page fault request processing device to find the existence status of the memory page corresponding to the virtual address; Accordingly, determining that a memory page corresponding to the I / O access sent by the virtual machine is missing includes: The data processing device determines, according to the existence status of the memory page, that a memory page corresponding to the I / O access sent by the virtual machine is missing.

3. The memory page fault processing method according to claim 2, wherein the data processing device comprises a data processing component; Accordingly, before receiving the I / O access sent by the virtual machine and determining the virtual address corresponding to the I / O access, the method further includes: The virtual machine sends an I / O access to the data processing component to the data processing device.

4. The method for processing a memory page fault according to claim 2, after determining that the memory page corresponding to the I / O access sent by the virtual machine is missing, further comprising: The page fault request processing device interrupts the processing of the I / O access in the I / O queue and the processing of other I / O accesses in the I / O queue, wherein the other I / O accesses are located after the I / O access in the I / O queue.

5. The memory page fault processing method according to claim 1, wherein the virtual machine manager comprises a page fault request processing driver corresponding to the page fault request processing device; Correspondingly, obtaining the page fault message in the page fault exception queue includes: The virtual machine manager obtains the page fault exception in the page fault exception queue through the page fault request processing driver interest.

6. The memory page fault processing method according to claim 1, wherein the page fault processing is performed according to the page fault message to obtain the missing memory page, comprising: The memory management unit in the virtual machine manager determines a memory page corresponding to the virtual address according to the virtual address corresponding to the missing memory page carried in the missing page message.

7. The memory page fault processing method according to claim 2, wherein the updating of the status table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table comprises: The page fault request processing device updates the status table according to the processing completion instruction, and sends an update completion instruction for the updated status table to the data processing device; The data processing device, in response to the update completion instruction, performs the I / O access processing according to the updated status table.

8. The memory page fault processing method according to claim 1, wherein the number of the virtual machines is at least two; Correspondingly, sending a page fault message to a page fault exception queue according to the page fault request includes: The page fault request processing device sends at least two page fault messages to the page fault exception queue according to the at least two page fault requests, wherein the at least two page fault requests are sent to the page fault request processing device by the data processing device when it is determined that the memory pages corresponding to the I / O accesses sent by the at least two virtual machines are all missing; Correspondingly, the acquiring the page fault message in the page fault exception queue, performing page fault processing according to the page fault message, obtaining the missing memory page, and sending a processing completion instruction for the missing memory page to the page fault request processing device, includes: The virtual machine manager obtains the at least two page fault messages in the page fault exception queue, performs page fault processing according to the at least two page fault messages, obtains the at least two missing memory pages, and sends a processing completion instruction for the at least two missing memory pages to the page fault request processing device.

9. The memory page fault processing method according to claim 8, wherein the number of the virtual machines is at least two; Accordingly, updating the state table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated state table includes: The page fault request processing device updates at least two status tables according to the processing completion instruction, so that the data processing device performs the at least two I / O access processes according to the updated at least two status tables, wherein the status tables include the existence status of the at least two missing memory pages.

10. The memory page fault processing method according to claim 9, wherein the page fault request processing device comprises a page fault request processing interface; Accordingly, updating at least two status tables according to the processing completion instruction so that the data processing device performs the at least two I / O access processes according to the updated at least two status tables includes: The page fault request processing device updates at least two status tables according to the processing completion instruction, and The request processing interface sends at least two update completion instructions for the at least two updated state tables to the data processing device; The data processing device, in response to the at least two update completion instructions, performs the I / O access processing according to the at least two updated status tables.

11. The memory page fault processing method according to claim 1, wherein sending a page fault message to a page fault exception queue according to the page fault request comprises: The page fault request processing device sends a page fault message to the page fault exception queue of the shared memory in the host memory according to the page fault request.

12. A memory page fault processing system, comprising: The data processing device is configured to send the page missing request to the page missing request processing device when determining that a memory page corresponding to the I / O access sent by the virtual machine is missing; The page fault request processing device is configured to send a page fault message to a page fault exception queue according to the page fault request; The virtual machine manager is configured to obtain the page fault message in the page fault exception queue, perform page fault processing according to the page fault message, obtain the missing memory page, and send a processing completion instruction for the missing memory page to the page fault request processing device; The page missing request processing device is configured to update a status table according to the processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table, wherein the status table includes the existence status of the missing memory page.

13. A page missing request processing device, comprising a page missing message sending module and a status table updating module, wherein: The page fault message sending module is configured to send a page fault message to a page fault exception queue according to a page fault request, wherein the page fault message is sent by the data processing device when it is determined that a memory page corresponding to an I / O access sent by the virtual machine is missing; The status table update module is configured to update the status table according to a processing completion instruction so that the data processing device performs the I / O access processing according to the updated status table, wherein the processing completion instruction is sent by the virtual machine manager after obtaining a page fault message in the page fault exception queue and performing page fault processing according to the page fault message to obtain the missing memory page, and the status table includes the existence status of the missing memory page.

14. A computing device comprising: Memory and processor; The memory is configured to store computer executable instructions, and the processor is configured to execute the computer executable instructions. When the computer executable instructions are executed by a processor, the steps of the target object determination method described in any one of claims 1 to 11 are implemented.

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