Multilayer wiring board and power conversion device

Abstract

A multilayer wiring board in which an inner layer conductor and a substrate separation section (20) are provided on an electrically insulating substrate (10) comprises: substrate wiring (1) which connects a current inflow surface (30) and a current output surface (40) of the substrate (10); through via holes (3) which penetrate the substrate (10) and connect all layers of the inner layer conductor; and non-through via holes (4) which connect some of the layers of the inner layer conductor. In the substrate wiring (1), the non-through via holes (4) are provided further to the substrate separation section (20)-side than the through via holes (3), and a current path (50b) that linearly links the current inflow surface (30) and the current output surface (40) via the non-through via holes (4) is set to be longer than a current path (50a) that linearly connects the current inflow surface (30) and the current output surface (40) via the through via holes (3). Through via hole groups (60) and non-through via hole groups (70) may respectively be constituted by a plurality of the through via holes (3) and non-through via holes (4).

Description

Multilayer wiring board and power conversion device

[0001] The present disclosure relates to a multilayer wiring board and a power conversion device equipped with the same.

[0002] To miniaturize power conversion devices, a multilayer wiring board is being used, with the control unit and power conversion unit mounted on the same board for high-density packaging. Mounting the power conversion unit on the same board allows for the mounting of semiconductor switching elements for power conversion, thereby simultaneously establishing a current path between the components, resulting in a simplified structure and reduced component processing costs. However, this approach also presents problems such as heat generation due to the conductor resistance of the board wiring and an increased number of through-holes required to shunt current to each wiring layer of the multilayer wiring board in order to reduce the resistance of the board wiring. Furthermore, the increased number of holes drilled using an NC drill increases the manufacturing cost and processing time of the board, and further increases the wear of the NC drill.

[0003] Furthermore, there is an issue that stress is applied to the mounted components when the substrate is divided into multiple pieces for high-density mounting. As a measure to alleviate this stress, a method has been introduced in which through holes are placed along the cut between the divided parts of the substrate and the mounted components (for example, Patent Document 1).

[0004] JP 2020-188227 A

[0005] When constructing the power conversion unit of a power converter on a circuit board, it is necessary to suppress the heat generated by the power semiconductors mounted on the board and the heat generated by the power lines connecting the components via board wiring, ensuring high-density mounting while also providing an efficient heat dissipation structure. While using a thick copper board with a thick copper foil would reduce the heat generated by the board wiring that makes up the power lines, this would not allow for fine wiring pitch and is not suitable for high-density wiring and mounting. Therefore, it is necessary to use a multilayer wiring board, connecting the copper foil of each wiring layer with via holes, shunting the current to avoid current concentration and reducing resistance.

[0006] Here, via holes connecting the wiring layers of a multilayer wiring board include through via holes, which are drilled into the board and then copper-plated inside, and non-through via holes, which connect only the necessary layers without providing a through hole in the board. When the board has four or more layers, interstitial via holes (hereinafter referred to as IVHs) are used as non-through via holes. Among these, to reduce current density, it is effective to use through via holes, which have a larger hole diameter than non-through via holes and are thickly plated, resulting in low resistance. However, using a large number of through via holes increases the manufacturing cost of the board due to wear on the NC drill and increased processing time. Conversely, reducing the number of through via holes increases the conductor resistance of the board wiring.

[0007] To reduce costs, boards are typically manufactured by mounting multiple boards of a given size, known as a work size, on multiple surfaces to produce multiple boards. After mounting circuit components, the boards are then divided into multiple pieces. In order to mitigate stress during division, through-holes are often provided near the board division area, along the space between the board division area and the mounted components. In other words, if the circuit components are mounted using connecting materials such as solder, removing these through-holes would eliminate the stress-relieving function and potentially result in cracks, breaks, or other defects in the connecting materials and the circuit components. Therefore, removing the through-holes in these areas would require mounting the circuit components away from the board division area, making it difficult to miniaturize the board and reducing the number of boards that can be produced from the work size, which hinders cost reduction.

[0008] Furthermore, since the inside of an IVH is filled with materials such as epoxy resin or filler, the inside of the via hole is subject to greater thermal stress due to the difference in linear expansion coefficients between the different materials than in a via hole, which is filled with air, resulting in a problem of reduced connection reliability between the via hole and the copper foil of each wiring layer.

[0009] The present disclosure has been made to solve the above-mentioned problems, and aims to obtain a multilayer wiring board that can reduce the number of through via holes used to reduce the resistance of the board wiring, while ensuring low resistance of the board wiring and connection reliability of the via holes, and can alleviate stress on mounted components when the board is divided.

[0010] The multilayer wiring board according to the present disclosure is a multilayer wiring board in which three or more layers of inner layer conductors are arranged on an electrically insulating substrate, and a substrate dividing section is provided to divide the substrate into multiple sections, and the multilayer wiring board comprises: substrate wiring that connects current inflow surfaces and current output surfaces provided on the substrate; through via holes that penetrate the substrate to connect the inner layer conductors; and non-through via holes that connect some of the layers of the inner layer conductors; and within the wiring of the substrate wiring, the non-through via holes are provided on the side of the substrate dividing section relative to the through via holes, so that the current path connecting the current inflow surface and the current output surface in a straight line via the non-through via holes is longer than the current path connecting the current inflow surface and the current output surface in a straight line via the through via holes.

[0011] According to the present disclosure, it is possible to obtain a multilayer wiring board that can reduce the number of through via holes for reducing the resistance of the board wiring, while ensuring low resistance of the board wiring and connection reliability of the via holes, thereby alleviating stress on mounted components when the board is divided.

[0012] FIG. 1 is a schematic diagram showing a cross-sectional structure of a via hole according to embodiment 1. FIG. 2 is a schematic diagram showing the hole pitch of through via holes according to embodiment 1. FIG. 3 is a schematic diagram showing the hole pitch of non-through via holes according to embodiment 1. FIG. 4 is a schematic diagram showing the positional relationship between board wiring, a via hole group, and a board dividing section according to embodiment 1. FIG. 5 is a schematic diagram showing the positional relationship between board wiring, a via hole group, and a board dividing section according to embodiment 2. FIG. 6 is a schematic diagram of another form showing the positional relationship between board wiring, a via hole group, and a board dividing section according to embodiment 2. FIG. 7 is a block diagram showing the system configuration of a power conversion device equipped with a multilayer wiring board according to embodiments 1 to 3.

[0013] The present embodiment will be described below with reference to the drawings. In each drawing, the same reference numerals indicate the same or corresponding parts. Note that FIGS. 1 to 7 relate to one embodiment, and the present disclosure is not limited to these drawings.

[0014] Embodiment 1. FIG. 1 is a schematic diagram showing the cross-sectional structure of a via hole according to embodiment 1, illustrating a through via hole and a non-through via hole for reducing the resistance of board wiring. Here, a via hole is a general term for an electrical and mechanical conductor structure in which a hole is drilled in a board, the interior of which is copper-plated, and the copper foil of each wiring layer is connected for the purpose of electrical conductivity between the wiring layers. A through via hole is a via hole drilled in a board with an NC drill and the interior is copper-plated. A non-through via hole is a via hole that does not drill a through hole in the board, but connects only the necessary layers with copper plating using a laser or small-diameter drill. In addition to via holes, through holes for inserting and soldering terminals of circuit components are called component through holes.

[0015] 1, a multilayer wiring board 100 includes a board 10 with board wiring 1 constituting a power line, copper foil inner layer conductors 1a-1f, via holes 2 including a through via hole 3 and a non-through via hole 4, and an organic insulating material 5 such as glass cloth epoxy resin covering the spaces between the inner layer conductors 1a-1f. The non-through via hole 4 is formed using an IVH, and is not connected between the inner layer conductor 1a (the surface layer) of the board 10 and the inner layer conductor 1f (the back layer) due to the interlayer connection configuration. It is composed of a buried via hole 4a connecting the inner layer conductors 1b-1e, and a blind via hole 4b embedded in the board 10, connecting the copper foil of the surface layer inner layer conductor 1a with the copper foil of the inner layer conductor 1b, and connecting the copper foil of the back layer inner layer conductor 1f with the copper foil of the inner layer conductor 1e, making the hole invisible from the surface. The interiors of the buried via hole 4a and the blind via hole 4b are filled with materials such as epoxy resin or filler, while the interior of the through via hole 3 is filled with air.

[0016] In the present disclosure, the inner layer conductors 1a to 1f of the board wiring 1 have a six-layer structure, and the through via holes 3 connect all layers, but the number of layers is not limited to six, and the connection layer may be any. Also, the non-through via holes 4 are copper foil connection layers formed by IVH, but any non-through via holes may be used, and there is a degree of freedom in the connection layer, so the present disclosure is not limited to this structure.

[0017] Fig. 2 is a schematic diagram showing the hole pitch of through via holes 3 according to embodiment 1, illustrating that when through via holes 3 are arranged in a square lattice, the minimum hole pitch is distance 3a. Fig. 3 is a schematic diagram showing the hole pitch of non-through via holes 4 according to embodiment 1, illustrating that when IVH buried via holes 4a and blind via holes 4b are arranged in a square lattice as in Fig. 2, the minimum hole pitch is distance 4c. The IVH buried via holes 4a and blind via holes 4b have smaller hole diameters because the connecting layers are thinner than the through via holes 3, and although the copper plating thickness is thin, the hole pitch can be made finer.

[0018] On the other hand, because through via holes 3 are drilled using an NC drill through substrate 10, their diameters are necessarily larger than those of non-through via holes 4, and their hole pitch cannot be made smaller than that of buried via holes 4a and blind via holes 4b of the IVH (distance 3a > distance 4c). However, the copper plating can be made thicker accordingly, which has the advantage of allowing low-resistance interlayer connections. Also, in Figure 3, if the square lattice hole pitches of buried via holes 4a and blind via holes 4b are the same, the hole pitch distance 4d between layers is 1 / √2 times the distance 4c, resulting in a mutually offset positional relationship. Therefore, the copper plating in the thickness direction of substrate 10 distributes and supports stress in the thickness direction of substrate 10 at a hole pitch finer than the minimum hole pitch 3a when through via holes 3 are arranged in a square lattice.

[0019] Here, the most important aspect of the connection reliability of the multilayer wiring board 100 is the electrical conductivity reliability of the plated portion of the via hole 2. When a temperature cycle with a large temperature difference is applied to the joint, low cycle fatigue due to nonlinear strain may occur, eventually leading to fracture. It is known that the fatigue life cycle number of this joint follows the Coffin-Manson law, as shown in Equation 1.

[0020]

[0021] The through via hole 3 is filled with air, but the buried via holes 4a and blind via holes 4b of the IVH are filled with materials such as epoxy resin and filler to prevent geometric dents and corrosion of the substrate 10 and to prevent solder explosions that may occur if air is present during soldering in a reflow furnace. Since the non-through via holes 4 of the IVH are filled with materials such as epoxy resin and filler, the non-linear distortion amplitude due to the difference in linear expansion coefficients of the different materials combined (copper: 16.5 ppm / K, epoxy resin: 45 to 65 ppm / K) occurs not only in the thickness direction of the substrate 10 as with the through via hole 3, but also in the surface direction and the circumferential tangent direction of the via hole.

[0022] For this reason, the strain amplitude of the non-through via hole 4 of the IVH is larger than that of the through via hole 3, and when the same thermal stress is applied, the connection reliability of the non-through via hole 4 is generally inferior to that of the through via hole 3. Therefore, in areas where the current path is short and the current density is high, the influence of non-linear distortion due to heat generation becomes large, so it is preferable to use the through via hole 3 in order to improve the connection reliability of the via hole.

[0023] 4 is a schematic diagram showing the positional relationship of the board wiring, via holes, and board division section according to the first embodiment, and explains that when the shape of the board wiring is oblique to the shortest current path connecting the current inflow surface and the current outflow surface of the circuit component, i.e., when it is not parallel, a distribution of current density occurs in the board wiring constituting the power line. In FIG. 4, board wiring 1 constituting the power line and board division section 20 perforated to divide board 10 into multiple sections are provided on the surface of board 10, and board wiring 1 is provided with current inflow surface 30 formed by surface-mounted components and current outflow surface 40 formed by through-holes into which terminals of circuit components, etc., are inserted and soldered to extract current.

[0024] Furthermore, the substrate wiring 1 has a curved portion that follows the outer shape of the substrate 10 and has an oblique shape with respect to the shortest current path 50 connecting the current input surface 30 and the current output surface 40. A through via hole group 60 consisting of a plurality of through via holes 3 is provided at the wiring end facing the inside of the substrate 10, and a non-through via hole group 70 consisting of a plurality of non-through via holes 4 is provided at the wiring end facing the side of the substrate dividing portion 20, which is the outside of the substrate 10. Here, the non-through via hole group 70 of the IVH has a structure in which the holes are not visible from the surface of the substrate 10. With this configuration, because the shape of the substrate wiring 1 is not parallel to the shortest current path 50, a difference occurs in the current path length within the wiring of the substrate wiring 1 between the current path 50a connecting the current input surface 30 and the current output surface 40 via the through via hole group 60 and the current path 50b connecting the current input surface 30 and the current output surface 40 via the non-through via hole group 70.

[0025] In other words, the current path 50a facing the inside of the substrate 10 has a relatively short current path on the current input / output surface, resulting in a high current density due to current concentration. On the other hand, the current path 50b facing the outside of the substrate 10 has a relatively long current path on the current input / output surface, resulting in a high conductor resistance, resulting in a low current density. As a result, a through via hole group 60 is formed using the through via hole 3 in the inside direction of the substrate 10, and interlayer connections are made to divert the current to the inner layer conductors 1a to 1f. As the current density in the substrate wiring 1 is low, a non-through via hole group 70 is formed using the non-through via hole 4 of the IVH in the outside direction of the substrate 10, and interlayer connections are made to divert the current to the inner layer conductors 1a to 1f.

[0026] According to the present disclosure, the current density at the location where the group of non-through via holes 70 is provided is relatively lower than that of the group of through via holes 60, so that even if non-through via holes 4 with thinner copper plating than the through via holes 3 are used, the resistance of the board wiring 1 can be reduced, and even if IVHs are used as the non-through via holes 4, the number of through via holes 3 can be reduced without reducing connection reliability. Furthermore, by arranging the group of non-through via holes 70 along the board dividing portion 20 toward the outside of the board 10 in the board wiring 1 without interposing any mounted components between the group of non-through via holes 70 and the perforated board dividing portion 20, it is possible to alleviate stress on the mounted components and the connecting portions that are applied when the board is divided.

[0027] In the first embodiment, the current input surface 30 is configured as a surface-mounted component, and the current output surface 40 is configured as a through-hole configuration into which terminals of circuit components or the like are inserted and soldered, but the input / output relationship of the current input / output surfaces may be reversed, and further, both current input / output surfaces may be surfaces into which surface-mounted components or terminals of circuit components or the like are inserted and soldered. Also, in the figure, a configuration example is shown in which the through via hole group 60 and the non-through via hole group 70 are illustrated only at the wiring ends of the board wiring 1, but they may not be limited to the wiring ends but may extend to the central part of the board wiring 1, and the layout ratio and positional relationship are design parameters depending on design conditions such as the shape of the board wiring 1 and the current density.

[0028] 5 and 6 are schematic diagrams showing the positional relationship between board wiring, a group of via holes, and board dividing sections according to a second embodiment, which differs from the first embodiment in that the shape of the board wiring is parallel to the shortest current path connecting the current inflow surface and the current outflow surface of the circuit component. That is, in the first embodiment, it was explained that when the shape of the board wiring 1 is diagonal to the shortest current path 50, a difference in current density occurs between the ends of the wiring. In the second embodiment, it is explained that even when the shape of the board wiring 1 is parallel to the shortest current path 50, a difference in current density occurs between the ends of the wiring.

[0029] In Fig. 5, the shortest current path 50 connecting the current input surface 30 and the current output surface 40 is parallel to the shape of the board wiring 1, and the current input surface 30 and the current output surface 40 are arranged offset toward the inside of the board 10 with respect to the center of the board wiring 1. In Fig. 6, the shortest current path 50 connecting the current input surface 30 and the current output surface 40 is parallel to the shape of the board wiring 1, but this is an example where the shortest current path 50 is outside the wiring of the board wiring 1. In both embodiments, the shapes of the board wiring 1 that constitutes the power line are different, but the current density is high in the current path 50a toward the inside of the board 10 and low in the current path 50b toward the outside of the board 10.

[0030] According to the present disclosure, by arranging a group of through via holes 60 in the substrate wiring 1 toward the inside of the substrate 10 and arranging a group of non-through via holes 70 of the IVH toward the outside of the substrate 10 in the substrate wiring 1, and providing the group of non-through via holes 70 in the substrate wiring 1 along the substrate dividing section 20 without using any mounted components between them and the perforated substrate dividing section 20, as in embodiment 1, it is possible to reduce the number of through via holes 3 without compromising the connection reliability of the via holes while suppressing an increase in the conductor resistance of the substrate wiring 1, and also to alleviate stress when dividing the substrate.

[0031] Embodiment 3. A description will be given of a change in the arrangement of the via holes shown in Embodiments 1 and 2. The wiring shape of the board wiring 1, which is made up of power lines connecting the wiring layers of the multilayer wiring board 100, may differ between the front and back layers of the board 10 due to constraints caused by the structure of other wiring and mounted components. In this case, the hole pitch and positional relationship of the blind via holes 4b of the IVH shown in Figure 3, which are arranged in a square lattice, are changed between the front and back layers.

[0032] To explain this using the cross-sectional structure of the via hole shown in Figure 1, changing the positional relationship of blind via holes 4b on the front and back layers means relatively changing the hole pitch and positional relationship of blind via hole 4b formed between inner layer conductors 1a and 1b made of copper foil and blind via hole 4b formed between inner layer conductors 1e and 1f, which increases the degree of freedom in arranging via holes in relation to the wiring shape and makes it possible to realize the features described in embodiments 1 and 2.

[0033] Fourth Embodiment. Since miniaturization and high efficiency are desirable for on-board chargers for electric vehicles, a case will be described in which a multilayer wiring board 100 according to the present disclosure is applied to an on-board power conversion device. FIG. 7 is a block diagram illustrating the system configuration of a power conversion device 200 equipped with a multilayer wiring board 100 according to any one of the first to third embodiments, showing an embodiment as a power supply device that charges a low-voltage battery 220 with power from a high-voltage battery 210. The power conversion device 200 is equipped with a multilayer wiring board 100 in which a power conversion unit 110 and a control unit 120 are configured on the same substrate. The power conversion unit 110 is a circuit that performs power conversion using semiconductor switching elements for power conversion, receives input power from the high-voltage battery 210 based on instructions from the control unit 120, and charges the low-voltage battery 220 connected to the load output.

[0034] According to the present disclosure, by using the multilayer wiring board 100 according to embodiments 1 to 3, the power conversion unit 110 and the control unit 120 can be configured on the same board, enabling high-density packaging, thereby enabling the power conversion device 200 to be miniaturized.

[0035] Although various exemplary embodiments and examples are described in this disclosure, the various features, aspects, and functions described in one or more embodiments are not limited to the application of a particular embodiment, but may be applied to the embodiments alone or in various combinations. Therefore, countless variations not illustrated are anticipated within the scope of the technology disclosed in this specification. For example, this includes cases where at least one component is modified, added, or omitted, or where at least one component is extracted and combined with components of another embodiment.

[0036] 1: board wiring, 1a to 1f: inner layer conductor, 2: via hole, 3: through via hole, 3a: distance, 4: non-through via hole, 4a: buried via hole, 4b: blind via hole, 4c, 4d: distance, 10: board, 20: board division section, 30: current inflow surface, 40: current output surface, 50: shortest current path, 50a, 50b: current path, 60: through via hole group, 70: non-through via hole group, 100: multilayer wiring board, 110: power conversion section, 120: control section, 200: power conversion device, 210: high voltage battery, 220: low voltage battery.

Claims

1. A multilayer wiring board having three or more layers of inner layer conductors arranged on an electrically insulating substrate and a substrate dividing section which divides the substrate into a plurality of sections, the multilayer wiring board comprising: substrate wiring which connects a current inflow surface and a current output surface arranged on the substrate; through via holes which penetrate the substrate and connect the inner layer conductors; and non-through via holes which connect some of the layers of the inner layer conductors; the non-through via holes are arranged on the substrate dividing section side of the through via holes within the wiring of the substrate wiring, so that a current path which connects the current inflow surface and the current output surface in a straight line via the non-through via holes is longer than a current path which connects the current inflow surface and the current output surface in a straight line via the through via holes.

2. The multilayer wiring board according to claim 1, wherein the non-through via holes are interstitial via holes and include blind via holes.

3. The multilayer wiring board according to claim 1 or 2, characterized in that the through via holes and the non-through via holes are a through via hole group and a non-through via hole group each composed of a plurality of via holes.

4. The multilayer wiring board according to claim 3, characterized in that the group of non-through via holes is arranged along the divided portion of the substrate without any mounted components between the group of non-through via holes and the divided portion of the substrate.

5. A multilayer wiring board as described in any one of claims 1 to 4, characterized in that the through via holes and the non-through via holes are within the wiring of the board wiring, are respectively connected to the board wiring, and are arranged in the thickness direction of the board.

6. The multilayer wiring board according to claim 5, characterized in that, within the wiring of the board wiring, the non-through via hole is arranged toward the outside of the board, and the through via hole is arranged toward the inside of the board.

7. A multilayer wiring board according to any one of claims 1 to 6, characterized in that the board wiring has an oblique shape with respect to the shortest current path that connects the current inflow surface and the current output surface in a straight line.

8. A multilayer wiring board according to any one of claims 1 to 6, characterized in that the board wiring has a shape parallel to the shortest current path that connects the current inflow surface and the current output surface in a straight line.

9. A multilayer wiring board according to any one of claims 1 to 8, characterized in that the hole pitch and positional relationship of the plurality of non-through via holes are relatively changed on the front and back layers of the board.

10. The multilayer wiring board according to any one of claims 1 to 9, characterized in that a plurality of said non-through via holes are arranged in a square lattice.

11. A power conversion device comprising a multilayer wiring board according to any one of claims 1 to 10, and a power conversion section and a control section configured on the multilayer wiring board.

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