Semiconductor device and method for manufacturing same

Abstract

Conventional GaN-based HEMTs in which a gate leakage current is reduced by providing an AlN spacer layer below a source electrode and a drain electrode to reduce access resistance while ensuring the AlN spacer layer is not present directly below a gate electrode have been difficult to manufacture.　A method for manufacturing a semiconductor device in which a GaN-based HEMT is formed according to the present disclosure includes a step for laminating a metal film 21 above an epitaxial wafer 10, a step for forming an opening 31 in the metal film 21 corresponding to a position where the gate electrode 18 is formed, and a step for annealing a spacer layer 13 and a channel layer 12 by irradiating the opening 31 with a laser 90.

Description

Semiconductor device and manufacturing method thereof

[0001] The present disclosure relates to a semiconductor device and a manufacturing method thereof, and in particular to a GaN-based HEMT having an AlN layer.

[0002] GaN (gallium nitride)-based HEMTs (High Electron Mobility Transistors) having an AlN (aluminum nitride) spacer are widely known. Patent Document 1 (JP-A-2005-102666) discloses a GaN-based HEMT in which an AlN spacer layer is provided in a portion between a source electrode and a drain electrode other than directly below the gate electrode, thereby reducing access resistance, while eliminating the AlN spacer layer directly below the gate electrode, thereby reducing gate leakage current. In Patent Document 1, the AlN spacer layer in the region directly below the gate electrode is removed by etching, and then a barrier layer is regrown on top of the channel layer and the AlN spacer layer.

[0003] Patent No. 5744346

[0004] Generally, the thickness of the spacer layer in a GaN-based HEMT is very thin, for example, 1 nm in Patent Document 1. In Patent Document 1, this thin spacer layer is removed by etching only directly below the gate. In the semiconductor manufacturing process, the etching amount is controlled by the etching time, but in practice, regardless of whether dry etching or wet etching is used, variations in the etching rate inevitably occur. For this reason, when removing a thin layer by etching, it is common to secure manufacturing margins and stabilize production by stopping the etching by providing an etching stop layer with an etching rate lower than that of the layer to be removed behind it.

[0005] However, in Patent Document 1, the GaN channel layer is located below the AlN spacer layer. GaN has a significantly higher etching rate than AlN. Therefore, if etching continues after the etching of the AlN spacer layer is completed, the GaN channel layer is easily over-etched. For this reason, it is extremely difficult in practice to stably remove only the AlN channel layer by etching, taking into account factors such as uniformity within the wafer surface. Furthermore, providing an etching stop layer between the AlN spacer layer and the GaN channel layer is difficult because it would affect the generation of two-dimensional electron gas, i.e., the operation of the GaN-based HEMT itself. For this reason, the GaN-based HEMT disclosed in Patent Document 1 was extremely difficult to stably manufacture.

[0006] The present disclosure has been made in consideration of the above-mentioned problems, and an object of the present disclosure is to provide a method for manufacturing a GaN-based HEMT in which the access resistance is reduced and the gate leakage current is reduced while avoiding the difficulty of removing the AlN spacer layer by etching. Another object of the present disclosure is to provide a GaN-based HEMT in which the access resistance is reduced and the gate leakage current is reduced.

[0007] The method for manufacturing a semiconductor device according to the present disclosure is a method for manufacturing a semiconductor device having a GaN-based HEMT formed therein, and includes the steps of forming an epitaxial wafer having a channel layer and a spacer layer, forming a metal film above the epitaxial wafer, opening an opening in the metal film at a position where a gate electrode will be formed, irradiating the opening with a laser to anneal the spacer layer and the channel layer, and forming a gate electrode in the opening.

[0008] The semiconductor device according to the present disclosure is a semiconductor device including a GaN-based HEMT having an epitaxial wafer in which a channel layer is formed above a substrate and a spacer layer is formed above the channel layer, and a gate electrode formed above the epitaxial wafer, in which the channel layer below the gate electrode contains Al diffused from the spacer layer, and the channel layer other than the part below the gate electrode does not contain Al diffused from the spacer layer.

[0009] According to the present disclosure, a method for manufacturing a GaN-based HEMT with reduced access resistance and reduced gate leakage current is provided while avoiding the difficulty of removing an AlN spacer layer by etching. Also, according to the present disclosure, a GaN-based HEMT with reduced access resistance and reduced gate leakage current is provided.

[0010] FIG. 1 is a cross-sectional view showing a semiconductor device 100 according to a first embodiment of the present invention. FIG. 2 is a diagram showing a method for manufacturing the semiconductor device 100 according to the first embodiment of the present invention. FIG. 3 is a diagram showing a method for manufacturing the semiconductor device 100 according to the first embodiment of the present invention. FIG. 4 is a diagram showing a method for manufacturing the semiconductor device 100 according to the first embodiment of the present invention. FIG. 5 is a cross-sectional TEM image of the epitaxial wafer 10. FIG. 6 is a diagram showing the results of elemental analysis of the epitaxial wafer before annealing. FIG. 7 is a diagram showing the results of elemental analysis of the epitaxial wafer after annealing.

[0011] Embodiment 1. A power amplifier according to an embodiment of the present disclosure will be described with reference to the drawings. The same or corresponding components are denoted by the same reference numerals, and repeated description may be omitted.

[0012] FIG. 1 is a cross-sectional view showing a semiconductor device 100 according to a first embodiment of the present invention. The semiconductor device 100 is a GaN-based HEMT formed on an epitaxial wafer 10. The epitaxial wafer 10 includes a substrate 11, a channel layer 12, a spacer layer 13, a barrier layer 14, and a cap layer 15. The substrate 11 is made of semi-insulating silicon carbide (SiC). The thickness of the substrate 11 is, for example, 100 μm, and the upper surface is, for example, the (0001) plane. The material of the substrate 11 may be monolithic sapphire or the like.

[0013] A channel layer 12 made of GaN is formed above the surface side of the substrate 11. A spacer layer 13 is formed above the channel layer 12 in contact with the channel layer 12. The spacer layer 13 is made of AlN and has a very thin thickness. Specifically, the thickness is preferably 10 nm or less, and more preferably 0.5 nm to 1.5 nm.

[0014] A barrier layer 14 made of AlGaN (aluminum gallium nitride) is formed above the spacer layer 13. A cap layer 15 made of GaN is formed above the barrier layer 14. A source electrode 16, a drain electrode 17, and a gate electrode 18 are provided in contact with the cap layer 15. The remaining portions of the cap layer 15 are covered with a protective film 19 made mainly of SiN (silicon nitride).

[0015] The channel layer 12 may be formed after a nucleation layer or a buffer layer is formed above the substrate 11. The nucleation layer may be a thin layer made of AlN, and the buffer layer may be a layer made of GaN or AlGaN.

[0016] It is well known that in GaN-based HEMTs, a two-dimensional electron gas 20 called 2DEG is generated at the interface between the channel layer 12 made of GaN and the spacer layer 13 made of AlGaN. In conventional structures, the 2DEG is uniformly distributed within the transistor. However, in the semiconductor device 100, as will be described later, laser annealing causes Al in the spacer layer 13 below the gate electrode 18 to diffuse into the channel layer 12 and barrier layer 14. As a result, the concentration of the two-dimensional electron gas 20 below the gate electrode 18 is reduced compared to other portions, resulting in a high resistance below the gate electrode 18.

[0017] 2 to 5 are diagrams showing a manufacturing method of the semiconductor device 100 according to the first embodiment. The manufacturing method of the semiconductor device 100 will be described with reference to Fig. 2 to 5. First, a channel layer 12 is formed above the surface side of a substrate 11, a spacer layer 13 is formed above the channel layer 12, a barrier layer 14 is formed above the spacer layer 13, and a cap layer 15 is formed above the barrier layer 14 by epitaxial growth, thereby forming an epitaxial wafer 10.

[0018] 2A, a source electrode 16 and a drain electrode 17 are formed on the surface of the epitaxial wafer 10 by vapor deposition, sputtering, plating, or the like. Thereafter, a protective film 19 is formed so as to cover the epitaxial wafer 10. The protective film 19 is made of a material such as a silicon nitride film, a silicon oxide film, an aluminum nitride film, or an aluminum oxide film, and is formed by, for example, MOCVD or ALD (Atomic Layer Deposition).

[0019] Next, as shown in FIG. 2( b), a metal film 21 is formed so as to cover the protective film 19. The metal film 21 is a thin metal film for reflecting a laser 90, which will be described later. In the first embodiment, the material of the metal film 21 is Ni, but this is not limited to Ni and a metal such as Au may also be used. Next, as shown in FIG. 2( c), a resist 30 is applied so as to cover the metal film 21. Next, as shown in FIG. 3( d), a so-called photolithography process, which is common in semiconductor manufacturing, is used to remove the resist 30 from the portion where the gate electrode 18 is to be formed, and an opening 42 is formed in the resist 30.

[0020] Next, as shown in Figure 3(e), an etching process is used to open the metal film 21 exposed from the opening 42, thereby forming an opening 31 in the metal film 21. The protective film 19 is then removed to expose the epitaxial wafer 10. The portion of the epitaxial wafer 10 exposed from the opening 31 is defined as an exposed portion 32. The opening 31 and exposed portion 32 are formed to be as fine as the gate electrode 18 using a so-called photolithography process. Next, as shown in Figure 3(f), the resist 30 is removed using a wet etching process or a dry etching process.

[0021] Next, as shown in FIG. 4( g), a laser 90 is irradiated into the opening 31 to heat the exposed portion 32. As a result, the spacer layer 13 and the channel layer 12 below the exposed portion 32 are annealed. The wavelength of the laser 90 may be any wavelength that can be absorbed by GaN, AlGaN, AlN, etc., and is generally shorter than 400 nm. Next, as shown in FIG. 4( h), the metal film 21 is removed using a wet etching process or a dry etching process.

[0022] Next, as shown in FIG. 4(i), after applying resist 33, an opening 44 is formed in the resist 33 using a photolithography process. The opening 44 is an opening for forming the gate electrode 18, and is formed around the opening 31 and the exposed portion 32 while exposing the opening 31 and the exposed portion 32. Next, as shown in FIG. 5(j), the gate electrode 18 is formed in the opening 31. The gate electrode 18 is formed in contact with the exposed portion 32. Next, as shown in FIG. 5(k), the resist 33 is removed.

[0023] Next, the effect of annealing will be described. Figure 6 shows cross-sectional TEM images of the vicinity of the interface between the channel layer 12 and the spacer layer 13 of the epitaxial wafer 10 before and after annealing, showing the state in which Al in the AlN is diffused by annealing. GaN, AlN, and AlGaN in Figure 6 correspond to the channel layer 12, the spacer layer 13, and the barrier layer 14, respectively.

[0024] The upper left (a) and lower left (c) of Figure 6 are cross-sectional TEM images of the epitaxial wafer 10 before annealing, and the upper right (b) and lower right (d) of Figure 6 are cross-sectional TEM images of the epitaxial wafer 10 after annealing at 1140°C for 5 minutes. Figure 6(c) is an enlarged view of the vicinity of the GaN / AlN interface in Figure 6(a), and Figure 6(d) is an enlarged view of the vicinity of the GaN / AlN interface in Figure 6(b). Comparing Figures 6(a) and 6(b), or comparing Figures 6(c) and 6(d), it can be seen that the clarity of the interfaces between the spacer layer 13 and the barrier layer 14, and between the channel layer 12 and the spacer layer 13, is lost due to annealing. In particular, comparing Figures 6(c) and 6(d) reveals a significant change at the AlN / GaN interface.

[0025] Figure 7 shows the results of elemental analysis of the epitaxial wafer 10 before annealing, and Figure 8 shows the results of elemental analysis of the epitaxial wafer 10 after annealing. In both Figures 7 and 8, the horizontal axis indicates the depth from the wafer surface, with the left side being the barrier layer 14 side and the right side being the channel layer 12 side. Note that the horizontal axes in Figures 7 and 8 do not indicate absolute distances from the wafer surface, so the positions cannot be directly compared. The vertical axis indicates the intensity of the detected elements (Ga, N, and Al). Note that only Al is shown with its intensity multiplied by 5.

[0026] Comparing the Al intensity distributions in Figures 7 and 8, the Al intensity in Figure 7 drops sharply over a 1.6 nm range from a distance of 9.2 nm to a distance of 10.8 nm. This indicates a steep change in the Al concentration distribution. On the other hand, in Figure 8, the Al intensity drops over a 3 nm range from a distance of 7.2 nm to a distance of 10.2 nm. This indicates that the drop in the Al concentration distribution is less steep than before annealing, indicating that Al in the spacer layer 13 diffuses toward the channel layer 12 after annealing. Although some of the Al in the spacer layer 13 also diffuses into the barrier layer 14, the Al concentration in the channel layer 12 is significantly lower than that of the barrier layer 14. Therefore, it is believed that the amount of Al diffusing from the spacer layer 13 to the channel layer 12 is much greater than the amount of Al diffusing from the spacer layer 13 to the barrier layer 14.

[0027] Next, the functions and effects of the present disclosure will be described. In the semiconductor device 100, a laser 90 is irradiated onto the opening 31 where the gate electrode 18 is to be formed, with the metal film 21 remaining except for the opening 31. By selecting a material for the metal film 21 that easily reflects the laser 90, it is possible to effectively heat only the exposed portion 32 of the surface of the epitaxial wafer 10.

[0028] As a result, in the semiconductor device 100, the spacer layer 13 and the channel layer 12 are annealed below the opening 31, Al of the spacer layer 13 is diffused into the channel layer 12, and the concentration of the two-dimensional electron gas 20 is reduced. On the other hand, the spacer layer 13 and the channel layer 12, including the lower portions of the source electrode and the drain electrode, are not annealed except for the lower portion of the opening 31. Therefore, Al of the spacer layer 13 does not diffuse into the channel layer 12, and the concentration of the two-dimensional electron gas 20 is not reduced. Note that the lower portion of the opening 31 mentioned here includes not only the area directly below the opening 31 but also the vicinity of the area directly below the opening 31 that is annealed by irradiating the opening 31 with the laser 90.

[0029] In other words, when the laser 90 is irradiated onto the opening 31 in which the gate electrode 18 is to be formed, Al of the spacer layer 13 diffuses into the channel layer 12 below the opening 31, and as a result, the concentration of the two-dimensional electron gas 20 below the opening 31 becomes lower than the concentration of the two-dimensional electron gas 20 other than below the opening 31.

[0030] As a result, the semiconductor device 100 has the advantage that the access resistance is reduced by providing the AlN spacer layer in the portion other than the portion below the gate electrode 18, while the withstand voltage is increased by increasing the resistance below the gate electrode 18. Furthermore, the manufacturing flow of the semiconductor device 100 can avoid the difficulty of removing the thin spacer layer 13 made of AlN by etching.

[0031] 3(e), the protective film 19 is removed to expose the epitaxial wafer 10, but the protective film 19 may be left thin enough not to affect the annealing of the spacer layer 13 and the channel layer 12 by laser irradiation, and may be removed immediately before forming the gate electrode 18 described in FIG. 5(j). By not exposing the surface of the epitaxial wafer 10 to the external atmosphere in this way, it is possible to reduce damage to the exposed portion 32 during the steps.

[0032] The present disclosure is not limited to the above-described examples and includes various modifications. For example, the above-described examples have been described in detail to clearly explain the present disclosure, and the present disclosure is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to add, delete, or replace part of the configuration of the examples with other configurations.

[0033] REFERENCE SIGNS LIST 10 epitaxial wafer, 11 substrate, 12 channel layer, 13 spacer layer, 14 barrier layer, 15 cap layer, 16 source electrode, 17 drain electrode, 18 gate electrode, 19 protective film, 20 two-dimensional electron gas, 21 metal film, 31 opening, 32 exposed portion, 90 laser, 100 semiconductor device

Claims

1. A manufacturing method for a semiconductor device having a GaN-based HEMT formed therein, comprising the steps of: forming an epitaxial wafer having a channel layer and a spacer layer provided in contact with the channel layer; forming a metal film above the epitaxial wafer; opening an opening in the metal film; irradiating a laser into the opening to anneal the spacer layer and the channel layer; and forming the gate electrode in the opening.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the spacer layer is made of AlN, and the annealing step causes Al of the spacer layer to diffuse into the channel layer.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the metal film is made of Ni or Au.

4. A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that the wavelength of said laser is shorter than 400 nm.

5. A semiconductor device including a GaN-based HEMT having an epitaxial wafer in which a channel layer is formed above a substrate and a spacer layer is formed above the channel layer, and a gate electrode formed above the epitaxial wafer, wherein the channel layer below the gate electrode contains Al diffused from the spacer layer, and the channel layer other than the part below the gate electrode does not contain Al diffused from the spacer layer.

6. The method for manufacturing a semiconductor device according to claim 5, wherein the spacer layer is made of AlN.

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