Planar optical circuit, optical module, and method for manufacturing planar optical circuit
The method of forming a quartz-based plane optical circuit with a low-impurity cap layer and refractive index adjustment addresses the optical performance issues in ultraviolet and visible light applications, achieving high functionality and low light loss by preventing impurity absorption and scattering in the cap layer, resulting in high-performance optical modules.
Patent Information
- Application Number
- PCT/JP2023/027383
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-07-26
- Publication Date
- 2025-01-30
AI Technical Summary
Quartz-based plane optical circuits face issues with optical characteristic deterioration due to impurities in the upper cladding layer, leading to light absorption and increased scattering loss, especially when used for ultraviolet and visible light applications, where the wavelength is significantly shorter than in telecommunications, causing performance degradation.
A method involving a substrate with a lower impurity concentration cap layer covering the core wave conductor, where the cap layer is subjected to heat treatment at 1400 °C or less, preventing impurities from spreading and maintaining optical clarity, and using a cap layer with refractive index adjustment to minimize light absorption and scattering loss.
The solution results in high-performance, low-light-loss optical circuits resistant to high-energy ultraviolet and visible light, with improved optical characteristics by separating the cap layer from the core wave conductor and reducing refractive index mismatch, thus enhancing the functionality of the optical module.
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Figure JP2023027383_30012025_PF_FP_ABST
Abstract
Description
Planar lightwave circuit, optical module, and method for manufacturing the planar lightwave circuit
[0001] The present disclosure relates to a planar lightwave circuit, an optical module, and a method for manufacturing a planar lightwave circuit, and more particularly to a planar lightwave circuit, an optical module, and a method for manufacturing a planar lightwave circuit that are planarized by heat treatment.
[0002] Optical devices, which have been applied to communications, are now being applied to non-communications fields as well. In particular, optical devices based on waveguide-type optical elements such as silica-based planar lightwave circuits (PLCs) have the potential to exceed the performance of existing bulk optics-type optical elements. For this reason, planar lightwave circuits are expected to be applied to fields such as displays, life sciences, quantum computing, and space. For such applications, important challenges for silica-based planar lightwave circuits include improving their resistance to ultraviolet and visible light, high-power tolerance, high functionality, high performance, and low cost.
[0003] Silica-based planar lightwave circuits are devices in which optical waveguides consisting of cores and cladding layers are formed on a quartz substrate, silicon substrate, or the like. Silica-based planar lightwave circuits can be used to realize splitters that branch light and combiners that combine light. Semiconductor process techniques such as photolithography and dry etching are used to manufacture silica-based planar lightwave circuits. By forming thin-film heaters and wiring on the surface of the cladding layer covering the core, silica-based planar lightwave circuits can be used to create phase shifters that utilize the thermo-optic effect, enabling the realization of high-performance optical devices such as phase modulators that modulate the phase of light and optical switches that switch optical paths. Furthermore, by forming a light-absorbing film on the surface of the cladding layer, silica-based planar lightwave circuits can remove unwanted light, such as leakage light and reflected light from the waveguide and optical input / output sections, thereby improving the optical characteristics and realizing high-performance optical devices. The application of planar lightwave circuits to non-communication fields is disclosed, for example, in Non-Patent Documents 1 and 2.
[0004] S. Katayose, et al., 2020 Jpn. J. Appl. Phys. Vol. 59 SOOD01, 2020.Y. Fujiwara, et al., 2021 Jpn. J. Appl. Phys. Vol. 61 SK1021, 2022.
[0005] In the manufacturing process of planar lightwave circuits, after a cladding layer (upper cladding layer) is formed on the core, the upper cladding layer is heat-treated to be flattened. If the thin-film heater, light-absorbing film, and even wiring are formed without flattening the cladding layer, unevenness caused by the height of the core can lead to film peeling and wire breakage. In the heat treatment of the upper cladding layer, the softening temperature of the upper cladding layer is adjusted to be lower than that of the lower cladding layer to prevent the core from sinking into the lower cladding layer deposited below the core. The softening temperature is adjusted by adding impurities such as B (boron) and P (phosphorus) to the SiO2 material of the cladding layer.
[0006] However, when guiding ultraviolet or visible light using a silica-based planar optical circuit, the guided light leaking from the core waveguide into the upper cladding layer is absorbed by impurities added to the SiO2 that constitutes the upper cladding layer, resulting in degradation of optical characteristics. Light is not confined within the waveguide alone; it leaks into the cladding layer and propagates. The greater the amount of light that leaks and the longer the propagation length, the greater the degradation of optical characteristics due to impurities. For example, directional couplers, which are widely used as basic circuits in phase modulators and optical switches, utilize light leaking into the cladding layer to couple light from one optical waveguide to another. In such optical devices, the impact of impurities on optical characteristics is unavoidable.
[0007] Furthermore, impurities contained in the upper cladding layer may diffuse into the core waveguide during heat treatment, changing the refractive index of the core waveguide. Furthermore, the impurities diffused into the core waveguide may cause optical absorption in the core waveguide. These factors may be factors that degrade the optical properties of silica-based planar lightwave circuits.
[0008] Furthermore, silica-based planar optical circuits for ultraviolet and visible light have been plagued by increased scattering loss, i.e., increased propagation loss, due to roughness of the core waveguide sidewalls. The roughness of the waveguide sidewalls occurs during the dry etching process used to fabricate the core waveguide. While this effect was not apparent in known communications applications (guided wavelength: 1550 nm), the effects of sidewall roughness become apparent in ultraviolet and visible light applications, where the guided wavelength is approximately one-third or less of the communications wavelength. Due to these issues, optical modules that combine high functionality and high performance achieved by thin-film heaters and light-absorbing films with resistance to high-energy light such as ultraviolet and visible light and low loss have not been realized.
[0009] The present disclosure has been made in consideration of the above points, and relates to a planar lightwave circuit that is highly functional and high-performance, has resistance to high-energy light such as ultraviolet light and visible light, and has low optical loss, a method for manufacturing the planar lightwave circuit, and an optical module.
[0010] In order to achieve the above object, a planar lightwave circuit according to one embodiment of the present disclosure includes a substrate, a lower cladding layer formed on a main surface of the substrate, a core waveguide formed in the lower cladding layer, a cap layer covering the core waveguide, an upper cladding layer formed on the cap layer, and at least one of wiring, a thin film heater, and a light absorption film formed on the upper cladding layer, wherein the upper cladding layer is made of SiO containing at least impurities, and the cap layer is made of SiO having a lower impurity concentration than the upper cladding layer.
[0011] A method for manufacturing a planar lightwave circuit according to one embodiment of the present disclosure includes the steps of forming a lower cladding layer on a main surface of a substrate, forming a core waveguide in the lower cladding layer, forming a cap layer covering the core waveguide, forming an upper cladding layer on the cap layer, subjecting the upper cladding layer to a heat treatment at 1400°C or less, and forming at least one of wiring, a thin film heater, and a light absorption film on the upper cladding layer, wherein the upper cladding layer is made of SiO containing at least impurities, and the cap layer is made of SiO having a lower impurity concentration than the upper cladding layer.
[0012] An optical module according to one embodiment of the present disclosure includes any one of the planar light circuit described above and a light source that outputs visible light or ultraviolet light.
[0013] According to the above aspects, it is possible to provide a planar lightwave circuit that is highly functional and high-performance, has resistance to high-energy light such as ultraviolet light and visible light, and has low optical loss, a method for manufacturing the planar lightwave circuit, and an optical module.
[0014] 4 is a top view for explaining the optical module 1 of the first embodiment of the present disclosure; FIG. 5 is a cross-sectional view taken along line II, II shown in FIG. 1; (a), (b), and (c) are views for explaining a comparative example with the first embodiment; FIG. 6 is a top view for explaining the planar lightwave circuit of the second embodiment; FIG. 7 is a cross-sectional view taken along arrows V, V shown in FIG. 4; and FIG. 8 is a cross-sectional view for explaining a modified example of the manufacturing method of the planar lightwave circuit of the second embodiment.
[0015] Hereinafter, a first embodiment, a second embodiment, and a third embodiment (hereinafter also referred to as "the present embodiment") of the present disclosure will be described with reference to the drawings. The drawings are intended to explain the configuration, arrangement of each part, function, action, effect, etc. of the present embodiment, and do not limit the specific configuration or shape of the present embodiment. Therefore, the drawings may not accurately show the aspect ratio or enlargement / reduction rate of the configuration of the present embodiment.
[0016] [First Embodiment] (Optical Module) FIG. 1 is a top view illustrating an optical module 1 according to a first embodiment of the present disclosure. FIG. 2 is a cross-sectional view taken along line II-II in FIG. 1 . In the first embodiment, the side with a relatively large y-axis coordinate in the x, y, and z coordinate systems shown in FIGS. 1 and 2 is referred to as "upper" and the side with a relatively small y-axis coordinate is referred to as "lower." As shown in FIGS. 1 and 2 , the optical module 1 includes a planar lightwave circuit 10 and a blue laser diode (blue LD) 11, which is a light source optically connected to an optical waveguide 101. The planar lightwave circuit 10 includes a substrate 2, a lower cladding layer 201 formed on the substrate 2, a core waveguide 203 formed on the lower cladding layer 201, a cap layer 205 covering the core waveguide 203, and an upper cladding layer 207 formed on the cap layer 205. The lower cladding layer 201, the core waveguide 203, the cap layer 205, and the upper cladding layer 207 constitute the optical waveguide 101.
[0017] (Blue LD) The blue LD 11 of the first embodiment may be, for example, an LD with a wavelength of 405 nm and an output of 50 mW. The blue LD 11 may be butt-joint-connected to the end face of the optical waveguide 101, or may be optically connected via a lens or fiber. The blue LD 11 inputs light Li to the planar light circuit 10, and light Lo is output from the planar light circuit 10. However, the first embodiment is not limited to having the blue LD 11 as the light source, and an LD with another wavelength may also be used. Furthermore, the light source may have an optical output of visible light or ultraviolet light of 1 mW or more, and the visible light may be at least one of blue light, green light, and red light.
[0018] (Planar Lightwave Circuit) In the planar lightwave circuit 10, the substrate 2 is a silicon (Si) substrate. The optical waveguide 101 includes a lower cladding layer 201 formed on the main surface of the substrate 2, a core waveguide 203 formed in the lower cladding layer 201, a cap layer 205 covering the core waveguide 203, and an upper cladding layer 207 formed on the cap layer 205. The upper cladding layer 207 is made of SiO2 containing at least impurities, and the cap layer 205 is made of SiO2 with a lower impurity concentration than the upper cladding layer 207. In this configuration, the main surface of the substrate 2 may be one of the main surfaces of the substrate 2. "Coating" the core waveguide 203 refers to being formed on the top and side surfaces of the core waveguide 203. "Made of at least" SiO2 containing impurities refers to the possibility of including other materials in addition to SiO2 containing impurities. Examples of other materials include SiON. The SiO2 having a lower impurity concentration than the upper cladding layer 207 may be undoped SiO2 that does not contain impurities.
[0019] That is, in the first embodiment, the lower cladding layer 201 is an undoped silicon oxide film (SiO2) that does not contain any impurities. The term "undoped" can also be expressed as an impurity concentration of 0 mol%. The core waveguide 203 is silicon O2 containing Zr (zirconium) as an impurity. The cap layer 205 is undoped SiO2. The upper cladding layer 207 is SiO2 containing B (boron) and P (phosphorus) as impurities. The B concentration relative to the SiO2 is 5 mol%, and the P concentration is 1 mOl%. The optical module of this first embodiment is a quartz-based planar optical circuit.
[0020] The refractive index of each of the above layers is as follows (when the wavelength of the blue LD 11 is 632 nm): Upper cladding layer 1.460 Cap layer 1.460 Core waveguide 1.480 Lower cladding layer 1.460 As described above, the refractive index of the cap layer 205 is less than or equal to the refractive index of the core waveguide 203 and greater than or equal to the refractive index of the upper cladding layer.
[0021] In the above configuration, in the first embodiment, the impurity concentrations of B and P are adjusted to a total of 4 mol or more so that the heat treatment temperature for planarizing the upper cladding layer 207 is 1400° C. or less. Furthermore, B has a refractive index lowering effect, and P has a refractive index increasing effect. In the first embodiment, the ratio of the concentrations of the impurities B and P is adjusted so that the refractive index of the upper cladding layer 207 becomes an appropriate value. The first embodiment shows an example in which the concentrations of B and P are adjusted so that the refractive index of the upper cladding layer 207 is 1.460.
[0022] According to the above configuration, the upper cladding layer 207 has a higher impurity concentration than the lower cladding layer 201, so that it is possible to heat and flatten the upper cladding layer 207 without softening the lower cladding layer 201. Furthermore, in the first embodiment, the cap layer 205 covers the core waveguide 203, so that a non-doped region in which no impurities are present is formed between the core waveguide 203 and the upper cladding layer 207. Therefore, in the first embodiment, the upper cladding layer 207 containing impurities is spaced apart from the core waveguide 203, so that it is possible to prevent light leaking out from the upper cladding layer 207 from being absorbed by the impurities.
[0023] Furthermore, the present inventors have conducted experiments and found that when the thickness of the cap layer 205 is 10% or more of the smaller of the thickness or width of the core waveguide 203, it is effective in reducing the absorption by impurities of the guided light leaking out of the core waveguide 203, and therefore in this embodiment, a 0.3 μm thick cap layer 205 was formed for a core waveguide 203 that was 3 μm thick x 3 μm wide.
[0024] Moreover, in the first embodiment, as described above, the upper cladding layer 207 is located away from the core waveguide 203, which prevents impurities from diffusing into the core waveguide 203 due to heat treatment and prevents changes in the optical properties of the core waveguide 203. Furthermore, in the first embodiment, the core waveguide 203 is covered with the cap layer 205, which makes the side surfaces of the core waveguide 203 roughened by etching smooth, thereby mitigating deterioration of the optical properties due to rough etching.
[0025] (Method of Manufacturing Planar Lightwave Circuit) Next, a method of manufacturing the planar lightwave circuit 10 of the first embodiment will be described. The optical waveguide 101 of the first embodiment is a silica-based glass waveguide. In the first embodiment, first, a 1 mm-thick Si substrate 2 is prepared. Then, in the first embodiment, SiO2 particles are deposited on the Si substrate 2 using, for example, a flame deposition method to form a 15 μm-thick lower cladding layer 201. Next, in the first embodiment, Zr-doped SiO2 is deposited using a sputtering method to form a core layer (not shown). The core layer is patterned by photolithography and dry etching and processed into a core waveguide 203 with a width of 3 μm and a thickness of 3 μm.
[0026] Next, in the first embodiment, a cap layer 205 is formed over the entire surface to cover the core waveguide 203. In the first embodiment, non-doped SiO2 is deposited using a sputtering method to form a 0.3 μm-thick cap layer. Then, in the first embodiment, SiO2 doped with B and P is deposited using a flame deposition method, and this is heated at 1000° C. to flatten the surface, forming a 15 μm-thick upper clad layer 207. After that, the thin-film heater 102 and the wiring pattern 103 are formed using a vapor deposition method, photolithography, and etching, and it is confirmed that there are no disconnections.
[0027] However, the first embodiment is not limited to the configuration and method described above. For example, although the above method uses flame deposition to form the lower cladding layer 201 and the upper cladding layer 207, the lower cladding layer 201 and the upper cladding layer 207 may be formed using CVD (Chemical Vapor Deposition) or sputtering. Furthermore, the core layer and the cap layer 205 are not limited to being formed by sputtering, and may also be formed using flame deposition or CVD.
[0028] Furthermore, while the first embodiment described above uses SiO2 with an impurity concentration of 0 mol% for the cap layer 205, SiO2 containing any of B, P, Ge (germanium), Zr, and F (fluorine) as impurities can also be used. For example, using Zr as an impurity in SiO2 increases the refractive index four times more than Ge. Therefore, selecting Zr instead of Ge when adjusting the refractive index to a desired value can effectively suppress degradation of optical characteristics due to impurities. The impurity concentration added to the cap layer 205 is preferably 25 mol% or less to suppress degradation of optical characteristics due to impurities, and the impurity must be selected taking into account both the refractive index increasing effect and the refractive index decreasing effect.
[0029] Furthermore, in the first embodiment, SiO2 with a total impurity concentration of 6 mol% (5 mol% B, 1 mol% P) is used for the upper cladding layer 207, but SiO2 further doped with Ge, Zr, or F may also be used for the upper cladding layer 207. If the total impurity concentration of the upper cladding layer 207 is 4 mol% or more, the surface of the upper cladding layer 207 can be flattened by heat treatment at 1400°C or less. Furthermore, if the impurity concentration is made higher, flattening by heat treatment can be achieved at a lower temperature, thereby reducing manufacturing costs.
[0030] Furthermore, in the first embodiment, Zr-doped SiO2 is used for the core waveguide 203, but Ge-doped SiO2 or SiON can also be applied. Note that the numerical values used in the first embodiment are merely examples, and are not limited to these, and can be changed depending on the implementation to the extent that they do not deviate from the principles of the present disclosure.
[0031] 3(a), 3(b), and 3(c) are diagrams for explaining a comparative example to the first embodiment described above, showing one step in a known method for manufacturing a silica-based planar lightwave circuit. The steps shown in FIGS. 3(a) to 3(c) involve depositing a lower cladding layer 201 and a core layer on a Si substrate 2, forming a core pattern using photolithography and dry etching, and forming a core waveguide 203. Furthermore, an upper cladding layer 207 is formed on the core waveguide 203 (FIG. 3(a)). At this time, as shown in FIG. 3(a), the upper cladding layer 207 has a surface with irregularities that reflect the height of the core waveguide 203.
[0032] A thin-film heater, a light-absorbing film, and the like are formed on the upper cladding layer 207. To achieve this, it is necessary to planarize the surface of the upper cladding layer 207. If the thin-film heater, wiring, and light-absorbing film are formed without planarizing the upper cladding layer 207, disconnection and film peeling will occur due to the unevenness of the upper cladding layer 207. Figure 3(b) shows the upper cladding layer 207 in a planarized state.
[0033] The upper cladding layer 207 is flattened by high-temperature heat treatment. The heat treatment temperature is set so that the softening temperature of the upper cladding layer 207 is lower than that of the lower cladding layer 201 to prevent the core waveguide 203 from sinking into the lower cladding layer 201, and so that the upper cladding layer 207 softens but not the lower cladding layer 201. The upper cladding layer 207 and the lower cladding layer 201 are made of a material primarily consisting of BPSG (boron phosphorus glass), in which B and P are added as dopants to SiO. The impurity concentration of the upper cladding layer 207 is set higher than that of the lower cladding layer 201, and the softening temperature of the glass constituting the upper cladding layer 207 is set lower than that of the lower cladding layer 201. After the above steps, a thin-film heater 102 is formed on the surface of the upper cladding layer 207, as shown in FIG. 3(c).
[0034] According to the above comparative example, the optical characteristics deteriorate because light propagating through the core waveguide 203 seeps into the upper cladding layer 207 and is absorbed by the impurities added to the upper cladding layer 207. Also, according to the comparative example, the impurities added to the upper cladding layer 207 diffuse into the core waveguide 203 during the heat treatment process, changing the optical characteristics of the core waveguide 203. Furthermore, according to the comparative example, when the core waveguide 203 is processed by dry etching, the sidewall becomes rough, which increases scattering loss and therefore propagation loss.
[0035] Regarding the above points, in the first embodiment, since the core waveguide 203 is covered with the cap layer 205, the upper cladding layer 207 and the core waveguide 203 are spaced apart by the thickness of the cap layer 205. Therefore, by appropriately setting the thickness of the cap layer 205, light leaking from the core waveguide 203 remains within the cap layer 205, and it is possible to prevent the light from being absorbed by impurities and reducing the amount of propagated light. Furthermore, in the first embodiment, the impurities doped in the upper cladding layer 207 do not reach the core waveguide 203, and the optical characteristics of the core waveguide 203 are not impaired. Furthermore, in the first embodiment, the refractive index of the cap layer 205 is lower than that of the core waveguide 203 and higher than that of the upper cladding layer 207, so that scattering loss due to roughness of the sidewalls of the core waveguide 203 can be suppressed.
[0036] Second Embodiment Next, a second embodiment of the present disclosure will be described. FIG. 4 is a top view illustrating a planar light circuit according to the second embodiment. FIG. 5 is a cross-sectional view taken along the arrows V and V in FIG. 4. As shown in FIG. 4, an optical module 4 includes a blue LD 11, a green LD 13, and a red LD 15 as light sources, and a planar light circuit 40. The blue LD 11 has a wavelength of 450 nm, the green LD 13 has a wavelength of 520 nm, and the red LD 15 has a wavelength of 638 nm. The light source output is 30 mW. Light Lb output from the blue LD 11 is optically connected to an optical waveguide 401, light Lg output from the green LD 13 is optically connected to an optical waveguide 402, and light Lr output from the red LD 15 is optically connected to the optical waveguide 402. The blue LD 11, the green LD 13, and the red LD 15 may be butt-joint-connected to the end faces of the optical waveguides 401, 402, and 403, or may be connected via lenses or fibers.
[0037] As shown in FIG. 4, the optical waveguide 401 includes a proximal portion P N1 The optical waveguide 403 is adjacent to the optical waveguide 402 at the adjacent portion P N2 The blue light Lb passing through the optical waveguide 401 is adjacent to the optical waveguide 402 at the adjacent portion P N1 The red light Lr transits to the optical waveguide 402 at the adjacent portion P N2 As a result, the blue light Lb, the green light Lg, and the red light Lr are all output from the optical waveguide 402.
[0038] 5, the planar lightwave circuit 40 includes a Si substrate 2, a lower cladding layer 201, a core waveguide 203, a cap layer 205, and an upper cladding layer 207. The planar lightwave circuit 40 further differs from the first embodiment in that a light-absorbing film 411 is provided on the upper cladding layer 207. The lower cladding layer 201 is made of undoped SiO, the core waveguide 203 is made of SiO doped with Zr as an impurity, the cap layer 205 is made of undoped SiO, and the upper cladding layer 207 is made of SiO containing 5 mol % B and 1 mol % P.
[0039] The refractive indices of the above layers are as follows (when the overall output wavelength is 632 nm): Upper cladding layer 1.460 Cap layer 1.460 Core waveguide 1.480 Lower cladding layer 1.460
[0040] The planar lightwave circuit 40 of the second embodiment is manufactured by forming the lower cladding layer 201, the core waveguide 203, the cap layer 205, and the upper cladding layer 207 in the same manner as the planar lightwave circuit 10 of the first embodiment, and further by forming the light absorbing film 411 on the upper cladding layer 207. The light absorbing film 411 is formed by depositing, for example, a carbon film by vapor deposition.
[0041] (Modification) FIG. 6 is a cross-sectional view illustrating a modification of the manufacturing method of the planar lightwave circuit 40. In this manufacturing method, a lower cladding layer 201 is formed on a substrate 2, similar to the planar lightwave circuit 10 of the first embodiment. In this modification, over-etching is performed when etching a core layer (not shown) for forming a core waveguide 203. This process is performed to control the polarization dependence of the planar lightwave circuit. That is, silica-based planar lightwave circuits have polarization dependence due to stress birefringence. It is known that the polarization dependence can be improved by etching deep below the core layer (over-etching; OE) to eliminate stress birefringence (e.g., Japanese Patent No. 5244085).
[0042] It should be noted that the deeper the over-etching (the greater the amount of over-etching), the smaller the stress on the core waveguide 203 can be. However, as an optical circuit, there are cases where polarization dependency is better and cases where it is better not to have polarization dependency, and so over-etching is not an essential process. Furthermore, the stress on the core waveguide 203 can be controlled not only by over-etching but also by the thickness of the cap layer 605. In such cases, the thinner the thickness of the cap layer 605, the smaller the stress on the core waveguide 203 can be.
[0043] 6 , the amount of over-etching is set to approximately the thickness of the cap layer 605. The present inventors flattened the surface of the upper cladding layer 207 by heating at 1000° C., and then formed a carbon light-absorbing film 411 by vapor deposition. They confirmed that the light-absorbing film 411 did not peel off due to the unevenness of the surface of the upper cladding layer 207. The light-absorbing film 411 may be made of any material that has high absorbency for ultraviolet light and visible light, and the light-absorbing film is not limited to being formed by vapor deposition, but may also be formed by sputtering or the like.
[0044] [Example] Next, an example of the present disclosure will be described. In this example, a planar light circuit was fabricated using a Si substrate, a lower cladding layer of undoped SiO2, a core waveguide of SiO2 doped with Zr as an impurity, a cap layer of SiO2 containing 1 mol% F and 0.8 mol% P and having a thickness of 0.3 μm, an upper cladding layer of SiO2 doped with 5 mol% B and 1 mol% P, and a thin-film heater. The refractive index of each layer is as follows: (In this case): Upper cladding layer 1.460 Cap layer 1.465 Core waveguide 1.480 Lower cladding layer 1.460
[0045] Of the above impurities, P has the effect of increasing the refractive index. B and F have the effect of decreasing the refractive index, with F having a greater effect than B. The amounts of F and P used as impurities in the cap layer and B and P used as impurities in the upper cladding layer are determined so that the desired refractive index is achieved by balancing the refractive index decreasing effect and the refractive index increasing effect of the impurities. The above refractive indices are values at a wavelength of 632 nm, and a 30 mW red LD was used as the light source.
[0046] The fabrication of the planar lightwave circuit of this example was the same as that of the first embodiment, except for the cap layer. The cap layer was formed by depositing SiO2 containing 1 mol% F and 0.8 mol% P on the core waveguide using the PECVD (Plasma Enhanced Chemical Vapor Deposition) method. The refractive index of the cap layer was 1.465, and the thickness was 0.3 μm.
[0047] The planar lightwave circuit formed as described above was compared with a known planar lightwave circuit without a cap layer. The known planar lightwave circuit exhibited increased scattering loss due to roughened waveguide sidewalls, i.e., increased propagation loss, in addition to optical absorption due to impurities in the upper cladding layer and diffusion of impurities from the upper cladding layer to the core waveguide due to heat treatment. On the other hand, the planar lightwave circuit with the cap layer of this example suppressed optical absorption due to impurities in the upper cladding layer and diffusion of impurities from the upper cladding layer to the core waveguide due to heat treatment. Furthermore, the planar lightwave circuit of this example suppressed the increase in scattering loss due to roughened waveguide sidewalls. This was due to the fact that the refractive index of the cap layer was set lower than that of the core waveguide and higher than that of the upper cladding layer, which effectively flattened the irregularities on the waveguide wall surface, thereby reducing scattering loss.
[0048] It should be noted that the numerical values used in the above examples are merely examples and are not limited to these, and can be changed depending on the embodiment to the extent that they do not deviate from the principles of the present disclosure.
[0049] 1, 4 Optical module 2 Substrate 10, 40 Planar optical circuit 101, 401, 402, 403 Optical waveguide 102 Thin film heater 103 Wiring pattern 201 Lower cladding layer 203 Core waveguide 205, 605 Cap layer 207 Upper cladding layer 411 Light absorbing film
Claims
1. A planar optical circuit comprising: a substrate; a lower cladding layer formed on a main surface of the substrate; a core waveguide formed in the lower cladding layer; a cap layer covering the core waveguide; an upper cladding layer formed on the cap layer; and at least one of wiring, a thin film heater, and a light absorbing film formed on the upper cladding layer, wherein the upper cladding layer is made of SiO2 containing at least impurities, and the cap layer is made of SiO2 having a lower impurity concentration than the upper cladding layer.
2. The planar lightwave circuit of claim 1, wherein the doping concentration of the impurity in the cap layer is 25 mol % or less.
3. A planar lightwave circuit as claimed in claim 1, wherein the thickness of said cap layer is at least 10% of the smaller of the thickness or width of said core waveguide.
4. A planar lightwave circuit as claimed in claim 1, wherein the refractive index of said cap layer is less than or equal to the refractive index of said core waveguide and greater than or equal to the refractive index of said upper cladding layer.
5. The planar lightwave circuit according to claim 1, wherein the concentration of impurities in said upper cladding layer is 4 mol % or more.
6. A method for manufacturing a planar optical circuit, comprising the steps of: forming a lower cladding layer on a main surface of a substrate; forming a core waveguide in the lower cladding layer; forming a cap layer covering the core waveguide; forming an upper cladding layer on the cap layer; subjecting the upper cladding layer to a heat treatment at 1400°C or less; and forming at least one of wiring, a thin film heater, and a light absorbing film on the upper cladding layer, wherein the upper cladding layer is made of SiO2 containing at least impurities, and the cap layer is made of SiO2 having a lower impurity concentration than the upper cladding layer.
7. An optical module comprising the planar light circuit according to any one of claims 1 to 5 and a light source that outputs visible light or ultraviolet light.
8. The optical module according to claim 7, wherein the light source has an optical output of 1 mW or more of visible light or ultraviolet light, and the visible light is at least one of blue light, green light, and red light.
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