Semiconductor light-emitting device

Abstract

Provided is a semiconductor light-emitting device that is suitable for a reduction in size, that enables dense arrangement in a grid or matrix shape, and that has high protective performance against an overcurrent. The present invention comprises: a support substrate in which at least one pair of placement electrodes constituted by a positive electrode and a negative electrode is disposed on a first main surface of a planar base material constituted by a first conductivity type semiconductor and at least one pair of mounting electrodes constituted by a positive electrode and a negative electrode is disposed on a second main surface that is opposite to the first main surface of the base material; a semiconductor light-emitting element in which a p-electrode and an n-electrode are placed on and electrically connected to the pair of placement electrodes so as to correspond to the pair of placement electrodes; a pair of conduction vias which electrically connect the pair of mounting electrodes to the pair of placement electrodes, respectively; and second conductivity type diffusion regions which are disposed on the inner wall surfaces of the base material abutting on the conduction vias and which are of a conductivity type opposite to the first conductivity type.

Description

Semiconductor light-emitting device

[0001] The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device including a semiconductor light emitting element and a protection element.

[0002] In recent years, semiconductor light-emitting elements such as light-emitting diodes (LEDs) have been arranged in multiple devices to achieve higher output and light distribution control. Furthermore, protective elements have been provided in light-emitting devices to improve their resistance to electrostatic discharge (ESD).

[0003] For example, in the field of automobile headlights, a variable light distribution headlamp (ADB: Adaptive Driving Beam) that arranges multiple semiconductor light emitting elements and controls light distribution is known. Also known are high-power LED packages for lighting and LED packages for information and communication devices in which LEDs are densely arranged.

[0004] Furthermore, Patent Document 1 discloses an optoelectronic semiconductor device in which an ESD protection element is arranged between a carrier and a semiconductor body.

[0005] Patent Document 2 discloses a light-emitting device including a light-emitting element and a mounting substrate having a semiconductor electrostatic discharge protection element section that is provided on the surface opposite to the surface on which the light-emitting element is mounted and is connected to the light-emitting element.

[0006] Patent Document 3 discloses a light-emitting element package including a semiconductor substrate having first and second conductive vias, a diode formed by doping impurities on a second surface of the semiconductor substrate and having a Zener breakdown voltage in both directions, and first and second external electrodes formed on the second surface so as to connect the first and second conductive vias to both ends of a bidirectional Zener diode region, respectively.

[0007] Special table 2018-519669 publication WO2013 / 187318 publication US 2013 / 0020298A1 publication

[0008] The present invention has been made in consideration of the above points, and aims to provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, and has high protection performance against overcurrent.

[0009] A semiconductor light emitting device according to one embodiment of the present invention comprises: a support substrate having at least one pair of mounting electrodes each consisting of an anode and a cathode provided on a first main surface of a flat substrate made of a semiconductor of a first conductivity type, and at least one pair of mounting electrodes each consisting of an anode and a cathode provided on a second main surface of the substrate opposite to the first main surface; a semiconductor light emitting element mounted on the pair of mounting electrodes with a p-electrode and an n-electrode electrically connected to each other corresponding to the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of mounting electrodes; and a diffusion region of a second conductivity type opposite to the first conductivity type provided on an inner wall surface of the substrate in contact with the conductive vias.

[0010] 1 is a diagram schematically showing a top surface of a semiconductor light emitting device according to a first embodiment; a diagram schematically showing a side surface of the semiconductor light emitting device according to the first embodiment; a diagram schematically showing a back surface of the semiconductor light emitting device according to the first embodiment; a cross-sectional view showing a cross section taken along line IV-IV in FIG. 1; a cross-sectional view showing a cross section taken along line V-V in FIG. 1; a diagram corresponding to the cross section of the semiconductor light emitting device shown in FIG. 4, showing bonding of a light emitting element to a supporting substrate; an equivalent circuit diagram of a semiconductor light emitting device; a diagram schematically showing VI characteristics of a light emitting element and a pair of Zener diodes ZD1 and ZD2 formed on a supporting substrate; a cross-sectional view showing step S0 of a manufacturing method; a cross-sectional view showing step S1 of the manufacturing method; a cross-sectional view showing step S2 of the manufacturing method; a cross-sectional view showing step S3 of the manufacturing method; a cross-sectional view showing step S4 of the manufacturing method; a cross-sectional view showing step S5 of the manufacturing method; a cross-sectional view showing step S6 of the manufacturing method; a cross-sectional view showing step S7 of the manufacturing method; a cross-sectional view showing step S8 of the manufacturing method; and a cross-sectional view showing step S9 of the manufacturing method. 15 is a cross-sectional view showing step S10 of the manufacturing method. A cross-sectional view schematically showing a semiconductor light-emitting device which is a first modification of the first embodiment. A cross-sectional view schematically showing a semiconductor light-emitting device which is a second modification of the first embodiment. A diagram showing the top surface of a semiconductor light-emitting device of a second embodiment. A cross-sectional view showing a cross section taken along line XV-XV shown in FIG. 14. A back view of a semiconductor light-emitting device. A diagram showing a wiring pattern of a circuit board. A diagram showing an equivalent circuit when a semiconductor light-emitting device is mounted on a circuit board. A cross-sectional view schematically showing a semiconductor light-emitting device which is a first modification of the second embodiment. A cross-sectional view showing the wiring pattern of a circuit board on which the semiconductor light-emitting device of this modification is mounted.

[0011] In the following, preferred embodiments of the present invention will be described, but these may be modified and combined as appropriate. In the following description and accompanying drawings, substantially the same or equivalent parts are designated by the same reference numerals.

[0012] 1, 2, and 3 are schematic diagrams showing the top, side, and back surfaces, respectively, of a semiconductor light-emitting device 10 according to a first embodiment of the present invention. Also, FIGS. 4 and 5 are cross-sectional views taken along lines IV-IV and V-V, respectively, shown in FIG. 1.

[0013] As shown in FIGS. 2, 4 and 5, the semiconductor light emitting device 10 has a structure in which a light emitting element 20, which is an LED, is bonded to a support substrate 30.

[0014] 6 corresponds to the cross section of the semiconductor light emitting device 10 shown in Fig. 4 and is a diagram showing the bonding of the light emitting element 20 to the support substrate 30. The respective configurations of the light emitting element 20 and the support substrate 30, and the bonding between the light emitting element 20 and the support substrate 30 will be described in detail below with reference to Fig. 6.

[0015] 6, the light-emitting element 20 has an element substrate 11 and a light-emitting semiconductor structure layer SL formed on the element substrate 11. The light-emitting semiconductor structure layer SL has an n-type semiconductor layer 21, a light-emitting layer 22 formed on the n-type semiconductor layer 21, and a p-type semiconductor layer 23 formed on the light-emitting layer 22.

[0016] In this embodiment, the light emitting element 20 is a so-called flip chip, and is provided on one side of the element with a p-element electrode 26 and an n-element electrode 27. Details of the element structure will be described below.

[0017] The element substrate 11 is a sapphire substrate, which is transparent to the light emitted from the light emitting layer 22. A light emitting semiconductor structure layer SL is formed by crystal growth on the element substrate 11. The light emitting semiconductor structure layer SL is, for example, a gallium nitride (GaN)-based LED structure layer that emits blue light, but the crystal system is not limited to this.

[0018] The n-type semiconductor layer 21 is, for example, a GaN or AlGaN layer doped with silicon (Si). The light-emitting layer 22 has, for example, a single quantum well (SQW) or multiple quantum well (MQW) structure. Alternatively, the light-emitting layer 22 may have a so-called bulk structure. The p-type semiconductor layer 23 is, for example, a GaN or AlGaN layer doped with magnesium (Mg).

[0019] Each of the n-type semiconductor layer 21 and the p-type semiconductor layer 23 is composed of at least one semiconductor layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may be provided with various semiconductor layers, such as a carrier barrier layer such as an electron blocking layer (EBL), a current diffusion layer, or a contact layer. The n-type semiconductor layer 21 and the p-type semiconductor layer 23 may also be provided with an undoped layer (or i-layer).

[0020] 1 and 6, a p-electrode 24 (p-ohmic electrode) which is an element electrode is provided on the light-emitting functional layer 20. Furthermore, as shown in Fig. 1, the light-emitting semiconductor structure layer SL has recesses 23H (three recesses in this embodiment) which penetrate the p-type semiconductor layer 23 and the light-emitting layer 22 and expose the n-type semiconductor layer 21. An n-electrode 25 (n-ohmic electrode) is formed on the exposed surface of the n-type semiconductor layer 21.

[0021] The p-electrode 24 is formed as a light-reflective electrode. The p-electrode 24 is made of, for example, an indium tin oxide (ITO) ohmic electrode that is a translucent conductive film, a nickel (Ni) / silver (Ag) reflective film, and an ITO / Ni / Ag / Pt / Ti / Au layer in which platinum (Pt), titanium (Ti), and gold (Au) are formed in this order on the p-type semiconductor layer 23. Note that, although it is preferable that the p-electrode 24 be provided with a reflective film with high reflectivity such as an Ag film, the reflective film need not be provided.

[0022] 4, the reflected light Lr emitted from the light-emitting layer 22 and reflected by the p-electrode 24 is emitted from the surface 10S of the element substrate 11 together with the direct light Ld from the light-emitting layer 22. In other words, the surface 10S of the element substrate 11 is the light-emitting surface of the semiconductor light-emitting device 10. Note that it is preferable that the surface 10S of the element substrate 11 is roughened in order to improve the light extraction efficiency.

[0023] The n-electrode 25 is made of, for example, a Ti / Al layer in which titanium (Ti) and aluminum (Al) are formed in this order on the n-type semiconductor layer 21 .

[0024] The materials and layer structures of the p-electrode 24 and the n-electrode 25 are not limited to those described above, and may be appropriately selected in consideration of various characteristics such as ohmic characteristics, light extraction efficiency by reflection, and device reliability (lifespan).

[0025] An insulating film (SiO ２ 4 and 5, the element protective film 28A is also provided on the inner wall surface of the light emitting semiconductor structure layer SL exposed in the recess 23H.

[0026] Also provided are a p-electrode (first element electrode, which is an electrode of the light-emitting element 20) 26 electrically connected to the p-electrode 24, and an n-electrode (second element electrode, which is an electrode of the light-emitting element 20) 27 electrically connected to the n-electrode 25. An element protective film 28B made of an insulating film (e.g., SiO2) is provided on the side surfaces and outer edges of the top surfaces of the p-electrode 26 and the n-electrode 27.

[0027] 1, a plurality of n-electrodes 25 (three in this embodiment) are provided along the central axis CX of the light-emitting element 20. The plurality of n-electrodes 25 are preferably provided at positions symmetrical with respect to the center C of the light-emitting element 20. Although the example shows a case where a plurality of n-electrodes 25 are provided, it is sufficient that at least one n-electrode 25 is provided. Furthermore, the n-electrodes 25 may be provided symmetrically in two rows (six electrodes) on either side of the line segment CX.

[0028] The p-electrode 26 and the n-electrode 27 are formed as rectangular regions along the central axis CX, sandwiching the region in which the plurality of n-electrodes 25 are formed.

[0029] 6, the n-electrode 27 is formed on an element protective film 28A (insulating film) and is insulated from the p-electrode 24. The n-electrode 27 has a jumper wiring portion 27T electrically connected to the n-electrode 25, and is electrically connected to the n-electrode 25 via the jumper wiring portion 27T.

[0030] The p-element electrode 26 and the n-element electrode 27 are each made of, for example, a Ti / Al / Ni / Pt / Ti / Au layer, which is formed by stacking a reflective layer made of Ti and Al, a barrier layer made of nickel (Ni) and platinum (Pt) provided on the reflective layer, and a pad layer made of Ti / Au provided on the barrier layer.

[0031] 6 again, the support substrate 30 has a base material 31, which has a first main surface MS1 and a second main surface MS2 opposite to the first main surface MS1. A p-mounted electrode 36A and an n-mounted electrode 36B (a pair of mounted electrodes) are provided on the first main surface MS1 (top surface) side of the base material 31, and a p-mounted electrode 37A and an n-mounted electrode 37B (a pair of mounted electrodes) are provided on the second main surface MS2 (back surface) side of the base material 31. The support substrate 30 will be described in more detail below.

[0032] The substrate 31 is a conductive n-type silicon substrate made of silicon (Si) doped with phosphorus (P), arsenic (As), etc. Note that a p-type semiconductor substrate may also be used for the substrate 31.

[0033] Metal plating layers 34P and 35P that are electrically isolated from each other are formed on the upper surface side (i.e., the side bonded to the light emitting element 20) of the base material 31. A p-mounted electrode 36A and an n-mounted electrode 36B that are electrically connected to the metal plating layers 34P and 35P, respectively, are formed on the metal plating layers 34P and 35P.

[0034] The metal plating layers 34P and 35P, and the p-mounted electrode 36A and the n-mounted electrode 36B are insulated from the substrate 31 by an insulating film 32A (first insulating film), and the p-mounted electrode 36A and the n-mounted electrode 36B have their side surfaces and outer edges protected by a protective film 38A (second insulating film), which is also an insulating film.

[0035] Furthermore, metal plating layers 34Q and 35Q that are electrically isolated from each other are formed on the back surface side of the base material 31, i.e., on the mounting surface side of the support substrate 30 that is to be mounted on a circuit board (not shown). A p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) that are electrically connected to the metal plating layers 34Q and 35Q, respectively, are formed on the metal plating layers 34Q and 35Q.

[0036] The metal plating layers 34Q and 35Q, and the p-mounted electrode 37A and the n-mounted electrode 37B are insulated from the substrate 31 by an insulating film 32B (third insulating film), and the p-mounted electrode 36A and the n-mounted electrode 36B have their side surfaces and outer edges of the top surface protected by a protective film 38B (fourth insulating film), which is also an insulating film.

[0037] The base material 31 is provided with conductive vias 34 that fill the through holes of the base material 31 and electrically connect the metal plating layers 34P and 34Q. The base material 31 is also provided with conductive vias 35 that fill the through holes of the base material 31 and electrically connect the metal plating layers 35P and 35Q.

[0038] The metal plating layers 34P, 35P, 34Q, and 35Q and the conductive vias 34 and 35 are made of a nickel / gold (Ni / Au) electroless plating layer and a copper (Cu) electroplating layer formed on the electroless plating layer. The p-mounted electrode 36A, the n-mounted electrode 36B, the p-mounted electrode 37A, and the n-mounted electrode 37B are provided with a nickel / gold (Ni / Au) electroplating layer so as to cover the metal plating layers 34P, 35P, 34Q, and 35Q.

[0039] 3, a p-mounting electrode 37A (anode) and an n-mounting electrode 37B (cathode) are exposed on the back surface of the support substrate 30. For convenience during mounting, a cathode mark 39 is also formed.

[0040] (3) Structure of the Protection Element In this embodiment, p-doped regions 33A and 33B are provided on the inner wall surfaces of the through holes in which the conductive vias 34 and 35 are provided. The p-doped regions 33A and 33B are regions that have been made p-type by diffusing p-type impurities such as boron (B) or aluminum (Al), and pn junctions formed between the p-doped regions 33A and 33B and the substrate 31 (n-type silicon) function as Zener diodes ZD1 and ZD2, respectively.

[0041] When a p-type semiconductor substrate is used as the base material 31, the Zener diodes ZD1 and ZD2 can be formed by doping n-type impurities to form n-doped regions.

[0042] Fig. 7 is an equivalent circuit diagram of the semiconductor light-emitting device 10. Fig. 8 is a diagram schematically showing the voltage-current characteristics (VI characteristics) of the light-emitting element 20 and a pair of Zener diodes ZD1 and ZD2 (hereinafter also referred to as double Zener diodes DZD) formed on the support substrate 30.

[0043] As shown in FIG. 7, the cathodes (K) of two Zener diodes ZD1 and ZD2 are connected in series (i.e., connected in opposite directions), and a double Zener diode DZD, both of whose terminals are anodes (A), is connected in parallel to the light-emitting element 20 to form a circuit.

[0044] 8, the VI characteristics of the two Zener diodes ZD1 and ZD2 are combined to form a VI characteristic (ZD1+ZD2) that is a composite of the VI characteristics of both. That is, since one Zener diode ZD1 is connected in the reverse direction with respect to the forward current of one Zener diode ZD2 (the region where V<0 in the figure, shown by the dashed-dotted line), it exhibits a protective function against overcurrents such as surges and ESD in both positive and negative directions.

[0045] Although the case where two Zener diodes ZD1 and ZD2 are formed has been described, at least one Zener diode may be formed by providing a diffusion region on the inner wall surface of at least one of the conductive vias 34 and 35.

[0046] Furthermore, it is preferable that the diffusion regions are formed on the entire inner wall surfaces of the through holes V1 and V2 (see FIGS. 9A to 9E) in which the conductive vias 34 and 35 are provided, because this can improve the Zener characteristics.

[0047] (3) Bonding of Light Emitting Element and Supporting Substrate The positional relationship when bonding the light emitting element 20 and the supporting substrate 30 will be described below.

[0048] 6, 4, and 5, the p-electrode 26 of the light-emitting element 20 is bonded to the p-electrode 36A of the support substrate 30 by a conductive bonding layer 41A. The n-electrode 27 of the light-emitting element 20 is bonded to the n-electrode 36B of the support substrate 30 by a conductive bonding layer 41B.

[0049] Therefore, by this bonding, the p-mounting electrode 36A is electrically connected to the p-electrode 24 of the light-emitting element 20 via the p-electrode 26, and the n-mounting electrode 36B is electrically connected to the n-electrode 27. Furthermore, as shown in FIGS. 6 and 4 , the n-mounting electrode 36B is electrically connected to the multiple n-electrodes 25 of the light-emitting element 20 via the interconnection portion 27T of the n-electrode 27. That is, the p-electrode 24 and the n-electrode 25 of the light-emitting element 20 are electrically connected to each other corresponding to a pair of mounting electrodes (the p-mounting electrode 36A and the n-mounting electrode 36B). Furthermore, as shown in FIGS. 4 and 5 , by bonding the light-emitting element 20 to the supporting substrate 30, the insulating element protective film 28B and the insulating protective film 38A are in contact with each other over their entire peripheries, thereby covering and protecting the junctions, which are the electrical connection portions, i.e., the p-electrode 26 and the n-electrode 27, the p-mounting electrode 36A and the n-mounting electrode 36B, and the bonding layers 41A and 41B.

[0050] 2. Manufacturing Method of Semiconductor Light-Emitting Device (1) Manufacturing Method of Light-Emitting Element The light-emitting element 20 can be formed by, for example, metal-organic chemical vapor deposition (MOCVD). Specifically, the light-emitting semiconductor structure layer SL can be formed by growing crystals on a transparent substrate such as a sapphire substrate by MOCVD. Note that the crystal growth method is not limited to MOCVD, and molecular beam epitaxy (MBE) and other methods can also be used.

[0051] The light emitting element 20 can be formed by forming electrodes and insulating films by photolithography on the semiconductor structure layer on which crystal growth has been performed.

[0052] (2) Method for Manufacturing Support Substrate The method for manufacturing the support substrate 30 will be described in detail below with reference to the drawings. Figures 9A to 9E are cross-sectional views showing steps S0 to S4 of the manufacturing method, Figures 10A to 10D are cross-sectional views showing steps S5 to S8, and Figures 11A to 11B are cross-sectional views showing steps S9 to S10. Note that, for ease of explanation and understanding, steps S0 to S8 will be described by illustrating a portion of the support substrate wafer corresponding to one semiconductor light-emitting device 10.

[0053] (S0) Preparation of Substrate A conductive n-type silicon substrate 31 made of silicon (Si) doped with phosphorus (P), arsenic (As), or the like is prepared.

[0054] (S1) Formation of insulating film SiO ２ The insulating film IF is formed by using a method such as thermal oxidation, TEOS (Tetra Ethoxy Silane)-CVD, sputtering, or ALD (Atomic Layer Deposition).

[0055] (S2) Through-hole Forming Step Through-holes V1 and V2 are formed by a reactive ion etching (RIE) process or mechanical drilling using a microdrill or the like, penetrating the base material 31 and the insulating film IF on the upper and lower surfaces of the base material 31. Furthermore, by forming the through-holes V1 and V2, insulating films 32A and 32B (third insulating films) are formed on the upper and lower surfaces of the base material 31, respectively.

[0056] (S3) Impurity Diffusion For example, p-type impurities such as boron (B) or aluminum (Al) are diffused from the inner walls of the through holes V1 and V2 into the substrate 31 by thermal diffusion, thereby converting the inner wall portions to p-type. That is, p-diffusion regions (p-Si) are formed on the inner wall portions of the through holes V1 and V2 of the n-type silicon substrate 31, and Zener diodes ZD1 and ZD2 are formed, respectively.

[0057] (S4) Formation of Conductive Layer Nickel (Ni) and gold (Au) are electrolessly plated to form an electroless plated layer PL1. Subsequently, copper (Cu) is electrolytically plated to form an electrolytic plated layer PL2. This forms the plated layer PL (PL1+PL2). The insides of the through holes V1 and V2 are filled with Cu, and the plated layers PL on the upper and lower surfaces are electrically connected by the conductive vias 34 and 35.

[0058] (S5) Electrode Patterning and Sintering A mask is formed by photolithography, and then Cu, Au, and Ni other than those in the electrode regions are removed by wet etching to form metal plating layers 34P and 35P on the upper insulating film 32A and metal plating layers 34Q and 35Q on the lower insulating film 32B.

[0059] Subsequently, ohmic contact is formed between the Ni / Au on the wall surfaces of the conductive vias 34 and 35 and the p-Si region by thermal sintering.

[0060] (S6) Formation of electrode surface layer By electrolytic plating, a nickel Ni / Au layer is formed on the surface of the metal plating layers 34P and 35P, which are copper electrodes, and a p-mounted electrode 36A and an n-mounted electrode 36B are formed on the upper surface side, respectively, and a p-mounted electrode 37A and an n-mounted electrode 37B are formed on the back surface side, respectively.

[0061] (S7) Formation of insulating protective film Using a method such as TEOS-CVD, sputtering, or ALD, a protective film 38A (second insulating film) made of SiO2 is formed on the insulating film 32A (first insulating film), and a protective film 38B (fourth insulating film) made of SiO2 is formed on the insulating film 32B (third insulating film).

[0062] (S8) Electrode Formation A mask is formed by photolithography, and then the protective films 38A, 38B on part of the upper surfaces of the mounting electrodes 36A and n-mounting electrodes 36B and on part of the lower surfaces of the p-mounting electrodes 37A and n-mounting electrodes 37B are removed by etching using buffered hydrofluoric acid (hydrofluoric acid buffer solution), thereby exposing the p-mounting electrodes 36A and n-mounting electrodes 36B and the p-mounting electrodes 37A and n-mounting electrodes 37B.

[0063] (S9) Mounting of Light Emitting Element The light emitting element 20 is mounted on the support substrate 30 via, for example, bonding members 41A and 41 made of a gold-tin alloy (for example, Au-20 wt % Sn). Mounting can be performed by thermocompression bonding or reflow.

[0064] (S10) Singulation Finally, the support substrate wafer is diced using a dicing blade DB to cut into individual semiconductor light emitting devices 10. The dicing direction may be from the element surface side on which the light emitting elements 20 are mounted, or from the mounting electrode surface side on which the p mounting electrode 37A and n mounting electrode 37B are provided. In particular, dicing from the mounting electrode surface side allows the light emitting elements 20 to be mounted at intervals narrower than the blade width of the dicing blade DB. With the above steps, the semiconductor light emitting device 10 is completed.

[0065] Note that by making the support substrate 30 larger than the light emitting elements 20, it is possible to form street portions that can be diced. Also, the light emitting elements 20 can be mounted on the support substrate 30 before being singulated. Note that if the support substrate 30 is to be equal to or smaller than the light emitting elements 20, it is also possible to singulate the support substrate 30 first, and then mount the light emitting elements 20 and the support substrate 30 individually.

[0066] Here, "equivalent size" refers to the smaller of either the amount of protrusion PR (see FIG. 1) of the support substrate 30 relative to the light emitting element 20 when viewed from above (i.e., in a direction perpendicular to the light emitting element and the support substrate) or the amount of protrusion (-PR) of the light emitting element 20 relative to the support substrate 30 being 10% or less or 10 μm or less. It is more preferable that the amount of protrusion be 5% or less or 5 μm or less, whichever is smaller.

[0067] (3) Protection Circuit and Device Size As described above in detail, the semiconductor light-emitting device 10 of this embodiment can provide a semiconductor light-emitting device 10 that has a support substrate 30 that is the same size as the light-emitting element 20 when viewed from above, and has a protection circuit consisting of two Zener diodes connected in series and connected in parallel to the light-emitting element 20.

[0068] Therefore, it is possible to provide the semiconductor light emitting device 10 with a high protection function against overcurrents such as surges in both the forward and reverse directions and ESD for the light emitting element 20. Furthermore, since the two Zener diodes ZD1, ZD2 are formed and connected to the inner wall surfaces of the base material 31 that contact the wall surfaces of the conductive vias 34 and 35, it is possible to make the support substrate 30 the same size as the light emitting element 20 or smaller, and the semiconductor light emitting devices 10 can be arranged densely, for example, in a matrix.

[0069] Furthermore, by increasing the size (i.e., diameter and length) of the conductive vias 34 and 35, the performance of the two Zener diodes can be further improved, and a semiconductor light-emitting device 10 with high protection function can be provided.

[0070] (4) Modifications 1 and 2 Fig. 12 is a diagram schematically illustrating a semiconductor light emitting device 50 according to Modification 1 of the first embodiment of the present invention. Fig. 13 is a diagram schematically illustrating a semiconductor light emitting device 50 according to Modification 2 of the first embodiment.

[0071] The semiconductor light emitting device 50 of this modification includes the semiconductor light emitting device 10 of the first embodiment and a device protective film 51A that covers the entire outer surface of the light emitting element 20. The device protective film 51A can be made of, for example, SiO or AlO. Note that AlO is preferred in terms of weather resistance.

[0072] Furthermore, by providing a device protection film 51B that covers the exposed surface of the support substrate 30, defects such as short circuits can be prevented.

[0073] That is, except for the p-mounting electrode 37A and the n-mounting electrode 37B, the element substrate 11, the light emitting semiconductor structure layer SL, the support substrate 30, the insulating film 32A, the protective film 38A, the insulating film 32B, and the protective film 38B are covered with the device protective films 51A, 51B. Therefore, there is no metal surface on the surfaces on which the device protective films 51A, 51B are formed, and the device protective films 51A, 51B have high adhesion, resulting in high durability and airtightness, and improved reliability.

[0074] 13 is a cross-sectional view showing a semiconductor light-emitting device 55 of Modification 2, and as shown in the figure, the device protective film 51A does not have to be provided on the light emitting surface 10S. In this case, the device protective films 51A and 51B can be ceramic coatings with high light reflectivity (for example, reflectivity of 80% or more), such as alumina or alumina-zirconia.

[0075] The device protection films 51A and 51B can be formed by CVD or sputtering, but are preferably formed by ALD (atomic layer deposition). The outer surface of the semiconductor light-emitting device 10 is highly irregular, but ALD can be used to cover even the finely irregular surfaces. Furthermore, a light-reflective ceramic coating can be formed by thermal spraying.

[0076] For example, the completed semiconductor light-emitting device 10 can be formed by adhering the p-mounted electrode 37A and the n-mounted electrode 37B to a heat-resistant protective sheet so as to protect them, and then depositing SiO and / or AlO on the surface by the ALD method.

[0077] Alternatively, a dielectric multilayer film (visible light reflective film) can be used for the device protective films 51A and 51B shown in Fig. 13. For example, if the side and bottom surfaces of the light emitting element 20 excluding the light emitting surface 10S are covered with a dielectric multilayer film, the end surfaces of the support substrate 30 can be protected and light emitted from the side surfaces of the light emitting element 20 can be suppressed, allowing strong light to be emitted from the light emitting surface 10S.

[0078] Such a dielectric multilayer film can be formed by ALD (atomic layer deposition). For example, the completed semiconductor light emitting device 10 is adhered to a heat-resistant protective sheet so as to protect the p-mounted electrode 37A and the n-mounted electrode 37B, and a protective sheet is also adhered to the light emitting surface 10S. The protective sheet for the light emitting surface 10S has holes that allow the supply and exhaust of material gases. Next, SiO ２ , Al ２ O ３ By depositing a plurality of TiO2 films or the like, a dielectric multilayer film that reflects light in the visible light range can be formed.

[0079] [Second Embodiment] 1. Semiconductor Light-Emitting Device Fig. 14 is a diagram showing the top surface of a semiconductor light-emitting device 60 according to a second embodiment of the present invention, and Fig. 15 is a cross-sectional view showing a cross section taken along line XV-XV shown in Fig. 14. Figs. 16 and 17 are a back view of the semiconductor light-emitting device 60 and a wiring pattern of a circuit board 100, respectively.

[0080] 14 and 15 , in a semiconductor light-emitting device 60, three light-emitting elements 20 of the first embodiment are mounted on a common support substrate 61. Three double Zener diodes DZD corresponding to the three light-emitting elements 20, respectively, are provided on the common support substrate 61.

[0081] In this embodiment, the three light emitting elements have the same configuration, but for ease of explanation, they will be referred to as a first light emitting element 20A, a second light emitting element 20B, and a third light emitting element 20C, respectively.

[0082] As shown in Figures 16 and 17, the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C are mounted such that the p-mounted electrode 37A and the n-mounted electrode 37B of each of the first light-emitting element 20A to the third light-emitting element 20C straddle the anode 101, the circuit wirings 102 and 103, and the cathode 104 of the circuit board 100, and are connected in series.

[0083] 18 shows an equivalent circuit when the semiconductor light emitting device 60 is mounted on the circuit board 100. R12 and R23 are the resistance between the midpoints of the double Zener diodes DZD connected to the first and second light emitting elements 20A and 20B (i.e., the connection point of the two Zener diodes ZD1 and ZD2), respectively, and the resistance between the midpoints of the double Zener diodes DZD of the second and third light emitting elements 20B and 20C.

[0084] As shown in Figure 18, if the rated current value Vf of each of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C is, for example, 3.5 V, the terminal voltage VT between the anode 101 and the cathode 104 is VT = 3 x 3.5 V = 10.5 V.

[0085] Therefore, for example, if the Zener voltage of one Zener diode DZ is 24 V, which is higher than the driving voltage when the light-emitting elements are connected in series, a semiconductor light-emitting device 60 can be provided that has high protection function against overcurrents in both positive and negative directions even when the first light-emitting element 20A to the third light-emitting element 20C are driven.

[0086] Furthermore, according to the semiconductor light-emitting device 60 of this embodiment, by mounting multiple light-emitting elements 20 on a circuit board having a wiring pattern that can drive multiple light-emitting elements 20 individually, it is possible to provide high protection functions and cause each light-emitting element 20 to emit light individually.

[0087] Furthermore, since the double Zener diode DZD is provided below the light emitting element 20 in an area smaller than the footprint of the light emitting element 20, it is possible to arrange a plurality of light emitting elements 20 adjacent to each other. For example, it is possible to arrange a plurality of light emitting elements 20 in a matrix. Furthermore, it is possible to configure the semiconductor light emitting device 60 by connecting a plurality of light emitting elements 20 in series or in parallel, or by combining the series and parallel connections in various ways.

[0088] In the present embodiment, the three light-emitting elements 20 have the same configuration, but they may have different configurations. For example, a plurality of light-emitting elements 20 having different emission wavelengths, sizes, etc. may be mounted on a common support substrate 61.

[0089] 2. Modifications Fig. 19 is a cross-sectional view schematically showing a semiconductor light-emitting device 70 that is a modification of the second embodiment of the present invention.

[0090] In this modification, a first phosphor plate 71, a second phosphor plate 72, and a third phosphor plate 73 are respectively attached to the light emission surfaces (upper surfaces) of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C by a light-transmitting adhesive 75. The first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C may have the same configuration or may have different configurations.

[0091] The first phosphor plate 71 and the second phosphor plate 72 are, for example, yellow phosphor plates made of alumina with added YAG:Ce, and the third phosphor plate 7 is, for example, an orange phosphor plate made of glass with added α-sialon.

[0092] Each side surface of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C is covered with a light-shielding resin 76. The spaces between the light-emitting elements are also filled with the light-shielding resin 76 to prevent light from leaking out from the light-emitting elements. The light-shielding resin 76 is made of, for example, a silicone resin containing titanium oxide particles.

[0093] The same or different light converting members (phosphor plates) may be provided on the first light emitting element 20A, the second light emitting element 20B, and the third light emitting element 20C. Alternatively, a translucent optical member may be provided instead of the light converting member.

[0094] Fig. 20 shows a wiring pattern of a circuit board 110 on which the semiconductor light-emitting device 70 of this modification is mounted. As shown in Fig. 19 and Fig. 20, the p-mounting electrode 37A and the n-mounting electrode 37B of the first light-emitting element 20A are mounted on circuit wiring 111 and 112 of the circuit board 110, respectively, and the p-mounting electrode 37A and the n-mounting electrode 37B of the second light-emitting element 20B are mounted on circuit wiring 112 and 113, so that the first light-emitting element 20A and the second light-emitting element 20B are connected in series.

[0095] The p-mounting electrode 37A and the n-mounting electrode 37B of the third light-emitting element 20C are mounted on the circuit wirings 114 and 115. Therefore, the first light-emitting element 20A and the second light-emitting element 20B, which are connected in series, and the third light-emitting element 20C can be driven independently.

[0096] As shown in FIG. 20 , when the semiconductor light-emitting device 70 is mounted on the circuit board 110, if the rated current value Vf of each of the first light-emitting element 20A, the second light-emitting element 20B, and the third light-emitting element 20C is, for example, 3.5 V, the inter-terminal voltage VT of the circuit wiring 111 and the circuit wiring 113 is VT = 2 × 3.5 V = 7 V, and the inter-terminal voltage VT of the circuit wiring 114 and the circuit wiring 115 is VT = 1 × 3.5 V = 3.5 V.

[0097] It is also possible to drive each light-emitting element independently by separating the circuit wiring 112 of the circuit board 110. That is, depending on the connection form of these circuit wirings 111 to 115, it is possible to arbitrarily select between series driving and independent driving.

[0098] Since the first light emitting element 20A to the third light emitting element 20C are each provided with a double Zener diode DZD, it is possible to provide the semiconductor light emitting device 70 with high protection against overcurrents in both positive and negative directions.

[0099] As described above in detail, the semiconductor light-emitting device of the present invention can provide a semiconductor light-emitting device that is suitable for miniaturization, can be densely arranged in a grid or matrix, and has high protection performance against overcurrents in both positive and negative directions.

[0100] 10, 50, 55, 60, 70: Semiconductor light-emitting device 20: Light-emitting element 21: n-type semiconductor layer 22: Light-emitting layer 23: p-type semiconductor layer 24: p-electrode (p-ohmic electrode) 25: n-electrode (n-ohmic electrode) 26: p-device electrode (device anode) 27: n-device electrode (device cathode) 28B: Device protective film 30: Support substrate 31: Base material 36A: p-mounted electrode 36B: n-mounted electrode 38A: Insulating protective film 41A, 41B: Bonding layer 37A: p-mounted electrode 37B: n-mounted electrode 34, 35: Conductive via DZD: Double Zener diode ZD1, ZD2: Zener diodes 71, 72, 73: Light conversion member 76: Light-shielding resin

Claims

1. A semiconductor light emitting device comprising: a supporting substrate having at least a pair of mounting electrodes consisting of an anode and a cathode provided on a first main surface of a flat substrate made of a semiconductor of a first conductivity type, and at least a pair of mounting electrodes consisting of an anode and a cathode provided on a second main surface of the substrate opposing the first main surface; a semiconductor light emitting element mounted on the pair of mounting electrodes with a p-electrode and an n-electrode electrically connected to each other corresponding to the pair of mounting electrodes; a pair of conductive vias electrically connecting each of the pair of mounting electrodes to each of the pair of mounting electrodes; and a diffusion region of a second conductivity type opposite to the first conductivity type provided on an inner wall surface of the substrate contacting the conductive vias.

2. The semiconductor light emitting device according to claim 1, wherein the diffusion region of the second conductivity type is provided in both of the pair of conductive vias.

3. The semiconductor light emitting device according to claim 1, wherein the diffusion region of the second conductivity type is formed on the entire inner wall surface of a through hole in which the conductive via is provided.

4. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting element has an element anode and an element cathode on one side, the element anode and the element cathode being electrically connected to each of the pair of mounting electrodes of the supporting substrate.

5. The semiconductor light-emitting device described in claim 1, wherein the element anode and element cathode are joined to the pair of mounting electrodes by a conductive joining member, the element anode and element cathode of the semiconductor light-emitting element are surrounded by an insulating element protective layer, the pair of mounting electrodes of the support substrate are surrounded by an insulating support substrate insulating layer, and the element protective layer and the support substrate insulating layer are in contact at the joints between the element anode and element cathode and the pair of mounting electrodes.

6. The semiconductor light emitting device according to claim 1, wherein said element protection layer and said support substrate insulating layer cover the entire periphery of said joint portion.

7. The semiconductor light emitting device according to claim 6, wherein the bonding member is a gold-tin alloy.

8. The semiconductor light emitting device according to claim 1, further comprising a device protective film covering the entire outer surface of said semiconductor light emitting element.

9. The semiconductor light emitting device according to claim 1, wherein the supporting substrate has a plurality of pairs of the mounting electrodes and a plurality of pairs of mounting electrodes, and a plurality of the semiconductor light emitting elements are mounted on the plurality of pairs of the mounting electrodes.

10. The semiconductor light emitting device according to claim 9, wherein the same and / or different light converting members are provided on the light emitting surfaces of the plurality of semiconductor light emitting elements.

11. The semiconductor light emitting device according to claim 1, wherein the substrate is an n-type or p-type semiconductor.

12. A semiconductor light-emitting device according to any one of claims 2 to 11, wherein a pair of Zener diodes are formed by the diffusion regions and the substrate provided in both of the pair of conductive vias, and the pair of Zener diodes are connected in series in opposite directions to each other.

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