Imaging element and electronic apparatus

Abstract

Provided is a light detecting device having a more suitable configuration. A light detecting device of the present disclosure comprising: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion, the second floating diffusion, the third floating diffusion, and the fourth floating diffusion, wherein in a plan view a first length of the electrode in a first direction is greater than a second length of the electrode in a second direction. The present disclosure may be applied to, for example, a CMOS image sensor.

Description

IMAGING ELEMENT AND ELECTRONIC APPARATUS

[0001] The present disclosure relates to an imaging element and an electronic apparatus, and more particularly, relates to an imaging element and electronic apparatus capable of providing an imaging element having a more suitable configuration.

[0002] <CROSS REFERENCE TO RELATED APPLICATIONS> This application claims the benefit of Japanese Priority Patent Application JP 2023-123021 filed on July 28, 2023, the entire contents of which are incorporated herein by reference.

[0003] Patent Literature 1 discloses an imaging element including a separation unit disposed at a boundary between pixels disposed on a semiconductor substrate, and an embedded electrode embedded in a front surface side of the semiconductor substrate at a boundary between pixels overlapping the separation unit and connected to the semiconductor substrate.

[0004] WO 2022 / 138914 A

[0005] In the imaging element of Patent Literature 1, the influence of the resistance of the embedded electrode or the electric field between a charge transfer unit and the embedded electrode has not been considered.

[0006] The present disclosure has been made in view of such a situation, and it is desirable to provide an imaging element having a more suitable configuration.

[0007] An imaging element according to a first aspect of the present disclosure is an imaging element including: a pixel substrate in which a plurality of pixels is formed, the plurality of pixels each including a photoelectric conversion unit and a charge transfer unit configured to transfer a charge generated by the photoelectric conversion unit to a charge holding unit; and a separation unit formed at a boundary between the photoelectric conversion units in the pixel substrate, and an embedded electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, in which the embedded electrode is formed as the charge holding unit of the pixels, and is formed such that a size of the embedded electrode differs between a first direction and a second direction along the photoelectric conversion unit in plan view.

[0008] An electronic apparatus according to the first aspect of the present disclosure is an electronic apparatus including an imaging element having: a pixel substrate in which a plurality of pixels is formed, the plurality of pixels each including a photoelectric conversion unit and a charge transfer unit configured to transfer a charge generated by the photoelectric conversion unit to a charge holding unit; a separation unit formed at a boundary between the photoelectric conversion units in the pixel substrate; and an embedded electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, in which the embedded electrode is formed as the charge holding unit of the pixels, and is formed such that a size of the embedded electrode differs between a first direction and a second direction along the photoelectric conversion unit in plan view.

[0009] An imaging element according to a second aspect of the present disclosure is an imaging element including: a pixel substrate in which a phase difference pixel having a plurality of photoelectric conversion units and a plurality of charge transfer units configured to transfer a charge generated by each of the photoelectric conversion units to a charge holding unit is formed; and a circuit substrate stacked on the pixel substrate and in which a pixel transistor is formed, in which the charge holding unit is formed at an intermediate position between two of the photoelectric conversion units in plan view from a stacking direction, and each of the charge transfer units includes a plurality of vertical gate electrodes disposed above the photoelectric conversion unit so as to straddle a region having a maximum potential in the photoelectric conversion unit.

[0010] An electronic apparatus according to the second aspect of the present disclosure is an electronic apparatus including an imaging element having: a pixel substrate in which a phase difference pixel having a plurality of photoelectric conversion units and a plurality of charge transfer units configured to transfer a charge generated by each of the photoelectric conversion units to a charge holding unit is formed; and a circuit substrate stacked on the pixel substrate and in which a pixel transistor is formed, in which the charge holding unit is formed at an intermediate position between two of the photoelectric conversion units in plan view from a stacking direction, and each of the charge transfer units includes a plurality of vertical gate electrodes disposed above the photoelectric conversion unit so as to straddle a region having a maximum potential in the photoelectric conversion unit.

[0011] In the first aspect of the present disclosure, the embedded electrode is formed as the charge holding unit of the pixels, and is formed so that the size thereof differs between the first direction and the second direction along the photoelectric conversion unit in plan view.

[0012] In the second aspect of the present disclosure, the charge holding unit is formed at an intermediate position between the two photoelectric conversion units in a plan view from the stacking direction, and the charge transfer unit is provided with a plurality of vertical gate electrodes disposed above the photoelectric conversion unit so as to straddle a region having a maximum potential in the photoelectric conversion unit.

[0013] Fig. 1 is a block diagram illustrating a configuration example of an imaging device.Fig. 2 is a block diagram illustrating a configuration example of a sensor element.Fig. 3 is a diagram illustrating a circuit configuration example of a pixel.Fig. 4 is a plan view illustrating a first configuration example of a pixel according to a first embodiment.Fig. 5 is a cross-sectional view illustrating the first configuration example of the pixel according to the first embodiment.Fig. 6 is a plan view illustrating a second configuration example of the pixel according to the first embodiment.Fig. 7 is a cross-sectional view illustrating the second configuration example of the pixel according to the first embodiment.Fig. 8 is a plan view illustrating a third configuration example of the pixel according to the first embodiment.Fig. 9 is a cross-sectional view illustrating the third configuration example of the pixel according to the first embodiment.Fig. 10 is a plan view illustrating a fourth configuration example of the pixel according to the first embodiment.Fig. 11 is a cross-sectional view illustrating the fourth configuration example of the pixel according to the first embodiment.Fig. 12 is a cross-sectional view illustrating a fifth configuration example of the pixel according to the first embodiment.Figs. 13A and 13B are diagrams for explaining a degree of freedom in arrangement of vertical gate electrodes.Figs. 14A and 14B are diagrams for explaining a trade-off between charge transfer efficiency and pinning.Figs. 15A and 15B are a plan view and a cross-sectional view illustrating a first configuration example of a pixel according to a second embodiment.Figs. 16A and 16B are a plan view and a cross-sectional view illustrating a second configuration example of the pixel according to the second embodiment.Figs. 17A and 17B are a plan view and a cross-sectional view illustrating a third configuration example of the pixel according to the second embodiment.Figs. 18A and 18B are a plan view and a cross-sectional view illustrating a fourth configuration example of the pixel according to the second embodiment.Figs. 19A and 19B are a plan view and a cross-sectional view illustrating a fifth configuration example of the pixel according to the second embodiment.Figs. 20A and 20B are other cross-sectional views illustrating the fifth configuration example of the pixel according to the second embodiment.Figs. 21A and 21B are a plan view and a cross-sectional view illustrating a sixth configuration example of the pixel according to the second embodiment.Fig. 22 is a block diagram illustrating an example of a schematic configuration of a vehicle control system.Fig. 23 illustrates an example of installation positions of an outside-vehicle information detecting section and an imaging section.

[0014] A mode for carrying out the present disclosure (hereinafter, referred to as an embodiment) will be hereinafter described. Note that the description is given in the following order.

[0015] 1. Configuration example of imaging device 2. Configuration example of sensor element 3. First embodiment (embedded electrode having different sizes in first direction and second direction) 4. Second embodiment (vertical gate electrode disposed so as to straddle sensor potential) 5. Examples of application to mobile object

[0016] <1. Configuration example of imaging device> Here, a case where the technology according to the present disclosure is applied to an imaging device will be described as an example. However, the technology according to the present disclosure can be applied to general electronic apparatuses using an imaging element (solid-state imaging device) in an image capturing unit, such as a mobile terminal device having an imaging function including a mobile phone, and a copying machine using an imaging device in an image reading unit, in addition to imaging devices such as a digital still camera and a video camera. It should be noted that a module form mounted on an electronic apparatus, that is, a camera module, may be used as an imaging element.

[0017] Fig. 1 is a block diagram illustrating a configuration example of an imaging device that is an example of an electronic apparatus of the present disclosure.

[0018] As illustrated in Fig. 1, an imaging device 1 includes an optical system including a lens group 10, a sensor element 20, a DSP circuit 30, a frame memory 40, a display section 50, a recording section 60, an operation system 70, a power supply system 80, and the like.

[0019] The DSP circuit 30, the frame memory 40, the display section 50, the recording section 60, the operation system 70, and the power supply system 80 are connected to one another via a bus line 90. A CPU 100 controls each section in the imaging device 1.

[0020] The lens group 10 captures incident light (image light) from a subject and forms an image on an imaging surface of the sensor element 20. The sensor element 20 converts the amount of incident light, which is formed into an image on the imaging surface by the lens group 10, into an electric signal in units of pixels and outputs the electric signal as a pixel signal. As the sensor element 20, an imaging element (image sensor) including pixels described below can be used.

[0021] The display section 50 includes a panel-type display section such as a liquid crystal display (LCD) section or an organic electro luminescence (EL) display section, and displays a moving image or a still image captured by the sensor element 20. The recording section 60 records the moving image or the still image captured by the sensor element 20 on a recording medium such as a memory card, a digital versatile disc (DVD), or a video tape.

[0022] The operation system 70 issues operation commands for various functions of the imaging device 1 according to an operation performed by a user. The power supply system 80 appropriately supplies various power supplies, which are operation power supplies for the DSP circuit 30, the frame memory 40, the display section 50, the recording section 60, and the operation system 70, to these power supply targets.

[0023] <2. Configuration example of sensor element> Fig. 2 is a block diagram illustrating a configuration example of the sensor element 20.

[0024] The sensor element 20 can be configured as an imaging element such as, for example, a complementary metal oxide semiconductor (CMOS) image sensor.

[0025] The sensor element 20 includes a pixel array unit 121, a vertical drive unit 122, a column processing unit 123, a horizontal drive unit 124, and a system control unit 125. The pixel array unit 121, the vertical drive unit 122, the column processing unit 123, the horizontal drive unit 124, and the system control unit 125 are formed on a semiconductor substrate (chip) not shown.

[0026] In the pixel array unit 121, unit pixels are two-dimensionally disposed in a matrix, each unit pixel having a photoelectric conversion unit that generates photoelectric charges in a charge amount corresponding to an amount of incident light and accumulates the generated photoelectric charges therein. Note that, in the following description, the photoelectric charge having a charge amount according to an incident light amount is simply described as “charge,” and a unit pixel is also simply described as “pixel.”

[0027] Moreover, the pixel array unit 121 is provided with pixel drive lines 126, formed for each row along the horizontal direction (arraying direction of pixels in each pixel row) in the drawings, and vertical signal lines 127, formed for each column along the vertical direction (arraying direction of pixels in each column) in the drawings, with respect to the pixels arrayed in a matrix. One end of the pixel drive line 126 is connected to an output end corresponding to each row of the vertical drive unit 122.

[0028] The sensor element 20 further includes a signal processing unit 128 and a data storage unit 129. The signal processing unit 128 and the data storage unit 129 may be an external signal processing unit provided on a substrate different from the sensor element 20, for example, a digital signal processor (DSP) or processing by software, or may be mounted on the same substrate as that of the sensor element 20.

[0029] The vertical drive unit 122 includes a shift register, an address decoder, and the like and drives each pixel of the pixel array unit 121 at the same time for all the pixels, in units of rows, or the like. Although a specific configuration of the vertical drive unit 122 is not illustrated, the vertical drive unit 122 includes a read scanning system and a sweep scanning system, or performs batch sweep and batch transfer.

[0030] The read scanning system sequentially selects and scans the unit pixels of the pixel array unit 121 row by row in order to read a signal from the unit pixel. In a case of row drive (rolling shutter operation), as for sweep, sweep scan is performed on a read row on which read scan is performed by the read scan system prior to the read scan by a time corresponding to a shutter speed. Furthermore, in a case of global exposure (global shutter operation), the batch sweep is performed prior to the batch transfer by a time corresponding to a shutter speed.

[0031] When this sweeping is performed, unnecessary charges are swept (reset) from the photoelectric conversion unit of the unit pixels in the read row. Then, a so-called electronic shutter operation is performed by sweeping (resetting) the unnecessary charges. Here, the electronic shutter operation refers to an operation of discharging photoelectric charges of the photoelectric conversion unit and newly starting exposure (starting accumulation of photoelectric charges).

[0032] The signal which is read by the read operation of the read scanning system corresponds to an amount of light which is received immediately before the read operation or received after the electronic shutter operation. In a case of row driving, a period from the reading time by the preceding read operation or the sweeping time by the electronic shutter operation to the reading time by the current read operation is set to an accumulation period (an exposure period) of photoelectric charges in the unit pixel. In a case of the global exposure, a period from a batch sweep to a batch transfer is set to the accumulation period (the exposure period).

[0033] Pixel signals output from the unit pixels in the pixel row selectively scanned by the vertical drive unit 122 are supplied to the column processing unit 123 through the corresponding vertical signal lines 127. The column processing unit 123 performs, for each pixel column of the pixel array unit 121, predetermined signal processing on pixel signals output from the unit pixels in the selected row through the vertical signal lines 127, and temporarily stores the pixel signals which have been subjected to the predetermined signal processing.

[0034] Specifically, the column processing unit 123 performs at least noise removal processing, for example, correlated double sampling (CDS) processing, as the signal processing. By the CDS processing by the column processing unit 123, fixed pattern noise unique to the pixel, such as reset noise or threshold variation of an amplification transistor, is removed. Note that, it is also possible to provide the column processing unit 123 with, for example, an analog-digital (AD) conversion function in addition to the noise removal processing to output a signal level as a digital signal.

[0035] The horizontal drive unit 124 includes a shift register, an address decoder, and the like, and sequentially selects a unit circuit corresponding to the pixel column in the column processing unit 123. When the selective scanning is performed by the horizontal drive unit 124, the pixel signals subjected to the signal processing by the column processing unit 123 are sequentially output to the signal processing unit 128.

[0036] The system control unit 125 includes a timing generator that generates various timing signals, and performs drive control for the vertical drive unit 122, the column processing unit 123, the horizontal drive unit 124, and the like on the basis of the various timing signals generated by the timing generator.

[0037] The signal processing unit 128 has at least an addition processing function, and performs various signal processing such as addition processing on the pixel signal output from the column processing unit 123. The data storage unit 129 temporarily stores data necessary for signal processing when the signal processing is performed by the signal processing unit 128.

[0038] Fig. 3 is a diagram illustrating a circuit configuration example of pixels arrayed in the pixel array unit 121.

[0039] Fig. 3 illustrates pixels 150 and a pixel circuit 151 connected to the pixels 150. The pixels 150 illustrated in Fig. 3 has a configuration of a pixel sharing unit in which four pixels 150 share one pixel circuit 151.

[0040] Each of a plurality of the pixels 150 includes a photoelectric conversion unit 161 and a charge transfer unit 162 electrically connected to the photoelectric conversion unit 161. On the other hand, the pixel circuit 151 includes a floating diffusion (FD) 163 and three pixel transistors, specifically, a reset transistor 164, an amplification transistor 165, and a selection transistor 166.

[0041] The photoelectric conversion unit 161 is formed as a photodiode (PD), and generates and accumulates a charge (signal charge) corresponding to the amount of received light. The photoelectric conversion unit 161 has an anode terminal grounded and a cathode terminal connected to the FD 163 via the charge transfer unit 162.

[0042] When turned on by a transfer signal TR, the charge transfer unit 162 reads the charge generated by the photoelectric conversion unit 161 and transfers the generated charge to the FD 163.

[0043] The FD 163 holds the charge read from the photoelectric conversion unit 161. When turned on by a reset signal RST, the reset transistor 164 resets the potential of the FD 163 by discharging the charge accumulated in the FD 163 to the drain (constant voltage source Vdd).

[0044] The amplification transistor 165 outputs a pixel signal corresponding to the potential of the FD 163. That is, the amplifier transistor 163 constitutes a source follower circuit with a load MOS as a constant current source connected via the vertical signal line 127. A pixel signal indicating a level corresponding to the charge accumulated in the FD 163 is output from the amplification transistor 165 to the column processing unit 123 (Fig. 2) via the selection transistor 166 and the vertical signal line 127.

[0045] The selection transistor 166 is turned on when the pixel 150 is selected by a selection signal SEL, and outputs the pixel signal of the pixel 150 to the column processing unit 123 via the vertical signal line 127. The signal lines to which the transfer signal TR, the selection signal SEL, and the reset signal RST are transmitted correspond to the pixel drive lines 126 in Fig. 2.

[0046] The pixels 150 are configured as described above, but are not limited to the configuration of Fig. 3, and may have a configuration of a pixel sharing unit in which pixels other than four, for example, two pixels 150 share one pixel circuit 151. Furthermore, each of the pixels 150 may be connected to one pixel circuit 151, or the pixel 150 may have two or more photoelectric conversion units 161.

[0047] Hereinafter, embodiments of the sensor element 20 to which the technology according to the present disclosure is applied will be described.

[0048] <3. First embodiment> As a first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied, a configuration of an imaging element including a separation unit formed at a boundary between photoelectric conversion units and an embedded electrode embedded in the separation unit in a pixel substrate in which a plurality of pixels is formed will be described.

[0049] (First configuration example) A first configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 4 and 5. Fig. 4 is a plan view illustrating the first configuration example of the pixel 150, and Fig. 5 is a cross-sectional view illustrating the first configuration example of the pixel 150 taken along line a1-a1' in Fig. 4.

[0050] As illustrated in Figs. 4 and 5, the plurality of pixels 150 is formed in a pixel substrate 210 including silicon (Si). The pixel 150 includes a PD 211 corresponding to the photoelectric conversion unit 161 in Fig. 3, a charge transfer unit 212 corresponding to the charge transfer unit 162 in Fig. 3, and a pixel transistor 213 corresponding to the reset transistor 164 or the like in Fig. 3. Each of the pixels 150 includes one PD 211.

[0051] In the pixel substrate 210, a separation unit 214 is formed at a boundary between the pixels 150 (photoelectric conversion units 161). The separation unit 214 has a shape in which each pixel 150 (photoelectric conversion unit 161) is surrounded. The separation unit 214 is formed as, for example, full trench isolation (FTI), and can be formed by embedding an insulator such as SiO2 in a groove portion penetrating from a front surface side (upper side in Fig. 5) to a back surface side (lower side in Fig. 5) of the pixel substrate 210. Furthermore, a light shielding member that blocks incident light may be disposed as the separation unit 214.

[0052] Furthermore, in the pixel substrate 210, an embedded electrode 215 is embedded in a boundary between the pixels 150 (photoelectric conversion units 161) and on the front surface side of the pixel substrate 210 overlapping the separation unit 214. Specifically, the embedded electrode 215 is embedded adjacent to corners of the respective four pixels 150 (photoelectric conversion units 161) constituting the pixel sharing unit in the separation unit 214. More specifically, the embedded electrode 215 is formed at a boundary between the pixels 150 sharing a charge holding unit, that is, at a boundary between the pixels 150 of 2 × 2 pixels.

[0053] The embedded electrode 215 is formed as a charge holding unit (corresponding to the FD 163 in Fig. 3) of the pixels 150. As illustrated in Fig. 4, the embedded electrode 215 is formed such that the size thereof is different between a first direction (lateral direction in Fig. 4) and a second direction (longitudinal direction in Fig. 4) along the photoelectric conversion units 211 (Si portions) in a plan view. Specifically, the embedded electrode 215 is formed shorter in the second direction than in the first direction.

[0054] Moreover, as illustrated in Fig. 5, a through electrode 221 is connected to the embedded electrode 215, and is electrically connected to the pixel transistor 213 via a wiring 222.

[0055] Furthermore, as illustrated in Fig. 4, the charge transfer unit 212 is formed at a position where a distance (first distance) to the separation unit 214 extending in the first direction (lateral direction in Fig. 4) and a distance (second distance) to the separation unit 214 extending in the second direction (longitudinal direction in Fig. 4) are different in the pixel 150. Specifically, the charge transfer unit 212 is formed at a position where the second distance is shorter than the first distance.

[0056] Here, it is assumed that the size of the embedded electrode 215 in the lateral direction and the size of the embedded electrode 215 in the longitudinal direction are the same. In this case, if the size of the embedded electrode 215 is reduced in order to avoid the proximity between the charge transfer unit 212 and a FD diffusion layer 163, which increases the resistance of the embedded electrode and noise or operation failure may occur. Furthermore, when the size of the embedded electrode is increased on a side where the resistance of the embedded electrode is suppressed to a certain degree, an electric field between the embedded electrode and the charge transfer unit is increased, and a leakage current may be generated.

[0057] On the other hand, in the pixel 150 of the first configuration example, the embedded electrode 215 is formed shorter in the second direction (longitudinal direction) than in the first direction (lateral direction). Furthermore, the charge transfer unit 212 is formed at a position where the second distance (distance to the separation unit 214 extending in the longitudinal direction) is shorter than the first distance (distance to the separation unit 214 extending in the lateral direction). This makes it possible to suppress interference between the embedded electrode 215 and the charge transfer unit 212 while securing a contact area between the embedded electrode 215 and the pixel substrate 210(Si substrate). As a result, by achieving both suppression of the resistance of the embedded electrode 215 and relaxation of the electric field between the embedded electrode 215 and the charge transfer unit 212, it is possible to suppress generation of various noises and achieve high image quality. As described above, according to the pixel of the present embodiment, it is possible to provide an imaging element having a more suitable configuration.

[0058] (Second configuration example) A second configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 6 and 7. Fig. 6 is a plan view illustrating the second configuration example of the pixel 150, and Fig. 7 is a cross-sectional view illustrating the second configuration example of the pixel 150 taken along line a2-a2' in Fig. 6.

[0059] The pixel 150 of the second configuration example is basically configured similarly to the pixel 150 of the first configuration example described with reference to Figs. 4 and 5. However, as illustrated in Fig. 7, the pixel 150 of the second configuration example is different from the pixel 150 of the first configuration example in that a circuit substrate 230 is stacked on the front surface side (upper side in Fig. 7) of the pixel substrate 210, and the pixel transistor 213 is formed in the circuit substrate 230.

[0060] Furthermore, as illustrated in Fig. 6, in the pixel substrate 210, a substrate contact 241 connected to a predetermined fixed potential (for example, GND potential) is formed as necessary at a boundary between the pixels 150 (photoelectric conversion units 161) at a portion where the embedded electrode 215 is not formed.

[0061] As described above, also for the pixels 150 of the second configuration example, the embedded electrode 215 is formed shorter in the second direction (longitudinal direction) than in the first direction (lateral direction). Furthermore, the charge transfer unit 212 is formed at a position where the second distance (distance to the separation unit 214 extending in the longitudinal direction) is shorter than the first distance (distance to the separation unit 214 extending in the lateral direction). This makes it possible to suppress interference between the embedded electrode 215 and the charge transfer unit 212 while securing a contact area between the embedded electrode 215 and the pixel substrate 210 (Si substrate). As a result, by achieving both suppression of the resistance of the embedded electrode 215 and relaxation of the electric field between the embedded electrode 215 and the charge transfer unit 212, it is possible to suppress generation of various noises and achieve high image quality. As described above, according to the pixel of the present embodiment, it is possible to provide an imaging element having a more suitable configuration.

[0062] (Third configuration example) A third configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 8 and 9. Fig. 8 is a plan view illustrating the third configuration example of the pixel 150, and Fig. 9 is a cross-sectional view illustrating the third configuration example of the pixel 150 taken along line a3-a3' in Fig. 8.

[0063] As illustrated in Figs. 8 and 9, a plurality of pixels 150 is formed in the pixel substrate 210 including silicon (Si). The pixel 150 includes a PD 211 corresponding to the photoelectric conversion unit 161 in Fig. 3, a charge transfer unit 212 corresponding to the charge transfer unit 162 in Fig. 3, and a pixel transistor 213 corresponding to the reset transistor 164 or the like in Fig. 3. However, the pixel 150 of the third configuration example includes a plurality of PDs 211 (specifically, two PDs 211), unlike the pixel 150 of the first configuration example including one PD 211 (Figs. 4 and 5). In the pixel 150 of the third configuration example, two PDs 211 are formed such that the Si portion is divided in the lateral direction in Fig. 8. Furthermore, the pixel 150 of the third configuration example includes a plurality of the charge transfer units 212 corresponding to the plurality of PDs 211. In this case, the pixel 150 can be formed as a phase difference pixel for detecting a distance to an object.

[0064] In the pixel substrate 210, the separation unit 214 is formed at a boundary between the pixels 150 and a boundary between the photoelectric conversion units 161 included in one pixel 150.

[0065] Furthermore, in the pixel substrate 210, an embedded electrode 215 is embedded in a boundary between the pixels 150 (photoelectric conversion units 161) and on the front surface side of the pixel substrate 210 overlapping the separation unit 214. Specifically, the embedded electrode 215 is embedded adjacent to corners of two adjacent pixels 150 (four PDs 211) in the separation unit 214. More specifically, the embedded electrode 215 is formed at a boundary between the pixels 150 sharing a charge holding unit 212, that is, at a boundary between the pixels 150 adjacent in a direction (in Fig. 8, the longitudinal direction) orthogonal to a division direction of the PD 211.

[0066] The embedded electrode 215 is formed as a charge holding unit of the pixels 150. As illustrated in Fig. 8, the embedded electrode 215 is formed such that the size thereof is different between the first direction (lateral direction in Fig. 4) and the second direction (longitudinal direction in Fig. 4) along the photoelectric conversion units 211 (Si portions) in a plan view. Specifically, the embedded electrode 215 is formed shorter in the second direction than in the first direction.

[0067] Moreover, as illustrated in Fig. 9, the through electrode 221 is connected to the embedded electrode 215, and is electrically connected to the pixel transistor 213 via a wiring 222.

[0068] Furthermore, as illustrated in Fig. 8, the charge transfer unit 212 is formed at a position where a distance (first distance) to the separation unit 214 extending in the first direction (lateral direction in Fig. 8) and a distance (second distance) to the separation unit 214 extending in the second direction (longitudinal direction in Fig. 8) are different in the pixel 150. Specifically, the charge transfer unit 212 is formed at a position where the second distance is shorter than the first distance.

[0069] As described above, also in the pixel 150 of the third configuration example, the embedded electrode 215 is formed shorter in the second direction (longitudinal direction) than in the first direction (lateral direction). Furthermore, the charge transfer unit 212 is formed at a position where the second distance (distance to the separation unit 214 extending in the longitudinal direction) is shorter than the first distance (distance to the separation unit 214 extending in the lateral direction). This makes it possible to suppress interference between the embedded electrode 215 and the charge transfer unit 212 while securing a contact area between the embedded electrode 212 and the pixel substrate 210 (Si substrate). As a result, by achieving both suppression of the resistance of the embedded electrode 215 and relaxation of the electric field between the embedded electrode 215 and the charge transfer unit 212, it is possible to suppress generation of various noises and achieve high image quality. As described above, according to the pixel of the present embodiment, it is possible to provide an imaging element having a more suitable configuration.

[0070] (Fourth configuration example) A fourth configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 10 and 11. Fig. 10 is a plan view illustrating the fourth configuration example of the pixel 150, and Fig. 11 is a cross-sectional view illustrating the fourth configuration example of the pixel 150 taken along line a4-a4' in Fig. 10.

[0071] The pixel 150 of the fourth configuration example is basically configured similarly to the pixel 150 of the third configuration example described with reference to Figs. 8 and 9. However, as illustrated in Fig. 11, the pixel 150 of the fourth configuration example is different from the pixel 150 of the third configuration example in that a circuit substrate 230 is stacked on the front surface side (upper side in Fig. 11) of the pixel substrate 210, and a pixel transistor 213 is formed in the circuit substrate 230.

[0072] Furthermore, as illustrated in Fig. 10, in the pixel substrate 210, a substrate contact 241 connected to a predetermined fixed potential (for example, GND potential) is formed as necessary at a boundary between the pixels 150 (photoelectric conversion units 161) at a portion where the embedded electrode 215 is not formed.

[0073] As described above, also in the pixel 150 of the fourth configuration example, the embedded electrode 215 is formed shorter in the second direction (longitudinal direction) than in the first direction (lateral direction). Furthermore, the charge transfer unit 212 is formed at a position where the second distance (distance to the separation unit 214 extending in the longitudinal direction) is shorter than the first distance (distance to the separation unit 214 extending in the lateral direction). This makes it possible to suppress interference between the embedded electrode 215 and the charge transfer unit 212 while securing a contact area between the embedded electrode 215 and the pixel substrate 210 (Si substrate). As a result, by achieving both suppression of the resistance of the embedded electrode 215 and relaxation of the electric field between the embedded electrode 215 and the charge transfer unit 212, it is possible to suppress generation of various noises and achieve high image quality. As described above, according to the pixel of the present embodiment, it is possible to provide an imaging element having a more suitable configuration.

[0074] (Fifth configuration example) A fifth configuration example of the pixel 150 of the first embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Fig. 12. A plan view illustrating the fourth configuration example of the pixel 150 is similar to Fig. 10 (fourth configuration example), and Fig. 12 is a cross-sectional view illustrating the fifth configuration example of the pixel 150 taken along line a4-a4' in Fig. 10.

[0075] The pixel 150 of the fifth configuration example is basically configured similarly to the pixel 150 of the fourth configuration example described with reference to Figs. 10 and 11. However, as illustrated in Fig. 12, the pixel 150 of the fifth configuration example is different from the pixel 150 of the fourth configuration example in that a charge transfer unit 212V formed as a vertical gate electrode and having a charge transfer function in the vertical direction is included instead of the charge transfer unit 212.

[0076] As described above, also in the pixel 150 of the fifth configuration example, it is possible to achieve the similar effects as those of the pixels 150 of the first to fourth configuration examples described above, and it is further possible to achieve both improvement in the charge transfer function and improvement in image quality.

[0077] Note that, in the embodiment described above, the technology according to the present disclosure does not necessarily be applied to all the embedded electrodes 215, and the technology according to the present disclosure may be applied to any embedded electrode 215 as necessary.

[0078] <4. Second embodiment> As a second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied, a configuration of an imaging element including: a pixel substrate in which a phase difference pixel having a plurality of photoelectric conversion units and a plurality of charge transfer units that transfer a charge generated by each of the photoelectric conversion units to a charge holding unit is formed; and a circuit substrate stacked on the pixel substrate and in which a pixel transistor is formed will be described.

[0079] (Related art and problems) In recent years, with miniaturization of pixels in a CMOS image sensor, a transfer gate having a vertical gate electrode (VG) has been introduced in order to achieve both a saturation signal amount and charge transfer characteristics. Furthermore, in recent years, in order to further improve charge transfer capability, a structure in which the number of vertical gate electrodes (VG) is increased has been proposed.

[0080] For example, in a single-layer phase difference pixel P1 illustrated in Fig. 13A, two photodiodes (PDs) and pixel transistors M1 and M2 constituting a pixel circuit are formed in the same substrate. Therefore, a degree of freedom of arrangement of vertical gate electrodes G11 and G12 is greatly limited.

[0081] On the other hand, in a two-layer phase difference pixel P2 illustrated in Fig. 13B, since the pixel transistor (not illustrated) is formed in a substrate different from that of the two PDs, a degree of freedom in arrangement of vertical gate electrodes G21 and G22 can be improved. Specifically, the vertical gate electrodes G21 and G22 can be disposed in a disposable region PA illustrated in the drawing.

[0082] In order to enhance the charge transfer capability, it is desirable to dispose the vertical gate electrodes G21 and G22 above the PD, in the vicinity of a region (hereinafter, also referred to as a sensor potential) having a maximum potential in the PD. However, it is difficult to obtain an effect of improving the charge transfer capability due to a trade-off with pinning (hole concentration) at the bottom portions (tip portions facing the PD side) of the vertical gate electrodes G21 and G22.

[0083] Fig. 14A illustrates a plan view of the phase difference pixel P2 similar to that in Fig. 13B, and Fig. 14B illustrates a cross-sectional view of the phase difference pixel P2 taken along line a-a' in Fig. 14A. As illustrated in Fig. 14B, the phase difference pixel P2 is formed in a pixel substrate SB1, and a circuit substrate SB2 in which a pixel transistor is formed is stacked on the pixel substrate SB1.

[0084] In general, the closer a transfer gate is to a sensor potential of a PD, the more the PD can be modulated, which improves charge transfer efficiency. As described above, the sensor potential refers to a portion having a maximum potential in the PD or refers to its potential, and is a region having the highest net N-type impurity concentration.

[0085] Therefore, in the phase difference pixel P2 illustrated in Fig. 14B, as a sensor potential SP in the PD is closer to the vertical gate electrode G21, it is more difficult to secure the hole concentration in the vicinity of the vertical gate electrode G21, and dark electrons via the interface state in the vicinity of the vertical gate electrode G21 are more likely to be generated (e.g., pinning becomes weak).

[0086] Furthermore, in the phase difference pixel P2 illustrated in Fig. 14B, an influence of disturbance on a transfer path CT caused by fluctuation of peripheral impurities of the transfer path CT of charges from the PD to an FD increases.

[0087] On the other hand, in the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied, the FD is formed at an intermediate position between the two PDs in the plan view from the stacking direction of the substrates, and the transfer gate is formed so as to have a plurality of vertical gate electrodes disposed above the PD so as to straddle the sensor potential.

[0088] Therefore, the vertical gate electrodes and the sensor potential can be separated from each other to a certain extent, and pinning can be strengthened. On the other hand, although a modulation degree of the PD by the transfer gate is weakened, a modulation effect corresponding to the number of vertical gate electrodes can be obtained by disposing a plurality of (for example, two) vertical gate electrodes, and thus, the transfer efficiency is not reduced. Therefore, it is possible to maintain the transfer efficiency while suppressing generation of dark electrons via the interface state in the vicinity of the vertical gate electrodes.

[0089] (First configuration example) A first configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 15A and 15B. Fig. 15A is a plan view illustrating the first configuration example of the pixel 150, and Fig. 15B is a cross-sectional view illustrating the first configuration example of the pixel 150 taken along line a-a' in Fig. 15A.

[0090] The pixel 150 illustrated in Figs. 15A and 15B is formed in a pixel substrate SB1 including silicon (Si). The pixel 150 includes two PDs 311 as a photoelectric conversion unit, a transfer gate 312 as a charge transfer unit, an FD 313 as a charge holding unit, and a pixel transistor (not illustrated) formed in a circuit substrate SB2 stacked on the pixel substrate SB1. In the pixel 150 illustrated in Figs. 15A and 15B, the two PDs 311 are formed such that the Si portion is divided in the lateral direction in Fig. 15A. That is, the pixel 150 can be formed as a phase difference pixel for detecting a distance to a subject.

[0091] The FD 313 is formed by direct N+ ion implantation into the Si substrate. The FD 313 is formed at an intermediate position between the two PDs 311 in the plan view from the stacking direction of the substrates. Specifically, the FD 313 is formed at the center of a region sandwiched between the two PDs 311 in the plan view from the stacking direction. On the side of the FD 313 closer to the front surface of the pixel substrate SB1, a through contact 313C that electrically connects the FD 313 and a wiring layer formed in the circuit substrate SB2 is formed.

[0092] In the pixel substrate SB1, a full trench isolation (FTI) region 314 is formed as a separation unit at a boundary with another pixel 150 and a boundary between the PDs 311 included in the pixel 150. Furthermore, an oxide film 315 such as shallow trench isolation (STI) is formed so as to cover the side surface of the FTI 314 on the front surface side of the pixel substrate SB1.

[0093] Moreover, in the pixel substrate SB1, P wells 316, which are P-type impurity regions, are formed at four corners of the pixel 150 formed in a square shape in the plan view from the stacking direction. On the side of the P well 316 closer to the front surface of the pixel substrate SB1, a through contact 316C that connects the P well 316 to a predetermined fixed potential (for example, GND potential) is formed.

[0094] The transfer gate 312 is formed on each of the two PDs 311. The transfer gate 312 includes, on the PD 311, two vertical gate electrodes 321 and 322 disposed so as to straddle a region (sensor potential SP) having a maximum potential in the PD 311, and a planar gate electrode 323 formed on the surface of the pixel substrate SB1 and electrically connected to the two vertical gate electrodes 321 and 322. As illustrated in Fig. 15A, the two vertical gate electrodes 321 and 322 are disposed so as to straddle a straight line L passing through the center of the FD 313 and extending in a division direction of the two PDs 311.

[0095] As described above, in the pixel 150 of the first configuration example, the FD 313 is formed at an intermediate position between the two PDs 311 in the plan view from the stacking direction of the substrates, and the transfer gate 312 is formed to have the two vertical gate electrodes 321 and 322 disposed above each PD 311 so as to straddle the region (sensor potential SP) having a maximum potential in the PD 311.

[0096] Therefore, since the vertical gate electrodes 321 and 322 and the sensor potential are separated by a certain degree, it is possible to maintain a modulation degree of the PD 311, that is, the transfer efficiency while suppressing generation of dark electrons via the interface state in the vicinity of the vertical gate electrodes 321 and 322. Furthermore, by surrounding the transfer path CT with the two vertical gate electrodes 321 and 322, it is possible to suppress an influence of disturbance on the transfer path CT caused by fluctuation or the like of peripheral impurities of the transfer path CT, and to improve process variation resistance. Moreover, if a plurality of vertical gate electrodes can be formed by batch processing, the transfer path CT is fixed even in a case where misalignment of the vertical gate electrodes occurs, so that process variation resistance can be improved. As described above, according to the pixel of the present embodiment, it is possible to provide an imaging element having a more suitable configuration.

[0097] (Second configuration example) A second configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 16A and 16B. Fig. 16A is a plan view illustrating the second configuration example of the pixel 150, and Fig. 16B is a cross-sectional view illustrating the second configuration example of the pixel 150 taken along line a-a' in Fig. 16A.

[0098] The pixel 150 of the second configuration example is basically configured similarly to the pixel 150 of the first configuration example described with reference to Figs. 15A and 15B. However, as illustrated in Figs. 16A and 16B, the pixel 150 of the second configuration example is different from the pixel 150 of the first configuration example in that the oxide film 315 is formed so as to cover not only the side surface of the FTI 314 on the front surface side of the pixel substrate but also a portion not used as the transfer path CT on the side surface of the vertical gate electrodes 321 and 322.

[0099] In the pixel 150 of the present embodiment, since the size of the planar gate electrode is enlarged due to the disposition of the plurality of vertical gate electrodes, a capacitance (drive load) of the entire transfer gate 312 increases. This directly affects a driving speed of the pixel 150, that is, a frame rate in the progress of miniaturization and multiple pixels.

[0100] On the other hand, in the pixel 150 of the second configuration example, by covering the portion not used as the transfer path CT with an oxide film such as STI, the capacitance of the entire transfer gate 312 can be reduced.

[0101] Note that, in the pixel 150 of the second configuration example, a P+ diffusion layer having an impurity concentration higher than that of the P-well 316 is formed in a neighboring region 316N of the P-well 316 so that a potential of the PD 311 is held at the GND potential.

[0102] (Third configuration example) A third configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 17A and 17B. Fig. 17A is a plan view illustrating the third configuration example of the pixel 150, and Fig. 17B is a cross-sectional view illustrating the third configuration example of the pixel 150 taken along line a-a' in Fig. 17A.

[0103] The pixel 150 of the third configuration example is basically configured similarly to the pixel 150 of the first configuration example described with reference to Figs. 15A and 15B. However, as illustrated in Figs. 17A and 17B, the pixel 150 of the third configuration example is different from the pixel 150 of the first configuration example in that the transfer gate 312 includes, instead of the planar gate electrodes 323, a plurality of (specifically, two) planar gate electrodes 323-1 and 323-2 are formed on the front surface of the pixel substrate and electrically connected to the vertical gate electrodes 321 and 322, respectively.

[0104] Note that the planar gate electrode 323-1 (vertical gate electrode 321) and the planar gate electrode 323-2 (vertical gate electrode 322) are electrically connected by a polysilicon via, wiring, or the like, and are supplied with the same potential.

[0105] As described above, in the pixel 150 of the third configuration example, the planar gate electrode of the transfer gate 312 is formed for each vertical gate electrode, whereby a capacitance generated between the transfer gate 312 and the Si substrate can be reduced.

[0106] (Fourth configuration example) A fourth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 18A and 18B. Fig. 18A is a plan view illustrating the fourth configuration example of the pixel 150, and Fig. 18B is a cross-sectional view illustrating the fourth configuration example of the pixel 150 taken along line a-a' in Fig. 18A.

[0107] The pixel 150 of the fourth configuration example is basically configured similarly to the pixel 150 of the second configuration example described with reference to Figs. 16A and 16B. However, as illustrated in Figs. 18A and 18B, the pixel 150 of the fourth configuration example is different from the pixel 150 of the second configuration example in that the transfer gate 312 includes, instead of the planar gate electrodes 323, the planar gate electrodes 323-1 and 323-2 formed on the front surface of the pixel substrate and electrically connected to the vertical gate electrodes 321 and 322, respectively.

[0108] Note that the planar gate electrode 323-1 (vertical gate electrode 321) and the planar gate electrode 323-2 (vertical gate electrode 322) are electrically connected by a polysilicon via, wiring, or the like, and are supplied with the same potential.

[0109] As described above, in the pixel 150 of the fourth configuration example, by covering the portion not used as the transfer path CT with the oxide film such as STI, a capacitance of the entire transfer gate 312 can be reduced, and by forming the planar gate electrode of the transfer gate 312 for each vertical gate electrode, a capacitance generated between the transfer gate 312 and the Si substrate can be reduced.

[0110] (Fifth configuration example) A fifth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 19A, 19B, 20A, and 20B. Fig. 19A is a plan view illustrating the fifth configuration example of the pixel 150, and Fig. 19B is a cross-sectional view illustrating the fifth configuration example of the pixel 150 taken along line a-a' in Fig. 19A. Furthermore, Fig. 20A is a cross-sectional view illustrating the fifth configuration example of the pixel 150 taken along line b-b' in Fig. 19A, and Fig. 20B is a cross-sectional view illustrating the fifth configuration example of the pixel 150 taken along line c-c' in Fig. 19A.

[0111] The pixel 150 of the fifth configuration example is basically configured similarly to the pixel 150 of the third configuration example described with reference to Figs. 17A and 17B. However, as illustrated in Figs. 19A, 19B, 20A, and 20B, the pixel 150 of the fifth configuration example is different from the pixel 150 of the third configuration example in that an FD 313E formed as an embedded electrode is included instead of the FD 313 formed by N+ ion implantation.

[0112] As described above, the FD can be formed as an embedded electrode in addition to being formed by N+ ion implantation.

[0113] (Sixth configuration example) A sixth configuration example of the pixel 150 of the second embodiment of the sensor element 20 to which the technology according to the present disclosure is applied will be described with reference to Figs. 21A and 21B. Fig. 21A is a plan view illustrating the sixth configuration example of the pixel 150, and Fig. 21B is a cross-sectional view illustrating the sixth configuration example of the pixel 150 taken along line a-a' in Fig. 21A.

[0114] The pixel 150 of the sixth configuration example is basically configured similarly to the pixel 150 of the fifth configuration example described with reference to Figs. 19A, 19B, 20A, and 20B. However, as illustrated in Figs. 21A and 21B, the pixel 150 of the sixth configuration example is different from the pixel 150 of the fifth configuration example in that the oxide film 315 is formed so as to cover not only the side surface of the FTI 314 on the front surface side of the pixel substrate but also a portion not used as the transfer path CT on the side surface of the vertical gate electrodes 321 and 322.

[0115] As described above, in the pixel 150 of the sixth configuration example, by covering a portion not used as the transfer path CT with an oxide film such as STI, a capacitance of the entire transfer gate 312 can be reduced.

[0116] <5. Examples of application to mobile object> The technology according to the present disclosure can be applied to various products. For example, the technology according to the present disclosure may be implemented as a device mounted on any type of mobile body such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, a personal mobility, an airplane, a drone, a ship, a robot, and the like.

[0117] Fig. 22 is a block diagram illustrating an example of schematic configuration of a vehicle control system as an example of a mobile body control system to which the technology according to the present disclosure can be applied.

[0118] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. In the example illustrated in Fig. 22, the vehicle control system 12000 includes a driving system control unit 12010, a body system control unit 12020, an outside-vehicle information detecting unit 12030, an in-vehicle information detecting unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output section 12052, and a vehicle-mounted network interface (I / F) 12053 are illustrated as a functional configuration of the integrated control unit 12050.

[0119] The driving system control unit 12010 controls the operation of devices related to the driving system of the vehicle in accordance with various kinds of programs. For example, the driving system control unit 12010 functions as a control device for a driving force generating device for generating the driving force of the vehicle, such as an internal combustion engine, a driving motor, or the like, a driving force transmitting mechanism for transmitting the driving force to wheels, a steering mechanism for adjusting the steering angle of the vehicle, a braking device for generating the braking force of the vehicle, and the like.

[0120] The body system control unit 12020 controls the operation of various kinds of devices provided to a vehicle body in accordance with various kinds of programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various kinds of lights such as a headlights, a backup light, a brake light, a turn signal, a fog light, or the like. In this case, radio waves transmitted from a mobile device as an alternative to a key or signals of various kinds of switches can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals, and controls a door lock device, the power window device, the lights, or the like of the vehicle.

[0121] The outside-vehicle information detecting unit 12030 detects information about the outside of the vehicle including the vehicle control system 12000. For example, the outside-vehicle information detecting unit 12030 is connected with an imaging section 12031. The outside-vehicle information detecting unit 12030 makes the imaging section 12031 take an image of the outside of the vehicle, and receives the image. On the basis of the received image, the outside-vehicle information detecting unit 12030 may perform processing of detecting an object such as a human, a vehicle, an obstacle, a sign, a character on a road surface, or the like, or processing of detecting a distance thereto.

[0122] The imaging section 12031 is an optical sensor that receives light, and which outputs an electric signal corresponding to a received light amount of the light. The imaging section 12031 can output the electric signal as an image, or can output the electric signal as information about a measured distance. In addition, the light received by the imaging section 12031 may be visible light, or may be invisible light such as infrared rays or the like.

[0123] The in-vehicle information detecting unit 12040 detects information about the inside of the vehicle. The in-vehicle information detecting unit 12040 is, for example, connected with a driver state detecting section 12041 that detects the state of a driver. The driver state detecting section 12041, for example, includes a camera that images the driver. On the basis of detection information input from the driver state detecting section 12041, the in-vehicle information detecting unit 12040 may calculate a degree of fatigue of the driver or a degree of concentration of the driver, or may determine whether the driver is dozing.

[0124] The microcomputer 12051 can calculate a control target value for the driving force generating device, the steering mechanism, or the braking device on the basis of the information about the inside or outside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040, and output a control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control intended to implement functions of an advanced driver assistance system (ADAS) which functions include collision avoidance or shock mitigation for the vehicle, driving based on a following distance, maintaining a vehicle speed, collision warning, lane departure warning, or the like.

[0125] In addition, the microcomputer 12051 can perform cooperative control intended for automated driving, which controls the vehicle without depending on the operation of the driver, or the like, by controlling the driving force generating device, the steering mechanism, the braking device, or the like on the basis of the information about the outside or inside of the vehicle which information is obtained by the outside-vehicle information detecting unit 12030 or the in-vehicle information detecting unit 12040.

[0126] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 on the basis of the information about the outside of the vehicle, which is obtained by the outside-vehicle information detecting unit 12030. For example, the microcomputer 12051 can perform cooperative control intended to prevent a glare by controlling the headlights so as to change from a high beam to a low beam, for example, in accordance with the position of a preceding vehicle or an oncoming vehicle detected by the outside-vehicle information detecting unit 12030.

[0127] The sound / image output section 12052 transmits an output signal of at least one of a sound and an image to an output device capable of visually or auditorily notifying information to an occupant of the vehicle or outside the vehicle. In the example of Fig. 22, an audio speaker 12061, a display section 12062, and an instrument panel 12063 are illustrated as output devices. The display section 12062 may, for example, include at least one of an on-board display and a heads-up display.

[0128] Fig. 23 is a diagram depicting an example installation position of the imaging section 12031.

[0129] In Fig. 23, imaging sections 12101, 12102, 12103, 12104, and 12105 are included as the imaging section 12031.

[0130] The imaging sections 12101, 12102, 12103, 12104, and 12105 are, for example, disposed at positions on a front nose, sideview mirrors, a rear bumper, and a back door of the vehicle 12100 as well as a position on an upper portion of a windshield within the interior of the vehicle. The imaging section 12101 provided to the front nose and the imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle obtain mainly an image of the front of the vehicle 12100. The imaging sections 12102 and 12103 provided to the sideview mirrors obtain mainly an image of the sides of the vehicle 12100. The imaging section 12104 provided to the rear bumper or the back door obtains mainly an image of the rear of the vehicle 12100. The imaging section 12105 provided to the upper portion of the windshield within the interior of the vehicle is used mainly to detect a preceding vehicle, a pedestrian, an obstacle, a signal, a traffic sign, a lane, or the like.

[0131] Note that Fig. 23 illustrates an example of imaging ranges of the imaging sections 12101 to 12104. An imaging range 12111 represents the imaging range of the imaging section 12101 provided to the front nose. Imaging ranges 12112 and 12113 respectively represent the imaging ranges of the imaging sections 12102 and 12103 provided to the sideview mirrors. An imaging range 12114 represents the imaging range of the imaging section 12104 provided to the rear bumper or the back door. A bird's-eye image of the vehicle 12100 as viewed from above is obtained by superimposing image data imaged by the imaging sections 12101 to 12104, for example.

[0132] At least one of the imaging sections 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging sections 12101 to 12104 may be a stereo camera comprised of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0133] For example, the microcomputer 12051 can determine a distance to each three-dimensional object within the imaging ranges 12111 to 12114 and a temporal change in the distance (relative speed with respect to the vehicle 12100) on the basis of the distance information obtained from the imaging sections 12101 to 12104, and thereby extract, as a preceding vehicle, a nearest three-dimensional object in particular that is present on a traveling path of the vehicle 12100 and which travels in substantially the same direction as the vehicle 12100 at a predetermined speed (for example, equal to or more than 0 km / hour). Further, the microcomputer 12051 can set a following distance to be maintained in front of a preceding vehicle in advance, and perform automatic brake control (including following stop control), automatic acceleration control (including following start control), or the like. It is thus possible to perform cooperative control intended for automated driving that makes the vehicle travel autonomously without depending on the operation of the driver or the like.

[0134] For example, the microcomputer 12051 can classify three-dimensional object data on three-dimensional objects into three-dimensional object data of a two-wheeled vehicle, a standard-sized vehicle, a large-sized vehicle, a pedestrian, a utility pole, and other three-dimensional objects on the basis of the distance information obtained from the imaging sections 12101 to 12104, extract the classified three-dimensional object data, and use the extracted three-dimensional object data for automatic avoidance of an obstacle. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can recognize visually and obstacles that are difficult for the driver of the vehicle 12100 to recognize visually. Then, the microcomputer 12051 determines a collision risk indicating a risk of collision with each obstacle. In a situation in which the collision risk is equal to or higher than a set value and there is thus a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display section 12062, and performs forced deceleration or avoidance steering via the driving system control unit 12010. The microcomputer 12051 can thereby assist in driving to avoid collision.

[0135] At least one of the imaging sections 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 can, for example, recognize a pedestrian by determining whether or not there is a pedestrian in imaged images of the imaging sections 12101 to 12104. Such recognition of a pedestrian is, for example, performed by a procedure of extracting characteristic points in the imaged images of the imaging sections 12101 to 12104 as infrared cameras and a procedure of determining whether or not it is the pedestrian by performing pattern matching processing on a series of characteristic points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the imaged images of the imaging sections 12101 to 12104, and thus recognizes the pedestrian, the sound / image output section 12052 controls the display section 12062 so that a square contour line for emphasis is displayed so as to be superimposed on the recognized pedestrian. The sound / image output section 12052 may also control the display section 12062 so that an icon or the like representing the pedestrian is displayed at a desired position.

[0136] An example of the vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure may be applied to the imaging section 12031 and the like out of the configurations described above. By applying the imaging element of the technology according to the present disclosure to the imaging section 12031, a captured image with higher image quality can be obtained, and thus, for example, driver's fatigue can be reduced.

[0137] Note that embodiments to which the technology according to the present disclosure is applied are not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the technology according to the present disclosure.

[0138] Moreover, the present disclosure may have the following configurations. (1) An imaging element including: a pixel substrate in which a plurality of pixels is formed, the plurality of pixels each including a photoelectric conversion unit and a charge transfer unit configured to transfer a charge generated by the photoelectric conversion unit to a charge holding unit; a separation unit formed at a boundary between the photoelectric conversion units in the pixel substrate; and an embedded electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, in which the embedded electrode is formed as the charge holding unit of the pixels, and is formed such that a size of the embedded electrode differs between a first direction and a second direction along the photoelectric conversion unit in plan view. (2) The imaging element according to (1), in which the charge transfer unit is formed at a position where a first distance to the separation unit extending in the first direction and a second distance to the separation unit extending in the second direction are different in each of the pixels. (3) The imaging element according to (2), in which the embedded electrode is formed shorter in the second direction than in the first direction, and the charge transfer unit is formed at a position where the second distance is shorter than the first distance. (4) The imaging element according to any one of (1) to (3), in which the embedded electrode is formed as a vertical gate electrode and has a charge transfer function in a vertical direction. (5) The imaging element according to any one of (1) to (4), in which the embedded electrode is formed at a boundary between the pixels sharing the charge holding unit. (6) The imaging element according to (5), in which the pixels each include one of the photoelectric conversion units, and the embedded electrode is formed at a boundary between the pixels of 2 × 2 pixels. (7) The imaging element according to (5), in which the pixels each include a plurality of the photoelectric conversion units, and the embedded electrode is formed at a boundary between the pixels adjacent in a direction orthogonal to a division direction of the photoelectric conversion unit. (8) An electronic apparatus including an imaging element having: a pixel substrate in which a plurality of pixels is formed, the plurality of pixels each including a photoelectric conversion unit and a charge transfer unit configured to transfer a charge generated by the photoelectric conversion unit to a charge holding unit; a separation unit formed at a boundary between the photoelectric conversion units in the pixel substrate; and an embedded electrode embedded adjacent to a corner of the photoelectric conversion unit in the separation unit, in which the embedded electrode is formed as the charge holding unit of the pixels, and is formed such that a size of the embedded electrode differs between a first direction and a second direction along the photoelectric conversion unit in plan view. (9) An imaging element including: a pixel substrate in which a phase difference pixel having a plurality of photoelectric conversion units and a plurality of charge transfer units configured to transfer a charge generated by each of the photoelectric conversion units to a charge holding unit is formed; and a circuit substrate stacked on the pixel substrate and in which a pixel transistor is formed, in which the charge holding unit is formed at an intermediate position between two of the photoelectric conversion units in plan view from a stacking direction, and each of the charge transfer units includes a plurality of vertical gate electrodes disposed above the photoelectric conversion unit so as to straddle a region having a maximum potential in the photoelectric conversion unit. (10) The imaging element according to (9), in which the charge holding unit is formed at the center of a region sandwiched between two of the photoelectric conversion units in plan view from a stacking direction, and the plurality of vertical gate electrodes is disposed so as to straddle a straight line passing through the center of the charge holding unit and extending in a division direction of two of the photoelectric conversion units. (11) The imaging element according to (10), in which the phase difference pixel further includes an oxide film formed on a side surface of each of the vertical gate electrodes. (12) The imaging element according to (10) or (11), in which the charge transfer unit further includes a planar gate electrode formed on a front surface of the pixel substrate and electrically connected to the plurality of vertical gate electrodes. (13) The imaging element according to (10) or (11), in which the charge transfer unit further includes a plurality of planar gate electrodes formed on a front surface of the pixel substrate and electrically connected to the plurality of vertical gate electrodes, respectively. (14) The imaging element according to any one of (10) to (13), in which the charge holding unit is formed by ion implantation. (15) The imaging element according to any one of (10) to (13), in which the charge holding unit is formed as an embedded electrode. (16) An electronic apparatus including an imaging element having: a pixel substrate in which a phase difference pixel having a plurality of photoelectric conversion units and a plurality of charge transfer units configured to transfer a charge generated by each of the photoelectric conversion units to a charge holding unit is formed; and a circuit substrate stacked on the pixel substrate and in which a pixel transistor is formed, in which the charge holding unit is formed at an intermediate position between two of the photoelectric conversion units in plan view from a stacking direction, and each of the charge transfer units includes a plurality of vertical gate electrodes disposed above the photoelectric conversion unit so as to straddle a region having a maximum potential in the photoelectric conversion unit. (17) A light detecting device comprising: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion, the second floating diffusion, the third floating diffusion, and the fourth floating diffusion, wherein in a plan view a first length of the electrode in a first direction is greater than a second length of the electrode in a second direction. (18) The light detecting device according to (17), wherein in the plan view the electrode comprises a cross shape. (19) The light detecting device according to (17), wherein in the plan view the first length comprises a first portion and a second portion, wherein the first portion of the first length of the electrode is disposed between the first photodiode and the third photodiode in the second direction, wherein the second portion of the first length is of the electrode disposed between the second photodiode and the fourth photodiode in the second direction, and wherein a length of each of the first portion of the first length of the electrode and the second portion of the first length of the electrode in the first direction is less than the second length of the electrode. (20) The light detecting device according to (17), wherein the first photodiode of the first pixel and the second photodiode of the first pixel are separated by a separation region. (21) The light detecting device according to (20), wherein the separation region comprises a full trench isolation. (22) The light detecting device according to (17), wherein the electrode is coupled to an amplifier transistor via at least a wiring. (23) The light detecting device according to (17), wherein the first pixel comprises a phase difference pixel for detecting a distance to a subject. (24) The light detecting device according to (17), further comprising: a first transfer gate corresponding to the first photodiode of the first pixel; a second transfer gate corresponding to the second photodiode of the first pixel; a third transfer gate corresponding to the first photodiode of the second pixel; and a fourth transfer gate corresponding to the second photodiode of the second pixel. (25) The light detecting device according to (17), wherein the first pixel is adjacent to the second pixel in the second direction. (26) The light detecting device according to (17), further comprising: a first on-chip lens corresponding to the first pixel; and a second on-chip lens corresponding to the second pixel. (27) The light detecting device according to (17), wherein the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region are disposed in a semiconductor substrate, and wherein at least a portion of the electrode is disposed in the semiconductor substrate. (28) The light detecting device according to (27), wherein the portion of the electrode disposed in the semiconductor substrate contacts the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region. (29) The light detecting device according to (27), wherein the portion of the electrode disposed in the semiconductor substrate is contacts in a first separation region disposed between the first pixel and the second pixel. (30) The light detecting device according to (29), wherein the portion of the electrode disposed in the semiconductor substrate contacts a second separation region disposed between the first photodiode and the second photodiode. (31) The light detecting device according to (30), wherein the portion of the electrode disposed in the semiconductor substrate contacts a third separation region disposed between the third photodiode and the fourth photodiode. (32) The light detecting device according to (20), wherein the separation regionunit overlaps a portion of the electrode disposed in the semiconductor substrate in a cross-sectional view. (33) The light detecting device according to (19), wherein in the plan view the second length comprises a first portion and a second portion, wherein the first portion of the second length of the electrode is disposed between the first photodiode and the second photodiode in the first direction, wherein the second portion of the second length of the electrode is disposed between the third photodiode and the fourth photodiode in the first direction, and wherein a length of each of the first portion of the first length of the electrode and the second portion of the first length of the electrode in the first direction is greater than a length of each of the first portion of the second length of the electrode and the second portion of the second length of the electrode in the second direction. (34) The light detecting device according to (17), wherein, in the plan view, a first portion of the first length of the electrode is disposed between the first photodiode and the third photodiode, a first portion of the second length of the electrode is disposed between the first photodiode and the second photodiode, a length of the first portion of the first length of the electrode in the first direction is greater than a length of the first portion of the second length of the electrode in the second direction. (35) The light detecting device according to (24), wherein a shortest distance from the first transfer gate to the first portion of the first length of the electrode is greater than a shortest distance from the first transfer gate to the first portion of the second length of the electrode. (36) The light detecting device according to (34), wherein the first portion of the first length is disposed between the first floating diffusion and the third floating diffusion, the first portion of the second length is disposed between the first floating diffusion and the second floating diffusion. (37) The light detecting device according to (17), wherein the first direction is a horizontal direction in the plan view and the second direction is a vertical direction in the plan view. (38) The light detecting device according to (17), wherein the first pixel comprises a 2-layer phase difference pixel, and wherein a pixel transistor is in a first layer, and wherein the first photodiode of the first pixel and the second photodiode of the first pixel are in a second layer different from the first layer. (39) The light detecting device according to (17), wherein the semiconductor substrate includes a pixel substrate and a circuit substrate. (40) A light detecting device comprising: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region, wherein in a plan view the electrode comprises a cross shape. (41) A light detecting device comprising: a floating diffusion; a first photodiode of a first pixel; a second photodiode of the first pixel; a first photodiode of a second pixel; a second photodiode of the second pixel; and an electrode coupled to the floating diffusion, wherein in a plan view the electrode comprises a cross shape. (42) The light detecting device according to (41), wherein the floating diffusion comprises: a first floating diffusion region that corresponds to the first photodiode of the first pixel; a second floating diffusion region that corresponds to the second photodiode of the first pixel; a third floating diffusion region that corresponds to the first photodiode of the second pixel; and a fourth floating diffusion region that corresponds to the second photodiode of the second pixel. (43) An electronic apparatus comprising a light detecting device including: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion, the second floating diffusion, the third floating diffusion, and the fourth floating diffusion, wherein in a plan view a first length of the electrode in a first direction is greater than a second length of the electrode in a second direction. (44) An electronic apparatus comprising a light detecting device including: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region, wherein in a plan view the electrode comprises a cross shape. (45) An electronic apparatus comprising a light detecting device including: a floating diffusion; a first photodiode of a first pixel; a second photodiode of the first pixel; a first photodiode of a second pixel; a second photodiode of the second pixel; and an electrode coupled to the floating diffusion, wherein in a plan view the electrode comprises a cross shape.

[0139] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

[0140] 1 Imaging device 20 Sensor element 121 Pixel array unit 150 Pixel 210 Pixel substrate 211 PD 212 Charge transfer unit 213 Pixel transistor 214 Separation unit 215 Embedded electrode SB1 Pixel substrate SB2 Circuit substrate 311 PD 312 Transfer gate 313 FD 314 FTI 315 Oxide film 321, 322 Vertical gate electrode 323, 323-1, 323-2 Planar gate electrode

Claims

1. A light detecting device comprising: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion, the second floating diffusion, the third floating diffusion, and the fourth floating diffusion, wherein in a plan view a first length of the electrode in a first direction is greater than a second length of the electrode in a second direction.

2. The light detecting device according to claim 1, wherein in the plan view the electrode comprises a cross shape.

3. The light detecting device according to claim 1, wherein in the plan view the first length comprises a first portion and a second portion, wherein the first portion of the first length of the electrode is disposed between the first photodiode and the third photodiode in the second direction, wherein the second portion of the first length is of the electrode disposed between the second photodiode and the fourth photodiode in the second direction, and wherein a length of each of the first portion of the first length of the electrode and the second portion of the first length of the electrode in the first direction is less than the second length of the electrode.

4. The light detecting device according to claim 1, wherein the first photodiode of the first pixel and the second photodiode of the first pixel are separated by a separation region.

5. The light detecting device according to claim 4, wherein the separation region comprises a full trench isolation.

6. The light detecting device according to claim 1, wherein the electrode is coupled to an amplifier transistor via at least a wiring.

7. The light detecting device according to claim 1, wherein the first pixel comprises a phase difference pixel for detecting a distance to a subject.

8. The light detecting device according to claim 1, further comprising: a first transfer gate corresponding to the first photodiode of the first pixel; a second transfer gate corresponding to the second photodiode of the first pixel; a third transfer gate corresponding to the first photodiode of the second pixel; and a fourth transfer gate corresponding to the second photodiode of the second pixel.

9. The light detecting device according to claim 1, wherein the first pixel is adjacent to the second pixel in the second direction.

10. The light detecting device according to claim 1, further comprising: a first on-chip lens corresponding to the first pixel; and a second on-chip lens corresponding to the second pixel.

11. The light detecting device according to claim 1, wherein the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region are disposed in a semiconductor substrate, and wherein at least a portion of the electrode is disposed in the semiconductor substrate.

12. The light detecting device according to claim 11, wherein the portion of the electrode disposed in the semiconductor substrate contacts the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region.

13. The light detecting device according to claim 11, wherein the portion of the electrode disposed in the semiconductor substrate is contacts in a first separation region disposed between the first pixel and the second pixel.

14. The light detecting device according to claim 13, wherein the portion of the electrode disposed in the semiconductor substrate contacts a second separation region disposed between the first photodiode and the second photodiode.

15. The light detecting device according to claim 14, wherein the portion of the electrode disposed in the semiconductor substrate contacts a third separation region disposed between the third photodiode and the fourth photodiode.

16. The light detecting device according to claim 4, wherein the separation region overlaps a portion of the electrode disposed in the semiconductor substrate in a cross-sectional view.

17. The light detecting device according to claim 3, wherein in the plan view the second length comprises a first portion and a second portion, wherein the first portion of the second length of the electrode is disposed between the first photodiode and the second photodiode in the first direction, wherein the second portion of the second length of the electrode is disposed between the third photodiode and the fourth photodiode in the first direction, and wherein a length of each of the first portion of the first length of the electrode and the second portion of the first length of the electrode in the first direction is greater than a length of each of the first portion of the second length of the electrode and the second portion of the second length of the electrode in the second direction.

18. The light detecting device according to claim 1, wherein, in the plan view, a first portion of the first length of the electrode is disposed between the first photodiode and the third photodiode, a first portion of the second length of the electrode is disposed between the first photodiode and the second photodiode, a length of the first portion of the first length of the electrode in the first direction is greater than a length of the first portion of the second length of the electrode in the second direction.

19. The light detecting device according to claim 8, wherein a shortest distance from the first transfer gate to the first portion of the first length of the electrode is greater than a shortest distance from the first transfer gate to the first portion of the second length of the electrode.

20. The light detecting device according to claim 18, wherein the first portion of the first length is disposed between the first floating diffusion and the third floating diffusion, the first portion of the second length is disposed between the first floating diffusion and the second floating diffusion.

21. The light detecting device according to claim 1, wherein the first direction is a horizontal direction in the plan view and the second direction is a vertical direction in the plan view.

22. The light detecting device according to claim 1, wherein the first pixel comprises a 2-layer phase difference pixel, and wherein a pixel transistor is in a first layer, and wherein the first photodiode of the first pixel and the second photodiode of the first pixel are in a second layer different from the first layer.

23. The light detecting device according to claim 1, wherein the semiconductor substrate includes a pixel substrate and a circuit substrate.

24. A light detecting device comprising: a first floating diffusion region corresponding to a first photodiode of a first pixel; a second floating diffusion region corresponding to a second photodiode of the first pixel; a third floating diffusion region corresponding to a first photodiode of a second pixel; a fourth floating diffusion region corresponding to a second photodiode of the second pixel; and an electrode coupled to the first floating diffusion region, the second floating diffusion region, the third floating diffusion region, and the fourth floating diffusion region, wherein in a plan view the electrode comprises a cross shape.

25. A light detecting device comprising: a floating diffusion; a first photodiode of a first pixel; a second photodiode of the first pixel; a first photodiode of a second pixel; a second photodiode of the second pixel; and an electrode coupled to the floating diffusion, wherein in a plan view the electrode comprises a cross shape.

26. The light detecting device according to claim 25, wherein the floating diffusion comprises: a first floating diffusion region that corresponds to the first photodiode of the first pixel; a second floating diffusion region that corresponds to the second photodiode of the first pixel; a third floating diffusion region that corresponds to the first photodiode of the second pixel; and a fourth floating diffusion region that corresponds to the second photodiode of the second pixel.

Images