Semiconductor device

Abstract

[Problem] To provide a semiconductor device having low inductance. [Solution] A semiconductor device according to an embodiment includes: a first circuit board having a plurality of first semiconductor elements; a second circuit board having a plurality of second semiconductor elements; and an output terminal that connects second output wiring of the second circuit board to first output wiring of the first circuit board and has a flat surface part, a first leg part, a second leg part, and a first bridge part, wherein the first leg part is connected to the first output wiring, the second leg part is connected to the second output wiring, and the first leg part and the second leg part are connected by the first bridge part.

Description

Semiconductor Devices

[0001] FIELD An embodiment of the present invention relates to a semiconductor device.

[0002] Power semiconductor devices designed for power control, including semiconductor elements such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) and IGBTs (Insulated Gate Bipolar Transistors), are being developed for a wide range of applications, including power generation and transmission, rotating machines such as pumps and blowers, power supply devices for communication systems and factories, railways using AC motors, electric vehicles, and household electrical appliances.

[0003] Generally, in a power semiconductor device, a plurality of semiconductor elements provided on a base (substrate) are connected in parallel using bonding wires or a terminal board, making it possible to handle large amounts of power.

[0004] Patent Publication No. 2020-155501

[0005] An object of the present invention is to provide a semiconductor device with low inductance.

[0006] The semiconductor device of the embodiment includes a first circuit board having a plurality of first semiconductor elements, a second circuit board having a plurality of second semiconductor elements, and an output terminal that connects a first output wiring of the first circuit board with a second output wiring of the second circuit board and has a plane portion, a first leg portion, a second leg portion, and a first bridge portion, the first leg portion being connected to the first output wiring, the second leg portion being connected to the second output wiring, and the first leg portion and the second leg portion being connected by the first bridge portion.

[0007] 1 is a schematic perspective view of a semiconductor device according to an embodiment. 2 is a schematic top view of a semiconductor device according to an embodiment. 3 is an equivalent circuit diagram of a semiconductor device according to an embodiment. 4 is an equivalent circuit diagram of a semiconductor device according to an embodiment. 5 is a schematic diagram of a semiconductor device according to an embodiment. 6 is a schematic diagram of a semiconductor device according to an embodiment. 7 is a schematic diagram of a semiconductor device according to an embodiment. 8 is a schematic diagram of a semiconductor device according to an embodiment. 9 is a schematic diagram of a semiconductor device according to an embodiment. 10 is a schematic diagram of a semiconductor device according to an embodiment. 11 is a schematic diagram of a semiconductor device according to an embodiment.

[0008] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. In the following description, the same or similar components will be denoted by the same reference numerals, and a description of a component that has already been described may be omitted.

[0009] First Embodiment A semiconductor device according to a first embodiment includes a first circuit board having a plurality of first semiconductor elements, a second circuit board having a plurality of second semiconductor elements, and an output terminal that connects a first output wiring of the first circuit board to a second output wiring of the second circuit board and has a plane portion, a first leg portion, a second leg portion, and a first bridge portion, the first leg portion being connected to the first output wiring, the second leg portion being connected to the second output wiring, and the first leg portion and the second leg portion being connected by the first bridge portion.

[0010] Fig. 1 is a schematic perspective view of a semiconductor device 100 according to a first embodiment. Fig. 2 is a schematic top view of the semiconductor device 100 according to the first embodiment. In the schematic views of Fig. 1 and Fig. 2, components such as gate terminals are omitted. In the schematic view of Fig. 1, some components (e.g., terminals) are partially illustrated.

[0011] The first direction (X direction) preferably intersects with the second direction (Y direction) and is perpendicular to the second direction. The first direction (X direction) preferably intersects with the third direction (Z direction) and is perpendicular to the second direction. The second direction (Y direction) and the third direction (Z direction) preferably intersect with each other and are perpendicular to the second direction.

[0012] 3 and 4 are equivalent circuits of the semiconductor device 100 of the first embodiment. Figures 5, 6, 7, 8, and 9 are schematic diagrams of the semiconductor device 100 of the first embodiment with some components removed. Figures 7, 8, and 9 are cross sections taken along the line AA' in Figure 6.

[0013] The semiconductor device 100 of the first embodiment is a power semiconductor module. As shown in FIG. 4 , the semiconductor device 100 of the first embodiment is a so-called "2-in-1" type module that can configure a half-bridge circuit with one module. The semiconductor device 100 has three half-bridge units connected in parallel. For example, a three-phase inverter circuit can be configured by using three semiconductor devices 100 of the first embodiment. For example, a semiconductor device incorporating three circuits of the semiconductor device 100 of the first embodiment may include a three-phase inverter circuit.

[0014] FIG. 3 is an equivalent circuit diagram of a semiconductor device 100 in which MOSFETs are used for the semiconductor elements Q1 to Q4.

[0015] FIG. 4 is an equivalent circuit diagram of a semiconductor device 100 in which IGBTs are used for the semiconductor elements Q1 to Q4.

[0016] Although the semiconductor device 100 will be described using an n-channel MOSFET or an npn-type IGBT as an example, the semiconductor elements Q1 to Q4 may be p-channel MOSFETs or pnp-type IGBTs. For convenience, the base of an IGBT will be referred to as the gate.

[0017] As shown in FIGS. 3 and 4, the semiconductor device 100 has a positive terminal P (first terminal 32), an AC output terminal AC (output terminal 31), and a negative terminal N (second terminal 33).

[0018] The semiconductor device 100 has a plurality of high-side semiconductor elements (a first semiconductor element Q1, a second semiconductor element Q2) and a plurality of low-side semiconductor elements (a semiconductor element Q3, a semiconductor element Q4). In FIG. 1, the first semiconductor element Q1, the second semiconductor element Q2, the semiconductor element Q3, and the semiconductor element Q4 each include three semiconductor elements.

[0019] The plurality of high-side semiconductor elements are connected in parallel. The plurality of low-side semiconductor elements are connected in parallel. The plurality of high-side semiconductor elements connected in parallel and the plurality of low-side semiconductor elements connected in parallel are connected in series.

[0020] As shown in FIGS. 1 and 2 , the semiconductor device 100 includes a substrate 1, a first circuit board 2A, a second circuit board 2B, a first semiconductor element 3AH1, a first semiconductor element 3AH2, a first semiconductor element 3AH3, a semiconductor element 3AL1, a semiconductor element 3AL2, a semiconductor element 3AL3, a second semiconductor element 3BH1, a second semiconductor element 3BH2, a second semiconductor element 3BH3, a semiconductor element 3BL1, a semiconductor element 3BL2, a semiconductor element 3BL3, wiring 4A, wiring 4B, wiring 5A, wiring 5B, wiring 6A, wiring 6B, wiring 7A, wiring 7B, an exterior material 8, an output terminal 31, a first terminal 32, and a second terminal 33.

[0021] The substrate 1 supports the first circuit board 2A and the second circuit board 2B. The substrate 1 is a member with high heat dissipation properties, such as a metal plate. The substrate 1 is preferably a Cu plate or an AlSiC plate.

[0022] The first circuit board 2A is provided on the substrate 1. The first circuit board 2A is a substrate in which conductive layers 21A, 22A, 23A, 24A, and 25A are provided on an insulating substrate. The conductive layers 21A, 22A, 23A, 24A, and 25A are made of a conductive material such as Cu.

[0023] The second circuit board 2B is provided on the substrate 1. The second circuit board 2B is a substrate in which conductive layers 21B, 22B, 23B, 24B, and 25B are provided on an insulating substrate. The conductive layers 21B, 22B, 23B, 24B, and 25B are made of a conductive material such as Cu.

[0024] It is preferable that the first circuit board 2A and the second circuit board 2B are configured to be line-symmetrical with respect to an imaginary line that passes through the center of the board 1 and divides the board 1 into two. The wiring configuration of the first circuit board 2A and the second circuit board 2B shown in Figure 1 etc. is one example, and is not limited to the configuration shown in the figures and described in the specification.

[0025] The first semiconductor element 3AH1, the first semiconductor element 3AH2, the first semiconductor element 3AH3, the semiconductor element 3AL1, the semiconductor element 3AL2, the semiconductor element 3AL3, the second semiconductor element 3BH1, the second semiconductor element 3BH2, the second semiconductor element 3BH3, the semiconductor element 3BL1, the semiconductor element 3BL2 and the semiconductor element 3BL3 are MOSFETs or IGBTs.

[0026] The first semiconductor elements 3AH1, 3AH2, 3AH3, 3AL1, 3AL2, and 3AL3 are provided on the first circuit board 2A. In this specification, the first semiconductor elements 3AH1, 3AH2, and 3AH3 may be collectively referred to as the first semiconductor element Q1. The semiconductor elements 3AL1, 3AL2, and 3AL3 may be collectively referred to as the semiconductor element Q3.

[0027] It is preferable that the first semiconductor element 3AH1, the first semiconductor element 3AH2, the first semiconductor element 3AH3, the semiconductor element 3AL1, the semiconductor element 3AL2, the semiconductor element 3AL3, the second semiconductor element 3BH1, the second semiconductor element 3BH2, the second semiconductor element 3BH3, the semiconductor element 3BL1, the semiconductor element 3BL2, and the semiconductor element 3BL3 are semiconductor elements having the same configuration or the same characteristics except for individual differences.

[0028] The first semiconductor elements 3AH1, 3AH2, and 3AH3 are high-side semiconductor elements provided on the first circuit board 2A. The first semiconductor elements 3AH1, 3AH2, and 3AH3 are provided on the conductive layer 21A so that their source electrodes or emitter electrodes face toward the conductive layer 21A.

[0029] The semiconductor elements 3AL1, 3AL2, and 3AL3 are low-side semiconductor elements provided on the first circuit board 2A. The drain electrodes or collector electrodes of the semiconductor elements 3AL1, 3AL2, and 3AL3 are provided on the conductive layer 22A so as to face the conductive layer 22A.

[0030] The second semiconductor elements 3BH1, 3BH2, 3BH3, 3BL1, 3BL2, and 3BL3 are provided on the second circuit board 2B. In this specification, the second semiconductor elements 3BH1, 3BH2, and 3BH3 may be referred to as the second semiconductor element Q2. The semiconductor elements 3BL1, 3BL2, and 3BL3 may be referred to as the semiconductor element Q4.

[0031] The second semiconductor elements 3BH1, 3BH2, and 3BH3 are high-side semiconductor elements provided on the second circuit board 2B. The second semiconductor elements 3BH1, 3BH2, and 3BH3 are provided on the conductive layer 21B so that their source electrodes or emitter electrodes face toward the conductive layer 21B.

[0032] The semiconductor elements 3BL1, 3BL2, and 3BL3 are low-side semiconductor elements provided on the second circuit board 2B. The drain electrodes or collector electrodes of the semiconductor elements 3BL1, 3BL2, and 3BL3 are provided on the conductive layer 22B so as to face the conductive layer 22B.

[0033] The wiring 4A is a wiring that connects the source electrode of the first high-side semiconductor element Q1 to the conductive layer 22A. The wiring 4A is, for example, an aluminum bonding wire.

[0034] The wiring 4B is a wiring that connects the source electrode of the second high-side semiconductor element Q2 and the conductive layer 22B. The wiring 4B is, for example, an aluminum bonding wire.

[0035] The wiring 5A is a wiring that connects the gate electrode of the first high-side semiconductor element Q1 to the conductive layer 24A. The wiring 5A is, for example, an aluminum bonding wire.

[0036] The wiring 5B is a wiring that connects the gate electrode of the high-side second semiconductor element Q2 to the conductive layer 24B. The wiring 5B is, for example, an aluminum bonding wire.

[0037] The wiring 6A is a wiring that connects the source electrode of the low-side semiconductor element Q3 and the conductive layer 23A. The wiring 6A is, for example, an aluminum bonding wire.

[0038] The wiring 6B is a wiring that connects the source electrode of the low-side semiconductor element Q4 and the conductive layer 23B. The wiring 6B is, for example, an aluminum bonding wire.

[0039] The wiring 7A is a wiring that connects the gate electrode of the low-side semiconductor element Q3 to the conductive layer 25A. The wiring 7A is, for example, an aluminum bonding wire.

[0040] The wiring 7B is a wiring that connects the gate electrode of the low-side semiconductor element Q4 to the conductive layer 25B. The wiring 7B is, for example, an aluminum bonding wire.

[0041] The exterior material 8 is provided around the substrate 1, the first circuit board 2A, and the second circuit board 2B. The exterior material 8 is an example of a frame. A portion of the exterior material 8 is provided on the substrate 1.

[0042] The exterior material 8 has the function of protecting the first semiconductor element Q1, the second semiconductor element Q2, the semiconductor element Q3, the semiconductor element Q4, the first circuit board 2A, and the second circuit board 2B.

[0043] The exterior material 8 is provided with cutouts and the like for fixing terminals such as the output terminal 31, the first terminal 32, and the second terminal 33.

[0044] The exterior material 8 includes a resin. The resin of the exterior material 8 is, for example, a polyphenylene sulfide resin (PPS resin). The exterior material 8 is made of, for example, a polyphenylene sulfide resin (PPS resin).

[0045] A lid (not shown) is provided on top of the exterior material 8. The lid has the function of protecting the first semiconductor element, the second semiconductor element, the substrate 1, and the like.

[0046] The conductive layer 21A is a wiring layer provided on the first circuit board 2A. The first semiconductor elements Q1 are provided on the conductive layer 21A in a line in the second direction (Y direction). The first semiconductor elements Q1 are connected to the conductive layer 21A via a solder layer or a sintered bonding layer (a conductive bonding layer formed by sintering Ag paste or the like). The conductive layer 21A has a first power wiring 21Aa extending toward the second circuit board 2B.

[0047] The conductive layer 21B is a wiring layer provided on the second circuit board 2B. The second semiconductor elements Q2 are provided on the conductive layer 21B in a line in the second direction (Y direction). The second semiconductor elements Q2 are connected to the conductive layer 21B via a solder layer or a sintered bonding layer. The conductive layer 21B has a second power wiring 21Ba extending toward the first circuit board 2A.

[0048] The first power wiring 21Aa and the second power wiring 21Ba are electrically connected via the first terminal 32. The first power wiring 21Aa and the second power wiring 21Ba are preferably parallel to each other and are preferably aligned in a straight line.

[0049] The conductive layer 22A is a wiring layer provided on the first circuit board 2A. The semiconductor elements Q3 are provided on the conductive layer 22A in a line in the second direction (Y direction). The semiconductor elements Q3 are connected to the conductive layer 22A via a solder layer or a sintered bonding layer. The conductive layer 22A is connected to the wiring 4A that is electrically connected to the first semiconductor element Q1. The conductive layer 22A has a first output wiring 22Aa that extends toward the second circuit board 2B.

[0050] The conductive layer 22B is a wiring layer provided on the second circuit board 2B. The semiconductor elements Q4 are provided on the conductive layer 22B in a line in the second direction (Y direction). The semiconductor elements Q4 are connected to the conductive layer 22B via a solder layer or a sintered bonding layer. The conductive layer 22B is connected to the wiring 4B, which is electrically connected to the second semiconductor element Q2. The conductive layer 22B has a first output wiring 22Aa extending toward the first circuit board 21.

[0051] The first output wiring 22Aa and the second output wiring 22Ba are electrically connected via the output terminal 31. The first output wiring 22Aa and the second output wiring 22Ba are preferably parallel to each other and are preferably aligned in a straight line.

[0052] The conductive layer 23A is a wiring layer provided on the first circuit board 2A. The conductive layer 23A is connected to the wiring 6A that is electrically connected to the low-side second semiconductor element Q2.

[0053] The conductive layer 23B is a wiring layer provided on the second circuit board 2B. The conductive layer 23B is connected to the wiring 6B that is electrically connected to the low-side semiconductor element Q4.

[0054] The conductive layer 23A and the conductive layer 23B are electrically connected via a second terminal 33 .

[0055] The conductive layer 24A is a wiring layer provided on the first circuit board 2A. The conductive layer 24A is connected to the wiring 5A that is electrically connected to the first high-side semiconductor element Q1.

[0056] The conductive layer 24B is a wiring layer provided on the second circuit board 2B. The conductive layer 24B is connected to the wiring 5B that is electrically connected to the second high-side semiconductor element Q2.

[0057] The conductive layer 25A is a wiring layer provided on the first circuit board 2A. The conductive layer 25A is connected to the wiring 7A that is electrically connected to the low-side semiconductor element Q3.

[0058] The conductive layer 25B is a wiring layer provided on the second circuit board 2B. The conductive layer 25B is connected to the wiring 7B that is electrically connected to the low-side semiconductor element Q4.

[0059] The output terminal 31 is provided on the first circuit board 2A and the second circuit board 2B. The output terminal 31 straddles the first circuit board 2A and the second circuit board 2B. The output terminal 31 connects the first output wiring 22Aa and the second output wiring 22Ba. The output terminal 31 electrically connects the first output wiring 22Aa and the second output wiring 22Ba. It is preferable that the output terminal 31 directly and electrically connects the first output wiring 22Aa and the second output wiring 22Ba.

[0060] 1 and 5, the output terminal 31 has a flat portion 31a, a first leg portion 31b, a second leg portion 31c, and a first bridge portion 31d. The specific structure of the output terminal 31 is shown in the schematic diagram of the second embodiment in Fig. 11. The output terminal 31 has an opening such as a screw hole in the portion that connects to the outside.

[0061] The flat portion 31a is connected to the first leg portion 31b and the second leg portion 31c. The first leg portion 31b and the second leg portion 31c extend from the flat portion 31a.

[0062] The first leg 31b is connected to the first output wiring 22Aa. Preferably, the first leg 31b is directly connected to the first output wiring 22Aa. The first leg 31b has a two-fold structure from the flat portion 31a to the connection portion between the first leg 31b and the first output wiring 22Aa.

[0063] The second leg 31c is connected to the second output wiring 22Ba. Preferably, the second leg 31c is directly connected to the second output wiring 22Ba. The second leg 31c has a two-fold bend structure from the flat portion 31a to the connection portion of the second leg 31c and the second output wiring 22Ba.

[0064] The first bridge portion 31d connects the first leg portion 31b and the second leg portion 31c. The first bridge portion 31d is provided between the first leg portion 31b and the second leg portion 31c. The first bridge portion 31d is preferably directly and electrically connected to the first leg portion 31b and the second leg portion 31c. The first bridge portion 31d electrically connects T1 and T2 in the equivalent circuit diagrams of FIGS. 3 and 4.

[0065] The first leg 31b has a bent shape at a connection portion with the flat portion 31a and a connection portion with the first output wiring 22Aa. The second leg 31c has a bent shape at a connection portion with the flat portion 31a and a connection portion with the second output wiring 22Ba. It is preferable that the path from the first output wiring 22Aa to the second output wiring 22Ba that passes through the first bridge portion 31d does not pass through the bent portions of the first leg 31b and the second leg 31c.

[0066] The first bridge portion 31d is preferably a single conductor connecting the first leg portion 31b and the second leg portion 31c, and is preferably, for example, a flat plate-shaped or partially bent ribbon-shaped conductor.

[0067] The first bridge portion 31d is preferably a conductor that is not divided into two or more pieces and connects the first leg portion 31b and the second leg portion 31c.

[0068] The first bridge portion 31d is not a thin wire such as a bonding wire, and is therefore less likely to be cut when fixing the output terminal 31 to the first circuit board 2A and the second circuit board B, making it highly reliable.

[0069] The source electrode on the output side of the first semiconductor element Q1 and the source electrode on the output side of the second semiconductor element Q2 are connected by the first bridge portion 31d (Connection Mode 1). If the first bridge portion 31d were not present, the source electrode of the first semiconductor element Q1 and the source electrode of the second semiconductor element Q2 would be connected via the first leg portion 31b, the flat portion 31a, and the second leg portion 31c (Connection Mode 2). Connection Mode 1 allows the source electrodes to be connected via the first bridge portion 31d without passing through the four bends from the first leg portion 31b through the flat portion 31a to the second leg portion 31c. The semiconductor device 100 has Connection Mode 1, which has a shorter wiring path than Connection Mode 2. Connecting the source electrode of the first semiconductor element Q1 and the source electrode of the second semiconductor element Q2 using Connection Mode 1, which has a shorter wiring path, allows the source electrodes between the circuit boards to be connected using low-inductance wiring.

[0070] 5, the height of the first bridge 31d (the distance in the Z direction from the plane of the first output wiring 22Aa or the second output wiring 22Ba) is much shorter than the height H1 of the first leg 31b and the height of the second leg 31c. Because the height of the first bridge 31d is shorter than the height H1 of the first leg 31b and the height of the second leg 31c, the sources are connected via a wiring path that is short.

[0071] In the case of a semiconductor device that does not have connection configuration 1, the inductance of the wiring connecting the source electrode of the first semiconductor element Q1 and the source electrode of the second semiconductor element Q2 becomes large, and due to individual differences in the semiconductor elements included in the semiconductor device 100, variations in the source potential of each semiconductor element in the first semiconductor element Q1 (first semiconductor element 3AH1, first semiconductor element 3AH2, and first semiconductor element 3AH3), variations in the source potential of each semiconductor element in the second semiconductor element Q2 (second semiconductor element 3BH1, second semiconductor element 3BH2, and second semiconductor element 3BH3), and variations in the source potential between the first semiconductor element Q1 and the second semiconductor element Q2 become more likely to occur.

[0072] Because this source potential serves as the reference for the gate, variations in the potential can cause oscillations in the gate signal, which can cause the semiconductor element to oscillate.

[0073] In a semiconductor device including connection configuration 1, the sources of the substrates are connected with low inductance, suppressing variations in the three source potentials. This reduces or eliminates gate signal vibration, thereby preventing the above-mentioned oscillation.

[0074] The terminals used in the semiconductor module are ultrasonically bonded to the conductive layers. The output terminal 31 requires a certain length of leg to relieve stress generated during ultrasonic bonding, and it is difficult to shorten the leg of the output terminal 31.

[0075] If a bonding wire is formed between the legs of the output terminal 31, the bonding wire and the output terminal 31 will be too close to each other, making the bonding wire more likely to break when ultrasonically bonding the output terminal 31. Misalignment during fabrication of the semiconductor device 100 can make the bonding wire between the legs of the output terminal 31 even more likely to break when ultrasonically bonding the output terminal 31.

[0076] Furthermore, the first bridge portion 31d is not a thin wire such as a bonding wire. The first bridge portion 31d is a thick wire, and has lower inductance than a thin wire such as a bonding wire, so the source electrodes can be connected by a low-inductance wire. The first bridge portion 31d has the effects of both reducing inductance by shortening the wiring path and reducing inductance by using a thick wire.

[0077] In the semiconductor device 100 of the embodiment, the addition of the first bridge portion 31d allows the connection between the sources to be made with low-inductance wiring without requiring any shape changes other than the bridge portion of the existing AC output terminal. The output terminal 31AC of the embodiment is also advantageous in that it does not require any shape changes to the entire AC output terminal in order to add the first bridge portion 31d. Therefore, the output terminal 31 having the first bridge portion 31d can be used in semiconductor modules having various circuit configurations other than those shown in the drawings.

[0078] For example, even if the second leg 31c (or the first leg 31b) is removed, the source of the first semiconductor element Q1 and the source of the second semiconductor element Q2 can be connected with low inductance, but the currents output from the sources of the first semiconductor element Q1 and the second semiconductor element Q2 both flow through the first leg 31b. If the second leg 31c is removed, it may be necessary to change the overall design of the output terminal 31 in terms of the current capacity of the first leg 31b, so an output terminal 31 having the second leg 31c is preferred.

[0079] The first terminal 32 is provided on the first circuit board 2A and the second circuit board 2B. The first terminal 32 straddles the first circuit board 2A and the second circuit board 2B. The first terminal 32 connects the first power wiring 21Aa and the second power wiring 21Ba. The first terminal 32 electrically connects the first power wiring 21Aa and the second power wiring 21Ba. It is preferable that the first terminal 32 directly and electrically connects the first power wiring 21Aa and the second power wiring 21Ba.

[0080] The second terminal 33 is provided on the first circuit board 2A and the second circuit board 2B. The second terminal 33 straddles the first circuit board 2A and the second circuit board 2B. The second terminal 33 connects the conductive layer 23A and the conductive layer 23B. The second terminal 33 electrically connects the conductive layer 23A and the conductive layer 23B. It is preferable that the second terminal 33 directly and electrically connects the conductive layer 23A and the conductive layer 23B.

[0081] The width of each component is shown in the schematic diagram of Figure 6. The wiring width of the first bridge portion 31d is represented by W0. The wiring width of the first output wiring 22Aa is represented by W1. The wiring width of the second output wiring 22Ba is represented by W2. The wiring width of the first leg portion 31b is represented by W3. The wiring width of the second leg portion 31c is represented by W4.

[0082] The wiring width W0 of the first bridge portion 31d is the length of the first bridge portion 31d in a direction perpendicular to the direction from the first leg portion 31b to the second leg portion 31c when viewed from above as shown in the schematic diagram of Figure 2. The wiring width W0 does not take into account the portion where the first leg portion 31b and the first bridge portion 31d overlap in the Z direction.

[0083] The maximum value of the wiring width W0 of the first bridge portion 31d is preferably 100% or more and 120% or less of the average wiring width W0.

[0084] The minimum value of the wiring width W0 of the first bridge portion 31d is preferably 80% or more and 100% or less of the average value of the wiring width W0.

[0085] The wiring width W1 of the first output wiring 22Aa is the average value of the width of the first output wiring 22Aa including the portion where the first output wiring 22Aa is connected to the first leg portion 31b.

[0086] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W0 of the first bridge portion 31d is preferably 60% or more and 100% or less of the wiring width W1 of the first output wiring 22Aa, and more preferably 65% ​​or more and 95% or less.

[0087] The wiring width W2 of the second output wiring 22Ba is the average value of the width of the second output wiring 22Ba including the portion where the second output wiring 22Ba and the second leg portion 31c are connected.

[0088] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W0 of the first bridge portion 31d is preferably 60% or more and 100% or less of the wiring width W2 of the second output wiring 22Ba, and more preferably 65% ​​or more and 95% or less.

[0089] From the viewpoint of reducing the inductance of the wiring between sources, the wiring width W3 of the first leg 31b is preferably 70% to 100% of the wiring width W1, and more preferably 75% to 95%.

[0090] From the viewpoint of reducing the inductance of the wiring between sources, the wiring width W4 of the second leg 31c is preferably 70% to 100% of the wiring width W2, and more preferably 75% to 95%.

[0091] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W0 of the first bridge portion 31d is preferably 60% to 100% of the wiring width W1 of the first output wiring 22Aa and 60% to 100% of the wiring width W2 of the second output wiring 22Ba, and more preferably 65% ​​to 95% of the wiring width W1 of the first output wiring 22Aa and 65% to 95% of the wiring width W2 of the second output wiring 22Ba.

[0092] The length direction of the first bridge portion 31d is preferably the direction from the first circuit board 2A to the second circuit board 2B. The width direction of the first bridge portion 31d is preferably the width direction of the first output wiring 22Aa. The width direction of the first bridge portion 31d is preferably the width direction of the second output wiring 22Ba. If the width direction of the first bridge portion 31d is significantly misaligned with the width direction of the second output wiring 22Ba, the wiring length will increase, which is undesirable. The width directions of the first bridge portion 31d and the first output wiring 22Aa are preferably roughly aligned, and the angular difference between the width direction of the first bridge portion 31d and the width direction of the first output wiring 22Aa is preferably 0° to 10°, and more preferably 0° to 5°. Regarding the parallelism of other components, angular misalignment is also permitted, and the angular difference is preferably 0° to 10°, and more preferably 0° to 5°.

[0093] 7 and 8 are schematic diagrams showing partial cross sections of a configuration in which a ribbon made of aluminum or the like is used for the first bridge portion 31d. The first bridge portion 31d is ribbon-shaped. When a ribbon is used, the shape of the output terminal 31 is not limited to the shapes shown in FIGS. 7 and 8 . The shape of the output terminal 31 when a ribbon is used can be changed depending on the thickness of the component and the ultrasonic bonding conditions. When a ribbon is used for the first bridge portion 31d, it is preferable that the element that primarily constitutes the planar portion 31a (the metal element with the highest proportion in the planar portion 31a) is different from the element that primarily constitutes the first bridge portion 31d (the metal element with the highest proportion in the first bridge portion 31d). It is preferable that the element that primarily constitutes the planar portion 31a be Cu, and that the element that primarily constitutes the first bridge portion 31d be something other than Cu (e.g., Al).

[0094] An output terminal 31 without a first bridge portion 31d is placed on a ribbon, and the ribbon and output terminal 31 are integrated by ultrasonic bonding, bonding the first output wire 22Aa to the output terminal 31, and bonding the second output wire 22Ba to the output terminal 31. After bonding, the unbonded portion of the ribbon forms the first bridge portion 31d. By applying ultrasonic waves and pressure, the gap between the first leg 31b and the first output wire 22Aa, which sandwich the ribbon, and the gap between the second leg 31c and the second output wire 22Ba, which sandwich the ribbon, are eliminated, and the output terminal with the first bridge portion 31d is firmly bonded to the first output wire 22Aa and the second output wire 22Ba.

[0095] During ultrasonic bonding, pressure is applied with a capillary to the overlapping portions of the first and second legs 31b and 31c with the ribbon, partially deforming the first and second legs 31b and 31c. The thickness of the first bridge 31d (ribbon thickness) is preferably approximately the same as the depth to which the capillary is pressed against and sinks into the components. The thickness of the first bridge 31d (ribbon thickness) is preferably 70% to 130%, and more preferably 85% to 115%, of the thickness of the non-bonded portions of the first and second legs 31b and 31c.

[0096] The schematic diagram in Figure 9 shows a partial cross-sectional view of a configuration using a member in which the first bridge portion 31d is provided on the output terminal 31 before bonding. The first bridge portion 31d is plate-shaped. When using a member in which the first bridge portion 31d is provided on the output terminal 31 before bonding, it is preferable that the element that mainly constitutes the flat portion 31a and the element that mainly constitutes the first bridge portion 31d are the same. It is preferable that the element that mainly constitutes the flat portion 31a is Cu, and that the element that mainly constitutes the first bridge portion 31d is Cu.

[0097] When a member in which the first bridge portion 31d is provided on the output terminal 31 before bonding is used, the output terminal 31 is placed on the first output wiring 22Aa and the second output wiring 22Ba, and the first output wiring 22Aa and the second output wiring 22Ba are bonded to the output terminal 31 by ultrasonic bonding. By applying ultrasonic waves and pressure, the gap between the first leg portion 31b and the first output wiring 22Aa and the gap between the second leg portion 31c and the second output wiring 22Ba disappears, and the output terminal having the first bridge portion 31d is firmly bonded to the first output wiring 22Aa and the second output wiring 22Ba.

[0098] From the viewpoint of reducing the inductance of the wiring between sources, the maximum height H3 from the surface of the first output wiring 22Aa facing the output terminal 31 to the bottom surface of the first bridge portion 31d toward the flat portion 31a (the height of the first bridge portion 31d from the surface of the first output wiring 22Aa facing the output terminal 31) is preferably shorter than the height H1 of the first leg portion 31b, which is the distance from the surface of the first output wiring 22Aa facing the output terminal 31 to the bottom surface of the flat portion 31a. H3 is preferably 0% to 50% of H1, and more preferably 0% to 30%. H3 is preferably 0% to 50% of H1, and more preferably 0% to 30%.

[0099] From the viewpoint of reducing the inductance of the wiring between sources, the maximum height H4 from the surface of the second output wiring 22Ba facing the output terminal 31 to the bottom surface of the first bridge portion 31d toward the flat portion 31a (the height of the first bridge portion 31d from the surface of the second output wiring 22Ba facing the output terminal 31) is preferably less than the height H2 of the second leg portion 31c, which is the distance from the surface of the second output wiring 22Ba facing the output terminal 31 to the bottom surface of the flat portion 31a. H4 is preferably 0% to 50% of H2, and more preferably 0% to 30%. H4 is preferably 0% to 50% of H2, and more preferably 0% to 30%.

[0100] H3 is preferably 500 μm or less, and more preferably 100 μm or less. H3 is preferably 0 μm or more and 500 μm or less, and more preferably 0 μm or more and 100 μm or less. H3 is preferably 50 μm or more and 500 μm or less, and more preferably 50 μm or more and 100 μm or less. For example, since the height of the bonding wire provided on the circuit board is 1 mm or more (approximately 3 mm), the first bridge portion 2d contributes to low-inductance source connection.

[0101] H4 is preferably 500 μm or less, and more preferably 100 μm or less. H4 is preferably 0 μm or more and 500 μm or less, and more preferably 0 μm or more and 100 μm or less. H4 is preferably 50 μm or more and 500 μm or less, and more preferably 50 μm or more and 100 μm or less. For example, since the height of the bonding wire provided on the circuit board is 1 mm or more (approximately 3 mm), the first bridge portion 2d contributes to low-inductance source connection.

[0102] Second Embodiment A semiconductor device according to a first embodiment includes a first circuit board having a plurality of first semiconductor elements, a second circuit board having a plurality of second semiconductor elements, a third circuit board having a plurality of third semiconductor elements, a fourth circuit board having a plurality of fourth semiconductor elements, and an output terminal that connects a first output wiring of the first circuit board to a second output wiring of the second circuit board and has a plane portion, a first leg, a second leg, a third leg, a fourth leg, a first bridge portion, and a second bridge portion, the first leg being connected to the first output wiring, the second leg being connected to the second output wiring, the third leg being connected to the third output wiring, and the fourth leg being connected to the fourth output wiring, the first leg and the second leg being connected by the first bridge portion, and the third leg and the fourth leg being connected by the second leg.

[0103] Fig. 10 is a schematic top view of a semiconductor device 200 according to a second embodiment. Fig. 11 is a schematic perspective view of an output terminal 31. In the schematic view of Fig. 10, components such as gate terminals are omitted. In the schematic view of Fig. 10, some components (e.g., terminals) are only partially illustrated.

[0104] The semiconductor device 200 of the second embodiment is a modified example of the semiconductor device 100 of the first embodiment.

[0105] Fig. 12 is an equivalent circuit diagram of the semiconductor device 200 according to the second embodiment. Figs. 13, 14, 15, and 16 are schematic diagrams of the semiconductor device 200 according to the second embodiment with some components removed. Figs. 15 and 16 are cross-sectional views taken along the line BB' in Fig. 13.

[0106] The semiconductor device 200 of the second embodiment is a modified example of the semiconductor device 100 of the first embodiment. Descriptions that overlap between the first and second embodiments will be omitted.

[0107] FIG. 12 is an equivalent circuit diagram of a semiconductor device 200 in which MOSFETs are used for the semiconductor elements Q1 to Q8.

[0108] The semiconductor device 200 has a plurality of high-side semiconductor elements (a first semiconductor element Q1, a second semiconductor element Q2, a third semiconductor element Q5, and a fourth semiconductor element Q6) and a plurality of low-side semiconductor elements (a semiconductor element Q3, a semiconductor element Q4, a semiconductor element Q7, and a semiconductor element Q8). In FIG. 1, a configuration is illustrated in which the first semiconductor element Q1, the second semiconductor element Q2, the semiconductor element Q3, and the semiconductor element Q4 each include three semiconductor elements.

[0109] The first circuit board 2A and the third circuit board 2C are similar components arranged line-symmetrically. The third circuit board 2C corresponds to the first circuit board 2A. The third semiconductor element Q5 corresponds to the first semiconductor element Q1. The semiconductor element Q7 corresponds to the semiconductor element Q3. The wiring 4C corresponds to the wiring 4A. The wiring 5C corresponds to the wiring 5A. The conductive layer 21C corresponds to the conductive layer 21A. The conductive layer 22C corresponds to the conductive layer 22A. The conductive layer 23C corresponds to the conductive layer 23A. The conductive layer 24C corresponds to the conductive layer 24A. The conductive layer 25C corresponds to the conductive layer 25A. The third output wiring 22Ca corresponds to the first output wiring 22Aa. The third power wiring 21Ca corresponds to the first power wiring 21Aa.

[0110] The description of the third circuit board 2C and the components formed on the third circuit board 2C overlaps with the description of the first circuit board 2A and the components formed on the first circuit board 2A, so the description will be partially omitted.

[0111] The second circuit board 2B and the fourth circuit board 2D are similar components arranged line-symmetrically. The fourth circuit board 2D corresponds to the second circuit board 2B. The fourth semiconductor element Q6 corresponds to the second semiconductor element Q2. The semiconductor element Q8 corresponds to the semiconductor element Q4. The wiring 4D corresponds to the wiring 4B. The wiring 5D corresponds to the wiring 5B. The conductive layer 21D corresponds to the conductive layer 21B. The conductive layer 22D corresponds to the conductive layer 22B. The conductive layer 23D corresponds to the conductive layer 23B. The conductive layer 24D corresponds to the conductive layer 24B. The conductive layer 25D corresponds to the conductive layer 25B. The fourth output wiring 22Da corresponds to the second output wiring 22Ba. The fourth power wiring 21Da corresponds to the second power wiring 21Ba.

[0112] The third semiconductor element Q3 is provided on the third circuit board 2 C. The fourth semiconductor element Q4 is provided on the fourth circuit board 2 D.

[0113] The fourth circuit board 2D and the components formed on the fourth circuit board 2D will be partially omitted from the description of the second circuit board 2B and the components formed on the second circuit board 2B, as the description overlaps with that of the second circuit board 2B.

[0114] The output terminal 31 connects the first output wiring 22Aa, the second output wiring 22Ba, the third output wiring 22Ca, and the fourth output wiring 22Da.

[0115] 11 , the output terminal 31 has a flat portion 31 a, a first leg 31 b, a second leg 31 c, a first bridge portion 31 d, a third leg 31 e, a fourth leg 31 f, and a second bridge portion 31 g. The output terminal 31 has an opening such as a screw hole in the portion that connects to the outside. This opening is electrically connected to an external terminal (not shown).

[0116] The flat portion 31a is connected to the first leg 31b, the second leg 31c, the third leg 31e, and the fourth leg 31f. The first leg 31b, the second leg 31c, the third leg 31e, and the fourth leg 31f extend from the flat portion 31a.

[0117] The third leg 31e is connected to the third output wiring 22ACa. Preferably, the third leg 31e is directly connected to the third output wiring 22Ca. The third leg 31e has a two-fold bend structure from the flat portion 31a to the connection portion between the third leg 31e and the third output wiring 22Ca.

[0118] The fourth leg 31f is connected to the fourth output wiring 22Da. Preferably, the fourth leg 31f is directly connected to the fourth output wiring 22Da. The fourth leg 31f has a two-fold bend structure from the flat portion 31a to the connection portion between the fourth leg 31f and the fourth output wiring 22Da.

[0119] The second bridge portion 31g connects the third leg 31e and the fourth leg 31f. The second bridge portion 31g is provided between the third leg 31e and the fourth leg 31f. The second bridge portion 31g is preferably directly and electrically connected to the third leg 31e and the fourth leg 31f. The second bridge portion 31g electrically connects T3 and T4 in the equivalent circuit diagram of FIG. 12.

[0120] The third leg 31e has a bent shape at a connection portion with the flat portion 31a and a connection portion with the third output wiring 22Ca. The fourth leg 31f has a bent shape at a connection portion with the flat portion 31a and a connection portion with the fourth output wiring 22Da. It is preferable that the path from the third output wiring 22Ca to the fourth output wiring 22Da that passes through the third leg 31e does not pass through the bent portions of the third leg 31e and the fourth leg 31f.

[0121] The second bridge portion 31g is preferably a single conductor connecting the third leg portion 31e and the fourth leg portion 31f. The second bridge portion 31g is preferably a flat plate-shaped or partially curved ribbon-shaped conductor, for example. When the first bridge portion 31d is plate-shaped, the second bridge portion 31g is preferably plate-shaped as well. When the first bridge portion 31d is ribbon-shaped, the second bridge portion 31g is preferably ribbon-shaped as well.

[0122] The second bridge portion 31g is preferably a conductor that is not divided into two or more pieces and connects the third leg portion 31e and the fourth leg portion 31f.

[0123] The second bridge portion 31g is not a thin wire such as a bonding wire, and is therefore less likely to be cut when fixing the output terminal 31 to the third circuit board 2C and the fourth circuit board D, making it highly reliable.

[0124] Similar to the first bridge portion 31d, the second bridge portion 31g connects the third leg portion 31e and the fourth leg portion 31f with low inductance, and can connect the source of the third semiconductor element Q5 and the source of the fourth semiconductor element Q6 with low inductance. The semiconductor device 200 can suppress oscillation of the semiconductor elements mounted on the third circuit board 2C and the fourth circuit board 2D in the same way as the oscillation of the semiconductor elements mounted on the first circuit board 2A and the second circuit board 2B.

[0125] The first terminals 32 are provided on the first circuit board 2A, the second circuit board 2B, the third circuit board 2C, and the fourth circuit board 2D. The first terminals 32 straddle the first circuit board 2A, the second circuit board 2B, the third circuit board 2C, and the fourth circuit board 2D. The first terminals 32 connect the first power wiring 21Aa, the second power wiring 21Ba, the third power wiring 21Ca, and the fourth power wiring 21Da. The first terminals 32 electrically connect the first power wiring 21Aa, the second power wiring 21Ba, the third power wiring 21Ca, and the fourth power wiring 21Da. It is preferable that the first terminals 32 directly and electrically connect the first power wiring 21Aa, the second power wiring 21Ba, the third power wiring 21Ca, and the fourth power wiring 21Da.

[0126] The second terminals 33 are provided on the first circuit board 2A, the second circuit board 2B, the third circuit board 2C, and the fourth circuit board 2D. The second terminals 33 straddle the first circuit board 2A, the second circuit board 2B, the third circuit board 2C, and the fourth circuit board 2D. The second terminals 33 connect the conductive layers 23A, 23B, 23C, and 23D. The second terminals 33 electrically connect the conductive layers 23A, 23B, 23C, and 23D. It is preferable that the second terminals 33 directly and electrically connect the conductive layers 23A, 23B, 23C, and 23D.

[0127] The width of each component is shown in the schematic diagram of Figure 13. The wiring width of the second bridge portion 31g is represented by W5. The wiring width of the third output wiring 22Ca is represented by W6. The wiring width of the fourth output wiring 22Da is represented by W7. The wiring width of the third leg portion 31e is represented by W8. The wiring width of the fourth leg portion 31f is represented by W9.

[0128] The wiring width W5 of the second bridge portion 31g is the length of the second bridge portion 31g in a direction perpendicular to the direction from the third leg 31e to the fourth leg 31f when viewed from above as shown in the schematic diagram of Figure 2. The wiring width W5 does not take into account the portion where the third leg 31e and the second bridge portion 31g overlap in the Z direction.

[0129] The maximum value of the wiring width W5 of the second bridge portion 31g is preferably 100% or more and 120% or less of the average value of the wiring width W5.

[0130] The minimum value of the wiring width W5 of the second bridge portion 31g is preferably 80% or more and 100% or less of the average value of the wiring width W5.

[0131] The wiring width W6 of the third output wiring 22Ca is the average value of the width of the third output wiring 22Ca including the portion where the third output wiring 22Ca is connected to the third leg 31e.

[0132] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W5 of the second bridge portion 31g is preferably 60% or more and 100% or less of the wiring width W6 of the third output wiring 22Ca, and more preferably 65% ​​or more and 95% or less.

[0133] The wiring width W7 of the fourth output wiring 22Da is the average value of the width of the fourth output wiring 22Da including the portion where the fourth output wiring 22Da and the fourth leg 31f are connected.

[0134] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W5 of the second bridge portion 31g is preferably 60% or more and 100% or less of the wiring width W7 of the fourth output wiring 22Da, and more preferably 65% ​​or more and 95% or less.

[0135] From the viewpoint of reducing the inductance of the wiring between sources, the wiring width W8 of the third leg 31e is preferably 70% to 100% of the wiring width W6, and more preferably 75% to 95%.

[0136] From the viewpoint of reducing the inductance of the wiring between sources, the wiring width W9 of the fourth leg 31f is preferably 70% to 100% of the wiring width W7, and more preferably 75% to 95%.

[0137] From the viewpoint of reducing the inductance of the wiring between the sources, the wiring width W5 of the second bridge portion 31g is preferably 60% to 100% of the wiring width W6 of the third output wiring 22Ca and 60% to 100% of the wiring width W7 of the fourth output wiring 22Da, and more preferably 65% ​​to 95% of the wiring width W6 of the third output wiring 22Ca and 65% to 95% of the wiring width W7 of the fourth output wiring 22Da.

[0138] The length direction of the second bridge portion 31g is preferably the direction from the third circuit board 2C to the fourth circuit board 2D. The width direction of the second bridge portion 31g is preferably the width direction of the third output wiring 22Ca. The width direction of the second bridge portion 31g is preferably the width direction of the fourth output wiring 22Da. If the width direction of the second bridge portion 31g is significantly misaligned with the width direction of the fourth output wiring 22Da, the wiring length will increase, which is undesirable. The width direction of the second bridge portion 31g and the width direction of the third output wiring 22Ca are preferably roughly aligned, and the angular difference between the width direction of the second bridge portion 31g and the width direction of the third output wiring 22Ca is preferably 0° to 10°, and more preferably 0° to 5°. Regarding the parallelism of other components, angular misalignment is also permitted, and the angular difference is preferably 0° to 10°, and more preferably 0° to 5°.

[0139] The schematic diagram in Figure 15 shows a partial cross-sectional view of a configuration in which a ribbon made of aluminum or the like is used for the second bridge portion 31g. The second bridge portion 31g is ribbon-shaped. When a ribbon is used, the shape of the output terminal 31 is not limited to the shapes shown in Figures 7 and 8. When a ribbon is used, the shape of the output terminal 31 when a ribbon is used can be changed depending on the thickness of the member and the ultrasonic bonding conditions. When a ribbon is used for the second bridge portion 31g, it is preferable that the element that mainly constitutes the planar portion 31a is different from the element that mainly constitutes the second bridge portion 31g (the metal element with the highest proportion in the second bridge portion 31g). It is preferable that the element that mainly constitutes the planar portion 31a is Cu, and the element that mainly constitutes the second bridge portion 31g is something other than Cu (e.g., Al).

[0140] An output terminal 31 without a second bridge portion 31g is placed on the ribbon, and the ribbon and output terminal 31 are integrated by ultrasonic bonding, bonding the third output wire 22Ca to the output terminal 31, and bonding the fourth output wire 22Da to the output terminal 31. After bonding, the unbonded portion of the ribbon forms the second bridge portion 31g. By applying ultrasonic waves and pressure, the gap between the third leg 31e and the third output wire 22Ca, which sandwich the ribbon, and the gap between the fourth leg 31f and the fourth output wire 22Da, which sandwich the ribbon, are eliminated, and the output terminal with the second bridge portion 31g is firmly bonded to the third output wire 22Ca and the fourth output wire 22Da.

[0141] During ultrasonic bonding, the capillary applies pressure to the overlapping portions of the third and fourth legs 31e and 31f with the ribbon, partially deforming the third and fourth legs 31e and 31f. The thickness of the second bridge 31g (ribbon thickness) is preferably approximately the same as the depth to which the capillary is pressed against the member and sinks. The thickness of the second bridge 31g (ribbon thickness) is preferably 70% to 130%, and more preferably 85% to 115%, of the thickness of the non-bonded portions of the third and fourth legs 31e and 31f.

[0142] The schematic diagram in Figure 16 shows a partial cross-sectional view of a configuration using a member in which the second bridge portion 31g is provided on the output terminal 31 before bonding. The second bridge portion 31g is plate-shaped. When using a member in which the second bridge portion 31g is provided on the output terminal 31 before bonding, it is preferable that the element that mainly constitutes the flat portion 31a and the element that mainly constitutes the second bridge portion 31g are the same. It is preferable that the element that mainly constitutes the flat portion 31a is Cu, and that the element that mainly constitutes the second bridge portion 31g is Cu.

[0143] When a member in which the second bridge portion 31g is provided on the output terminal 31 before bonding is used, the output terminal 31 is placed on the third output wire 22Ca and the fourth output wire 22Da, and the third output wire 22Ca and the fourth output wire 22Da are then ultrasonically bonded to the output terminal 31. By applying ultrasonic waves and pressure, the gap between the third leg 31e and the third output wire 22Ca and the gap between the fourth leg 31f and the fourth output wire 22Da disappears, and the output terminal having the second bridge portion 31g is firmly bonded to the third output wire 22Ca and the fourth output wire 22Da.

[0144] It is preferable that the elements that mainly constitute the first bridge portion 31d and the elements that mainly constitute the second bridge portion 31g are the same.

[0145] It is preferable that no bridge portion is provided between the first leg portion 31b and the third leg portion 31e, and the first leg portion 31b and the third leg portion 31e are electrically connected without a bridge portion therebetween.

[0146] It is preferable that no bridge portion is provided between the second leg portion 31c and the fourth leg portion 31f, and the second leg portion 31c and the fourth leg portion 31f are electrically connected without a bridge portion therebetween.

[0147] 14 and 15 , from the viewpoint of reducing the inductance of the wiring between sources, the maximum height H7 from the surface of the third output wiring 22Ca facing the output terminal 31 to the bottom surface of the second bridge portion 31g extending toward the flat portion 31a (the height of the second bridge portion 31g from the surface of the third output wiring 22Ca facing the output terminal 31) is preferably less than the height H5 of the third leg 31e, which is the distance from the surface of the third output wiring 22Ca facing the output terminal 31 to the bottom surface of the flat portion 31a. H7 is preferably 0% to 50% of H5, and more preferably 0% to 30%. H7 is preferably 0% to 50% of H5, and more preferably 0% to 30%.

[0148] H7 is preferably 500 μm or less, and more preferably 100 μm or less. H7 is preferably 0 μm or more and 500 μm or less, and more preferably 0 μm or more and 100 μm or less. For example, since the height of the bonding wire provided on the circuit board is 1 mm or more (approximately 3 mm), the second bridge portion 2g contributes to a low-inductance source connection.

[0149] From the viewpoint of reducing the inductance of the wiring between the sources, the maximum height H8 from the surface of the fourth output wiring 22Da facing the output terminal 31 to the bottom surface of the second bridge portion 31g extending toward the flat portion 31a (the height of the second bridge portion 31g from the surface of the fourth output wiring 22Da facing the output terminal 31) is preferably shorter than the height H6 of the fourth leg 31f, which is the distance from the surface of the fourth output wiring 22Da facing the output terminal 31 to the bottom surface of the flat portion 31a. H8 is preferably 0% to 50% of H6, and more preferably 0% to 30%. H8 is preferably 0% to 50% of H6, and more preferably 0% to 30%.

[0150] H7 is preferably 500 μm or less, and more preferably 100 μm or less. H7 is preferably 0 μm or more and 500 μm or less, and more preferably 0 μm or more and 100 μm or less. H7 is preferably 50 μm or more and 500 μm or less, and more preferably 50 μm or more and 100 μm or less. For example, since the height of the bonding wire provided on the circuit board is 1 mm or more (approximately 3 mm), the second bridge portion 2g contributes to a low-inductance source connection.

[0151] H8 is preferably 500 μm or less, and more preferably 100 μm or less. H8 is preferably 0 μm or more and 500 μm or less, and more preferably 0 μm or more and 100 μm or less. H8 is preferably 50 μm or more and 500 μm or less, and more preferably 50 μm or more and 100 μm or less. For example, since the height of the bonding wire provided on the circuit board is 1 mm or more (approximately 3 mm), the second bridge portion 2g contributes to a low-inductance source connection.

[0152] In the present specification, some elements are represented by element symbols.

[0153] The following are technical proposals of the specification. Technical Proposal 1: A semiconductor device comprising: a first circuit board having a plurality of first semiconductor elements; a second circuit board having a plurality of second semiconductor elements; and an output terminal connecting first output wiring of the first circuit board and second output wiring of the second circuit board, the output terminal having a plane portion, a first leg portion, a second leg portion, and a first bridge portion, the first leg portion connecting to the first output wiring, the second leg portion connecting to the second output wiring, and the first leg and the second leg portion being connected by the first bridge portion. Technical Proposal 2: The semiconductor device according to Technical Proposal 1, wherein the first leg portion and the first bridge portion are directly connected, the second leg portion and the first bridge portion are directly connected, the plane portion and the first bridge portion are electrically connected, and the plane portion and the first bridge portion are not directly connected. Technical Proposal 3: The semiconductor device according to Technical Proposal 1 or 2, wherein the wiring width W0 of the first bridge portion is 65% to 95% of the wiring width W1 of the first output wiring, the wiring width W1 being the average width of the first output wiring including the portion where the first output wiring and the first foot are connected, and the wiring width W0 of the first bridge portion is 65% to 95% of the wiring width W2 of the second output wiring, the wiring width W2 being the average width of the portion where the second output wiring and the second foot are connected. Technical Proposal 4: The semiconductor device according to any of Technical Proposals 1 to 3, wherein the first bridge portion is a single conductor. Technical Proposal 5: The semiconductor device according to any of Technical Proposals 1 to 4, wherein the first bridge portion is a conductor that is not divided into two or more portions. Technical Proposal 6: The semiconductor device according to Technical Proposal 3, wherein the width direction of the first bridge portion is the width direction of the first output wiring, and the width direction of the first bridge portion is the width direction of the second output wiring. Technical Proposal 7 The semiconductor device according to Technical Proposal 3 or 6, wherein the width direction of the first foot portion is the width direction of the wiring width W1, the width direction of the second foot portion is the width direction of the wiring width W2, the width W3 of the first foot portion is 75% to 95% of the wiring width W1, and the width W4 of the second foot portion is 75% to 95% of the wiring width W2. Technical Proposal 8 The semiconductor device according to any of Technical Proposals 1 to 7, wherein the length direction of the first bridge portion is the direction from the first circuit board toward the second circuit board.Technical Solution 9 The semiconductor device according to any one of Technical Solutions 1 to 8, further comprising a third circuit board having a plurality of third semiconductor elements, and a fourth circuit board having a plurality of fourth semiconductor elements, wherein the output terminal further comprises a third leg, a fourth leg, and a second bridge portion, wherein the output terminal connects a third output wiring of the third circuit board and a fourth output wiring of the fourth circuit board, wherein the third leg connects to the third output wiring, and the fourth leg connects to the fourth output wiring, and the third leg and the fourth leg are connected by the second bridge portion. Technical Solution 10 The semiconductor device according to Technical Solution 9, wherein the third leg and the second bridge portion are directly connected, the fourth leg and the second bridge portion are directly connected, the flat portion and the second bridge portion are electrically connected, and the flat portion and the second bridge portion are not directly connected. Technical Proposal 11 A semiconductor device according to Technical Proposal 9, wherein the wiring width W5 of the second bridge portion is 65% to 95% of the wiring width W6 of the third output wiring, the wiring width W6 being an average value of the width of the portion where the third output wiring and the third foot are connected, the wiring width W5 of the second bridge portion is 65% to 95% of the wiring width W7 of the fourth output wiring, and the wiring width W7 being an average value of the width of the portion where the fourth output wiring and the fourth foot are connected, the width direction of the second bridge portion is the width direction of the wiring width W6, the width direction of the second bridge portion is the width direction of the wiring width W7, the width direction of the third foot portion is the width direction of the wiring width W6, the width direction of the fourth foot portion is the width direction of the wiring width W7, the width W8 of the third foot portion is 75% to 95% of the wiring width W6, and the width W9 of the fourth foot portion is 75% to 95% of the wiring width W7. Technical Suggestion 12: The semiconductor device according to Technical Suggestion 9 or 10, wherein the second bridge portion is a single portion and is not divided into two or more portions. Technical Suggestion 13: The semiconductor device according to any of Technical Suggestions 1 to 12, wherein the element that primarily constitutes the planar portion is different from the element that primarily constitutes the first bridge portion and / or the element that primarily constitutes the second bridge portion. Technical Suggestion 14: The semiconductor device according to any of Technical Suggestions 1 to 12, wherein the element that primarily constitutes the planar portion is the same as the element that primarily constitutes the first bridge portion and / or the element that primarily constitutes the second bridge portion.Technical Suggestion 15: The semiconductor device according to any one of Technical Suggestions 1 to 14, wherein a maximum height H3 from a surface of the first output wire facing the output terminal to the bottom surface of the first bridge portion toward the planar portion is 0% to 50% of the height H1 of the first foot, and a maximum height H4 from a surface of the second output wire facing the output terminal to the bottom surface of the first bridge portion toward the planar portion is 0% to 50% of the height H1 of the second foot. Technical Suggestion 16: The semiconductor device according to Technical Suggestion 9 or 11, wherein a maximum height H7 from a surface of the third output wire facing the output terminal to the bottom surface of the second bridge portion toward the planar portion is 0% to 50% of the height H5 of the third foot, and a maximum height H8 from a surface of the fourth output wire facing the output terminal to the bottom surface of the second bridge portion toward the planar portion is 0% to 50% of the height H6 of the fourth foot. Technical Suggestion 17: The semiconductor device according to any one of Technical Suggestions 1 to 16, wherein a maximum height H3 from the surface of the first output wire facing the output terminal to the bottom surface of the first bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H1 of the first foot, and a maximum height H4 from the surface of the second output wire facing the output terminal to the bottom surface of the first bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H1 of the second foot. Technical Suggestion 18: The semiconductor device according to Technical Suggestion 9 or 11, wherein a maximum height H7 from the surface of the third output wire facing the output terminal to the bottom surface of the second bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H5 of the third foot, and a maximum height H8 from the surface of the fourth output wire facing the output terminal to the bottom surface of the second bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H6 of the fourth foot. Technical proposal: A semiconductor device described in any one of Technical proposals 1 to 18, wherein the difference in angle between the width direction of the first bridge portion and the width direction of the first output wiring is between 0° and 10°, and the difference in angle between the width direction of the second bridge portion and the width direction of the third output wiring is between 0° and 10°.Technical Proposal 20: A semiconductor device described in any one of Technical Proposals 1 to 19, wherein the thickness of the first bridge portion is 70% or more and 130% or less of the thickness of the non-jointed portion of the first foot portion and the second foot portion, and the thickness of the second bridge portion is 70% or more and 130% or less of the thickness of the non-jointed portion of the third foot portion and the fourth foot portion.

[0154] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments may be embodied in various other forms, and various omissions, substitutions, and modifications may be made without departing from the spirit of the invention. For example, components of one embodiment may be replaced or changed with components of another embodiment. These embodiments and modifications thereof are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims.

[0155] 1: Substrate 2: Connection configuration 2A: First circuit board 2B: Second circuit board 2C: Third circuit board 2D: Fourth circuit board 3At: First semiconductor element 3AH2: First semiconductor element 3AH3: First semiconductor element 3AL1: Semiconductor element 3AL2: Semiconductor element 3AL3: Semiconductor element 3BH1: Second semiconductor element 3BH2: Second semiconductor element 3BH3: Second semiconductor element 3BL1: Semiconductor element 3BL2: Semiconductor element 3BL3: Semiconductor element 4A: Wiring 4B: Wiring 4C: Wiring 4D: Wiring 5A: Wiring 5B: Wiring 5C: Wiring 5D: Wiring 6A: Wiring 6B: Wiring 7A: Wiring 7B: Wiring 8: Exterior material 21: First circuit board 21A: Conductive layer 21Aa: First power wiring 21B: Conductive layer 21Ba: Second power wiring 21C: Conductive layer 21Ca: Third power wiring 21D: Conductive layer 21Da: Fourth power wiring 22A: Conductive layer 22ACa: Third output wiring 22Aa : First output wiring 22B: Conductive layer 22Ba: Second output wiring 22C: Conductive layer 22Ca: Third output wiring 22D: Conductive layer 22Da: Fourth output wiring 23A: Conductive layer 23B: Conductive layer 23C: Conductive layer 23D: Conductive layer 24A: Conductive layer 24B : Conductive layer 24C : Conductive layer 24D : Conductive layer 25A : Conductive layer 25B: Conductive layer 25C: Conductive layer 25D: Conductive layer 31: Output terminal 31AC: Output terminal 31a: Planar portion 31b: First leg 31c: Second leg 31d: First bridge portion 31e: Third leg 31f: Fourth leg 31g: Second bridge portion 32: First terminal 33: Second terminal 100: Semiconductor device 200: Semiconductor device AC: AC output terminal B: Second circuit board D: Fourth circuit board Q1: First semiconductor element Q2: Second semiconductor element Q3: Semiconductor element Q4: Semiconductor elementQ5: Third semiconductor element Q6: Fourth semiconductor element Q7: Semiconductor element Q8: Semiconductor element

Claims

1. A semiconductor device having: a first circuit board having a plurality of first semiconductor elements; a second circuit board having a plurality of second semiconductor elements; and an output terminal connecting a first output wiring of the first circuit board and a second output wiring of the second circuit board, the output terminal having a plane portion, a first leg, a second leg and a first bridge portion, the first leg being connected to the first output wiring and the second leg being connected to the second output wiring, the first leg and the second leg being connected by the first bridge portion.

2. The semiconductor device according to claim 1, wherein the first foot and the first bridge portion are directly connected, the second foot and the first bridge portion are directly connected, the planar portion and the first bridge portion are electrically connected, and the planar portion and the first bridge portion are not directly connected.

3. The semiconductor device according to claim 1 or 2, wherein a wiring width W0 of the first bridge portion is 65% or more and 95% or less of a wiring width W1 of the first output wiring, the wiring width W1 being an average value of the width of the first output wiring including the portion where the first output wiring and the first foot are connected, the wiring width W0 of the first bridge portion is 65% or more and 95% or less of a wiring width W2 of the second output wiring, and the wiring width W2 being an average value of the width of the portion where the second output wiring and the second foot are connected.

4. A semiconductor device according to any one of claims 1 to 3, wherein the first bridge portion is a single conductor.

5. A semiconductor device according to any one of claims 1 to 4, wherein the first bridge portion is a conductor that is not divided into two or more pieces.

6. A semiconductor device according to claim 3, wherein the width direction of said first bridge portion is the width direction of said first output wiring, and the width direction of said first bridge portion is the width direction of said second output wiring.

7. A semiconductor device as described in claim 3 or 6, wherein the width direction of the first foot is the width direction of the wiring width W1, the width direction of the second foot is the width direction of the wiring width W2, the width W3 of the first foot is 75% or more and 95% or less of the wiring width W1, and the width W4 of the second foot is 75% or more and 95% or less of the wiring width W2.

8. A semiconductor device according to any one of claims 1 to 7, wherein the longitudinal direction of said first bridge portion is a direction from said first circuit board toward said second circuit board.

9. A semiconductor device as claimed in any one of claims 1 to 8, further comprising a third circuit board having a plurality of third semiconductor elements, and a fourth circuit board having a plurality of fourth semiconductor elements, wherein the output terminal further comprises a third leg, a fourth leg and a second bridge portion, wherein the output terminal connects a third output wiring of the third circuit board and a fourth output wiring of the fourth circuit board, wherein the third leg is connected to the third output wiring, and the fourth leg is connected to the fourth output wiring, and the third leg and the fourth leg are connected by the second bridge portion.

10. The semiconductor device according to claim 9, wherein the third foot and the second bridge portion are directly connected, the fourth foot and the second bridge portion are directly connected, the planar portion and the second bridge portion are electrically connected, and the planar portion and the second bridge portion are not directly connected.

11. The semiconductor device of claim 9, wherein a wiring width W5 of the second bridge portion is 65% or more and 95% or less of a wiring width W6 of the third output wiring, the wiring width W6 being an average value of the width of a portion where the third output wiring and the third foot are connected, the wiring width W5 of the second bridge portion is 65% or more and 95% or less of a wiring width W7 of the fourth output wiring, the wiring width W7 being an average value of the width of a portion where the fourth output wiring and the fourth foot are connected, the width direction of the second bridge portion is the width direction of the wiring width W6, the width direction of the second bridge portion is the width direction of the wiring width W7, the width direction of the third foot is the width direction of the wiring width W6, the width direction of the fourth foot is the width direction of the wiring width W7, the width W8 of the third foot is 75% or more and 95% or less of the wiring width W6, and the width W9 of the fourth foot is 75% or more and 95% or less of the wiring width W7.

12. The semiconductor device according to claim 9 or 10, wherein the second bridge portion is a single piece, and the second bridge portion is not divided into two or more pieces.

13. The semiconductor device according to claim 1, wherein the element that mainly constitutes the planar portion is different from the element that mainly constitutes the first bridge portion and / or the element that mainly constitutes the second bridge portion.

14. The semiconductor device according to any one of claims 1 to 12, wherein the element that mainly constitutes the planar portion is the same as the element that mainly constitutes the first bridge portion and / or the element that mainly constitutes the second bridge portion.

15. A semiconductor device as claimed in any one of claims 1 to 14, wherein a maximum height H3 from the surface of the first output wiring facing the output terminal side to the bottom surface of the first bridge portion toward the planar portion is between 0% and 50% of the height H1 of the first foot, and a maximum height H4 from the surface of the second output wiring facing the output terminal side to the bottom surface of the first bridge portion toward the planar portion is between 0% and 50% of the height H1 of the second foot.

16. A semiconductor device as described in claim 9 or 11, wherein a maximum height H7 from the surface of the third output wiring facing the output terminal side to the bottom surface of the second bridge portion toward the planar portion is 0% or more and 50% or less of the height H5 of the third foot, and a maximum height H8 from the surface of the fourth output wiring facing the output terminal side to the bottom surface of the second bridge portion toward the planar portion is 0% or more and 50% or less of the height H6 of the fourth foot.

17. A semiconductor device as claimed in any one of claims 1 to 16, wherein a maximum height H3 from the surface of the first output wiring facing the output terminal side to the bottom surface of the first bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H1 of the first foot, and a maximum height H4 from the surface of the second output wiring facing the output terminal side to the bottom surface of the first bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H1 of the second foot.

18. A semiconductor device as described in claim 9 or 11, wherein a maximum height H7 from the surface of the third output wiring facing the output terminal side to the bottom surface of the second bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H5 of the third foot, and a maximum height H8 from the surface of the fourth output wiring facing the output terminal side to the bottom surface of the second bridge portion toward the planar portion is greater than 0% and not more than 30% of the height H6 of the fourth foot.

19. A semiconductor device as claimed in any one of claims 1 to 18, wherein the difference in angle between the width direction of the first bridge portion and the width direction of the first output wiring is between 0° and 10°, and the difference in angle between the width direction of the second bridge portion and the width direction of the third output wiring is between 0° and 10°.

20. A semiconductor device as described in any one of claims 1 to 19, wherein the thickness of the first bridge portion is between 70% and 130% of the thickness of the non-joint portion of the first foot portion and the second foot portion, and the thickness of the second bridge portion is between 70% and 130% of the thickness of the non-joint portion of the third foot portion and the fourth foot portion.

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