Joining sheet, semiconductor device, method for manufacturing semiconductor device, and apparatus for manufacturing semiconductor device

Abstract

A joining sheet (10) is one of a pair of sheets for joining a first member and a second member, the joining sheet (10) comprising a main surface (11) that is joined to the first member or the second member, and a main surface (12) that is positioned on the opposite side from the main surface (11). The main surface (12) is inclined with respect to the main surface (11) and is electrically conductive.

Description

Bonding sheet, semiconductor device, semiconductor device manufacturing method, and semiconductor device manufacturing device

[0001] The present disclosure relates to a bonding sheet, a semiconductor device, a method for manufacturing a semiconductor device, and an apparatus for manufacturing a semiconductor device.

[0002] Patent documents 1 to 3 disclose technologies relating to a double-sided heat dissipation structure in which a semiconductor chip is sandwiched between two substrates, and the heat generated by the semiconductor chip is transferred to each of the two substrates to improve heat dissipation.

[0003] International Publication No. 2022 / 049641 Japanese Patent Application Laid-Open No. 2021-2563 Japanese Patent Application Laid-Open No. 2021-180290

[0004] When components such as semiconductor chips are sandwiched between two substrates, variations in component placement can occur. Examples of variations include when a single semiconductor chip is placed at an angle or when multiple semiconductor chips are at different heights. Variations in component placement can occur based on differences in the accuracy of the component placement process and the dimensions of the components. Variations in component placement can result in, for example, poor connections between the components and the two substrates. Poor connections can lead to deterioration in mechanical, thermal, and / or electrical properties.

[0005] Therefore, the present disclosure provides a bonding sheet, a semiconductor device, a method for manufacturing a semiconductor device, and an apparatus for manufacturing a semiconductor device that can absorb variations in the arrangement of components.

[0006] A bonding sheet according to one aspect of the present disclosure is one of a pair of sheets that bond a first member and a second member, and has a first main surface that is bonded to the first member or the second member, and a second main surface that is located opposite the first main surface, and the second main surface is inclined with respect to the first main surface and is conductive.

[0007] A semiconductor device according to one aspect of the present disclosure includes a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is a bonding sheet according to the above-described aspect, the first member, and the second member, wherein the first member is a semiconductor element or a spacer, the first main surface of the first bonding sheet is bonded to the first member, the first main surface of the second bonding sheet is bonded to the second member, and the second main surfaces of the first bonding sheet and the second bonding sheet are bonded to each other.

[0008] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes the steps of: preparing a plurality of pairs of sheets, each including a first bonding sheet and a second bonding sheet, which are bonding sheets according to the above aspect; preparing a first substrate on which a plurality of the first members are arranged so that they do not overlap each other in a planar view; measuring at least one of the height from the first substrate and the inclination relative to the first substrate of the upper surface of each of the plurality of first members; arranging the plurality of pairs of sheets on the upper surfaces of the corresponding first members; and arranging a second substrate, which is the second member, so as to cover the plurality of pairs of sheets, wherein in the arranging step, the second main surfaces of at least one of the plurality of pairs of sheets are arranged so as to be offset from each other based on at least one of the height and inclination of the upper surface of the corresponding first member.

[0009] A method for manufacturing a semiconductor device according to one aspect of the present disclosure includes the steps of preparing a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is a bonding sheet according to the above aspect; preparing a first substrate on which the first member is arranged; measuring the inclination of the upper surface of the first member relative to the first substrate; arranging the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction with a direction perpendicular to the second main surface as the rotation axis based on the inclination; and arranging the second substrate, which is the second member, so as to cover the pair of sheets.

[0010] A semiconductor device manufacturing apparatus according to one aspect of the present disclosure includes a first mounting section that positions a pair of sheets, each including a first bonding sheet and a second bonding sheet, which are the bonding sheets according to the above aspect, on the upper surface of a corresponding one of a plurality of first members arranged on a first substrate so as not to overlap each other in a planar view; a second mounting section that positions a second substrate, which is the second member, so as to cover the plurality of paired sheets; and a measurement section that measures at least one of the height from the first substrate and the inclination relative to the first substrate of the upper surface of each of the plurality of first members, wherein the first mounting section positions the second main surfaces of at least one of the plurality of paired sheets so as to be offset from each other based on at least one of the height and inclination of the upper surface of the corresponding first member.

[0011] A semiconductor device manufacturing apparatus according to one aspect of the present disclosure includes a first mounting section that places a pair of sheets, each including a first bonding sheet and a second bonding sheet, which are bonding sheets according to the above aspect, on the upper surface of a first member that is placed on a first substrate; a second mounting section that places the second member, which is a second substrate, so as to cover the pair of sheets; and a measurement section that measures the inclination of the upper surface of the first member relative to the first substrate, wherein the first mounting section places the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction with a direction perpendicular to the second main surface as the rotation axis based on the inclination.

[0012] Furthermore, one aspect of the present disclosure can be realized as a program that causes a computer to execute the manufacturing method, or as a computer-readable non-transitory recording medium storing the program.

[0013] According to the present disclosure, variations in the arrangement of components can be accommodated.

[0014] FIG. 1 is a perspective view of a bonding sheet according to a first embodiment. FIG. 2 is a side view of the bonding sheet according to the first embodiment. FIG. 3A is a side view of a bonding sheet pair according to the first embodiment in a first bonding state. FIG. 3B is a side view of the bonding sheet pair according to the first embodiment in a second bonding state. FIG. 3C is a side view of the bonding sheet pair according to the first embodiment in a third bonding state. FIG. 4A is a plan view of a semiconductor chip bonded to the bonding sheet according to the first embodiment. FIG. 4B is a plan view for explaining the relationship between the size of the bonding sheet and the semiconductor chip according to the first embodiment. FIG. 5 is a diagram showing the relationship between the inclination angle of the second main surface of the bonding sheet according to the first embodiment and the thickness of the bonding sheet. FIG. 6 is a cross-sectional view of a semiconductor device according to a second embodiment. FIG. 7 is a top view, a side view, and a bottom view showing the configuration of a semiconductor chip of the semiconductor device according to the second embodiment. FIG. 8 is a plan view showing a bonded state of multiple bonding sheet pairs of the semiconductor device according to the second embodiment. FIG. 9 is a cross-sectional view showing another example of the semiconductor device according to the second embodiment. FIG. 10 is a plan view showing a bonded state of multiple bonding sheet pairs of the semiconductor device according to the second embodiment. FIG. 11A is a cross-sectional view illustrating a step (lower substrate preparation step) of a manufacturing method of a semiconductor device according to the second embodiment. FIG. 11B is a cross-sectional view illustrating a step (bonding material formation step) of a manufacturing method of a semiconductor device according to the second embodiment. FIG. 11C is a cross-sectional view illustrating a step (chip mounting step) of a manufacturing method of a semiconductor device according to the second embodiment. FIG. 11D is a cross-sectional view illustrating a step (bonding sheet pair arrangement step) of a manufacturing method of a semiconductor device according to the second embodiment. FIG. 11E is a cross-sectional view illustrating a step (upper substrate arrangement step) of a manufacturing method of a semiconductor device according to the second embodiment. FIG. 12 is a cross-sectional view of a semiconductor device according to the third embodiment. FIG. 13 is a cross-sectional view illustrating another example of a semiconductor device according to the third embodiment. FIG. 14A is a cross-sectional view illustrating a step (conductive paste arrangement step) of a manufacturing method of a semiconductor device according to the third embodiment. FIG. 14B is a cross-sectional view illustrating a step (first bonding sheet arrangement step) of a manufacturing method of a semiconductor device according to the third embodiment. FIG. 14C is a cross-sectional view illustrating a step (conductive paste arrangement step) of a manufacturing method of a semiconductor device according to the third embodiment.14D is a cross-sectional view illustrating a step (a step of disposing a second bonding sheet) of a manufacturing method of a semiconductor device according to the third embodiment. FIG. 14E is a cross-sectional view illustrating a step (a step of disposing a conductive paste) of a manufacturing method of a semiconductor device according to the third embodiment. FIG. 14F is a cross-sectional view illustrating a step (a step of disposing an upper substrate) of a manufacturing method of a semiconductor device according to the third embodiment. FIG. 15 is a cross-sectional view of a semiconductor device according to the fourth embodiment. FIG. 16 is a top view, a side view, and a bottom view illustrating a configuration of a semiconductor chip of a semiconductor device according to the fourth embodiment. FIG. 17 is a cross-sectional view illustrating another example of a semiconductor device according to the fourth embodiment. FIG. 18A is a cross-sectional view illustrating a step (a step of preparing a lower substrate) of a manufacturing method of a semiconductor device according to the fourth embodiment. FIG. 18B is a cross-sectional view illustrating a step (a step of forming a bonding material) of a manufacturing method of a semiconductor device according to the fourth embodiment. FIG. 18C is a cross-sectional view illustrating a step (a step of mounting a chip) of a manufacturing method of a semiconductor device according to the fourth embodiment. FIG. 18D is a cross-sectional view illustrating a step (a wire bonding step) of a manufacturing method of a semiconductor device according to the fourth embodiment. FIG. 18E is a cross-sectional view illustrating a step (a step of disposing a pair of bonding sheets) of a manufacturing method of a semiconductor device according to the fourth embodiment. 18F is a cross-sectional view illustrating one step (upper substrate placement step) of the method for manufacturing a semiconductor device according to the fourth embodiment. FIG. 19 is a cross-sectional view of a semiconductor device according to the fifth embodiment. FIG. 20 is a cross-sectional view showing another example of the semiconductor device according to the fifth embodiment. FIG. 21 is a block diagram of a semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 22 is a flowchart illustrating a method for manufacturing a semiconductor device according to the sixth embodiment. FIG. 23A is a cross-sectional view illustrating one step (lower substrate preparation step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23B is a cross-sectional view illustrating one step (chip holding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23C is a cross-sectional view illustrating one step (chip placement step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23D is a cross-sectional view illustrating one step (bonding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment.23E is a cross-sectional view illustrating one step (measurement step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23F is a cross-sectional view illustrating one step (first bonding sheet holding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23G is a cross-sectional view illustrating one step (first bonding sheet placement step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23H is a cross-sectional view illustrating one step (second bonding sheet holding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23I is a cross-sectional view illustrating one step (placement step of the second bonding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23J is a cross-sectional view illustrating one step (upper substrate holding step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 23K is a cross-sectional view illustrating one step (upper substrate placement step) of the operation of the semiconductor device manufacturing apparatus according to the sixth embodiment. FIG. 24 is a perspective view illustrating a modified example of a bonding sheet pair.

[0015] (Summary of the present disclosure) A bonding sheet according to a first aspect of the present disclosure is one of a pair of sheets that bond a first member and a second member, and has a first main surface that is bonded to the first member or the second member, and a second main surface that is located on the opposite side of the first main surface, and the second main surface is inclined with respect to the first main surface and is electrically conductive.

[0016] When used in combination with other bonding sheets, the distance and inclination between the first principal surfaces can be changed by adjusting the relative positions of the second principal surfaces, and therefore, variations in the placement of the components to be bonded can be absorbed by placing the bonding sheets in an appropriate positional relationship according to the placement of the components.

[0017] A bonding sheet according to a second aspect of the present disclosure is a bonding sheet according to the first aspect, comprising a metal layer having a third main surface and a fourth main surface located opposite the third main surface, a first coating layer covering at least a portion of the third main surface, and a second coating layer covering at least a portion of the fourth main surface, wherein the first main surface is a portion of the surface of the first coating layer and the second main surface is a portion of the surface of the second coating layer.

[0018] This allows the first and second coating layers to be used for bonding to other members or other bonding sheets. By providing the bonding coating layers on the metal layer in advance, the bonding process can be performed simply and accurately.

[0019] A bonding sheet according to a third aspect of the present disclosure is the bonding sheet according to the second aspect, wherein each of the first coating layer and the second coating layer contains tin or a tin alloy as a main component.

[0020] This allows a coating layer of a desired thickness to be formed simply and accurately by plating or other processes. Furthermore, when bonding is performed, strong thermal, mechanical, and electrical bonding can be achieved by a reflow process using formic acid reduction or hydrogen reduction.

[0021] A bonding sheet according to a fourth aspect of the present disclosure is a bonding sheet according to the second or third aspect, wherein the third main surface is parallel to the first main surface and the fourth main surface is parallel to the second main surface.

[0022] This allows the shape of the bonding sheet to be determined by the shape of the metal layer. By forming the metal layer into a predetermined shape using a mold or the like, the dimensional accuracy of the bonding sheet can be improved.

[0023] A semiconductor device according to a fifth aspect of the present disclosure includes a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is the bonding sheet described in any one of the first to fourth aspects, the first member, and the second member, wherein the first member is a semiconductor element or a spacer, the first main surface of the first bonding sheet is bonded to the first member, the first main surface of the second bonding sheet is bonded to the second member, and the second main surfaces of the first bonding sheet and the second bonding sheet are bonded to each other.

[0024] This allows the distance and inclination between the first main surface of the first bonding sheet and the first main surface of the second bonding sheet to be changed by adjusting the positional relationship between the second main surfaces of the first bonding sheet and the second bonding sheet, and therefore, by arranging the first bonding sheet and the second bonding sheet in an appropriate positional relationship depending on the arrangement state of the first member, it is possible to absorb variations in the arrangement of the first member.

[0025] A semiconductor device according to a sixth aspect of the present disclosure is the semiconductor device according to the fifth aspect, wherein the second member is a substrate or a spacer.

[0026] A semiconductor device according to a seventh aspect of the present disclosure is a semiconductor device according to the fifth or sixth aspect, wherein the first main surface of the first bonding sheet is larger than the first member when viewed in a plane of the first main surface.

[0027] This allows the entire upper surface of the first member to be covered with the bonding sheet, thereby achieving good thermal, mechanical, and electrical bonding to the first member.

[0028] A semiconductor device according to an eighth aspect of the present disclosure is a semiconductor device according to any one of the fifth to seventh aspects, comprising a first substrate, a second substrate which is the second member arranged parallel to the first substrate, a plurality of the first members arranged between the first substrate and the second substrate so as not to overlap each other in a planar view of the first substrate, and a plurality of pairs of sheets which correspond one-to-one to the plurality of first members, and in each of the plurality of pairs of sheets, the first main surface of the first bonding sheet is bonded to the corresponding first member, and the first main surface of the second bonding sheet is bonded to the second substrate.

[0029] As a result, when multiple first members are arranged, variations in arrangement are likely to occur due to differences in the dimensions of the first members and the precision of the arrangement process of the first members. By using a pair of sheets according to the present disclosure, variations in the arrangement of the first members can be absorbed. The first substrate and the second substrate can be easily kept parallel, making it easier to achieve target design values ​​for device dimensions, heat dissipation, etc.

[0030] A semiconductor device according to a ninth aspect of the present disclosure is a semiconductor device according to the eighth aspect, wherein in at least one of the plurality of pairs of sheets, one of the second main surfaces is joined in a shifted relationship with respect to the other.

[0031] This allows the bonding state between the bonding sheets to be adjusted in accordance with variations in the placement of the first members, thereby absorbing variations in the placement of the first members.

[0032] A semiconductor device according to a tenth aspect of the present disclosure is the semiconductor device according to the ninth aspect, wherein the direction of misalignment between the second main surfaces is a tilt direction of the second main surfaces.

[0033] This allows the thickness of the pair of sheets to be adjusted, thereby absorbing variations in height of the plurality of first members.

[0034] A semiconductor device according to an eleventh aspect of the present disclosure is a semiconductor device according to the ninth or tenth aspect, wherein the direction of misalignment between the second main surfaces is a rotation direction about an axis perpendicular to the second main surfaces.

[0035] This allows the inclination of the main surfaces of the pair of sheets to be adjusted, thereby absorbing the inclination of the first member.

[0036] A semiconductor device according to a twelfth aspect of the present disclosure is a semiconductor device according to any one of the ninth to eleventh aspects, wherein the bonding surfaces of at least two of the plurality of first members with the corresponding first main surface are at different heights from the first substrate.

[0037] As a result, even if the heights of the joining surfaces of the plurality of first members are different, the variation in height can be absorbed by adjusting the joining state of the pair of sheets.

[0038] A semiconductor device according to a thirteenth aspect of the present disclosure is a semiconductor device according to any one of the ninth to twelfth aspects, wherein the bonding surface of each of at least one of the plurality of first members with the corresponding first main surface is inclined with respect to the first substrate.

[0039] As a result, even if the joint surface of the first member is inclined, the inclination can be absorbed by adjusting the joint state of the pair of sheets.

[0040] A method for manufacturing a semiconductor device according to a fourteenth aspect of the present disclosure includes the steps of: preparing a plurality of pairs of sheets, each including a first bonding sheet and a second bonding sheet, each of which is a bonding sheet according to any one of the first to fourth aspects; preparing a first substrate on which a plurality of the first members are arranged so that they do not overlap each other in a planar view; measuring at least one of the height from the first substrate and the inclination relative to the first substrate of the upper surface of each of the plurality of first members; arranging the plurality of pairs of sheets on the upper surfaces of the corresponding first members; and arranging a second substrate, which is the second member, so as to cover the plurality of pairs of sheets, wherein in the arranging step, the second main surfaces of at least one of the plurality of pairs of sheets are arranged so as to be offset from each other based on at least one of the height and the inclination of the upper surface of the corresponding first member.

[0041] This allows the distance and inclination between the first main surface of the first bonding sheet and the first main surface of the second bonding sheet to be changed by adjusting the positional relationship between the second main surfaces of the first bonding sheet and the second bonding sheet, and therefore, by arranging the first bonding sheet and the second bonding sheet in an appropriate positional relationship depending on the arrangement state of the first member, it is possible to absorb variations in the arrangement of the first member.

[0042] A manufacturing method of a semiconductor device according to a fifteenth aspect of the present disclosure is a manufacturing method of a semiconductor device according to the fourteenth aspect, wherein in the arranging step, the direction and amount of shift between the second main surfaces of the corresponding pair of sheets are determined based on at least one of the height and inclination of the upper surface of each of the plurality of first members, and the second main surfaces are shifted and arranged based on the determined direction and amount of shift.

[0043] This allows the amount of misalignment to be determined based on at least one of the measured height and inclination, making it possible to position the pair of sheets in an appropriate joining state depending on the position of the first member.

[0044] A semiconductor device manufacturing method according to a 16th aspect of the present disclosure is a semiconductor device manufacturing method according to the 14th or 15th aspect, wherein in the measuring step, the height of the upper surface of each of the plurality of first members from the first substrate is measured, and in the arranging step, for at least one of the plurality of pairs of sheets, the pair of sheets is arranged on the upper surface of the first member with one of the first bonding sheet and the second bonding sheet shifted relative to the other in the inclination direction of the second main surface based on the height of the upper surface of the corresponding first member.

[0045] As a result, even if the heights of the joining surfaces of the plurality of first members are different, the variation in height can be absorbed by adjusting the joining state of the pair of sheets.

[0046] A semiconductor device manufacturing method according to a seventeenth aspect of the present disclosure is a semiconductor device manufacturing method according to any one of the fourteenth to sixteenth aspects, wherein in the measuring step, the inclination of the upper surface of each of the plurality of first members relative to the first substrate is measured, and in the placing step, for at least one of the plurality of pairs of sheets, the pair of sheets is placed on the upper surface of the first member with one of the first bonding sheet and the second bonding sheet shifted relative to the other in a rotational direction with a direction perpendicular to the second main surface as the rotation axis based on the inclination of the upper surface of the corresponding first member.

[0047] As a result, even if the joint surface of the first member is inclined, the inclination can be absorbed by adjusting the joint state of the pair of sheets.

[0048] A method for manufacturing a semiconductor device according to an eighteenth aspect of the present disclosure includes the steps of: preparing a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is a bonding sheet according to any one of the first to fourth aspects; preparing a first substrate on which the first member is arranged; measuring the inclination of the upper surface of the first member relative to the first substrate; arranging the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction around a direction perpendicular to the second main surface as a rotation axis based on the inclination; and arranging the second substrate, which is the second member, so as to cover the pair of sheets.

[0049] This allows the inclination of the first main surface of the second bonding sheet relative to the first main surface of the first bonding sheet to be changed by adjusting the relative positions of the second main surfaces of the first bonding sheet and the second bonding sheet, and therefore, by arranging the first bonding sheet and the second bonding sheet in an appropriate positional relationship according to the inclination of the bonding surfaces of the first member, the inclination of the first member can be absorbed.

[0050] A semiconductor device manufacturing apparatus according to a nineteenth aspect of the present disclosure includes a first mounting section that positions a pair of sheets, each including a first bonding sheet and a second bonding sheet, which are bonding sheets according to any one of the first to fourth aspects, on the upper surface of a plurality of first members arranged on a first substrate so as not to overlap each other in a planar view; a second mounting section that positions a second substrate, which is the second member, so as to cover the plurality of paired sheets; and a measurement section that measures at least one of the height from the first substrate and the inclination relative to the first substrate of the upper surface of each of the plurality of first members, wherein the first mounting section positions the second main surfaces of at least one of the plurality of paired sheets so as to be offset from each other based on at least one of the height and the inclination of the upper surface of the corresponding first member.

[0051] This allows the distance and inclination between the first main surface of the first bonding sheet and the first main surface of the second bonding sheet to be changed by adjusting the positional relationship between the second main surfaces of the first bonding sheet and the second bonding sheet, and therefore, by arranging the first bonding sheet and the second bonding sheet in an appropriate positional relationship depending on the arrangement state of the first member, it is possible to absorb variations in the arrangement of the first member.

[0052] A semiconductor device manufacturing apparatus according to a twentieth aspect of the present disclosure includes a first mounting unit that places a pair of sheets, each including a first bonding sheet and a second bonding sheet, which are bonding sheets according to any one of the first to fourth aspects, on the upper surface of a first member that is placed on a first substrate; a second mounting unit that places the second member, which is a second substrate, so as to cover the pair of sheets; and a measurement unit that measures the inclination of the upper surface of the first member relative to the first substrate, wherein the first mounting unit places the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction with a direction perpendicular to the second main surface as a rotation axis based on the inclination.

[0053] This allows the inclination of the first main surface of the second bonding sheet relative to the first main surface of the first bonding sheet to be changed by adjusting the relative positions of the second main surfaces of the first bonding sheet and the second bonding sheet, and therefore, by arranging the first bonding sheet and the second bonding sheet in an appropriate positional relationship according to the inclination of the bonding surfaces of the first member, the inclination of the first member can be absorbed.

[0054] Hereinafter, the embodiments will be specifically described with reference to the drawings.

[0055] The embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, component placement and connection configurations, steps, and step order shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, among the components in the following embodiments, components not described in the independent claims are described as optional components.

[0056] Furthermore, each figure is a schematic diagram and is not necessarily an exact illustration. Therefore, for example, the scales of the figures do not necessarily match. Furthermore, in each figure, substantially the same components are given the same reference numerals, and redundant explanations are omitted or simplified.

[0057] Furthermore, in this specification, terms indicating the relationship between elements, such as parallel or perpendicular, terms indicating the shape of elements, such as square or rectangle, and numerical ranges are not expressions that only express a strict meaning, but are expressions that also include a substantially equivalent range, for example, a difference of about a few percent.

[0058] Furthermore, in this specification, the terms "above" and "below" do not refer to the upward direction (vertically upward) and downward direction (vertically downward) in absolute spatial recognition, but are used as terms defined by a relative positional relationship based on the stacking order in a stacked configuration. Furthermore, the terms "above" and "below" are applied not only to a case where two components are arranged with a gap between them and another component exists between the two components, but also to a case where two components are arranged closely together and the two components are in contact with each other.

[0059] In this specification and drawings, the x-axis, y-axis, and z-axis represent the three axes of a three-dimensional Cartesian coordinate system. In this specification, unless otherwise specified, the positive side of the z-axis is considered to be "upper (upper side)" and the negative side of the z-axis is considered to be "lower (lower side)."

[0060] Furthermore, in this specification, ordinal numbers such as "first" and "second" do not refer to the number or order of components unless otherwise specified, but are used for the purpose of avoiding confusion and distinguishing between components of the same type.

[0061] (Embodiment 1) [1-1. Configuration] First, an overview of a bonding sheet according to embodiment 1 will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a perspective view of a bonding sheet 10 according to the present embodiment. Fig. 2 is a side view of the bonding sheet 10 according to the present embodiment.

[0062] The bonding sheet 10 according to the present embodiment is one of a pair of sheets that bond a first member and a second member. The first member and the second member are, for example, semiconductor elements, spacers, or substrates. The pair of sheets is a bonding sheet pair consisting of two bonding sheets 10.

[0063] The bonding sheet 10 is electrically conductive, and therefore can be used as part of the electrical connection between the first member and the second member.

[0064] The bonding sheet 10 has a main surface 11, which is an example of a first main surface bonded to a first member or a second member, and a main surface 12, which is an example of a second main surface located opposite the first main surface. The main surface 12 is inclined with respect to the main surface 11. Note that the "main surface" refers to the surface having the largest or second largest area among the multiple surfaces of the member (here, the bonding sheet 10). Specifically, the main surface 12 is the surface having the largest area among the multiple surfaces of the bonding sheet 10. The main surface 11 is the surface having the second largest area among the multiple surfaces of the bonding sheet 10.

[0065] The bonding sheet 10 according to this embodiment has a flat rectangular parallelepiped shape (i.e., a rectangular parallelepiped whose height is shorter than the other sides) with one of the two bottom surfaces inclined. Specifically, the main surface 11 is a flat surface having a square shape in a plan view. The main surface 12 is a flat surface inclined relative to the main surface 11. The inclination direction of the main surface 12 is a direction parallel to one side of the main surface 11 (the x-axis direction).

[0066] As shown in FIGS. 1 and 2 , the bonding sheet 10 includes a substrate 20 and coating layers 21 and 22 .

[0067] The substrate 20 is an example of a metal layer containing a metal as a main component. The term "main component" means that the metal accounts for 50% by mass or more of the material that constitutes the member (here, the substrate 20). The substrate 20 is, for example, a metal block material made of silver (Ag).

[0068] 2 , the substrate 20 has a main surface 13, which is an example of a third main surface, and a main surface 14, which is an example of a fourth main surface and is located opposite the third main surface. The main surface 13 is a plane parallel to the main surface 11. The main surface 14 is a plane parallel to the main surface 12.

[0069] The base material 20 is a member that determines the shape of the bonding sheet 10. The base material 20 has a shape of a flat rectangular parallelepiped with one of the two bottom surfaces inclined. Specifically, the main surface 13 is a flat surface that has a square shape in a plan view. The main surface 14 is a flat surface inclined with respect to the main surface 13. The inclination direction of the main surface 14 is a direction parallel to one side of the main surface 13 (x-axis direction).

[0070] The substrate 20 is formed, for example, by using a molding technique that uses a mold. For example, by pressing a metal material, the substrate 20 can be formed in a shape in which the main surface 14 is inclined relative to the main surface 13. The method for forming the substrate 20 is not particularly limited. For example, the substrate 20 may be formed by grinding the main surface of a rectangular parallelepiped metal block material at an angle.

[0071] The principal surfaces 13 and 14 may have irregularities and may not be flat surfaces parallel to the principal surfaces 11 and 12. The coating layers 21 and 22 may be provided so as to fill in the irregularities provided on the principal surfaces 13 and 14.

[0072] The coating layer 21 is an example of a first coating layer, and covers at least a portion of the main surface 13. A portion of the surface of the coating layer 21 is the main surface 11. In the present embodiment, the coating layer 21 covers the entire main surface 13 with a uniform film thickness.

[0073] The coating layer 22 is an example of a second coating layer, and covers at least a portion of the main surface 14. A portion of the surface of the coating layer 22 is the main surface 12. In the present embodiment, the coating layer 22 covers the entire main surface 14 with a uniform film thickness.

[0074] The coating layers 21 and 22 contain a metal as a main component. Specifically, each of the coating layers 21 and 22 contains tin (Sn) or a tin alloy as a main component. A tin alloy is an alloy of tin and a metal other than tin. The other metal is, for example, silver (Ag), which is a metal contained in the base material 20, or copper (Cu), which is contained in the first member or the second member. For example, the coating layers 21 and 22 are formed by plating the main surfaces 13 and 14, respectively.

[0075] Note that a coating layer may also be provided on the side surface of the base material 20. That is, the coating layers 21 and 22 may be integrated so as to cover the entire surface of the base material 20. Alternatively, the bonding sheet 10 may not include the coating layers 21 and 22. In this case, the main surfaces 13 and 14 of the base material 20 become the main surfaces 11 and 12 of the bonding sheet 10, respectively.

[0076] As shown in FIG. 2 , the thickness T of the bonding sheet 10 represents the maximum thickness of the bonding sheet 10. That is, the thickness T is the maximum distance between the main surface 11 and the main surface 12 in a direction perpendicular to the main surface 11 (the z-axis direction in FIG. 2 ). The thickness T is the sum of the thickness Tb of the base portion of the bonding sheet 10 and the thickness Ts of the inclined portion of the bonding sheet 10. The thickness Ts is the distance between the lower end and the upper end of the main surface 12 in the z-axis direction, and corresponds to the height of the inclination. The inclination angle of the main surface 12 with respect to the main surface 11 is defined as r (unit: °). r is, for example, greater than 0° and less than 45°.

[0077] The thickness of each of the coating layers 21 and 22 is sufficiently smaller than the thickness T of the bonding sheet 10 and can be substantially ignored. Specifically, the thickness of each of the coating layers 21 and 22 is smaller than the thickness T of the bonding sheet 10 by two or three orders of magnitude or more. For example, the thickness T is in the range of 1.0 mm to 10 mm, while the thickness of each of the coating layers 21 and 22 is in the range of 0.1 μm to 10 μm, for example, 1 μm.

[0078] [1-2. How to Use the Bonding Sheet] Next, how to use the bonding sheet 10 will be described.

[0079] Two bonding sheets 10 are used as one set. That is, when bonding a first member and a second member, a pair of sheets including two bonding sheets 10 (hereinafter referred to as a bonding sheet pair) is used. The two bonding sheets 10 included in the bonding sheet pair have the same configuration, but are not limited to this. At least one of the shape, material, and size of the two bonding sheets 10 may be different.

[0080] Specifically, the main surfaces 12 of the two bonding sheets 10 are bonded to each other. One main surface 11 of each of the two bonding sheets 10 is bonded to a first member. The other main surface 11 of each of the two bonding sheets 10 is bonded to a second member.

[0081] Depending on the bonding state of the bonded sheet pair, the height of the bonded sheet pair and the inclination of the two main surfaces 11 of the bonded sheet pair can be adjusted to desired values ​​within a certain range and fixed in that state. This makes it possible to absorb variations in the arrangement of the first member and the second member bonded to the two main surfaces 11, respectively. Below, multiple bonding states that the bonded sheet pair can assume will be described using Figures 3A to 3C.

[0082] 3A is a side view of the bonded sheet pair 30 according to the present embodiment in the first bonded state. The bonded sheet pair 30 is an example of a pair of sheets and includes two bonded sheets 10A and 10B. The bonded sheet 10A is an example of a first bonded sheet. The bonded sheet 10B is an example of a second bonded sheet.

[0083] The bonding sheets 10A and 10B each have the same configuration as the bonding sheet 10 shown in Figures 1 and 2. The main surfaces 11A and 11B correspond to the main surface 11, which is an example of a first main surface, and the main surfaces 12A and 12B correspond to the main surface 12, which is an example of a second main surface. Note that the substrate 20 and the coating layers 21 and 22 are not shown in Figure 3A and the subsequent drawings.

[0084] As shown in Fig. 3A, in the first bonding state, the main surfaces 12A and 12B are arranged so as to completely coincide with each other. Although not shown in Fig. 3A, a first member, such as a semiconductor chip or a spacer, is bonded to the main surface 11A of the bonding sheet 10A. A second member, such as a substrate or a spacer, is bonded to the main surface 11B of the bonding sheet 10B.

[0085] When the main surfaces 12A and 12B are completely aligned, the thickness T1 of the bonding sheet pair 30 is the sum of the thickness T of the bonding sheet 10A and the thickness Tb of the base portion of the bonding sheet 10B. Furthermore, the main surface 11A, which is the bonding surface with the first member, and the main surface 11B, which is the bonding surface with the second member, are parallel to each other.

[0086] [1-2-2. Second Bonded State (Shifted State in the Inclined Direction)] FIG. 3B is a side view of the bonded sheet pair 30 according to this embodiment in the second bonded state.

[0087] 3B, in the second bonded state, one of the principal surfaces 12A and 12B is bonded with a tilted offset relative to the other. Here, the principal surface 12B of the bonded sheet 10B slides downward (in the negative x-axis direction) relative to the principal surface 12A of the bonded sheet 10A. In this case, the thickness T2 of the bonded sheet pair 30 is expressed as T1-Z1.

[0088] T1 is the thickness of the bonded sheet pair 30 in the state shown in Figure 3A and is expressed as T + Tb (= Ta + 2Tb). Z1 is the amount of displacement of the bonded sheet 10B in the z-axis direction. When the sliding amount in the x-axis direction from the state shown in Figure 3A is X1 and the inclination angle of each of the main surfaces 12A and 12B is r (unit: °), Z1 is expressed as Z1 = X1 × tan(r).

[0089] In this way, the thickness T2 of the bonded sheet pair 30 can be changed from the state shown in Fig. 3A. Specifically, the thickness T2 of the bonded sheet pair 30 can be made smaller than the thickness T1.

[0090] Furthermore, the main surface 12B of the bonding sheet 10B may slide upward relative to the main surface 12A of the bonding sheet 10A (in the positive direction of the x-axis). In this case, the thickness T2 of the bonding sheet pair 30 can be greater than the thickness T1 shown in FIG. 3A.

[0091] If bonding sheets 10A and 10B can be fixed together with even slight contact between main surfaces 12A and 12B, the thickness of bonding sheet pair 30 can be adjusted within a range of 2Tb to 2T. If main surfaces 12A and 12B need to be bonded together over half or more of their respective areas, the thickness of bonding sheet pair 30 can be adjusted within a range of T-Ta / 2 to 2T-Ta / 2.

[0092] As long as the main surfaces 12A and 12B are slid in the inclined direction (without being rotated), the main surface 11A, which is the joining surface with the first member, and the main surface 11B, which is the joining surface with the second member, are kept parallel to each other. That is, while maintaining the inclination of the main surfaces 11A and 11B, only the thickness T of the bonding sheet pair 30 can be adjusted to a desired value.

[0093] [1-2-3. Third Bonded State (Shifted State in the Rotational Direction)] FIG. 3C is a side view of the bonded sheet pair 30 according to this embodiment in the third bonded state.

[0094] As shown in Fig. 3C , in the third bonding state, one of the main surfaces 12A and 12B is bonded with a rotational offset relative to the other. The rotational direction is the direction of rotation about an axis perpendicular to the main surfaces 12A and 12B. Fig. 3C shows a state rotated 180° when the state shown in Fig. 3A is considered to be a case where the rotation angle is 0°.

[0095] By rotating one of the bonding sheets 10A and 10B relative to the other, the inclination angle of the main surface 11A relative to the main surface 11B changes. Specifically, the inclination angle changes within a range of 0° to 2r°. Therefore, by adjusting the rotation angle of one of the bonding sheets 10A and 10B, the inclination angle of the main surface 11A relative to the main surface 11B can be set and fixed to a desired value.

[0096] [1-3. Determining the Amount of Misalignment] Next, a method for determining the amount of misalignment of the bonding sheets 10A and 10B will be described.

[0097] The amount of misalignment between the bonding sheets 10A and 10B is determined based on the height and inclination of the upper surface of the first member bonded to the main surface 11A of the bonding sheet 10A. In the following, the semiconductor chip 40 shown in FIG. 4A is taken as an example of the first member.

[0098] 4A is a plan view of a semiconductor chip 40 bonded to the bonding sheet 10 according to the present embodiment. Here, the top surface of the semiconductor chip 40 has a square shape with a side length of D in plan view. The top surface of the semiconductor chip 40 is the bonding surface to the bonding sheet 10.

[0099] The height and inclination of the top surface of the semiconductor chip 40 are calculated by measuring the three-dimensional position at four positions P1 to P4 near the edge of the top surface. The three-dimensional position is measured using, for example, a distance measuring device that uses laser light. The height and inclination of the top surface of the semiconductor chip 40 are calculated based on the measurement results of the four positions. The height and inclination are respectively expressed as the maximum height of the top surface from a predetermined reference plane and the inclination angle of the top surface relative to the reference plane. The number of measurement positions may be three.

[0100] From the measurement results, the inclination angle of the top surface is A (unit: °), and the deviation from the reference height is B (unit: mm). Note that the reference height is, for example, the height of the top surface of one of the other first members mounted on the same substrate, or the average value of the heights of the top surfaces of multiple first members (including semiconductor chip 40) mounted on the same substrate.

[0101] First, the rotation angle θ (unit: °) of the bonding sheet 10A is calculated so that the main surface 11A of the bonding sheet 10A has the same inclination as the inclination angle A. The rotation angle θ corresponds to the amount of deviation in the rotation direction. Here, the axis perpendicular to the main surface 11A is used as the rotation axis, which corresponds one-to-one to the case where the axis perpendicular to the main surface 12A is used as the rotation axis.

[0102] 3C, by rotating the main surface 11A from 0° to 180°, the tilt angle of the main surface 11A changes from 0° to 2r°. Because there is a proportional relationship between the rotation angle and the tilt angle of the main surface 11A, θ:A=180:2r holds. Therefore, the rotation angle θ is expressed by the following equation (1).

[0103] (1) θ=90°×A / r

[0104] In plan view, the main surface 11 is larger than the top surface of the semiconductor chip 40. Although not essential, it is desirable that the main surface 11A covers the entire top surface of the semiconductor chip 40 when the bonding sheet 10A is rotated by a rotation angle θ. Since the bonding area between the semiconductor chip 40 and the bonding sheet 10A is increased, heat dissipation and conductivity are improved.

[0105] 4B is a plan view illustrating the size relationship between the bonding sheet 10A according to the present embodiment and the semiconductor chip 40. In FIG. 4B, the main surface 11A of the bonding sheet 10A is shown rotated by a rotation angle θ (unit: °) around an axis that passes through the center of the top surface of the semiconductor chip 40 and is perpendicular to the top surface.

[0106] If the length of one side of the main surface 11A so that the main surface 11A covers the entire top surface of the semiconductor chip 40 during rotation is S1, S1 is expressed by the following equation (2).

[0107] (2) S1=D×sin(θ)+D×cos(θ)

[0108] Therefore, S1 can be in the range of not less than D and not more than D × √2. Therefore, as long as the length S1 of one side of the main surface 11A is not less than √2 times the length D of one side of the top surface of the semiconductor chip 40, the main surface 11A can be bonded to the entire top surface of the semiconductor chip 40 regardless of the value of the rotation angle θ.

[0109] Next, a sliding distance X1 (unit: mm) in the inclined direction of the bonding sheet 10B to absorb the height variation is calculated. The sliding distance X1 corresponds to the amount of deviation in the inclined direction. As shown in FIG. 3B , the sliding distance X1 is expressed by the following formula (3) using an adjustment distance Z1 of the thickness of the bonding sheet pair 30.

[0110] (3) X1=Z1÷tan(r)

[0111] By using the deviation amount B from the reference height obtained by measurement as the thickness adjustment amount Z1, the deviation amount X1 can be calculated.

[0112] Although not essential, it is desirable that the main surface 11B of the bonding sheet 10B covers the entire upper surface of the semiconductor chip 40 in a top view when the bonding sheet 10B is slid relative to the bonding sheet 10A. That is, it is desirable that both the bonding sheets 10A and 10B are arranged so that no gap is formed in the space directly above the upper surface of the semiconductor chip 40. In this way, in order for the main surface 11B of the bonding sheet 10B to cover the entire upper surface of the semiconductor chip 40 when slid by a sliding amount X1, the length S of one side of the main surface 11B of the bonding sheet 10B only needs to be D+X1 or more. This improves heat dissipation and conductivity.

[0113] When both rotation and sliding are performed on the bonded sheet pair 30, the length S of each side of the main surfaces 11A and 11B may be equal to or greater than the sum of the length S1 of one side of the main surface 11A shown in formula (2) for covering rotation and the sliding amount X1. In other words, the length S of one side may satisfy formula (4).

[0114] (4) S≧S1+X1=D(sin(θ)+cos(θ))+B / tan(r)

[0115] For example, if the shape of the main surfaces 11A and 11B in a plan view is rectangular, the length of the short side can be regarded as S. Furthermore, if the shape of the top surface of the semiconductor chip 40 in a plan view is rectangular, the length of the long side can be regarded as D.

[0116] Depending on the bonding state of the bonding sheets 10A and 10B, one or both of the bonding sheets 10A and 10B may come into contact with a member such as a substrate. Below, the thickness (representatively, the thickness T of the bonding sheet 10) required for the bonding sheets 10A and 10B to not come into contact with other members will be described mainly with reference to FIG. 2 .

[0117] The thickness Ts of the inclined portion of the bonding sheet 10 is expressed by the following formula (5) using the length S of one side of the main surface 11 and the inclination angle r of the main surface 12.

[0118] (5) Ts=tan(r)×S

[0119] When the bonding sheet 10 is rotated at a rotation angle θ, the following formula (6) is obtained from formulas (2) and (5).

[0120] (6) Ts=tan(r)×D(sin(θ)+cos(θ))

[0121] Furthermore, when rotated at the rotation angle θ, it is desirable that the lower end of the bonding sheet 10B does not protrude downward from the main surface 11A of the bonding sheet 10A. If the lower end of the bonding sheet 10B protrudes downward, there is a risk of contact with other components. In order for the lower end of the bonding sheet 10B not to protrude downward from the main surface 11A of the bonding sheet 10A, it is sufficient that the thickness Tb of the base portion of the bonding sheet 10B satisfies the following formula (7).

[0122]

[0123] 3B , when the bonding sheet 10B is slid by a slide amount X1 in the direction of sliding down relative to the bonding sheet 10A, the thickness Tb of the base portion of the bonding sheet 10 also requires a deviation amount B from the reference height. In light of the above, the thickness T of the bonding sheet 10 requires the sum of Ts shown in equation (6), the minimum value of Tb shown in equation (7), and the deviation amount B from the reference height. Therefore, the thickness T of the bonding sheet 10 may be within the range shown in the following equation (8).

[0124]

[0125] If the thickness T of the bonding sheet pair 30 becomes too large, the heat dissipation and conductivity deteriorate. Furthermore, an increase in the thickness T also leads to an increase in the size of the semiconductor device. In this embodiment, for example, the thickness T is 10 mm or less, and may be 7 mm or less, but is not limited thereto. The thickness Tb and the thickness Ts may be equal to each other, or one may be longer than the other.

[0126] The inclination angle r (unit: °) of the main surface 12 is greater than 0° and less than 45°. The inclination angle r may be greater than 1° and equal to or less than 20°. As is clear from the above formula (8), the minimum value of the thickness T of the bonding sheet 10 changes depending on the value of the inclination angle r.

[0127] 5 is a diagram showing the relationship between the inclination angle r of the main surface 12 of the bonding sheet 10 and the thickness T of the bonding sheet 10. In FIG. 5, the horizontal axis represents the inclination angle r (unit: °), and the vertical axis represents the thickness T (unit: mm). In FIG. 5, the values ​​of T calculated based on Equation (8) are plotted in 1° increments for inclination angles ranging from 1° to 17°. In the calculation, the inclination A of the semiconductor chip 40 is set to 1°, the deviation B from the reference height is set to 0.1 mm, and the length D of one side of the top surface of the semiconductor chip 40 is set to 5 mm.

[0128] As shown in Figure 5, when the inclination angle r is in the range of 2° to 17°, the thickness T of the bonding sheet 10 can be approximately 3 mm or less. Also, when the inclination angle r is in the range of 4° to 15°, the thickness T of the bonding sheet 10 can be approximately 2 mm or less. Furthermore, when the inclination angle r is in the range of 7° to 8°, the thickness T of the bonding sheet 10 is minimized. By reducing the thickness T of the bonding sheet 10, the heat dissipation and conductivity can be further improved, and it can contribute to the miniaturization of semiconductor devices.

[0129] Second Embodiment Next, a second embodiment will be described.

[0130] In the second embodiment, a semiconductor device including the bonding sheet pair described in the first embodiment will be described. The following description will focus on differences from the first embodiment, and descriptions of commonalities will be omitted or simplified.

[0131] [2-1. Configuration] First, the configuration of the semiconductor device according to the second embodiment will be described with reference to Fig. 6. Fig. 6 is a cross-sectional view of the semiconductor device 100 according to the present embodiment.

[0132] 6, the semiconductor device 100 includes a lower substrate 110, an upper substrate 120, bonding members 131, 132, and 133, semiconductor chips 141, 142, and 143, bonding sheet pairs 151, 152, and 153, and a sealing member 160. In this embodiment, the semiconductor chips and the bonding sheet pairs are in one-to-one correspondence.

[0133] The lower substrate 110 is an example of a first substrate and includes a heat sink 112, an insulating layer 114, and electrodes 116, 117, and 118.

[0134] The heat sink 112 is a flat plate mainly composed of a material with high thermal conductivity, such as metal. The heat sink 112 is a metal plate made of, for example, copper (Cu). The heat sink 112 is provided mainly to dissipate heat generated by each of the semiconductor chips 141, 142, and 143 into the air or other components.

[0135] The insulating layer 114 is a layer containing an electrically insulating material as its main component. The insulating layer 114 is composed of silicon nitride, alumina, aluminum nitride, or the like. The insulating layer 114 is provided to electrically insulate each of the electrodes 116, 117, and 118 from the heat sink 112. The insulating layer 114 is larger than the heat sink 112 and covers the entire upper surface of the heat sink 112, but this is not limited to this. The insulating layer 114 may be the same size as the heat sink 112 or smaller than the heat sink 112. The insulating layer 114 may also be provided in an island shape only in the areas where the electrodes 116, 117, and 118 are provided. In other words, the insulating layer 114 only needs to ensure electrical insulation between the electrodes 116, 117, and 118 and the heat sink 112, and may leave some portions of the upper surface of the heat sink 112 uncovered.

[0136] The electrodes 116, 117, and 118 correspond one-to-one to the semiconductor chips 141, 142, and 143, respectively. The electrodes 116, 117, and 118 may be electrically connected to one another. The electrodes 116, 117, and 118 contain a conductive material as a main component. For example, the electrodes 116, 117, and 118 are made of a metal such as copper (Cu).

[0137] The upper substrate 120 is an example of a second substrate arranged parallel to the first substrate. Note that the term "the first substrate and the second substrate are arranged parallel" means that one main surface of the first substrate and one main surface of the second substrate are parallel. For example, the two main surfaces of the first substrate and the second substrate that face each other are parallel.

[0138] In the present embodiment, the upper substrate 120 is also an example of a second member to which the pair of bonding sheets 151, 152, and 153 are bonded. As shown in FIG. 6 , the upper substrate 120 includes a heat sink 122, an insulating layer 124, and an electrode 126.

[0139] The heat sink 122 is a flat plate mainly composed of a material with high thermal conductivity, such as metal. The heat sink 122 is a metal plate made of, for example, copper (Cu). The heat sink 122 is provided mainly to dissipate heat generated by each of the semiconductor chips 141, 142, and 143 into the air or other components.

[0140] The insulating layer 124 is a layer containing an electrically insulating material as its main component. The insulating layer 124 is made of silicon nitride, alumina, aluminum nitride, or the like. The insulating layer 124 is provided to electrically insulate the electrode 126 from the heat sink 122. The insulating layer 124 is larger than the heat sink 122 and covers the entire lower surface of the heat sink 122, but this is not limited to this. The insulating layer 124 may be the same size as the heat sink 122 or smaller than the heat sink 122. The insulating layer 124 only needs to ensure electrical insulation between the electrode 126 and the heat sink 122, and may leave some of the lower surface of the heat sink 122 uncovered.

[0141] The electrode 126 is a single electrode common to the semiconductor chips 141, 142, and 143. Alternatively, electrodes corresponding one-to-one to the semiconductor chips 141, 142, and 143, similar to the electrodes 116, 117, and 118 of the lower substrate 110, may be provided instead of the electrode 126. The electrode 126 contains a conductive material as its main component. For example, the electrode 126 is made of a metal such as copper (Cu).

[0142] The lower substrate 110 and the upper substrate 120 are each, for example, a DBC (Direct Bonded Copper) substrate. The lower substrate 110 and the upper substrate 120 are formed by depositing a copper film on both sides of the insulating layers 114 and 124, which are plates made of a ceramic material, and then patterning them as necessary. The configuration of the lower substrate 110 and the upper substrate 120 is not particularly limited. For example, the heat sink 112 or 122, or the electrodes 116, 117, 118, or 126 may have a single-layer or multi-layer structure of a metal or a metal alloy. The insulating layer 114 or 124 may have a single-layer or multi-layer structure of an insulating film. The lower substrate 110 and the upper substrate 120 may also include only a metal heat sink.

[0143] The bonding members 131, 132, and 133 are provided in different regions on the upper surface of the lower substrate 110. The bonding members 131, 132, and 133 correspond one-to-one to the semiconductor chips 141, 142, and 143, respectively. Specifically, the bonding member 131 bonds the lower surface of the semiconductor chip 141 to the electrode 116. The bonding member 132 bonds the lower surface of the semiconductor chip 142 to the electrode 117. The bonding member 133 bonds the lower surface of the semiconductor chip 143 to the electrode 118.

[0144] Each of the bonding members 131, 132, and 133 contains a conductive material as a main component. For example, the bonding members 131, 132, and 133 are flat rectangular parallelepiped members made of silver (Ag) with a tin (Sn) coating (e.g., plating) on ​​the surface. Alternatively, each of the bonding members 131, 132, and 133 may be an Ag sintering paste. The Ag sintering paste is a sintering material containing nano-sized or micro-sized Ag particles.

[0145] Each of the semiconductor chips 141, 142, and 143 is an example of a first component that is a semiconductor element. The semiconductor chips 141, 142, and 143 are arranged between the lower substrate 110 and the upper substrate 120 so as not to overlap with each other when viewed in plan of the lower substrate 110. In this embodiment, each of the semiconductor chips 141, 142, and 143 is an element having two electrodes.

[0146] 7A, 7B, and 7C are top, side, and bottom views showing the configurations of semiconductor chips 141, 142, and 143 of semiconductor device 100 according to this embodiment. Semiconductor chips 141, 142, and 143 are specific examples of semiconductor chip 40 shown in embodiment 1, and have the same configuration as each other, so the following description will be given using semiconductor chip 141 as a representative example.

[0147] The semiconductor chip 141 is a semiconductor element having two external electrodes, such as a Schottky barrier diode (SBD) or a freewheeling diode (FWD). As shown in FIG. 7 , the semiconductor chip 141 has a chip body 145, a bottom electrode 146, and a top electrode 147.

[0148] The chip body 145 is the main body of an element formed on a substrate containing silicon carbide (SiC), silicon (Si), gallium nitride (GaN), gallium oxide (GaO), diamond, or the like as a main component. The chip body 145 has a flat rectangular parallelepiped shape. The size of the chip body 145 is not particularly limited, but the length of one side is within the range of 1 mm to 20 mm, and the thickness is within the range of 0.01 mm to 0.5 mm.

[0149] The lower electrode 146 is provided on the lower surface of the chip body 145. The lower electrode 146 has a single-layer structure or a multi-layer structure made of a metal or a metal alloy. For example, the lower electrode 146 has a layered structure of titanium (Ti), nickel (Ni), and silver (Ag) provided in this order from the chip body 145 side, but is not limited to this. For example, the outermost layer (bottom layer) of the lower electrode 146 may be gold (Au).

[0150] The top electrode 147 is provided on the top surface of the chip body 145. The top electrode 147 has a single-layer structure or a multi-layer structure made of a metal or a metal alloy. For example, the top electrode 147 has a layered structure of titanium (Ti), nickel (Ni), and silver (Ag) provided in this order from the chip body 145 side, but is not limited to this. For example, the outermost surface (top layer) of the top electrode 147 may be gold (Au).

[0151] When the semiconductor chip 141 is a diode, one of the lower electrode 146 and the upper electrode 147 is an anode electrode, and the other is a cathode electrode. The lower electrode 146 and the upper electrode 147 are provided so as to cover almost the entire lower surface and upper surface of the chip body 145, respectively. The upper surface of the upper electrode 147 is the upper surface of the semiconductor chip 141, and is connected to the first main surface (main surface 11A) of the corresponding bonding sheet pair 30 (bonding sheet pair 151, 152, or 153).

[0152] Bonding sheet pairs 151, 152, and 153 are each the bonding sheet pair 30 shown in embodiment 1. As shown in FIG. 6, bonding sheet pair 151 includes bonding sheets 151A and 151B. Bonding sheet pair 152 includes bonding sheets 152A and 152B. Bonding sheet pair 153 includes bonding sheets 153A and 153B. Bonding sheets 151A, 152A, and 153A are each an example of a first bonding sheet, and are the bonding sheet 10A shown in FIGS. 3A to 3C. Bonding sheets 151B, 152B, and 153B are each an example of a second bonding sheet, and are the bonding sheet 10B shown in FIGS. 3A to 3C.

[0153] In this embodiment, the bonding sheet pairs 151, 152, and 153 correspond one-to-one to the semiconductor chips 141, 142, and 143, respectively. The first main surface (main surface 11A) of the bonding sheet 151A is bonded to the semiconductor chip 141 (specifically, the upper electrode 147). The first main surface (main surface 11A) of the bonding sheet 152A is bonded to the semiconductor chip 142 (specifically, the upper electrode 147). The first main surface (main surface 11A) of the bonding sheet 153A is bonded to the semiconductor chip 143 (specifically, the upper electrode 147). The first main surface (main surface 11B) of each of the bonding sheets 151B, 152B, and 153B is bonded to the upper substrate 120 (specifically, the electrode 126). The specific bonding state of each of the bonding sheet pairs 151, 152, and 153 will be described later.

[0154] The sealing member 160 is a resin member that seals the semiconductor chips 141, 142, and 143. The sealing member 160 is formed using an insulating resin material such as epoxy. The sealing member 160 is provided to protect the semiconductor chips 141, 142, and 143, etc., from moisture, air, etc.

[0155] [2-2. Example of absorbing height variations] In this embodiment, the heights of the top surfaces of semiconductor chips 141, 142, and 143 are different. Note that the height here refers to the distance from the top surface of lower substrate 110 (specifically, electrodes 116, 117, and 118). As shown in FIG. 6 , the top surface of semiconductor chip 141 is lower than the top surface of semiconductor chip 142 and higher than the top surface of semiconductor chip 143.

[0156] In the semiconductor device 100, it is possible to absorb variations in the height of the upper surfaces of the semiconductor chips 141, 142, and 143 by adjusting the bonding state of the bonding sheet pairs 151, 152, and 153. Specifically, the bonding state of each of the bonding sheet pairs 151, 152, and 153 is determined based on the measurement results of the height of the upper surfaces of the semiconductor chips 141, 142, and 143 so that the first main surfaces (main surfaces 11B) of the bonding sheets 151B, 152B, and 153B are at the same height.

[0157] 8 is a plan view showing the bonded state of multiple bonding sheet pairs 151, 152, and 153 of the semiconductor device 100 according to this embodiment. In FIG. 8, dashed arrows indicate the inclination direction of the bonding sheets (lower bonding sheets 151A, 152A, and 153A) bonded to the first member (semiconductor chips 141, 142, and 143). Solid arrows indicate the inclination direction of the bonding sheets (upper bonding sheets 151B, 152B, and 153B) bonded to the second member (upper substrate 120). The inclination direction is defined as the positive direction in the direction in which the thickness of each bonding sheet decreases (the negative direction of the x-axis in the example shown in FIG. 2).

[0158] In the pair of bonding sheets 151, as shown in FIGS. 6 and 8, the bonding sheets 151A and 151B are arranged so as to completely coincide with each other when viewed from above (the bonding state shown in FIG. 3A).

[0159] 6 and 8, in the bonding sheet pair 152, the bonding sheet 152B is arranged to slide downward relative to the bonding sheet 152A (bonded state shown in FIG. 3B). Since the top surface of the semiconductor chip 142 is positioned higher than the top surface of the semiconductor chip 141, the thickness of the bonding sheet pair 152 is made thinner than the thickness of the bonding sheet pair 151 to absorb the height difference.

[0160] 6 and 8, in the bonding sheet pair 153, the bonding sheet 153B is arranged to slide upward relative to the bonding sheet 153A. Since the top surface of the semiconductor chip 143 is located at a lower position than the top surface of the semiconductor chip 141, the thickness of the bonding sheet pair 153 is made thicker than the thickness of the bonding sheet pair 151 to absorb the height difference.

[0161] In the bonding sheet pair 151, the main surface 11A of the lower bonding sheet 151A and the semiconductor chip 141 are positioned so that their centers coincide with each other. In contrast, in the bonding sheet pairs 152 and 153, the main surfaces 11A of the lower bonding sheets 152A and 153A are positioned so that their centers do not coincide with each other. In other words, the bonding positions of the lower bonding sheets 151A, 152A, and 153A and the corresponding semiconductor chips 141, 142, and 143 are different. By varying the bonding positions, gaps between the bonding sheets are prevented from forming in the spaces directly above the semiconductor chips 141, 142, and 143. This allows heat generated by each of the semiconductor chips 141, 142, and 143 to be efficiently transferred to the upper substrate 120, improving heat dissipation. This also improves the mechanical strength and conductivity of the bond.

[0162] As described above, in the semiconductor device 100 according to this embodiment, the bonding state of each of the bonding sheet pairs 151, 152, and 153 is adjusted based on the height of the upper surface of the corresponding semiconductor chips 141, 142, and 143. This absorbs variations in the height of the upper surfaces of the semiconductor chips 141, 142, and 143. Furthermore, since there are no gaps between the bonding sheet pairs in the spaces directly above each of the semiconductor chips 141, 142, and 143, the thermal, electrical, and mechanical bonding between each semiconductor chip and the upper substrate 120 can be strengthened. This improves heat dissipation, conductivity, and mechanical bonding strength.

[0163] 2-3. Examples of Inclination Absorption Next, examples of inclination absorption by the bonded sheet pairs 151, 152, and 153 will be described with reference to FIGS. 9 and 10. FIG.

[0164] 9 is a cross-sectional view showing another example of a semiconductor device according to the present embodiment. The semiconductor device 101 shown in FIG. 9 has the same components as the semiconductor device 100 shown in FIG. 6. The semiconductor device 101 differs from the semiconductor device 100 in the posture and position of the semiconductor chips 142 and 143 and the bonding state of the bonding sheet pair 152 and 153. The following description will focus on the differences from the semiconductor device 100, and the description of the commonalities will be omitted or simplified.

[0165] 9, the upper surfaces of the semiconductor chips 142 and 143 are inclined with respect to the upper surface of the semiconductor chip 141. The inclination angle of the upper surface of the semiconductor chip 143 is larger than the inclination angle of the upper surface of the semiconductor chip 142.

[0166] 10 is a plan view showing the bonded state of multiple bonding sheet pairs 151, 152, and 153 of the semiconductor device 100 according to this embodiment. In FIG. 10, dashed arrows indicate the inclination direction of the bonding sheets (lower bonding sheets 151A, 152A, and 153A) bonded to the first member (semiconductor chips 141, 142, and 143). Solid arrows indicate the inclination direction of the bonding sheets (upper bonding sheets 151B, 152B, and 153B) bonded to the second member (upper substrate 120). The inclination direction is defined as the positive direction in the direction in which the thickness of each bonding sheet decreases (the negative direction of the x-axis in the example shown in FIG. 2).

[0167] 9 and 10 , in the bonding sheet pair 152, one of the bonding sheets 152A and 152B is arranged rotated relative to the other at a rotation angle θ. The rotation angle θ is determined based on the inclination angle of the top surface of the semiconductor chip 142. As a result, the first main surface (main surface 11A) of the bonding sheet 152A is inclined relative to the first main surface (main surface 11B) of the bonding sheet 152B, thereby absorbing the inclination of the top surface of the semiconductor chip 142. In other words, the first main surface (main surface 11B) of the bonding sheet 152B can be made flush with the first main surface (main surface 11B) of the bonding sheet 151B.

[0168] 9 and 10, in the bonding sheet pair 153, one of the bonding sheets 153A and 153B is rotated 180° relative to the other (bonded state shown in FIG. 3C). Here, an example in which the rotation angle is 180° is shown, but it may be less than 180°. This causes the first main surface (main surface 11A) of the bonding sheet 153A to be inclined relative to the first main surface (main surface 11B) of the bonding sheet 153B, thereby absorbing the inclination of the top surface of the semiconductor chip 143. In other words, the first main surface (main surface 11B) of the bonding sheet 153B can be flush with the first main surface (main surface 11B) of the bonding sheet 151B.

[0169] Even in a rotated state, no gaps are formed between the pair of bonding sheets in the space directly above each of the semiconductor chips 142 and 143. Specifically, the bonding positions between each of the main surfaces 11A of the bonding sheets 152A and 153A and each of the semiconductor chips 142 and 143 are adjusted. This allows heat generated by each of the semiconductor chips 141, 142, and 143 to be efficiently transferred to the upper substrate 120, improving heat dissipation. It also improves the mechanical strength and conductivity of the bond.

[0170] As described above, in the semiconductor device 101 according to this embodiment, the bonding state of each of the bonding sheet pairs 151, 152, and 153 is adjusted based on the inclination of the upper surfaces of the corresponding semiconductor chips 141, 142, and 143. This absorbs the inclination of the upper surfaces of the semiconductor chips 141, 142, and 143. Furthermore, since there are no gaps between the bonding sheet pairs in the spaces directly above each of the semiconductor chips 141, 142, and 143, the thermal, electrical, and mechanical bonding between each semiconductor chip and the upper substrate 120 can be strengthened. This improves heat dissipation, conductivity, and mechanical bonding strength.

[0171] [2-4. Manufacturing Method] Next, a manufacturing method of the semiconductor device 100 will be described with reference to FIGS. 11A to 11E.

[0172] 11A to 11E are cross-sectional views showing the steps of a method for manufacturing the semiconductor device 100 according to this embodiment.

[0173] First, as shown in Fig. 11A, the lower substrate 110 is prepared. For example, a metal film such as copper is formed on each of the upper and lower surfaces of the insulating layer 114, and then the metal film is patterned as necessary to create the lower substrate 110. Note that the method for creating the lower substrate 110 is not limited to this. Alternatively, a pre-created lower substrate 110 may be used.

[0174] 11B , bonding members 131, 132, and 133 are placed on the upper surfaces of the electrodes 116, 117, and 118 of the lower substrate 110. The bonding members 131, 132, and 133 are, for example, block-shaped members made of silver (Ag) whose surfaces are coated with tin (Sn) (Sn-coated bonding material), or Ag sintered paste.

[0175] Next, as shown in FIG. 11C , semiconductor chips 141, 142, and 143 are placed on the upper surfaces of the bonding members 131, 132, and 133, respectively. After the semiconductor chips 141, 142, and 143 are placed, the bonding members 131, 132, and 133 are bonded by heat treatment. The heat treatment is a process depending on the material of the bonding members 131, 132, and 133. For example, if the bonding members 131, 132, and 133 are Sn-coated bonding materials, the heat treatment is a reflow treatment using formic acid reduction or hydrogen reduction. Furthermore, if the bonding members 131, 132, and 133 are Ag sintering paste, the heat treatment is reflow or annealing in a nitrogen atmosphere. As a result, the lower surfaces of the bonding members 131, 132, and 133 are bonded to the electrodes 116, 117, and 118, respectively, and the upper surfaces of the bonding members 131, 132, and 133 are bonded to the semiconductor chips 141, 142, and 143, respectively.

[0176] Next, as shown in FIG. 11D , bonding sheet pairs 151, 152, and 153 are placed on the top surfaces of semiconductor chips 141, 142, and 143, respectively. Although not shown in the figure, prior to the placement process of the bonding sheet pairs, at least one of the height and inclination of the top surfaces of each of the semiconductor chips 141, 142, and 143 is measured. Based on the measurement results, the direction and amount of misalignment between the second main surfaces (main surfaces 12A and 12B) of the bonding sheet pairs corresponding to each semiconductor chip are determined. Specifically, the three-dimensional position (x-coordinate, y-coordinate, z-coordinate) and rotation angle (θ) of each of the two bonding sheets are calculated. Alternatively, the direction and amount of misalignment between the second main surfaces may be calculated. Based on the calculated three-dimensional positions and rotation angles, lower bonding sheets 151A, 152A, and 153A and upper bonding sheets 151B, 152B, and 153B are placed. As a result, the second main surfaces of the corresponding bonding sheets 151, 152, and 153 are arranged in a misaligned manner depending on the height and inclination of the upper surface of each semiconductor chip. As shown by the dashed lines in Figure 11D, the upper surfaces (main surfaces 11B) of the bonding sheets 151, 152, and 153 are flush with each other.

[0177] Next, as shown in FIG. 11E , the upper substrate 120 is positioned so as to cover the upper surfaces of the bonding sheet pairs 151, 152, and 153. After the upper substrate 120 is positioned, the bonding sheets 151, 152, and 153 are bonded together by heat treatment. For example, if the bonding sheets of the bonding sheet pairs 151, 152, and 153 are made of a Sn-coated bonding material, a reflow treatment using formic acid reduction or hydrogen reduction is performed as the heat treatment. This bonds the first main surface (main surface 11A) of the lower first bonding sheet of each bonding sheet pair to the corresponding semiconductor chip, the second main surface (main surface 11B) of the upper second bonding sheet of each bonding sheet pair to the upper substrate 120, and the second main surfaces (main surfaces 12A and 12B) of each bonding sheet pair to each other. After bonding, the positional relationship between the first bonding sheet and the second bonding sheet is fixed and maintained in a stable state. At each joint, an alloy of copper (Cu) and tin (Sn) or an alloy of silver (Ag) and tin (Sn) is formed, providing good thermal, mechanical, and electrical bonding.

[0178] Next, the structure shown in FIG. 11E is sealed with a sealing member 160 such as resin, thereby manufacturing the semiconductor device 100 or 101 shown in FIG. 6 or FIG.

[0179] As described above, by using a coating layer of Sn or the like provided on the surface of the bonding sheet, the bonding between the bonding sheets and between the bonding sheet and other components can be strengthened thermally, electrically, and mechanically. This improves the heat dissipation, electrical conductivity, and mechanical bonding strength of the semiconductor device 100 or 101. For example, in terms of heat dissipation, heat resistance of 250°C can be achieved.

[0180] Third Embodiment Next, a third embodiment will be described.

[0181] The main difference between the third embodiment and the second embodiment is the configuration of the bonding sheet. The following description will focus on the differences from the second embodiment, and the description of the commonalities will be omitted or simplified.

[0182] [3-1. Configuration] First, the configuration of the semiconductor device according to the third embodiment will be described with reference to FIG.

[0183] Fig. 12 is a cross-sectional view of a semiconductor device 200 according to this embodiment. As shown in Fig. 12, the semiconductor device 200 includes bonding sheet pairs 251, 252, and 253 instead of bonding sheet pairs 151, 152, and 153, as compared to the semiconductor device 100 shown in Fig. 6. The semiconductor device 200 also includes bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279.

[0184] As shown in Fig. 12, the bonding sheet pair 251 includes bonding sheets 251A and 251B. The bonding sheet pair 252 includes bonding sheets 252A and 252B. The bonding sheet pair 253 includes bonding sheets 253A and 253B. The bonding sheets 251A, 252A, and 253A are each an example of a first bonding sheet, and have a configuration similar to that of the bonding sheet 10 shown in Fig. 2 without the coating layers 21 and 22. The bonding sheets 251B, 252B, and 253B are each an example of a second bonding sheet, and have a configuration similar to that of the bonding sheet 10 shown in Fig. 2 without the coating layers 21 and 22. For example, the bonding sheets 251A, 251B, 252A, 252B, 253A, and 253B are each a metal block member made of silver (Ag).

[0185] The bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279 are each a member that bonds two adjacent members together. The bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279 are each electrically conductive. For example, the bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279 are made of a sintered material of silver (Ag).

[0186] The bonding layer 271 bonds the top surface of the semiconductor chip 141 to the first main surface (main surface 11A) of the bonding sheet 251A of the bonding sheet pair 251. The bonding layer 272 bonds the top surface of the semiconductor chip 142 to the first main surface (main surface 11A) of the bonding sheet 252A of the bonding sheet pair 252. The bonding layer 273 bonds the top surface of the semiconductor chip 143 to the first main surface (main surface 11A) of the bonding sheet 253A of the bonding sheet pair 253.

[0187] The bonding layer 274 bonds the second main surface (main surface 12A) of the bonding sheet 251A to the second main surface (main surface 12B) of the bonding sheet 251B of the bonding sheet pair 251. The bonding layer 275 bonds the second main surface (main surface 12A) of the bonding sheet 252A to the second main surface (main surface 12B) of the bonding sheet 252B of the bonding sheet pair 252. The bonding layer 276 bonds the second main surface (main surface 12A) of the bonding sheet 253A to the second main surface (main surface 12B) of the bonding sheet 253B of the bonding sheet pair 253.

[0188] The bonding layer 277 bonds the first main surface (main surface 11B) of the bonding sheet 251B of the bonding sheet pair 251 to the electrode 126 of the upper substrate 120. The bonding layer 278 bonds the first main surface (main surface 11B) of the bonding sheet 252B of the bonding sheet pair 252 to the electrode 126 of the upper substrate 120. The bonding layer 279 bonds the first main surface (main surface 11B) of the bonding sheet 253B of the bonding sheet pair 253 to the electrode 126 of the upper substrate 120.

[0189] 12, similarly to the semiconductor device 100 shown in Fig. 6, bonding sheet pairs 251, 252, and 253 are arranged in different bonding states so as to absorb variations in height of the upper surfaces of the semiconductor chips 141, 142, and 143. The bonding states of the bonding sheet pairs 251, 252, and 253 are the same as the bonding states of the bonding sheet pairs 151, 152, and 153 shown in Fig. 6 and Fig. 8, except that a bonding layer 274, 275, or 276 is arranged therebetween.

[0190] 13 shows an example of absorbing the inclination of the upper surfaces of the semiconductor chips 141, 142, and 143. Fig. 13 is a cross-sectional view showing another example of a semiconductor device according to this embodiment. A semiconductor device 201 shown in Fig. 13 has the same components as the semiconductor device 200 shown in Fig. 12.

[0191] 13, similarly to the semiconductor device 101 shown in Fig. 9, bonding sheet pairs 251, 252, and 253 are arranged in different bonding states so as to absorb the inclinations of the upper surfaces of the semiconductor chips 141, 142, and 143. The bonding states of the bonding sheet pairs 251, 252, and 253 are the same as the bonding states of the bonding sheet pairs 151, 152, and 153 shown in Figs. 9 and 10, except that bonding layers 274, 275, or 276 are arranged therebetween.

[0192] [3-2. Manufacturing Method] Next, a manufacturing method of the semiconductor device 200 will be described with reference to FIGS. 14A to 14F.

[0193] 14A to 14F are cross-sectional views showing the steps of the method for manufacturing semiconductor device 200 according to this embodiment. In the method for manufacturing semiconductor device 200, the processes from preparing lower substrate 110 to arranging semiconductor chips 141, 142, and 143 and bonding them to bonding members 131, 132, and 133 are the same as those in the second embodiment, and are as shown in FIGS.

[0194] 14A , after the semiconductor chips 141, 142, and 143 are bonded to the bonding members 131, 132, and 133, bonding layers 271, 272, and 273 are respectively disposed on the upper surfaces of the semiconductor chips 141, 142, and 143. The bonding layers 271, 272, and 273 are, for example, Ag sintering paste. For example, the Ag sintering paste is applied so as to cover the entire upper surfaces of the semiconductor chips 141, 142, and 143.

[0195] Next, as shown in FIG. 14B , bonding sheets 251A, 252A, and 253A are placed on the upper surfaces of bonding layers 271, 272, and 273, respectively. Although not shown in the figure, at least one of the height and inclination of the upper surfaces of semiconductor chips 141, 142, and 143 is measured before the bonding sheet placement process. Based on the measurement results, the direction and amount of misalignment between the second main surfaces (main surfaces 12A and 12B) of the pair of bonding sheets corresponding to each semiconductor chip are determined. Specifically, the three-dimensional position (x-coordinate, y-coordinate, z-coordinate) and rotation angle (θ) of the placement of each of the two bonding sheets are calculated. Alternatively, the direction and amount of misalignment between the second main surfaces themselves may be calculated. The lower bonding sheets 251A, 252A, and 253A are sequentially placed based on the calculated three-dimensional positions and rotation angles.

[0196] 14C , bonding layers 274, 275, and 276 are disposed on the second main surfaces (main surfaces 12A) of the bonding sheets 251A, 252A, and 253A, respectively. The bonding layers 274, 275, and 276 are, for example, Ag sintering paste. For example, the Ag sintering paste is applied so as to entirely cover the second main surfaces (main surfaces 12A) of the bonding sheets 251A, 252A, and 253A, respectively.

[0197] 14D , bonding sheets 251B, 252B, and 253B are placed on the upper surfaces of bonding layers 274, 275, and 276, respectively. The placement positions (three-dimensional positions and rotation angles) of bonding sheets 251B, 252B, and 253B are determined based on measurement results of at least one of the height and inclination of the upper surfaces of semiconductor chips 141, 142, and 143. Depending on the height and inclination of the upper surfaces of the semiconductor chips, the second main surfaces of the corresponding bonding sheet pairs are positioned with a deviation from each other, so that the upper surfaces (main surfaces 11B) of bonding sheets 251, 252, and 253 are flush with each other.

[0198] 14E , bonding layers 277, 278, and 279 are disposed on the first main surfaces (main surfaces 11B) of the bonding sheets 251B, 252B, and 253B, respectively. The bonding layers 277, 278, and 279 are, for example, Ag sintering paste. For example, the Ag sintering paste is applied so as to entirely cover the first main surfaces (main surfaces 11B) of the bonding sheets 251B, 252B, and 253B.

[0199] Next, as shown in FIG. 14F , the upper substrate 120 is positioned so as to cover the upper surfaces of the bonding sheet pairs 251, 252, and 253. After the upper substrate 120 is positioned, the bonding sheets 251, 252, and 253 are bonded together by heat treatment. In this embodiment, the heat treatment is performed by reflow or annealing in a nitrogen atmosphere. This bonds the first main surface (main surface 11A) of the lower first bonding sheet to the corresponding semiconductor chip, the second main surface (main surface 11B) of the upper second bonding sheet of each bonding sheet pair to the upper substrate 120, and the second main surfaces (main surfaces 12A and 12B) of each bonding sheet pair together via the bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279, respectively. After bonding, the positional relationship between the first bonding sheet and the second bonding sheet is fixed and maintained in a stable state. At each joint, a sintered layer of silver (Ag) is formed, providing good thermal, mechanical and electrical bonding.

[0200] Next, the structure shown in FIG. 14F is sealed with a sealing member 160 such as resin, thereby manufacturing the semiconductor device 200 or 201 shown in FIG. 12 or FIG.

[0201] As described above, even if the surface of the bonding sheet is not coated with tin (Sn), by using a bonding layer such as Ag sintering paste, the bonding between the bonding sheets and between the bonding sheet and other members can be strengthened thermally, electrically, and mechanically, thereby improving heat dissipation, conductivity, and mechanical bonding strength.

[0202] (Fourth embodiment) Next, a fourth embodiment will be described.

[0203] The fourth embodiment differs from the second embodiment mainly in the configuration of the semiconductor chip. The following description will focus on the differences from the second embodiment, and the description of the commonalities will be omitted or simplified.

[0204] [4-1. Configuration] First, the configuration of the semiconductor device according to the fourth embodiment will be described with reference to FIG.

[0205] Fig. 15 is a cross-sectional view of a semiconductor device 300 according to a fourth embodiment. As shown in Fig. 15, compared to the semiconductor device 100 shown in Fig. 6, the semiconductor device 300 includes semiconductor chips 341, 342, and 343 instead of the semiconductor chips 141, 142, and 143. Furthermore, the lower substrate 110 is provided with electrodes 381, 382, ​​and 383 in addition to the configuration shown in Fig. 6. Furthermore, the semiconductor device 300 further includes wires 391, 392, and 393.

[0206] Each of the semiconductor chips 341, 342, and 343 is an example of a first member that is a semiconductor element. The semiconductor chips 341, 342, and 343 are arranged between the lower substrate 110 and the upper substrate 120 so as not to overlap with each other in a plan view of the lower substrate 110. In this embodiment, each of the semiconductor chips 341, 342, and 343 is an element having three electrodes.

[0207] 16A, 16B, and 16C are (a) a top view, (b) a side view, and (c) a bottom view showing the configuration of semiconductor chips 341, 342, and 343 of semiconductor device 300 according to this embodiment. Semiconductor chips 341, 342, and 343 are specific examples of semiconductor chip 40 shown in embodiment 1, and have the same configuration as each other, so the following description will be given taking semiconductor chip 341 as a representative example.

[0208] The semiconductor chip 341 is a semiconductor element having three external electrodes, such as a field effect transistor (FET) or an insulated gate bipolar transistor (IGBT). As shown in Fig. 16, the semiconductor chip 341 has a chip body 345, a lower electrode 346, and upper electrodes 347 and 348.

[0209] The chip body 345 is the main body of an element formed on a substrate containing silicon carbide (SiC), silicon (Si), gallium nitride (GaN), gallium oxide (GaO), diamond, or the like as a main component. The chip body 345 has a flat rectangular parallelepiped shape. The size of the chip body 345 is not particularly limited, but the length of one side is within the range of 1 mm to 20 mm, and the thickness is within the range of 0.01 mm to 0.5 mm.

[0210] The lower electrode 346 is provided on the lower surface of the chip body 345. The lower electrode 346 has a single-layer structure or a multi-layer structure made of a metal or a metal alloy. For example, the lower electrode 346 has a layered structure of titanium (Ti), nickel (Ni), and silver (Ag) provided in this order from the chip body 345 side, but is not limited to this. For example, the outermost layer (bottom layer) of the lower electrode 346 may be gold (Au).

[0211] The top electrodes 347 and 348 are provided on the top surface of the chip body 345. The top electrodes 347 and 348 each have a single-layer structure or a multi-layer structure made of a metal or a metal alloy. For example, the top electrodes 347 and 348 each have a layered structure of titanium (Ti), nickel (Ni), and silver (Ag) provided in this order from the chip body 345 side, but are not limited to this. For example, the outermost surface (top layer) of each of the top electrodes 347 and 348 may be made of gold (Au).

[0212] When the semiconductor chip 341 is a transistor, the lower electrode 346 and the upper electrodes 347 and 348 correspond to a gate electrode, a source electrode, and a drain electrode, or a base electrode, an emitter electrode, or a collector electrode, respectively. For example, the lower electrode 346 is a drain electrode, the upper electrode 347 is a source electrode, and the upper electrode 348 is a gate electrode. The lower electrode 346 is provided to cover almost the entire lower surface of the chip body 345. The upper electrodes 347 and 348 are provided to cover almost the entire chip body 345 so as not to contact each other. The upper surface of the upper electrode 347 is the upper surface of the semiconductor chip 341 and is connected to the first main surface (main surface 11A) of the corresponding bonding sheet pair 30 (bonding sheet pair 151, 152, or 153). The upper electrode 348 is connected to the electrode 381, 382, ​​or 383 of the lower substrate 110 by a wire 391, 392, or 393.

[0213] The electrodes 381, 382, ​​and 383 correspond one-to-one to the semiconductor chips 341, 342, and 343, respectively. The electrodes 381, 382, ​​and 383 may be electrically connected to each other, or may be electrically connected to at least one of the electrodes 116, 117, and 118. The electrodes 381, 382, ​​and 383 contain a conductive material as a main component. For example, the electrodes 381, 382, ​​and 383 are made of a metal such as copper (Cu).

[0214] The wires 391, 392, and 393 are conductive wires and are formed using a metal material such as gold (Au), copper (Cu), or aluminum (Al).

[0215] 15 , wire 391 electrically connects upper surface electrode 348 (not shown in FIG. 15 ) of semiconductor chip 341 to electrode 381 of lower substrate 110. Wire 392 electrically connects upper surface electrode 348 (not shown in FIG. 15 ) of semiconductor chip 342 to electrode 382 of lower substrate 110. Wire 393 electrically connects upper surface electrode 348 (not shown in FIG. 15 ) of semiconductor chip 343 to electrode 383 of lower substrate 110.

[0216] 15, similarly to the semiconductor device 100 shown in Fig. 6, the bonding sheet pairs 151, 152, and 153 are arranged with different bonding states so as to absorb variations in height of the top surfaces of the semiconductor chips 341, 342, and 343. At this time, in order to secure the connection portions of the wires 391, 392, and 393, the bonding sheet pairs 151, 152, and 153 are arranged so as not to cover the top surface electrodes 348 of the semiconductor chips 341, 342, and 343.

[0217] 17 shows an example of absorbing the inclination of the upper surfaces of the semiconductor chips 341, 342, and 343. Fig. 17 is a cross-sectional view showing another example of a semiconductor device according to this embodiment. The semiconductor device 301 shown in Fig. 17 has the same components as the semiconductor device 300 shown in Fig. 15.

[0218] 9, in the semiconductor device 301 shown in Fig. 17, the bonding sheet pairs 151, 152, and 153 are arranged with different bonding states so as to absorb the inclination of the upper surfaces of the semiconductor chips 341, 342, and 343. At this time, in order to secure the connection portions of the wires 391, 392, and 393, the bonding sheet pairs 151, 152, and 153 are arranged so as not to cover the upper surface electrodes 348 of the semiconductor chips 341, 342, and 343.

[0219] As described above, in the semiconductor device 300 or 301 according to this embodiment, a portion of the top surface of each semiconductor chip is not covered with a bonding sheet. This allows application to cases where multiple electrodes are provided on the top surface of the semiconductor chip. While the present embodiment illustrates an example in which the multiple semiconductor chips included in the semiconductor device 300 or 301 are the same type of semiconductor element, this is not limiting. The semiconductor device 300 or 301 may include multiple semiconductor elements of different types. For example, the semiconductor device 300 or 301 may include a semiconductor chip 141 and a semiconductor chip 341. Different types of semiconductor chips may have different chip heights. By adjusting the placement of the bonding sheet according to the type of semiconductor chip, height variations and inclinations can be accommodated even when different types of semiconductor chips are provided.

[0220] [4-2. Manufacturing Method] Next, a method for manufacturing the semiconductor device 300 will be described with reference to FIGS. 18A to 18F.

[0221] 18A to 18F are cross-sectional views showing the steps of a method for manufacturing a semiconductor device 300 according to this embodiment.

[0222] First, as shown in Fig. 18A, the lower substrate 110 is prepared. For example, a metal film such as copper is formed on each of the upper and lower surfaces of the insulating layer 114, and then the metal film is patterned as necessary to create the lower substrate 110. Note that the method for creating the lower substrate 110 is not limited to this. A pre-created lower substrate 110 may also be used. In this embodiment, the upper surface of the insulating layer 114 is provided with electrodes 381, 382, ​​and 383 in addition to electrodes 116, 117, and 118.

[0223] 18B , bonding members 131, 132, and 133 are placed on the upper surfaces of the electrodes 116, 117, and 118 of the lower substrate 110. The bonding members 131, 132, and 133 are, for example, block members of silver (Ag) whose surfaces are coated with tin (Sn) (Sn-coated bonding material), or Ag sintering paste.

[0224] 18C , semiconductor chips 341, 342, and 343 are placed on the upper surfaces of bonding members 131, 132, and 133, respectively. After semiconductor chips 341, 342, and 343 are placed, bonding members 131, 132, and 133 are performed by heat treatment. As a result, the lower surfaces of bonding members 131, 132, and 133 are bonded to electrodes 116, 117, and 118, respectively, and the upper surfaces of bonding members 131, 132, and 133 are bonded to semiconductor chips 341, 342, and 343, respectively.

[0225] 18D , upper surface electrodes 348 (not shown) on the upper surfaces of the semiconductor chips 341, 342, and 343 are respectively bonded to electrodes 381, 382, ​​and 383 on the lower substrate 110 by wires 391, 392, and 393. Bonding of the wires 391, 392, and 393 is performed using a known wire bonding technique.

[0226] Next, as shown in FIG. 18E , bonding sheet pairs 151, 152, and 153 are placed on the upper surfaces of semiconductor chips 341, 342, and 343, respectively. Although not shown in the figure, prior to the placement process of the bonding sheet pairs, at least one of the height and inclination of the upper surfaces of each of the semiconductor chips 341, 342, and 343 is measured. Based on the measurement results, the misalignment direction and amount of misalignment between the second main surfaces (main surfaces 12A and 12B) of the bonding sheet pairs corresponding to each semiconductor chip are determined. Specifically, the three-dimensional position (x-coordinate, y-coordinate, z-coordinate) and rotation angle (θ) of each of the two bonding sheets are calculated. Alternatively, the misalignment direction and amount of misalignment between the second main surfaces may be calculated. Based on the calculated three-dimensional positions and rotation angles, the lower bonding sheets 151A, 152A, and 153A and the upper bonding sheets 151B, 152B, and 153B are sequentially placed. As a result, the second main surfaces of the corresponding bonding sheets 151, 152, and 153 are arranged in a misaligned manner depending on the height and inclination of the upper surface of each semiconductor chip. As shown by the dashed lines in Figure 18E, the upper surfaces (main surfaces 11B) of the bonding sheets 151, 152, and 153 are flush with each other.

[0227] Next, as shown in FIG. 18F , the upper substrate 120 is positioned so as to cover the upper surfaces of the bonding sheet pairs 151, 152, and 153. After the upper substrate 120 is positioned, the bonding sheets 151, 152, and 153 are bonded together by heat treatment. For example, if the bonding sheets of the bonding sheet pairs 151, 152, and 153 are made of a Sn-coated bonding material, a reflow treatment using formic acid reduction or hydrogen reduction is performed as the heat treatment. This bonds the first main surface (main surface 11A) of the lower first bonding sheet of each bonding sheet pair to the corresponding semiconductor chip, the second main surface (main surface 11B) of the upper second bonding sheet of each bonding sheet pair to the upper substrate 120, and the second main surfaces (main surfaces 12A and 12B) of each bonding sheet pair to each other. After bonding, the positional relationship between the first bonding sheet and the second bonding sheet is fixed and maintained in a stable state. At each joint, an alloy of copper (Cu) and tin (Sn) or an alloy of silver (Ag) and tin (Sn) is formed, providing good thermal, mechanical, and electrical bonding.

[0228] Next, the structure shown in FIG. 18F is sealed with a sealing member 160 such as resin, thereby manufacturing the semiconductor device 300 or 301 shown in FIG. 15 or FIG.

[0229] As in the third embodiment, instead of the pair of bonding sheets 151, 152, and 153, a pair of bonding sheets 251, 252, and 253, and bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279 may be provided.

[0230] Fifth Embodiment Next, a fifth embodiment will be described.

[0231] The main difference between the fifth embodiment and the fourth embodiment is that a pair of bonding sheets bonds the spacer and the upper substrate. The following description will focus on the differences from the fourth embodiment, and the description of the commonalities will be omitted or simplified.

[0232] First, the configuration of a semiconductor device according to the fifth embodiment will be described with reference to FIG.

[0233] Fig. 19 is a cross-sectional view of a semiconductor device 400 according to embodiment 5. As shown in Fig. 19, the semiconductor device 400 includes spacers 441, 442, and 443, and bonding layers 471, 472, and 473 in addition to the configuration of the semiconductor device 300 shown in Fig. 15.

[0234] The spacers 441, 442, and 443 are each an example of a first member bonded to the bonding sheet. The spacers 441, 442, and 443 are provided for adjusting the height or for ensuring space for bonding wires. The spacers 441, 442, and 443 are arranged so as not to cover the upper surface electrodes 348 of the semiconductor chips 341, 342, and 343, respectively, in order to ensure the connection portions of the wires 391, 392, and 393.

[0235] The spacers 441, 442, and 443 are formed using a conductive material. Specifically, the spacers 441, 442, and 443 contain a metal as a main component. For example, the spacers 441, 442, and 443 are made of a metal or alloy such as copper (Cu), molybdenum (Mo), aluminum (Al), or silicon (Si). Examples of alloys that can be used include a Cu-Mo alloy and an Al-Si alloy. Alternatively, the spacers 441, 442, and 443 may be made of graphite. Furthermore, a coating layer (plating layer) of tin (Sn), silver (Ag), gold (Au), or the like may be formed on the surfaces of the spacers 441, 442, and 443.

[0236] The bonding layers 471, 472, and 473 are members that mechanically, thermally, and electrically bond two adjacent members to each other. Each of the bonding layers 471, 472, and 473 is electrically conductive. For example, the bonding layers 471, 472, and 473 are made of a sintered material of silver (Ag).

[0237] The bonding layer 471 bonds the upper surface (upper surface electrode 347) of the semiconductor chip 341 to the lower surface of the spacer 441. The bonding layer 472 bonds the upper surface (upper surface electrode 347) of the semiconductor chip 342 to the lower surface of the spacer 442. The bonding layer 473 bonds the upper surface (upper surface electrode 347) of the semiconductor chip 343 to the lower surface of the spacer 443.

[0238] By adjusting the shape and thickness of the spacers 441, 442, and 443, variations in the placement of the semiconductor chips 341, 342, and 343 (variations in the height and inclination of the respective upper surfaces) can be absorbed. However, because variations in the placement of the semiconductor chips 341, 342, and 343 are partly due to mounting accuracy, it is difficult to prepare spacers of appropriate shapes and thicknesses in advance. For this reason, in this embodiment, bonding sheet pairs 151, 152, and 153 are also disposed between the corresponding spacers and the upper substrate 120. This allows variations in the placement of the spacers (semiconductor chips) to be absorbed, improving heat dissipation and conductivity.

[0239] 6, in the semiconductor device 400 shown in Fig. 19, the bonding sheet pairs 151, 152, and 153 are arranged in different bonding states so as to absorb variations in height of the upper surfaces of the semiconductor chips 341, 342, and 343. The bonding states of the bonding sheet pairs 151, 152, and 153 are the same as the bonding states of the bonding sheet pairs 151, 152, and 153 shown in Fig. 6 and Fig. 8, except that the bonding targets are spacers 441, 442, and 443 instead of semiconductor chips.

[0240] 20 shows an example of absorbing the inclination of the upper surfaces of the semiconductor chips 341, 342, and 343. Fig. 20 is a cross-sectional view showing another example of a semiconductor device according to this embodiment. A semiconductor device 401 shown in Fig. 20 has the same components as the semiconductor device 400 shown in Fig. 19.

[0241] 20, similarly to the semiconductor device 101 shown in Fig. 9, the bonding sheet pairs 151, 152, and 153 are arranged in different bonding states so as to absorb the inclinations of the upper surfaces of the semiconductor chips 341, 342, and 343. The bonding states of the bonding sheet pairs 151, 152, and 153 are the same as the bonding states of the bonding sheet pairs 151, 152, and 153 shown in Figs. 9 and 10, except that the bonding targets are spacers 441, 442, and 443 instead of semiconductor chips.

[0242] The method for manufacturing the semiconductor device 400 or 401 according to this embodiment is the same as the manufacturing methods shown in the second to fourth embodiments, and therefore a description thereof will be omitted.

[0243] As in the third embodiment, bonding sheet pairs 251, 252, and 253 and bonding layers 271, 272, 273, 274, 275, 276, 277, 278, and 279 may be provided instead of bonding sheet pairs 151, 152, and 153. Furthermore, semiconductor chips 141, 142, and 143 may be provided instead of at least one of semiconductor chips 341, 342, and 343.

[0244] Sixth Embodiment Next, a sixth embodiment will be described.

[0245] In the sixth embodiment, a description will be given of a semiconductor device manufacturing apparatus according to the above-mentioned second to fifth embodiments. The following description will focus on the differences from the first to fifth embodiments, and the description of the commonalities will be omitted or simplified.

[0246] 21 is a block diagram of a semiconductor device manufacturing apparatus 500 according to this embodiment. As shown in FIG. 21, the manufacturing apparatus 500 includes a first mounting unit 510, a second mounting unit 520, and a measurement unit 530.

[0247] The first mounting unit 510 and the second mounting unit 520 are each implemented by a component mounting apparatus. The first mounting unit 510 and the second mounting unit 520 may be implemented by a single component mounting apparatus, or each may be implemented by multiple component mounting apparatuses. The component mounting apparatus may be equipped with a reflow oven or a high-temperature oven for performing heat treatment.

[0248] The measuring unit 530 measures at least one of the height and inclination of the top surface of the first member. The measuring unit 530 is, for example, an optical distance measuring device that measures the distance to the measurement position on the top surface by irradiating light onto the measurement position on the top surface of the first member and detecting the reflected light. Note that the measuring unit 530 may be a camera that captures an image of the top surface of the first member. There are no particular limitations on the configuration of the measuring unit 530 as long as it can measure at least one of the height and inclination of the top surface of the first member.

[0249] Specific processes of the first mounting unit 510, the second mounting unit 520, and the measurement unit 530 will be described with reference to FIG. 22 and FIGS. 23A to 23K.

[0250] Fig. 22 is a flowchart showing a method for manufacturing a semiconductor device according to this embodiment. Fig. 23A to Fig. 23K are cross-sectional views illustrating each step of the operation of the semiconductor device manufacturing apparatus according to this embodiment.

[0251] 22 , first, one or more pairs of bonding sheets 30 are prepared (S10). For example, the manufacturing apparatus 500 may include a manufacturing unit that manufactures the bonding sheet 10. The manufacturing unit forms the base material 20 by molding it using a mold, and forms the coating layers 21 and 22 by plating the surface of the base material 20. Note that plating does not have to be performed.

[0252] Next, a first substrate on which one or more first members (semiconductor chips or spacers) are arranged is prepared (S12). The first members are semiconductor chips or spacers. For example, as shown in FIG. 23A, the manufacturing apparatus 500 prepares a lower substrate 110 and arranges bonding members 131 and 132 on the lower substrate 110. The bonding members 131 and 132 are arranged by printing, applying with a dispenser, or mounting with a sheet member. Next, as shown in FIG. 23B, the semiconductor chips 141 and 142 are held by suction nozzles 601 and 602. The semiconductor chips 141 and 142 are arranged in a predetermined storage location such as a tray. The suction nozzles 601 and 602 each pick up and hold one semiconductor chip from the tray and move it to the mounting position. Next, as shown in FIG. 23C, the semiconductor chips 141 and 142 are arranged on the upper surfaces of the bonding members 131 and 132 (the suction is released). Thereafter, a heat treatment is performed to bond the semiconductor chips 141 and 142 to the bonding members 131 and 132. The suction nozzles 601 and 602 are included in the first mounting unit 510 or the second mounting unit 520. The arrangement of the members and the heat treatment are performed by, for example, the first mounting unit 510 or the second mounting unit 520.

[0253] 23D shows an example in which the height and inclination of the top surfaces of the semiconductor chips 141 and 142 vary. This variation can occur when the bonding members 131 and 132 are arranged, when the semiconductor chips 141 and 142 are mounted, and during heat treatment, etc.

[0254] Next, the measurement unit 530 measures at least one of the height and inclination of the upper surface of the first member (S14). For example, as shown in FIG. 23E, laser displacement meters 611 and 612 each measure the three-dimensional positions (x-coordinate, y-coordinate, z-coordinate) of four points on the upper surface of each of the semiconductor chips 141 and 142, as shown in FIG. 4A, and calculate the height and inclination of the upper surface based on the measurement results. The laser displacement meters 611 and 612 are an example of the measurement unit 530. Furthermore, the manufacturing apparatus 500 determines the direction and amount of misalignment between the second main surfaces of the corresponding bonding sheet pair 30 based on the calculation results. Specifically, the manufacturing apparatus 500 determines the placement position and orientation (rotation angle) of each of the first bonding sheet and the second bonding sheet. For example, the manufacturing apparatus 500 includes a non-volatile memory storing a program for performing the calculation and identification, a volatile memory serving as a temporary storage area for executing the program, input / output ports, a processor for executing the program, and the like. The calculation and identification may be performed in hardware by an electronic circuit realized by an integrated circuit or the like, rather than by a processor executing a program.

[0255] Next, the first mounting unit 510 places a pair of bonding sheets, including a first bonding sheet and a second bonding sheet, on the upper surface of the first member while shifting them in the tilt direction and / or rotation direction (S16). If multiple first members (semiconductor chips or spacers) are provided on the first substrate, the first mounting unit 510 places the multiple bonding sheet pairs on the upper surfaces of the corresponding first members, corresponding to each of the multiple first members. For example, the first mounting unit 510 places the bonding sheet pairs on the upper surfaces of the corresponding semiconductor chips. At this time, the first mounting unit 510 shifts the second main surfaces of the first bonding sheet and the second bonding sheet relative to each other based on at least one of the height and inclination of the upper surface of the first member measured by the measuring unit 530.

[0256] Specifically, as shown in FIG. 23F , bonding sheets 151A and 152A are held by suction nozzles 621 and 622. The bonding sheets 151A and 152A are placed in a predetermined storage location, such as a tray. The suction nozzles 621 and 622 each pick up one bonding sheet from the tray, hold it, and move it to the mounting position. Next, as shown in FIG. 23G , the bonding sheets 151A and 152A are placed (released from suction) on the upper surfaces of the semiconductor chips 141 and 142, respectively. At this time, the bonding sheets 151A and 152A are placed at the placement positions and orientations (rotation angles) determined based on the measurement results. Similarly, as shown in FIG. 23H , bonding sheets 151B and 152B are held by suction nozzles 621 and 622. The bonding sheets 151B and 152B are placed in a predetermined storage location, such as a tray. The suction nozzles 621 and 622 each pick up one bonding sheet from the tray, hold it, and move it to the mounting position. 23I, the bonding sheets 151B and 152B are placed (released from suction) on the upper surfaces of the semiconductor chips 141 and 142. At this time, the bonding sheets 151B and 152B are placed at the placement positions and attitudes (rotation angles) specified based on the measurement results.

[0257] Next, the second mounting unit 520 places a second substrate, which is the second member, so as to cover one or more pairs of bonding sheets (S18). For example, the second mounting unit 520 places the upper substrate 120 so as to cover multiple pairs of bonding sheets. Specifically, as shown in FIG. 23J, the upper substrate 120 is held by a suction nozzle 630. The upper substrate 120 is placed in a predetermined storage location such as a tray, and the suction nozzle 630 picks up and holds the upper substrate 120 from the tray and moves it to the mounting position. Next, as shown in FIG. 23K, the upper substrate 120 is placed on the upper surfaces of the bonding sheets 151B and 152B (the suction is released). Thereafter, a heat treatment is performed to bond the semiconductor chip 141, the bonding sheets 151A and 151B, and the semiconductor chip 142, the bonding sheets 152A and 152B, respectively, and further to bond the bonding sheets 151B and 152B to the upper substrate 120. If necessary, the lower substrate 110 and the upper substrate 120 can be molded together with a resin or the like to manufacture a semiconductor device.

[0258] As described above, by adjusting the relative positions of the second main surfaces of the first and second bonding sheets, the distance and inclination between the first main surface of the first bonding sheet and the first main surface of the second bonding sheet can be changed. Therefore, by arranging the first and second bonding sheets in an appropriate positional relationship depending on the arrangement of the first member, it is possible to absorb variations in the arrangement of the first member.

[0259] Other Embodiments The bonding sheet, semiconductor device, semiconductor device manufacturing method, and semiconductor device manufacturing device according to one or more aspects have been described above based on the embodiments, but the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications that a person skilled in the art can make to the present embodiments and embodiments constructed by combining components of different embodiments are also included within the scope of the present disclosure.

[0260] For example, in the above-described embodiments, a rectangular parallelepiped bonded sheet with one main surface inclined relative to the other main surface has been described as an example, but the shape of the bonded sheet is not limited to this. For example, the bonded sheet may have a shape of a flat cylinder with one main surface (top surface) inclined relative to the other main surface (bottom surface), as in bonded sheets 50A and 50B shown in Fig. 24. Fig. 24 is a perspective view showing a modified example of the bonded sheet pair 50.

[0261] Alternatively, the bonded sheet may have a shape of a flat elliptical cylinder in which one main surface (upper surface) is inclined relative to the other main surface (lower surface). Furthermore, the bonded sheet may have a shape of a flat polygonal prism such as a pentagonal prism, hexagonal prism, or octagonal prism in which one main surface (upper surface) is inclined relative to the other main surface (lower surface). Furthermore, the bonded sheet may have a shape of a flat polygonal truncated pyramid in which one main surface (upper surface) is inclined relative to the other main surface (lower surface). The bonded sheet pair may include two bonded sheets having different shapes and sizes.

[0262] For example, in the above-described embodiments, the main surface 11 is an example of a first main surface bonded to the first member or the second member, but this is not limiting. The main surface 12 may be an example of a first main surface bonded to the first member or the second member. In this case, the main surface 11 is an example of a second main surface. That is, the main surfaces 11 of the two bonding sheets 10 are bonded to each other.

[0263] Although the example in which the semiconductor chips and the bonding sheet pairs correspond one-to-one has been described, this is not limiting. For example, multiple bonding sheet pairs may be provided on the top surface of the semiconductor chip. Alternatively, if the height and inclination of the top surfaces of multiple semiconductor chips are the same, one bonding sheet pair may be provided bonded to each of the top surfaces of the multiple semiconductor chips.

[0264] Furthermore, for example, the semiconductor device may include only one semiconductor chip (first component). If the top surface of the semiconductor chip is tilted, the tilt can be absorbed by using a pair of bonding sheets. That is, the lower substrate (first substrate) and the upper substrate (second substrate) can be arranged parallel to each other.

[0265] Furthermore, various modifications, substitutions, additions, omissions, etc. can be made to the above-described embodiments within the scope of the claims or their equivalents.

[0266] The present disclosure can be used as a bonding sheet, a semiconductor device, a method for manufacturing a semiconductor device, and an apparatus for manufacturing a semiconductor device, and can be used for, for example, semiconductor devices such as power modules.

[0267] 10, 10A, 10B, 50A, 50B, 151A, 151B, 152A, 152B, 153A, 153B, 251A, 251B, 252A, 252B, 253A, 253B Bonding sheet 11, 11A, 11B, 12, 12A, 12B, 13, 14 Main surface 20 Base material 21, 22 Covering layer 30, 50, 151, 152, 153, 251, 252, 253 Bonding sheet pair 40, 141, 142, 143, 341, 342, 343 Semiconductor chip 100, 101, 200, 201, 300, 301, 400, 401 Semiconductor device 110 Lower substrate 112, 122 Heat sink 114, 124 Insulating layer 116, 117, 118, 126, 381, 382, ​​383 Electrode 120 Upper substrate 131, 132, 133 Bonding member 145, 345 Chip body 146, 346 Lower electrode 147, 347, 348 Upper electrode 160 Sealing member 271, 272, 273, 274, 275, 276, 277, 278, 279, 471, 472, 473 Bonding layer 391, 392, 393 Wire 441, 442, 443 Spacer 500 Manufacturing apparatus 510 First mounting section 520 Second mounting section 530 Measurement section 601, 602, 621, 622, 630 Suction nozzle 611, 612 Laser displacement meter

Claims

1. A bonding sheet, which is one of a pair of sheets that bonds a first member and a second member, and has a first main surface that is bonded to the first member or the second member, and a second main surface located opposite the first main surface, wherein the second main surface is inclined with respect to the first main surface, and has electrical conductivity.

2. A joining sheet as described in claim 1, comprising: a metal layer having a third main surface and a fourth main surface located opposite the third main surface; a first coating layer covering at least a portion of the third main surface; and a second coating layer covering at least a portion of the fourth main surface, wherein the first main surface is a portion of a surface of the first coating layer, and the second main surface is a portion of a surface of the second coating layer.

3. The bonding sheet according to claim 2, wherein each of the first coating layer and the second coating layer contains tin or a tin alloy as a main component.

4. The bonding sheet according to claim 2, wherein the third main surface is parallel to the first main surface, and the fourth main surface is parallel to the second main surface.

5. A semiconductor device comprising: a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is the bonding sheet described in any one of claims 1 to 4; the first member; and the second member, wherein the first member is a semiconductor element or a spacer, the first main surface of the first bonding sheet is bonded to the first member, the first main surface of the second bonding sheet is bonded to the second member, and the second main surfaces of the first bonding sheet and the second bonding sheet are bonded to each other.

6. The semiconductor device according to claim 5, wherein the second member is a substrate or a spacer.

7. The semiconductor device according to claim 5, wherein the first main surface of the first bonding sheet is larger than the first member in a plan view of the first main surface.

8. A semiconductor device as described in claim 5, comprising: a first substrate; a second substrate which is the second member and which is arranged parallel to the first substrate; a plurality of the first members which are arranged between the first substrate and the second substrate so as not to overlap each other in a planar view of the first substrate; and a plurality of pairs of sheets which correspond one-to-one to the plurality of the first members, wherein in each of the plurality of pairs of sheets, the first main surface of the first bonding sheet is bonded to the corresponding first member, and the first main surface of the second bonding sheet is bonded to the second substrate.

9. The semiconductor device according to claim 8, wherein in at least one of the pairs of sheets, one of the second main surfaces is joined in a misaligned relationship with the other.

10. The semiconductor device according to claim 9, wherein the direction of deviation between the second principal surfaces is a direction in which the second principal surfaces are inclined.

11. The semiconductor device according to claim 9, wherein the direction of deviation between the second principal surfaces is a rotational direction about an axis perpendicular to the second principal surfaces.

12. The semiconductor device according to claim 9, wherein the bonding surfaces of at least two of the plurality of first members and the corresponding first main surface are at different heights from the first substrate.

13. The semiconductor device according to claim 9, wherein a bonding surface of at least one of the plurality of first members with respect to the corresponding first main surface is inclined with respect to the first substrate.

14. A method for manufacturing a semiconductor device, comprising the steps of: preparing a plurality of pairs of sheets, each including a first bonding sheet and a second bonding sheet which are the bonding sheets described in any one of claims 1 to 4; preparing a first substrate on which a plurality of the first members are arranged so that they do not overlap each other in a planar view; measuring at least one of the height from the first substrate and the inclination relative to the first substrate of the upper surface of each of the plurality of first members; arranging the plurality of pairs of sheets on the upper surfaces of the corresponding first members; and arranging a second substrate which is the second member so as to cover the plurality of pairs of sheets, wherein in the arranging step, the second main surfaces of at least one of the plurality of pairs of sheets are arranged so as to be offset from each other based on at least one of the height and the inclination of the upper surface of the corresponding first member.

15. A method for manufacturing a semiconductor device as described in claim 14, wherein in the arranging step, a direction and amount of deviation between the second main surfaces of the corresponding pair of sheets are identified based on at least one of the height and inclination of the upper surface of each of the plurality of first members, and the second main surfaces are arranged with a deviation based on the identified direction and amount of deviation.

16. A method for manufacturing a semiconductor device as described in claim 14, wherein in the measuring step, the height of the upper surface of each of the multiple first members from the first substrate is measured, and in the placing step, for at least one of the multiple pairs of sheets, the pair of sheets are placed on the upper surface of the first member with one of the first bonding sheet and the second bonding sheet shifted relative to the other in the inclination direction of the second main surface based on the height of the upper surface of the corresponding first member.

17. The method for manufacturing a semiconductor device as described in claim 14, wherein in the measuring step, an inclination of the upper surface of each of the multiple first members relative to the first substrate is measured, and in the placing step, for at least one of the multiple pairs of sheets, the pair of sheets are placed on the upper surface of the first member with one of the first bonding sheet and the second bonding sheet shifted relative to the other in a rotational direction about a direction perpendicular to the second main surface as a rotation axis based on the inclination of the upper surface of the corresponding first member.

18. A method for manufacturing a semiconductor device, comprising the steps of: preparing a pair of sheets including a first bonding sheet and a second bonding sheet, each of which is the bonding sheet described in any one of claims 1 to 4; preparing a first substrate on which the first member is disposed; measuring the inclination of an upper surface of the first member relative to the first substrate; arranging the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction about a rotation axis that is a direction perpendicular to the second main surface based on the inclination; and arranging the second substrate, which is the second member, to cover the pair of sheets.

19. An apparatus for manufacturing semiconductor devices comprising: a first mounting section that positions a pair of sheets, each including a first bonding sheet and a second bonding sheet as described in any one of claims 1 to 4, on an upper surface of a corresponding first member arranged on a first substrate so as not to overlap each other in a planar view; a second mounting section that positions a second substrate, which is the second member, so as to cover the pair of sheets; and a measuring section that measures at least one of the height from the first substrate and the inclination of the upper surface of each of the plurality of first members relative to the first substrate, wherein the first mounting section positions the second main surfaces of at least one of the pairs of sheets so as to be offset from each other based on at least one of the height and the inclination of the upper surface of the corresponding first member.

20. An apparatus for manufacturing a semiconductor device comprising: a first mounting section that places a pair of sheets, each of which includes a first bonding sheet and a second bonding sheet as defined in any one of claims 1 to 4, on an upper surface of a first member that is placed on a first substrate; a second mounting section that places the second member, a second substrate, so as to cover the pair of sheets; and a measurement section that measures the inclination of the upper surface of the first member relative to the first substrate, wherein the first mounting section places the pair of sheets on the upper surface of the first member while shifting one of the first bonding sheet and the second bonding sheet relative to the other in a rotational direction about a rotation axis that is perpendicular to the second main surface based on the inclination.

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