Embedded package structure, power supply apparatus, and electronic device

Abstract

An embedded package structure, a power supply apparatus, and an electronic device. The embedded package structure comprises at least three layers of embedded frames stacked in sequence, and a chip, an inductive component, and multiple electronic components embedded in the embedded frames. At least one of the multiple electronic components is a capacitive component or a resistive component. The inductive component is embedded in a middle-layer embedded frame among the at least three layers of embedded frames, and the thickness of the middle-layer embedded frame is greater than or equal to the thickness of the inductive component. The inductive component is embedded in the middle-layer embedded frame among the multiple layers of embedded frames, so that the possible impact of dimensional tolerances of devices such as the inductive component can be avoided, thereby ensuring product yield. The processing of each layer of packaged modules and the stacking and assembly of the modules can all be completed at a substrate factory, further optimizing the industrial chain. In addition, a fully embedded structure is achieved by stacking multiple layers of embedded frames, significantly reducing the board area occupied by devices, and appropriately controlling the risk of device exposure.

Description

Embedded packaging structure, power supply device and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on August 28, 2023, with application number 202311096819.8 and invention name “A buried packaging structure, power supply device and electronic device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the technical field of electronic component packaging, and in particular to an embedded packaging structure, a power supply device, and an electronic device. Background Art

[0003] Embedded component packaging (ECP) technology, which embeds electronic components within a substrate, shortens the connection paths between components, reduces transmission losses, increases product integration, and reduces module size. With the development of electronic products, the power of electronic components has increased accordingly, and the corresponding heat dissipation issues of ECP devices have become increasingly prominent.

[0004] Take power modules as an example. A typical power module structure using ECP technology uses ECP packaging for the chip, inductor, capacitor, and resistor. These ECP inductors, capacitors, and resistors are stacked with the chip ECP to form a vertically connected power module. The inductor is located in the middle layer of the stack. Due to the thickness tolerance of the inductor, this power module structure cannot overcome this tolerance and cannot guarantee reliable connection of each inductor after stacking.

[0005] Summary of the Invention

[0006] The embodiments of the present application provide an embedded packaging structure, a power supply device, and an electronic device, which can effectively improve product yield through structural optimization of the embedded packaging structure.

[0007] In a first aspect, an embodiment of the present application provides an embedded packaging structure, comprising at least three layers of embedded frames stacked sequentially, and a chip, an inductor, and multiple electronic components embedded in the at least three layers of embedded frames; at least one of the multiple electronic components is a capacitor or a resistor; wherein the inductor is embedded in a middle layer of the at least three layers of embedded frames, and the thickness of the middle layer of embedded frames is greater than or equal to the thickness of the inductor. Thus, the inductor is completely embedded in the middle layer of the embedded frames within the multi-layer embedded frames, and the inductor and other components are completely embedded in the embedded frames through a substrate processing process. Because the thickness of each layer of embedded frames is controllable, the connection reliability of the inductor, which may be affected by the dimensional tolerance of some inductors, can be avoided, thereby effectively avoiding the influence of the height tolerance of the inductor on the stacking assembly relationship, providing a technical guarantee for reasonably controlling the product yield. Furthermore, because the thickness of each layer of embedded frames is controllable, the thickness of the embedded packaging structure formed by stacking can also be guaranteed, thereby better meeting the needs of various practical application scenarios. For example, taking the scenario where it needs to be bonded to a thermally conductive structure, by reasonably controlling the product thickness, the embedded packaging structure can be reliably bonded to the thermally conductive structure, meeting the product's heat dissipation requirements, and further ensuring the safe use and performance of the inner-layer devices.

[0008] In actual applications of the present application, multiple electronic components can be embedded in different embedding frame layers, for example, but not limited to, embedding independently of chips and inductor components. In addition, the embedded packaging structure provided by the present application solution, all electronic components including chips are packaged based on ECP technology, and the processing of each layer of ECP packaging modules and the stacking and assembly of modules can be completed in the substrate factory, which can further optimize the industrial chain and reduce manufacturing costs. In addition, the fully embedded structure is achieved by stacking multiple layers of embedded frames. On the one hand, the high integration of the product structure significantly reduces the area occupied by the device on the board; on the other hand, it can reduce the risk of device exposure and make the wiring within the board more flexible.

[0009] Based on the first aspect, the present application also provides a first implementation method of the first aspect: wherein the connection between two adjacent embedded frames is electrically connected using conductive paste. Compared to the traditional vertical power supply module interlayer implementation method of using soldering to achieve corresponding conductive relationships, this embodiment uses conductive paste to achieve electrical connection, which can avoid the high reflow temperature during the processing of each layer structure, as well as the impact of high reflow temperature between stacked modules, thereby ensuring the safe use and performance of internal layer devices. In addition, based on this embedded packaging structure, the frequency of high-temperature reflow effects on chips and other devices is effectively reduced, which makes it possible to arrange reflow processes for subsequent product processes, and is conducive to improving the processing technology of the entire product module.

[0010] Exemplarily, the conductive paste may be composed of conductive particles (such as but not limited to silver or copper) and an adhesive, wherein the conductive particles provide conductivity, and the adhesive is used to adhere the conductive particles to the connecting surfaces of two adjacent embedded frames, thereby achieving Z-direction conduction interconnection between the two adjacent embedded frames.

[0011] Based on the first embodiment of the first aspect, the present application also provides a second embodiment of the first aspect: a slot is formed in the embedded frame, the slot extending through the inductor or electronic component to be electrically connected, and the slot is filled with a conductive material to form a corresponding connection portion. Exemplarily, the slot may be a through slot or a through hole.

[0012] Taking the connection area of ​​the inductor component as an example, the slot can be opened using existing hole-forming processes, with a cross-section that is larger at the top and smaller at the bottom. Compared to using a blind hole array connection structure, this connection increases the inductor's flow area by approximately 400%. At the same time, it completely avoids the situation where the bottom of the blind hole array does not penetrate the substrate, resulting in no effective electrical connection. For example, in applications where the inductor height tolerance is relatively small, the slot setting can ensure that it penetrates the thicker conductor layer and forms an effective electrical connection. Overall, it can effectively overcome the impact of the inductor height tolerance.

[0013] In practical applications, the entire slot can be filled with copper or other conductive materials to form the connection portion. Alternatively, the slot can be filled with different conductive materials to form the connection portion. For example, but not limited to, the perimeter and bottom of the slot can be filled with copper to form the peripheral conductor of the connection portion, while the middle of the slot can be filled with other conductive materials to form the middle conductor. For example, the middle of the slot can be filled with a copper-containing material or a silver-containing material. Alternatively, the perimeter and bottom of the slot can also be filled with copper to form the connection portion.

[0014] In other practical applications, the relative position of the slot relative to the inductor or other electrically connected components can be determined as needed. For example, the slot can be positioned opposite the terminal pad of the inductor; alternatively, the slot can be positioned opposite the terminal body of the inductor, with the slot having a larger diameter than the terminal body to cover the entire end face of the terminal body, thereby achieving a larger inductor flow area; alternatively, the slot can be positioned opposite a portion of the terminal body of the inductor.

[0015] Based on the first aspect, or the first embodiment of the first aspect, or the second embodiment of the first aspect, the present application also provides a third embodiment of the first aspect: at least three layers of embedded frames are electrically connected using mechanical vias. Thus, using mechanical vias to achieve electrical connectivity can also significantly reduce the number of high-temperature reflow cycles for components such as chips, ensuring the safe use and performance of internal components.

[0016] Based on the first aspect, or the first embodiment of the first aspect, or the second embodiment of the first aspect, the present application also provides a fourth embodiment of the first aspect: the periphery of the embedded packaging structure includes a connecting side portion formed by a sidewall copper deposition process, and the connecting side portion is electrically connected to at least the top embedded frame and the bottom embedded frame of the at least three layers of embedded frames. Similarly, the connecting side portion can significantly reduce the number of high-temperature reflow cycles of chips and other devices, ensuring the safe use and performance of internal layer devices.

[0017] For example, the connecting side portion can be a through hole formed based on a sidewall copper plating process, which has a good moisture-proof effect. At the same time, it can further achieve efficient heat dissipation and shield signal interference.

[0018] In the specific implementation, after each layer of embedded frame is pressed into shape, a thin copper layer can be deposited on the edge of the board by chemical or electroplating methods to achieve electrical connection between layers; then, the copper layer on the non-circuit parts of the board surface on both sides of the substrate is etched away, and then the board surface on both sides of the substrate is coated with a green oil layer, gold-plated fingers and other board-forming processes are completed.

[0019] In a specific application, the communicating side portion may also be connected to the middle embedded frame or the interconnection circuit layer between adjacent embedded frames through the board edge.

[0020] Based on the first aspect, or the first embodiment of the first aspect, or the second embodiment of the first aspect, or the third embodiment of the first aspect, or the fourth embodiment of the first aspect, the embodiment of the present application also provides a fifth embodiment of the first aspect: an interconnection circuit layer is arranged between two adjacent embedded frames.

[0021] Exemplarily, the interconnection circuit layer may be integrally formed with one of two adjacent embedded frames.

[0022] Based on the first aspect, or the first embodiment of the first aspect, or the second embodiment of the first aspect, or the third embodiment of the first aspect, or the fourth embodiment of the first aspect, or the fifth embodiment of the first aspect, the embodiment of the present application further provides a sixth embodiment of the first aspect: an interconnection circuit layer is arranged on the top of the top embedded frame in the at least three layers of embedded frames, or an interconnection circuit layer is arranged on the bottom of the bottom embedded frame in the at least three layers of embedded frames. In this way, the actual circuits can be flexibly arranged according to the actual application scenario.

[0023] Based on the first aspect, or the first embodiment of the first aspect, or the second embodiment of the first aspect, or the third embodiment of the first aspect, or the fourth embodiment of the first aspect, or the fifth embodiment of the first aspect, or the sixth embodiment of the first aspect, the embodiments of the present application further provide a seventh embodiment of the first aspect: the intermediate layer embedding frame for embedding the inductor element is an inductor embedding frame, the embedding frame for embedding the chip is a chip embedding frame, and the chip embedding frame and the inductor embedding frame are arranged adjacent to each other. This arrangement simplifies interlayer circuit layout, reasonably controls circuit insertion loss, and reduces process difficulty and cost.

[0024] In practical applications, the chip embedding frame may include a metal mold layer connected to the back of the chip to quickly conduct heat away from the chip and improve heat dissipation capacity. Exemplarily, the metal mold layer is a copper block or a thick copper layer.

[0025] Exemplarily, the chip embedding frame may be provided in at least two layers, and the at least two layers of chip embedding frames are provided on the same side of the inductor embedding frame, or on both sides of the inductor embedding frame.

[0026] In other exemplary embodiments, the embedded packaging structure may include a first embedded frame, a second embedded frame and a third embedded frame stacked in sequence, the first embedded frame is a chip embedded frame, the second embedded frame is an inductor embedded frame, and at least part of the multiple electronic components are embedded in the third embedded frame.

[0027] Based on the seventh embodiment of the first aspect, the present application also provides an eighth embodiment of the first aspect: at least one of the multiple electronic components is embedded in a chip embedding frame. Alternatively, at least one of the multiple electronic components is embedded in an inductor embedding frame. This facilitates interlayer wiring layout, making routing more flexible; it also reduces the device layout density in other embedding layers, thereby reducing parasitic inductance to a certain extent.

[0028] A second aspect of the present application provides a power supply device comprising a chip, an inductor, and multiple electronic components, all packaged using the aforementioned embedded packaging structure. This embedded packaging structure effectively improves product yield and provides excellent technical support for achieving high-current-carrying power supply devices, meeting the trend of high-density layout design.

[0029] A third aspect of an embodiment of the present application provides an electronic device, which includes a circuit board and a power supply device. The power supply device is arranged on the circuit board, and the power supply device adopts the power supply device described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] FIG1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0031] FIG2 is a schematic structural diagram of an embedded packaging structure provided in an embodiment of the present application;

[0032] FIG3 is a schematic diagram of a superimposed relationship of the embedded frame layer shown in FIG2 ;

[0033] FIG4 is a schematic structural diagram of another embedded packaging structure provided in an embodiment of the present application;

[0034] FIG5 is a schematic structural diagram of another embedded packaging structure provided in an embodiment of the present application;

[0035] FIG6 is a schematic structural diagram of another embedded packaging structure provided in an embodiment of the present application;

[0036] FIG7 is a schematic structural diagram of another embedded packaging structure provided in an embodiment of the present application;

[0037] FIG8 illustrates schematic diagrams of connecting portions of four different structural forms provided in an embodiment of the present application;

[0038] FIG9 is a schematic diagram showing the relationship between three different slot opening positions provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The embodiment of the present application provides an embedded packaging structure, which can reasonably control the product yield through structural optimization.

[0040] Please refer to Figure 1, which is a schematic structural diagram of an electronic device provided in an embodiment of the present application.

[0041] As shown in Figure 1, the electronic device includes a housing 100 and a mainboard 200 and a power supply device 300 disposed in the housing 100. The power supply device 300 is electrically connected to the mainboard 200 and is used to supply power to the mainboard and the power devices on the mainboard. In a specific implementation, the electronic device can be a smart phone, a smart TV, a smart TV set-top box, a personal computer (PC), a wearable device, a smart broadband, etc. The embodiments of this application are not limited thereto. It should be understood that the other main functional components of the electronic device can be implemented using existing technologies, so they will not be described in detail herein.

[0042] A typical power supply device uses ECP technology to package the chip, inductor, capacitor, and resistor separately. The inductor ECP, capacitor, and resistor ECP are stacked with the chip ECP to form a vertically connected power module. The inductor is located in the middle layer of the stack. Due to the thickness tolerance of the inductor processing, this power module structure cannot overcome the impact of the inductor thickness tolerance.

[0043] Based on this, an embodiment of the present application provides an embedded packaging structure, which includes at least three layers of embedded frames stacked in sequence, and chips, inductance elements and multiple electronic components embedded in the at least three layers of embedded frames, at least one of the multiple electronic components is a capacitor element or a resistor element; wherein the inductance element is embedded in a middle layer of the at least three layers of embedded frames, and the thickness of the middle layer of the embedded frame is greater than or equal to the thickness of the inductance element. Here, the embedded frame is a semi-finished embedded substrate that is not covered with a solder mask layer (green oil layer); in addition, the overall structure of the inductor element has an irregular outer shape, and the "thickness" of the inductor element refers to the maximum structural dimension of the inductor element in the thickness direction of the embedded frame, so that the inductor element is completely embedded in the intermediate layer embedded frame; for example, but not limited to, for an implementation method of realizing electrical connection through the terminal body of the inductor element, the thickness of the inductor element can be the maximum structural dimension formed based on the outer end of the terminal body; for an implementation method of realizing electrical connection through the terminal pad of the inductor element, the thickness of the inductor element can be the maximum structural dimension formed based on the outer end of the terminal pad.

[0044] This arrangement embeds the inductor within the middle embedded frame of a multi-layer embedded frame. Through substrate processing, the inductor and other components are completely embedded within the embedded frame. The structural characteristics of the embedded frame allow for interlayer electrical connections, preventing dimensional tolerances from impacting the connection reliability of some inductors and effectively avoiding the effects of high reflow temperatures between stacked modules, ensuring the safe operation and performance of the components within. Furthermore, the thickness of each embedded frame layer is controllable (for example, the thickness of the middle embedded frame layer is set to a thickness greater than the maximum tolerance of the inductor to eliminate the effects of tolerances), ensuring the thickness of the laminated embedded package structure. For example, in scenarios where the embedded package structure needs to be bonded to a thermally conductive structure, proper thickness control ensures reliable bonding between the embedded package structure, meeting the product's heat dissipation requirements and further ensuring the safe operation and performance of the components within the layer. Overall, this arrangement mitigates the impact of the inductor component's height tolerance on the laminated assembly, providing a technical guarantee for properly controlling product yield.

[0045] Furthermore, the embedded packaging structure provided by this application utilizes ECP technology to package all electronic components, including the chip. The processing of each layer of ECP packaging module and the stacking and assembly of the modules can be completed at the substrate manufacturer, further optimizing the supply chain and reducing manufacturing costs. Furthermore, by stacking multiple layers of embedded frames to achieve a fully embedded structure, the product structure is highly integrated, significantly reducing the device footprint on the board. Furthermore, the risk of device exposure is reduced, and on-board routing is more flexible.

[0046] To better understand the technical solution and technical effects of the present application, without loss of generality, the following will describe a specific embodiment in detail with reference to the accompanying drawings and using the power module as the main body.

[0047] As shown in Figure 2, the embedded packaging structure includes three layers of embedded frames stacked in sequence: a first embedded frame 11, a second embedded frame 12, and a third embedded frame 13. The second embedded frame 12 is the middle embedded frame, with the first embedded frame 11 and the second embedded frame 12 located on either side of the second embedded frame 12. The electronic components are embedded in the three embedded frames, which are then stacked to form the power supply device 300.

[0048] In this embodiment, two inductive elements L are embedded in the second embedding frame 12. In a specific implementation, the thickness of the second embedding frame 12 can be greater than or equal to the thickness of the inductive elements L, so that the inductive elements L are completely embedded in the second embedding frame 12. For ease of description, the second embedding frame 12 in which the inductive elements are embedded can be defined as the inductive embedding frame. It should be understood that the cross-sectional view shown in FIG2 uses two inductive elements L as an example. In other possible implementations, the number of inductive elements L provided can be determined based on the actual application scenario, and is not limited to the two shown in the figure.

[0049] The chip IC is embedded in the first embedding frame 11. For ease of description, the first embedding frame 11 in which the chip is embedded can be defined as the chip embedding frame. Multiple capacitor elements C and resistor elements R are embedded in the third embedding frame 13. It should also be understood that although two chip ICs are used as an example in FIG2 , the number of chip ICs arranged in the first embedding frame 11 can be determined according to actual needs.

[0050] Furthermore, the number of capacitor elements C and resistor elements R embedded in the third embedding frame 13, as well as the relative positional relationship of the multiple capacitor elements C and resistor elements R within the third embedding frame 13 layer, can be determined according to the design requirements of the actual product, and are not limited in the present embodiment.

[0051] Please refer to FIG. 2 and FIG. 3 , wherein FIG. 3 is a schematic diagram of a stacking relationship of the embedded frame layers shown in FIG. 2 .

[0052] After the three layers of embedded frames are formed separately as shown in FIG3 , they can be stacked in sequence and formed into a complete substrate through a pressing process. Then, the copper layer on the non-circuit areas on both sides of the substrate is etched away, and further, as shown in FIG2 , the substrate is coated with a green oil layer 31 and gold-plated fingers 32 on both sides of the substrate to form a board, and finally the power supply device 300 is manufactured.

[0053] Therefore, the processing of the embedded packaging structure can be completed in the substrate factory, the industrial chain is relatively simple, and it is convenient to reasonably control product quality.

[0054] Optionally, the capacitor C and resistor R can be selectively embedded in the first embedding frame 11. For example, but not limited to, the capacitor C is embedded between two IC chips as shown in the figure. In a specific implementation, the resistor R can also be embedded in the first embedding frame 11. This facilitates interlayer wiring layout, making routing more flexible; it also reduces the device layout density of other embedded layers, which can reduce the formation of parasitic inductance to a certain extent.

[0055] In other specific implementations, the capacitor element C and the resistor element R may also be selectively embedded in the second embedding frame 12 .

[0056] In this embodiment, a conductive paste 41 is used between two adjacent embedded frames to achieve Z-direction interconnection. The "Z-direction" here refers to the conduction between the substrate layers in the direction intersecting with the board surface. The conductive paste can be composed of conductive particles (for example, but not limited to silver or copper) and an adhesive. The conductive particles provide conductivity, and the adhesive is used to adhere the conductive particles to the connection surface of the two adjacent embedded frames. In a specific implementation, the conductive paste is applied to the "connection area" of the connection surface. The "connection area" can also be defined as a connection part. The corresponding connection area can be reserved in the design or added during the manufacturing process. The adhesive is solidified through a pressing process to form a reliable electrical connection.

[0057] As shown in the figure, the two inductance elements L located in the second embedded frame 12 have their terminal top pads electrically connected to the capacitance element C located in the third embedded frame 13 through the conductive paste 41, and their terminal bottom pads electrically connected to the chip IC and other electronic components located in the first embedded frame 11 through the conductive paste 41.

[0058] Compared with the traditional vertical power supply module layer by layer using soldering to achieve corresponding conductive relationship, this implementation scheme uses conductive paste to achieve electrical connection, which can avoid the high temperature of reflow during the processing of each layer structure, as well as the influence of high temperature reflow between stacked modules, thereby ensuring the safe use and performance of the inner layer devices; in addition, based on the embedded packaging structure, the frequency of high temperature reflow affecting chips and other devices is effectively reduced, which creates the possibility of arranging the reflow process for the subsequent product process, and is conducive to improving the processing technology of the entire product module.

[0059] Of course, in a specific implementation, the interconnection circuit layer 21 can be arranged between two adjacent embedded frames as needed, or the interconnection circuit layer 21 can be arranged on the top layer (the top of the third embedded frame 13) and the bottom layer (the bottom of the first embedded frame 11) of the embedded packaging structure to establish corresponding circuit connectivity and realize the functions of the power supply device 300. It should be understood that the specific interface connectivity relationship and the layout of the interconnection circuit layer can be constructed based on the power circuit of the power module. The specific functions of the power circuit can be implemented using existing technologies and will not be detailed here.

[0060] The interconnection circuit layer can be independently configured and stacked with each embedded frame layer to form a substrate. Alternatively, it can be integrated with the embedded frame layer or integrally formed with adjacent embedded frames. For example, the interconnection circuit layer 21 located on top of the third embedded frame 13 can be integrated with the third embedded frame 13 or independently configured and then stacked with each embedded frame layer to form a substrate.

[0061] In addition, the interconnection circuit layer between two adjacent embedded frames can be integrated and configured on the two adjacent embedded frames as shown in FIG2 ; in other possible implementations, it can also be integrated and configured on one side of the embedded frame. For example, the interconnection circuit layer 21 located between the second embedded frame 12 and the third embedded frame 13 can be integrated and configured on the second embedded frame 12 or the third embedded frame 13. This embodiment of the present application is not limited thereto.

[0062] For the first embedded frame 11 of the core embedded chip IC, a resin frame can be used, such as but not limited to glass fiber reinforced epoxy resin, which has good insulation performance, mechanical strength and thermal stability; a metal frame can also be used, such as but not limited to, an aluminum frame or a copper frame, which is conducive to heat dissipation and reducing component temperature.

[0063] Furthermore, the chip IC embedded in the first embedding frame 11 can be interconnected on both sides. Specifically, wiring can be implemented based on the inner layer of the first embedding frame 11. A copper block or thick copper layer can be connected to the back of the chip IC for heat dissipation, thereby quickly conducting heat generated by the chip IC and improving heat dissipation performance. In a specific implementation, the copper block or thick copper layer serving as the heat dissipation structure can be another type of metal mold layer 111 disposed on the first embedding frame 11, as long as it can quickly dissipate heat from the chip IC. This is not limited in the present embodiment.

[0064] In a possible specific implementation, the chip IC can be arranged with its soldering surface (i.e., I / O interface) facing one side of the intermediate embedded frame, or with its soldering surface facing away from the intermediate embedded frame (not shown in the figure). This embodiment of the present application is not limited thereto.

[0065] In the embodiment described in FIG2 , conductive paste is used to achieve Z-direction conduction between adjacent embedded frames. In other implementations, mechanical vias can also be used to achieve conductive interconnection between different embedded frames. Please refer to FIG4 , which is a schematic diagram of another embedded packaging structure provided in an embodiment of the present application. To clearly illustrate the differences and connections between this embodiment and the embodiment described in FIG2 , components or structures with the same functions are indicated with the same reference numerals in the figure.

[0066] The embedded packaging structure provided in this embodiment is used to form a power supply device 300a.

[0067] As shown in FIG4 , the first embedded frame 11, the second embedded frame 12, and the third embedded frame 13 are electrically connected to each other through three mechanical vias. Specifically, the first embedded frame 11 and the third embedded frame 13 are electrically connected through the first mechanical via 421, and the first embedded frame 11 and the second embedded frame 12 are electrically connected through the second mechanical via 422 and the third mechanical via 423.

[0068] In this way, this embodiment uses mechanical through holes to achieve conduction, which can also significantly reduce the number of high-temperature reflow times of chips and other devices, and ensure the safe use and performance of inner-layer devices.

[0069] It should be understood that the cross-sectional view shown in Figure 4 uses three mechanical vias as an example. In other possible implementations, the number of mechanical vias can be determined based on the needs of the actual application scenario to achieve interlayer conductivity under the corresponding circuit relationship. In other words, the specific number of mechanical vias used to achieve Z-conductivity interconnection is not limited to the three shown in the figure.

[0070] In the embodiment described in FIG2 , Z-direction conductive paste is used to achieve interconnection between two adjacent embedded frames. In the embodiment described in FIG4 , mechanical vias are used to achieve interconnection between embedded frames in different layers. In other specific implementations, a combination of Z-direction conductive paste and mechanical vias may also be used. Please refer to FIG5 , which is a schematic diagram of another embedded packaging structure provided in an embodiment of the present application. To clearly illustrate the differences and connections between this embodiment and the embodiments described in FIG2 and FIG4 , components or structures with the same functions are indicated in the figures with the same reference numerals.

[0071] The embedded packaging structure provided in this embodiment is used to form a power supply device 300b.

[0072] Conductive paste 41 is used to achieve Z-direction interconnection between adjacent embedded frames. As shown in the figure, the top terminal pads of the two inductors L located in the second embedded frame 12 are electrically connected to the capacitors C located in the third embedded frame 13 via conductive paste 41, while the bottom terminal pads of the two inductors L are electrically connected to electronic components such as chip ICs located in the first embedded frame 11 via conductive paste 41.

[0073] At the same time, the first embedded frame 11 and the third embedded frame 13 shown in the figure are connected to each other through the fourth mechanical through hole 424 and the fifth mechanical through hole 425 respectively.

[0074] In this way, this embodiment uses a combination of conductive paste and mechanical through-holes to achieve conduction, which can also significantly reduce the number of high-temperature reflow times of chips and other devices, and ensure the safe use and performance of inner-layer devices.

[0075] It should be noted that the specific connection points of the conductive paste and the specific connectivity of the mechanical through-holes are not limited to the exemplary embodiments shown in the figures. In other specific implementations, they can be determined according to the overall design requirements of the actual product, and the embodiments of this application are not limited thereto.

[0076] In other possible implementations, the Z-direction interconnection of the embedded frames of the embedded packaging structure can also be achieved through a sidewall copper deposition process. Please refer to Figure 6, which is a schematic diagram of the structure of another embedded packaging structure provided in an embodiment of the present application. To clearly illustrate the differences and connections between this embodiment and the embodiments described in Figures 2, 4, and 5, components or structures with the same functions are indicated in the figures with the same reference numerals.

[0077] The embedded packaging structure provided in this embodiment is used to form a power supply device 300c.

[0078] The first, second, and third embedded frames 11, 12, and 13 shown in Figure 6 are stacked in sequence to form the embedded package structure. Connecting side portions 43 are formed on the periphery of the embedded package structure using a copper deposition process. These connecting side portions 43 are electrically connected to the third embedded frame 13 on the top layer and the first embedded frame 11 on the bottom layer, achieving electrical connectivity. This embodiment utilizes connecting side portions 43 to achieve electrical connectivity between the upper and lower layers, significantly reducing the number of high-temperature reflow cycles for components such as chips, ensuring the safe use and performance of internal components.

[0079] In other possible implementations, the connecting side portions used to establish the conductive interconnections can also be formed as through-holes based on a sidewall copper plating process, which has a good moisture-proof effect, can further efficiently dissipate heat, and can shield signal interference.

[0080] In a specific implementation, after each layer of embedded frame is pressed and formed, a thin copper layer can be deposited on the edge of the board by chemical methods or electroplating methods to achieve electrical connection between the top interconnection circuit layer 21 and the bottom interconnection circuit layer 21; then, the copper layer on the non-circuit areas of the board surface on both sides of the substrate is etched away, and then the board forming processes such as coating the board surface on both sides of the substrate with a green oil layer 31 and gold-plating fingers 32 are completed, and finally the power supply device 300c is manufactured.

[0081] As shown in the figure, the connecting side portion 43 can communicate with the interconnection circuit layer 21 located at the top of the third embedded frame 13 and the interconnection circuit layer 21 located at the bottom of the first embedded frame 11. In other possible implementations, the connecting side portion 43 can also communicate with the interconnection circuit layer between the intermediate embedded frame or adjacent embedded frames through the board edge (not shown in the figure), establishing an electrical connection between different layers, which can also reduce the impact of high-temperature reflow, as long as good signal integrity and electrical performance are achieved. This embodiment of the present application is not limited to this.

[0082] It should be noted that the aforementioned embodiments all use three-layer embedded frames for three-dimensional stacking after embedding. In other specific implementations, four-layer or other multiple-layer embedded frames are formed according to the circuit design of different power modules. After the electronic components are embedded in the corresponding embedded frames respectively, the multi-layer embedded frames are pressed in turn to form the corresponding embedded packaging structure. This is not limited to the embodiments of the present application.

[0083] Please refer to Figure 7, which is a schematic diagram of another embedded packaging structure provided in an embodiment of the present application. To clearly illustrate the differences and connections between this embodiment and the embodiments described in Figures 2, 4, 5, and 6, components or structures with the same functions are indicated with the same reference numerals in the figures.

[0084] The embedded packaging structure provided in this embodiment is used to form a power supply device 300d.

[0085] The embedded packaging structure includes four layers of embedded frames: a first embedded frame 11, a second embedded frame 12, a third embedded frame 13, and a fourth embedded frame 14. Compared to the embodiment described in FIG.

[0086] The inductor element L is embedded in the second embedding frame 12. The chip IC is embedded in the first embedding frame 11 and the fourth embedding frame 14, forming two chip embedding frames. Both are located on the same side of the second embedding frame 12 as shown in the figure. Placing the two chip embedding frames adjacent to the inductor embedding frame simplifies interlayer wiring layout, effectively controls wiring insertion loss, and reduces process complexity and cost. Multiple capacitor elements C and resistor elements R are embedded in the third embedding frame 13. It should also be understood that the number of components shown in Figure 7 is merely illustrative; in a specific implementation, the number of components can be determined based on actual needs.

[0087] Conductive paste 41 is used to achieve Z-direction interconnection between adjacent embedded frames. As shown in the figure, the top terminal pads of the two inductors L located in the second embedded frame 12 are electrically connected to the capacitors C located in the third embedded frame 13 via conductive paste 41, while the bottom terminal pads of the two inductors L are electrically connected to electronic components such as chip ICs located in the first embedded frame 11 via conductive paste 41.

[0088] As shown in the figure, conductive paste 41 is used to achieve Z-direction interconnection between adjacent embedded frames in the first, second, and third embedded frames 11, 12, and 13. The top pads of the two inductors L located in the second embedded frame 12 are electrically connected to the capacitors C located in the third embedded frame 13 via conductive paste 41, while the bottom pads of the two inductors L are electrically connected to electronic components such as chip ICs located in the first embedded frame 11 via conductive paste 41. The fourth embedded frame 14 and the first embedded frame 11 can achieve Z-direction interconnection via the interconnection circuit layer 21.

[0089] In other possible implementations, the fourth embedded frame 14 and the first embedded frame 11 can be respectively overlapped on both sides of the second embedded frame 12 (not shown in the figure), and the two chip embedded frames and the inductor embedded frame are similarly arranged adjacent to each other, effectively simplifying the interlayer circuit layout.

[0090] In addition, a blind via array structure can be used to connect the embedded frame to the inductor element L. The inductor processing technology described above has certain limitations, particularly the height tolerance of the inductor, which is approximately ±100 μm. For example, when the inductor element L is embedded in the embedded frame, there will be a 200 μm height difference between the largest and smallest inductor elements. At this point, the diameter difference at the bottom of the laser-drilled holes is significant, making the process more difficult and affecting the electrical connection area between the embedded frame and the inductor element L or capacitor element C, thereby affecting product performance.

[0091] Alternatively, a through-slot or through-hole can be provided at the connection location of the embedded frame, and a connection portion can be formed based on the through-slot or through-hole (slot hole). Taking the connection location of the inductor element L as an example, the connection portion can be made at the connection location of the inductor element L terminals on the second embedded frame 12 through the connection portion.

[0092] Specifically, please refer to Figure 8, which shows schematic diagrams of connecting parts of four different structural forms. For ease of description, the insulating substrate around the slot hole is not shown in the figure.

[0093] As shown in Figure 8 (a), the slot 51 can be formed using an existing hole-forming process, and its cross section is an inverted trapezoidal shape with a larger top and a smaller bottom. In this embodiment, the slot 51 is completely filled with copper to form a connecting portion 52a.

[0094] This connection portion 52a connects between the inductor's terminal pad L1 and the interconnecting conductor layer 21, effectively forming a large-scale boss structure at the connection point with the inductor element L. Compared to a blind via array connection structure, this connection portion 52a increases the inductor's flow area by approximately 400%. It also completely avoids the potential problem of blind via arrays where the bottom of the holes do not penetrate the substrate, resulting in an ineffective electrical connection. For example, in applications where the inductor height tolerance is relatively small, the slotted holes can ensure penetration through thicker conductor layers, forming an effective electrical connection. Overall, this effectively overcomes the potential impact of inductor height tolerance.

[0095] As shown in FIG8( b ), the slot 51 may be filled with different conductive materials to form a connecting portion 52 b .

[0096] The perimeter and bottom of the slot 51 can be filled with copper to form the outer conductor 52b1 of the connecting portion 52b. The copper here refers to a single copper material other than a copper alloy. The center of the slot 51 can be filled with another conductive material to form the central conductor 52b2. For example, but not limited to, the central conductor 52b2 can be formed by filling the center of the slot 51 with a copper-containing material. Alternatively, the central conductor 52b2 can be formed by filling the center of the slot 51 with another metal (such as, but not limited to, silver). Similarly, the connecting portion 52b is connected between the terminal pad L1 of the inductor element and the interconnecting conductor layer 21, thereby increasing the current flow area of ​​the inductor.

[0097] As shown in FIG8(c), the four sides and the bottom of the slot 51 are filled with copper to form a connecting portion 52c, which is connected between the terminal pad L1 of the inductor element and the interconnection conductor layer 21, thereby increasing the flow area of ​​the inductor.

[0098] As shown in FIG8( d ), the slot 51 may be filled with other conductive materials besides copper to form a connecting portion 52 d .

[0099] For example, but not limited to, the connection portion 52d can be formed by filling the middle portion of the slot 51 with a copper-containing material; alternatively, the connection portion 52d can be formed by filling the middle portion with a material containing other metals (such as, but not limited to, silver). The connection portion 52d is connected between the terminal pad L1 of the inductor element and the interconnect conductor layer 21, thereby increasing the flow area of ​​the inductor.

[0100] Furthermore, the relative position of the through-slot or through-hole (slot 51) relative to the inductor element L can be determined as needed, as long as it forms a connection portion relative to the inductor element L and meets the corresponding conductivity requirements. See FIG9 , which illustrates a schematic diagram of the relative positional relationship between three different slots (equivalent to connection portions) and the inductor element L.

[0101] As shown in FIG. 9( a ), the slot 51 a is opened to face the terminal pad L1 of the inductor element L, and the connection portion 52 formed by the slot 51 a is electrically connected to the terminal pad L1 .

[0102] As shown in Figure 9(b), slot 51b is formed opposite terminal body L2 of inductor element L. The slot 51b has a larger diameter than terminal body L2, covering the entire end face of terminal body L2. A connection portion 52 formed by slot 51b is electrically connected to the end face of terminal body L2.

[0103] As shown in Figure 9(c), slot 51c is positioned opposite a portion of the terminal body L2 of the inductor element L. In other words, slot 51c does not cover the entire end face of terminal body L2. The connection portion 52 formed by slot 51c is electrically connected to a portion of the end face of terminal body L2. Of course, the slot shown in Figure 9(b) is positioned directly opposite the terminal body L2 and is positioned to fully cover the end face of terminal body L2. In comparison, the connection portion formed by the slot shown in Figure 9 provides a larger inductor flow area through the terminal body L2.

[0104] Optionally, the connection portion formed based on the slot can also be applied to the connection area of ​​other electronic components to be electrically connected to form a corresponding connection portion.

[0105] In a specific implementation, the opening and filling of the slots can be achieved by ordinary technicians in this field based on existing technologies, and will not be described in detail here.

[0106] The implementation schemes of the embedded packaging structure described in the above embodiments can be widely applied to the packaging structures of different functional modules. In practical applications, the above technical advantages are particularly significant in the power module architecture scenario.

[0107] It should be noted that the directional terms "bottom," "end," and "side" used herein are defined based on the state of the embedded packaging structure shown in the figure. The embedded packaging structure assembled and applied in actual scenarios is not limited to the state shown in the figure. For example, in the use state, the motherboard of the electronic device extends vertically, or the extension direction of the electronic device motherboard forms a certain angle with the vertical. It should be understood that the use of the above directional terms does not constitute a substantial limitation on the embedded packaging structure described in this application.

[0108] In addition, the ordinal numbers "first," "second," "third," and "fourth" used herein are only used to describe components or structures with the same function in the technical solution. It is understood that the use of the above ordinal numbers does not constitute an understanding of the technical solution claimed in this application.

[0109] The above are only preferred embodiments of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. An embedded packaging structure, characterized in that: The invention comprises at least three layers of embedded frames stacked in sequence, and chips, inductance elements and a plurality of electronic elements embedded in the at least three layers of embedded frames; at least one of the plurality of electronic elements is a capacitor element or a resistor element; The inductor element is embedded in a middle embedded frame of the at least three embedded frames, and the thickness of the middle embedded frame is greater than or equal to the thickness of the inductor element.

2. The embedded packaging structure according to claim 1, characterized in that: The connecting parts between two adjacent layers of the embedded frames are electrically connected by using conductive paste.

3. The embedded packaging structure according to claim 2, characterized in that: The embedding frame is provided with a slot hole, the slot hole penetrates to the inductor element or the electronic element to be electrically connected, and the slot hole is filled with a conductive material to form the corresponding connecting portion.

4. The embedded packaging structure according to any one of claims 1 to 3, characterized in that: The at least three layers of embedded frames are electrically connected by mechanical through holes.

5. The embedded packaging structure according to any one of claims 1 to 4, characterized in that: The periphery of the embedded packaging structure includes a connecting side portion formed by a sidewall copper deposition process, and the connecting side portion is electrically connected to at least a top embedded frame and a bottom embedded frame of the at least three layers of embedded frames.

6. The embedded packaging structure according to claim 5, characterized in that: The communicating side portion is a through hole.

7. The embedded packaging structure according to any one of claims 1 to 6, characterized in that: An interconnection circuit layer is arranged between two adjacent layers of the embedded frames.

8. The embedded packaging structure according to claim 7, characterized in that: The interconnection circuit layer is integrally formed with one of the two adjacent embedded frames.

9. The embedded packaging structure according to any one of claims 1 to 8, characterized in that: An interconnection circuit layer is arranged on the top of a top embedded frame among the at least three embedded frames, or an interconnection circuit layer is arranged on the bottom of a bottom embedded frame among the at least three embedded frames.

10. The embedded packaging structure according to any one of claims 1 to 9, characterized in that: The intermediate layer embedding frame embedding the inductor element is an inductor embedding frame, and the embedding frame embedding the chip is a chip embedding frame. The chip embedding frame is arranged adjacent to the inductor embedding frame.

11. The embedded packaging structure according to claim 10, characterized in that: The chip embedding frame comprises a metal mold layer, and the metal mold layer is connected to the back side of the chip.

12. The embedded packaging structure according to claim 10 or 11, characterized in that: At least one of the plurality of electronic components is embedded in the chip embedding frame.

13. The embedded packaging structure according to any one of claims 10 to 12, characterized in that: At least one of the plurality of electronic components is embedded in the inductor embedding frame.

14. The embedded packaging structure according to any one of claims 10 to 13, characterized in that: The chip embedding frame is provided with at least two layers, and the at least two layers of chip embedding frames are provided on the same side of the inductor embedding frame, or on both sides of the inductor embedding frame.

15. The embedded packaging structure according to any one of claims 10 to 13, characterized in that: The embedded packaging structure includes a first embedded frame, a second embedded frame and a third embedded frame stacked in sequence, the first embedded frame is the chip embedded frame, the second embedded frame is the inductor embedded frame, and at least part of the multiple electronic components are embedded in the third embedded frame.

16. A power supply device, characterized in that: The invention comprises a chip, an inductor element and a plurality of electronic elements, wherein the chip, the inductor element and the plurality of electronic elements are packaged by adopting the embedded packaging structure according to any one of claims 1 to 15.

17. An electronic device, characterized in that: It comprises a circuit board and a power supply device, wherein the power supply device is arranged on the circuit board, and the power supply device adopts the power supply device according to claim 16.

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