Display substrate and display apparatus

Abstract

The present disclosure provides a display substrate and a display apparatus. The display substrate comprises a base substrate, a plurality of sub-pixels, a first common signal line, a second common signal line, a touch bonding end, a plurality of first touch lines and a plurality of second touch lines; the first touch lines and the second touch lines are at least located in a display area; the first touch lines extend in a first direction, and the second touch lines extend in a second direction; the first touch lines are electrically connected to the first common signal line and the touch bonding end, and the second touch lines are electrically connected to the second common signal line and the touch bonding end; the plurality of first touch lines comprise M first touch line groups, and the plurality of second touch lines comprise N second touch line groups; the touch bonding end comprises a plurality of sensing terminals; the first touch line groups and the second touch line groups are electrically connected to different sensing terminals; in addition, different first touch line groups are electrically connected to different sensing terminals, and different second touch line groups are electrically connected to different sensing terminals.

Description

Display substrate and display device Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] With the development of remote work and distance education, the market demand for conference or educational tablets that integrate writing, display, collaboration, and other functions continues to increase. Currently, products used in such business and distance education scenarios can use electromagnetic touch technology (EMR technology) to enhance the writing experience.

[0003] Compared to traditional capacitive touch technology, electromagnetic touch technology offers higher positioning accuracy. When paired with an active or passive pen, it can achieve highly precise handwriting control and multi-level pressure sensitivity. However, current electromagnetic touch technology uses external electromagnetic touch coils, which typically require additional space, making the module thicker and preventing thinning.

[0004] Summary of the Invention

[0005] In view of the above problems, the present disclosure provides a display substrate and a display device.

[0006] According to a first aspect of the present disclosure, a display substrate is provided, comprising a display area and a peripheral area at least partially surrounding the display area, wherein the display substrate further comprises:

[0007] substrate;

[0008] a plurality of sub-pixels disposed on the base substrate and located in the display area, the plurality of sub-pixels being arranged in an array along a first direction and a second direction, the first direction and the second direction intersecting;

[0009] a first common signal line, a second common signal line, and a touch binding terminal provided on the base substrate, wherein the first common signal line, the second common signal line, and the touch binding terminal are all located in the peripheral area, wherein the peripheral area includes a binding pair area and a binding area arranged opposite to each other along the first direction, and the touch binding terminal is located in the binding area;

[0010] a plurality of first touch lines and a plurality of second touch lines provided on the base substrate, the plurality of first touch lines and the plurality of second touch lines being located at least in the display area, the plurality of first touch lines and the plurality of second touch lines being insulated and spaced apart, the plurality of first touch lines extending along the first direction, and the plurality of second touch lines extending along the second direction;

[0011] The first ends of the plurality of first touch lines are electrically connected to the first common signal line, and the second ends are electrically connected to the touch binding end; the first ends of the plurality of second touch lines are electrically connected to the second common signal line, and the second ends are electrically connected to the touch binding end;

[0012] The plurality of first touch lines include M first touch line groups, the plurality of second touch lines include N second touch line groups, one first touch line group includes at least one first touch line, different first touch line groups include different first touch lines, one second touch line group includes at least one second touch line, different second touch line groups include different second touch lines;

[0013] The touch binding end includes a plurality of sensing terminals, the M first touch wire groups and the N second touch wire groups are electrically connected to different sensing terminals, and different first touch wire groups are electrically connected to different sensing terminals, and different second touch wire groups are electrically connected to different sensing terminals;

[0014] Wherein, M and N are both positive integers.

[0015] According to an embodiment of the present disclosure, the touch binding end includes a plurality of first sensing terminals, a plurality of second sensing terminals, a plurality of third sensing terminals, and a plurality of fourth sensing terminals, wherein the plurality of first sensing terminals are located between two adjacent third sensing terminals, and the plurality of second sensing terminals are located between two adjacent fourth sensing terminals;

[0016] wherein M first touch line groups are electrically connected to the plurality of first sensing terminals, different first touch line groups are electrically connected to different first sensing terminals, and N second touch line groups are electrically connected to the plurality of second sensing terminals, different second touch line groups are electrically connected to different second sensing terminals;

[0017] One end of the first common signal line is electrically connected to one of the third sensing terminals, and the other end is electrically connected to another of the third sensing terminals. One end of the second common signal line is electrically connected to one of the fourth sensing terminals, and the other end is electrically connected to another of the fourth sensing terminals.

[0018] According to an embodiment of the present disclosure, the orthographic projections of the multiple first touch lines on the base substrate define a first pattern, and the orthographic projections of the multiple second touch lines on the base substrate define a second pattern, and at least one of the first pattern and the second pattern covers the orthographic projection of the display area on the base substrate.

[0019] According to an embodiment of the present disclosure, in the first direction, the first pattern protrudes from the orthographic projection of the display area on the base substrate, and in the second direction, the first pattern is located within the orthographic projection of the display area on the base substrate;

[0020] The second pattern covers the orthographic projection of the display area on the base substrate.

[0021] According to an embodiment of the present disclosure, in the first direction, the second pattern includes a first side and a second side arranged opposite to each other, the display area includes a third side and a fourth side arranged opposite to each other, the first side and the third side have a first spacing, the second side and the fourth side have a second spacing, and at least one of the first spacing and the second spacing is smaller than the width of the second touch line group.

[0022] According to an embodiment of the present disclosure, the display substrate further includes a plurality of first touch leads and a plurality of second touch leads, and the peripheral area further includes two side areas arranged opposite to each other along the second direction;

[0023] The plurality of first touch wires are electrically connected to the touch binding end through the plurality of first touch leads, and the first touch wires in different first touch wire groups are electrically connected to the touch binding end through different first touch leads;

[0024] The plurality of second touch wires are electrically connected to the touch binding end through the plurality of second touch leads, and the second touch wires in different second touch wire groups are electrically connected to the touch binding end through different second touch leads;

[0025] The plurality of first touch leads are located in the binding area, and the plurality of second touch leads are located in the same side area and extend from the side area to the binding area.

[0026] According to an embodiment of the present disclosure, the display substrate further includes a plurality of gate lines and a plurality of data lines, and the plurality of gate lines and the plurality of data lines are located in the display area;

[0027] The first common signal line includes a first line segment located in the binding pair area and a second line segment located in the side area, the second common signal line includes a third line segment located in the binding pair area and a fourth line segment located in the side area, the first line segment and the third line segment both extend along the second direction, and the second line segment and the fourth line segment both extend along the first direction;

[0028] The first line segment and the third line segment are provided in the same layer and with the same material as the plurality of gate lines;

[0029] The second line segment and the fourth line segment are in the same layer and made of the same material as the plurality of data lines.

[0030] According to an embodiment of the present disclosure, the display substrate further includes a third common signal line disposed on the base substrate, the third common signal line being located in the peripheral area, at least one of the sub-pixels including a common electrode, and the third common signal line being electrically connected to the common electrodes of the plurality of sub-pixels;

[0031] The orthographic projection of the third common signal line on the base substrate at least partially surrounds the orthographic projection of the display area on the base substrate;

[0032] Wherein, in the binding pair area, the orthographic projection of the third line segment on the base substrate is located on a side where the orthographic projection of the first line segment on the base substrate is away from the orthographic projection of the third common signal line on the base substrate;

[0033] In the same side area, the orthographic projection of the second line segment on the base substrate is located on a side where the orthographic projection of the fourth line segment on the base substrate is away from the orthographic projection of the third common signal line on the base substrate.

[0034] According to an embodiment of the present disclosure, the display substrate further includes a gate driving circuit, and the gate driving circuit is located in at least one of the side regions;

[0035] In the same side area, the orthographic projection of the fourth line segment on the base substrate is located on a side where the orthographic projection of the gate driving circuit on the base substrate is close to the orthographic projection of the third common signal line on the base substrate.

[0036] According to an embodiment of the present disclosure, in the same side area, the orthographic projections of the plurality of second touch leads on the base substrate are located on a side of the orthographic projection of the fourth line segment on the base substrate away from the orthographic projection of the second line segment on the base substrate.

[0037] According to an embodiment of the present disclosure, the orthographic projections of the plurality of first touch lines and the plurality of first touch leads on the base substrate define a third pattern, and the orthographic projections of the plurality of second touch lines and the plurality of second touch leads on the base substrate define a fourth pattern;

[0038] The orthographic projection of the first common signal line on the base substrate at least partially surrounds the third pattern, and the orthographic projection of the second common signal line on the base substrate at least partially surrounds the fourth pattern.

[0039] According to an embodiment of the present disclosure, the display substrate further includes a first conductive layer, a first transparent electrode layer, and a first insulating layer, wherein the first transparent electrode layer is located on a side of the first conductive layer facing away from the base substrate, the first insulating layer is located on a side of the first transparent electrode layer facing away from the base substrate, and the plurality of first touch lines are located in the first conductive layer;

[0040] At least one of the sub-pixels includes a first transistor and a pixel electrode, wherein the pixel electrode is located in the first transparent electrode layer, the first electrode of the first transistor is located in the first conductive layer, and the first insulating layer covers the pixel electrode, the first electrode of the first transistor, and the plurality of first touch lines;

[0041] In the same sub-pixel, the pixel electrode is connected to the first electrode of the first transistor.

[0042] According to an embodiment of the present disclosure, the display substrate further includes a first conductive layer, a second insulating layer, a third conductive layer, a first transparent electrode layer, and a first insulating layer, wherein the second insulating layer is located on a side of the third conductive layer facing away from the base substrate, the first conductive layer is located on a side of the second insulating layer facing away from the base substrate, the first transparent electrode layer is located on a side of the first conductive layer facing away from the base substrate, and the first insulating layer is located on a side of the first transparent electrode layer facing away from the base substrate;

[0043] The plurality of first touch lines are located in the first conductive layer;

[0044] At least one of the sub-pixels includes a first transistor and a pixel electrode, wherein the pixel electrode is located in the first transparent electrode layer, the first electrode of the first transistor is located in the third conductive layer, the second insulating layer covers the first electrode of the first transistor, and the first insulating layer covers the pixel electrode and the plurality of first touch lines;

[0045] In the same sub-pixel, the pixel electrode is electrically connected to the first electrode of the first transistor through a first via hole penetrating the second insulating layer.

[0046] According to an embodiment of the present disclosure, the display substrate further includes a first conductive layer disposed on the base substrate;

[0047] The display substrate further includes a plurality of data lines, and the plurality of data lines extend along the first direction;

[0048] The plurality of data lines and the plurality of first touch lines are both located in the first conductive layer, and orthographic projections of the plurality of first touch lines on the base substrate do not overlap with orthographic projections of the plurality of data lines on the base substrate;

[0049] The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and at least one of the sub-pixel groups includes a plurality of the sub-pixels arranged along the first direction;

[0050] A plurality of sub-pixel groups are arranged between two adjacent first touch lines.

[0051] According to an embodiment of the present disclosure, the display substrate further includes a second conductive layer disposed on the base substrate;

[0052] The display substrate further includes a plurality of gate lines and a plurality of common electrode lines, wherein the plurality of gate lines extend along the second direction, the plurality of common electrode lines extend along the second direction, and the plurality of common electrode lines are electrically connected to the common electrodes of the plurality of sub-pixels;

[0053] The plurality of second touch lines, the plurality of gate lines and the plurality of common electrode lines are all located in the second conductive layer;

[0054] The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and at least one of the sub-pixel groups includes a plurality of sub-pixels arranged along the first direction.

[0055] Wherein, between two adjacent sub-pixels along the first direction, at least one common electrode line, at least one gate line and at least one second touch line are provided;

[0056] Between two adjacent sub-pixels along the first direction, the second touch line and the common electrode line are symmetrically arranged with respect to the gate line.

[0057] According to an embodiment of the present disclosure, at least one of the sub-pixels includes a first transistor, and the first transistor is electrically connected to at least one gate line;

[0058] Between two adjacent sub-pixels along the first direction, the orthographic projection of the first transistor electrically connected to the gate line on the base substrate is located between the orthographic projection of the second touch line on the base substrate and the orthographic projection of the common electrode line on the base substrate.

[0059] According to an embodiment of the present disclosure, the display substrate further includes a first conductive layer and a third conductive layer, wherein the third conductive layer is located on a side of the first conductive layer close to the base substrate;

[0060] The display substrate further includes a plurality of data lines, the plurality of data lines extending along the first direction, the plurality of data lines being located in the third conductive layer, and the plurality of first touch control lines being located in the first conductive layer;

[0061] In the display area, an orthographic projection of at least one of the first touch lines on the base substrate overlaps with an orthographic projection of at least one of the data lines on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the first touch line is greater than or equal to 90%.

[0062] According to an embodiment of the present disclosure, the display substrate further includes a second conductive layer and a fourth conductive layer, wherein the fourth conductive layer is located on a side of the second conductive layer close to the base substrate;

[0063] The display substrate further includes a plurality of common electrode lines, the plurality of common electrode lines extending along the second direction, the plurality of common electrode lines being electrically connected to the common electrodes of the plurality of sub-pixels;

[0064] The plurality of common electrode lines are located in the fourth conductive layer, and the plurality of second touch control lines are located in the second conductive layer;

[0065] In the display area, an orthographic projection of at least one second touch line on the base substrate overlaps with an orthographic projection of at least one common electrode line on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the second touch line is greater than or equal to 90%.

[0066] According to an embodiment of the present disclosure, the display substrate further includes a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer, wherein the fourth conductive layer, the third conductive layer, the second conductive layer, and the first conductive layer are sequentially arranged in a direction away from the base substrate;

[0067] The display substrate further includes a plurality of common electrode lines and a plurality of data lines, the plurality of data lines extending along the first direction, the plurality of common electrode lines extending along the second direction, and the plurality of common electrode lines being electrically connected to the common electrodes of the plurality of sub-pixels;

[0068] The plurality of first touch lines are located in the first conductive layer, the plurality of second touch lines are located in the second conductive layer, the plurality of data lines are located in the third conductive layer, and the plurality of common electrodes are located in the fourth conductive layer;

[0069] In the display area,

[0070] The orthographic projection of at least one of the first touch lines on the base substrate overlaps with the orthographic projection of at least one of the data lines on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the first touch line is greater than or equal to 90%; and / or,

[0071] An orthographic projection of at least one second touch line on the base substrate overlaps with an orthographic projection of at least one common electrode line on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the second touch line is greater than or equal to 90%.

[0072] According to an embodiment of the present disclosure, the display substrate further includes a plurality of second touch control leads, a gate driving circuit and a third common signal line;

[0073] The third common signal line is located in the peripheral area, at least one of the sub-pixels includes a common electrode, the third common signal line is electrically connected to the common electrodes of the plurality of sub-pixels, the plurality of second touch lines are electrically connected to the touch binding end through the plurality of second touch leads, and the second touch lines in different second touch line groups are electrically connected to the touch binding end through different second touch leads;

[0074] The plurality of second touch leads are located in the second conductive layer, and the layer where the first common signal line, the second common signal line, the third common signal line and the gate drive circuit are located is located on a side of the second conductive layer close to the base substrate;

[0075] The orthographic projections of the plurality of second touch leads on the base substrate overlap with the orthographic projections of at least one of the first common signal line, the second common signal line, the third common signal line and the gate driving circuit on the base substrate.

[0076] According to an embodiment of the present disclosure, the plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, one sub-pixel group includes a plurality of sub-pixels arranged along the first direction, and the sub-pixels in different sub-pixel groups are different;

[0077] At least one first touch line is disposed between two adjacent sub-pixel groups.

[0078] According to an embodiment of the present disclosure, the plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and one sub-pixel group includes a plurality of sub-pixels arranged along the first direction;

[0079] At least one of the sub-pixels includes a common electrode, and a plurality of slits are provided on the common electrode;

[0080] In at least one of the sub-pixel groups, an orthographic projection of the i-th slit of the plurality of sub-pixels on the base substrate defines a fifth pattern, and an orthographic projection of at least one first touch line on the base substrate overlaps with the fifth pattern;

[0081] Wherein, i is a positive integer.

[0082] According to a second aspect of the present disclosure, a display device is provided, comprising the above-mentioned display substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0083] The above contents and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0084] The above contents and other objects, features and advantages of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0085] FIG1 schematically shows one of the plan views of a display substrate according to an embodiment of the present disclosure;

[0086] FIG2 schematically shows a plan view of a first touch line, a first common signal line, a first touch lead, and a touch binding terminal according to an embodiment of the present disclosure;

[0087] FIG3 schematically shows a plan view of a second touch line, a second common signal line, a second touch lead, and a touch binding terminal according to an embodiment of the present disclosure;

[0088] FIG4 schematically shows a cross-sectional view along the section line A1 - A1 ′ in FIG18 ;

[0089] FIG5 schematically shows a cross-sectional view along the section line B1 - B1 ′ in FIG18 ;

[0090] FIG6 schematically shows a schematic diagram of a touch binding terminal according to an embodiment of the present disclosure;

[0091] FIG7 schematically shows a second plan view of a display substrate according to an embodiment of the present disclosure;

[0092] FIG8 schematically shows a plan view of a binding pair area according to an embodiment of the present disclosure;

[0093] FIG9 schematically shows a plan view of a side area located on the left side of a display area according to an embodiment of the present disclosure;

[0094] FIG10 schematically shows a plan view of a side area located on the right side of a display area according to an embodiment of the present disclosure;

[0095] FIG11 schematically shows a plan view of the direction of the second common signal line according to an embodiment of the present disclosure;

[0096] 12 to 18 schematically illustrate one of the partial plan views of a portion of a film layer on a display substrate according to an embodiment of the present disclosure;

[0097] 19 to 27 schematically illustrate a second partial plan view of a portion of a film layer on a display substrate according to an embodiment of the present disclosure;

[0098] 28 to 36 schematically illustrate a third partial plan view of a portion of film layers on a display substrate according to an embodiment of the present disclosure;

[0099] FIG37 schematically shows a cross-sectional view along the section line A2-A2′ in FIG36;

[0100] FIG38 schematically shows a cross-sectional view along the section line B2-B2′ in FIG36;

[0101] FIG39 schematically shows a schematic diagram of common electrode lines and second touch lines extending from the peripheral area to the display area;

[0102] 40 to 50 schematically illustrate fourth partial plan views of a portion of film layers on a display substrate according to an embodiment of the present disclosure;

[0103] FIG51 schematically shows a cross-sectional view along the section line A3-A3′ in FIG50;

[0104] FIG52 schematically shows a cross-sectional view along the section line B3-B3′ in FIG50;

[0105] 53 and 54 schematically illustrate schematic diagrams of the i-th slit according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0106] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0107] It should be noted that in the drawings, the sizes and relative sizes of elements may be exaggerated for clarity and / or descriptive purposes. Thus, the sizes and relative sizes of the individual elements are not necessarily limited to those shown in the drawings. In the specification and drawings, the same or similar reference numerals indicate the same or similar parts.

[0108] When an element is described as being "on" another element, "connected to" another element, or "bound to" another element, the element may be directly on the other element, directly connected to the other element, or directly bound to the other element, or there may be an intermediate element. However, when an element is described as being "directly on" another element, "directly connected to" another element, or "directly bound to" another element, there is no intermediate element. Other terms and / or expressions used to describe the relationship between elements should be interpreted in a similar manner, for example, "between" versus "directly between", "adjacent" versus "directly adjacent", or "on" versus "directly on", etc. In addition, the term "connected" may refer to a physical connection, an electrical connection, a communication connection, and / or a fluid connection. In addition, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a rectangular coordinate system, and may be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XY, YZ, and ZZ. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0109] It should be noted that although the terms "first," "second," etc. may be used herein to describe various parts, components, elements, regions, layers, and / or portions, these parts, components, elements, regions, layers, and / or portions should not be limited by these terms. Rather, these terms are used to distinguish one part, component, element, region, layer, and / or portion from another. Thus, for example, the first part, first member, first element, first region, first layer, and / or first portion discussed below may be referred to as a second part, second member, second element, second region, second layer, and / or second portion without departing from the teachings of the present disclosure.

[0110] For ease of description, spatially relative terms, such as "upper," "lower," "left," "right," etc., may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figures. It should be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features.

[0111] As used herein, the terms "substantially," "about," "approximately," "roughly," and other similar terms are used as terms of approximation rather than as terms of degree, and are intended to account for the inherent deviations in measured or calculated values ​​that would be recognized by one of ordinary skill in the art. To account for factors such as process fluctuations, measurement problems, and errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), "about" or "approximately" as used herein are inclusive of the stated value and mean within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art. For example, "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0112] It should be noted that, in this article, the term "same layer" refers to a layer structure formed by patterning a film layer for forming a specific pattern using the same film-forming process and then using the same mask through a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure may be continuous or discontinuous. Multiple elements, components, structures, and / or parts of the "same layer and the same material" are composed of the same material and are formed through the same patterning process. Generally, multiple elements, components, structures, and / or parts of the "same layer and the same material" have approximately the same thickness.

[0113] Those skilled in the art should understand that, in this article, unless otherwise specified, the expression "height" or "thickness" refers to the dimension of the surface of each film layer arranged perpendicular to the display substrate, that is, the dimension along the light emitting direction of the display substrate, or the dimension along the normal direction of the display device.

[0114] Currently, electromagnetic touch technology is primarily used in medium- and large-sized screens. The electromagnetic induction coil can be externally mounted on the back of the display module. For example, a separate circuit board with an electromagnetic induction coil is added to the back of the display module. This coil can work with a stylus to achieve touch control. The back of the display module can refer to the backlight side of the display module, and the light-emitting side of the display module can be referred to as the display side.

[0115] For example, the electromagnetic induction coil can be combined with the pressure sensor and electromagnetic field transmitting device of the stylus to sense the horizontal movement of the stylus on the display surface, while also sensing the distance between the stylus and the display screen, thereby realizing three-dimensional position information detection, and then achieving rich pressure-sensitive touch effects and providing a delicate writing experience.

[0116] However, the external electromagnetic touch coil structure requires additional space, which makes the entire module thicker and cannot be made thinner.

[0117] In view of this, an embodiment of the present disclosure provides a display substrate, comprising a display area and a peripheral area at least partially surrounding the display area, wherein the display substrate further comprises: a base substrate; a plurality of sub-pixels arranged on the base substrate and located in the display area, the plurality of sub-pixels being arranged in an array along a first direction and a second direction, and the first direction and the second direction intersecting; a first common signal line, a second common signal line and a touch binding end arranged on the base substrate, the first common signal line, the second common signal line and the touch binding end being all located in the peripheral area, wherein the peripheral area comprises a binding pair area and a binding area relatively arranged along the first direction, and the touch binding end being located in the binding area; a plurality of first touch lines and a plurality of second touch lines arranged on the base substrate, the plurality of first touch lines and the plurality of second touch lines being located at least in the display area, the plurality of first touch lines and the plurality of second touch lines being arranged with insulating intervals, the plurality of first touch lines extending along the first direction, and the plurality of second touch lines extending along the first direction. The touch lines extend along the second direction; wherein, the first ends of the plurality of first touch lines are electrically connected to the first common signal line, and the second ends are electrically connected to the touch binding end, and the first ends of the plurality of second touch lines are electrically connected to the second common signal line, and the second ends are electrically connected to the touch binding end; the plurality of first touch lines include M first touch line groups, and the plurality of second touch lines include N second touch line groups, one first touch line group includes at least one first touch line, and different first touch line groups include different first touch lines, one second touch line group includes at least one second touch line, and different second touch line groups include different second touch lines; the touch binding end includes multiple sensing terminals, the M first touch line groups and the N second touch line groups are electrically connected to different sensing terminals, and different first touch line groups are electrically connected to different sensing terminals, and different second touch line groups are electrically connected to different sensing terminals; wherein M and N are both positive integers.

[0118] In this way, the touch electromagnetic coil can be integrated onto the display substrate, which facilitates thinner and lighter display products. Furthermore, the touch wire groups (first touch wire group and second touch wire group) used to form the touch electromagnetic coil can be selected based on actual needs, enabling the selection of touch electromagnetic coils of different sizes, thereby achieving different touch performances.

[0119] The display substrate according to the embodiment of the present disclosure is described in detail below.

[0120] FIG. 1 schematically shows one of plan views of a display substrate according to an embodiment of the present disclosure.

[0121] 1 , the display substrate in the embodiment of the present disclosure includes a display area AA and a peripheral area NA located on at least one side of the display area AA.

[0122] The display area AA can have various shapes. For example, the display area AA can be provided in various shapes, such as a polygon (e.g., a rectangle) with straight edges, a circle or an ellipse with curved edges, or a semicircle or a semiellipse with both straight and curved edges. In the embodiment of the present disclosure, the display area AA is provided as a region having a quadrilateral shape with straight edges. It should be understood that this is merely an exemplary embodiment of the present disclosure and is not intended to limit the present disclosure.

[0123] The display substrate may further include a base substrate 200 and a plurality of pixel units P disposed on the base substrate 200 and located in the display area AA. The plurality of pixel units P may be arranged in an array along a first direction Y and a second direction X. The first direction Y and the second direction X intersect. For example, the first direction Y may include the vertical direction in FIG. 1 , and the second direction X may include the horizontal direction in FIG. 1 . That is, the first direction Y and the second direction X are perpendicular to each other.

[0124] Each pixel unit P may include a plurality of sub-pixels PX. For example, the pixel unit P may include a first sub-pixel, a second sub-pixel, and a third sub-pixel. For example, the first sub-pixel, the second sub-pixel, and the third sub-pixel may be set as a red sub-pixel, a green sub-pixel, and a blue sub-pixel, respectively. However, the embodiments of the present disclosure are not limited thereto.

[0125] 1 , a plurality of sub-pixels PX may be arranged in an array along a first direction Y and a second direction X. However, the embodiments of the present disclosure are not limited thereto. For ease of description, the embodiments of the present disclosure refer to the plurality of sub-pixels PX arranged along the first direction Y as a column of sub-pixels PX (or also referred to as a sub-pixel group), and the plurality of sub-pixels PX arranged along the second direction X as a row of sub-pixels PX.

[0126] The display substrate further includes a plurality of gate lines GL and a plurality of data lines DL disposed on the base substrate 200 and located at least in the display area AA. The plurality of data lines DL extend along a first direction Y, and the plurality of gate lines GL extend along a second direction X. Exemplarily, one sub-pixel PX is connected to one data line DL and one gate line GL, sub-pixels PX in the same row are connected to the same gate line GL, sub-pixels PX in different rows are connected to different gate lines GL, sub-pixels PX in the same column are connected to the same data line DL, and sub-pixels PX in different columns are connected to different data lines DL.

[0127] The peripheral area NA may be disposed on at least one side of the display area AA. For example, the peripheral area NA may surround the periphery of the display area AA. In an embodiment of the present disclosure, the peripheral area NA may include a vertical portion extending in the first direction Y and a horizontal portion extending in the second direction X.

[0128] The display substrate may further include a gate drive circuit 21 and a display binding terminal PAD1 that are arranged on the base substrate 200 and located in the peripheral area NA. For example, the gate drive circuit 21 may be located on at least one side of the display area AA. In the embodiment shown in Figure 1, the gate drive circuit 21 is respectively located on the left and right sides of the display area AA. It should be noted that the left and right sides may be the left and right sides of the display substrate (screen) viewed by the human eye during display. For example, the display binding terminal PAD1 may be located on at least one side of the display area AA. In the embodiment shown in Figure 1, the display binding terminal PAD1 is located on the lower side of the display area AA. It should be noted that the lower side may be the lower side of the display substrate (screen) viewed by the human eye during display.

[0129] The display binding terminal PAD1 is used to electrically connect to the display driver chip (not shown in the figure). For example, the display binding terminal PAD1 and the display driver chip can be directly connected by binding or other means; or, the display binding terminal PAD1 and the display driver chip can be switched through a device such as a flexible circuit board. The display driver chip includes a data driver circuit, which is used to sequentially latch the input data according to the clock signal and convert the latched data into an analog signal and then input it to each data line DL of the display substrate. The gate driver circuit 21 is usually implemented by a shift register, which converts the clock signal into an on / off voltage and outputs it to each gate line GL of the display substrate.

[0130] It should be noted that although Figure 1 shows that the gate driving circuit 21 is located on the left and right sides of the display area AA and the display binding terminal PAD1 is located on the lower side of the display area AA, the embodiments of the present disclosure are not limited to this. The gate driving circuit 21 and the display binding terminal PAD1 can be located at any suitable position in the peripheral area NA.

[0131] For example, the gate driver circuit 21 can utilize GOA technology, also known as Gate Driver on Array (GOA). In GOA technology, the gate driver circuit 21 is directly mounted on the array substrate, replacing an external chip. Each GOA unit functions as a shift register, with each shift register stage connected to a gate line GL. Each stage of the shift register sequentially outputs scan signals, achieving progressive scanning of the sub-pixels PX. In some embodiments, each stage of the shift register can also be connected to multiple gate lines GL. This adapts to the development trend of display substrates with higher resolution and narrower borders.

[0132] Figure 2 schematically shows a plan view of the first touch line, the first common signal line, the first touch lead and the touch binding end according to an embodiment of the present disclosure, and Figure 3 schematically shows a plan view of the second touch line, the second common signal line, the second touch lead and the touch binding end according to an embodiment of the present disclosure.

[0133] With reference to Figures 2 and 3, in an embodiment of the present disclosure, the display substrate further includes: a first common signal line 211, a second common signal line 212 and a touch binding terminal PAD2 arranged on the base substrate 200, the first common signal line 211, the second common signal line 212 and the touch binding terminal PAD2 are all located in the peripheral area NA, wherein the peripheral area NA includes a binding pair area Q1 and a binding area Q2 relatively arranged along the first direction Y, and the touch binding terminal PAD2 is located in the binding area Q2.

[0134] 2 , the binding pair area Q1 is located above the display area AA, the binding area Q2 is located below the display area AA, and the display binding terminal PAD1 and the touch binding terminal PAD2 are both located in the binding area Q2. In an embodiment of the present disclosure, the first common signal line 211 can be arranged at least partially around the display area AA. For example, referring to FIG. 2 , the first common signal line 211 at least surrounds the upper, left, and right sides of the display area AA, and is electrically connected to the touch binding terminal PAD1 on the lower side of the display area AA. The second common signal line 212 can be arranged at least partially around the display area AA. For example, referring to FIG. 3 , the second common signal line 212 surrounds the upper, left, and right sides of the display area AA, and is electrically connected to the touch binding terminal PAD1 on the lower side of the display area AA.

[0135] The touch binding terminal PAD1 can electrically connect the signal line for realizing the touch function on the display substrate to the touch detection chip (not shown in the figure). The touch detection chip can be set at any suitable position on the display substrate. For example, the touch detection chip can be set on the back side of the display substrate. The signal line for realizing the touch function includes a first common signal line 211, a second common signal line 212, and a first touch line 221 and a second touch line 222 to be mentioned below. Among them, the back side of the display substrate can refer to the backlight side of the display substrate, and accordingly, the light-emitting side of the display substrate can be called the display side.

[0136] In an embodiment of the present disclosure, the display binding terminal PAD1 can electrically connect the signal lines used to realize the display function on the display substrate with the display driver chip. The signal lines used to realize the display function may include data lines DL, gate lines GL and the third common signal lines 213 mentioned below.

[0137] Optionally, the number of the display binding terminals PAD1 may be multiple, for example, there are two display binding terminals PAD1 , and in the second direction X, the touch binding terminal PAD1 is located between the two display binding terminals PAD1 .

[0138] The display substrate further includes a plurality of first touch lines 221 and a plurality of second touch lines 222 disposed on the base substrate 200. The plurality of first touch lines 221 and the plurality of second touch lines 222 are located at least in the display area AA. The plurality of first touch lines 221 and the plurality of second touch lines 222 are insulated and spaced apart from each other. The plurality of first touch lines 221 extend along a first direction Y, and the plurality of second touch lines 222 extend along a second direction X.

[0139] FIG. 4 schematically shows a cross-sectional view along the cross-sectional line A1 - A1 ′ in FIG. 18 , and FIG. 5 schematically shows a cross-sectional view along the cross-sectional line B1 - B1 ′ in FIG. 18 .

[0140] Referring to Figures 4 and 5 , the display substrate further includes a first conductive layer D1, a second conductive layer D2, and at least one insulating layer positioned between the first and second conductive layers D1 and D2. First touch lines 221 are positioned within the first conductive layer D1, while second touch lines 222 are positioned within the second conductive layer D2. The insulating layer separates the first touch lines 221 from the second touch lines 222, thereby isolating the first touch lines 221 from the second touch lines 222. For example, the first touch lines 221 extend in the vertical direction shown in Figure 2, while the second touch lines 222 extend in the horizontal direction shown in Figure 3. That is, the first touch lines 221 and the second touch lines 222 extend in a direction perpendicular to each other.

[0141] In the embodiment of the present disclosure, at least one of the plurality of first touch lines 221 and the plurality of second touch lines 222, in addition to being located within the display area AA, may also extend to the periphery of the display area AA, thereby covering the display area AA and a portion of the periphery of the display area AA, thereby increasing the touch sensing area and ensuring touch effects at the edges of the display area AA. For example, referring to FIG. 2 , the plurality of first touch lines 221 extend to the periphery of the display area AA in the first direction Y, and referring to FIG. 3 , the plurality of second touch lines 222 extend to the periphery of the display area AA in the second direction X.

[0142] The first ends of the plurality of first touch lines 221 are electrically connected to the first common signal line 211, and the second ends are electrically connected to the touch binding terminal PAD1. The first ends of the plurality of second touch lines 222 are electrically connected to the second common signal line 212, and the second ends are electrically connected to the touch binding terminal PAD1. The plurality of first touch lines 221 include M first touch line groups Z1, and the plurality of second touch lines 222 include N second touch line groups Z2. A first touch line group Z1 includes at least one first touch line 221, and different first touch line groups Z1 include different first touch lines 221. A second touch line group Z2 includes at least one second touch line 222, and different second touch line groups Z2 include different second touch lines 222. M and N are both positive integers.

[0143] In the embodiment of the present disclosure, each first touch line group Z1 includes a plurality of first touch lines 221, and any two first touch line groups Z1 have the same number of first touch lines 221. Each second touch line group Z2 includes a plurality of second touch lines 222, and any two second touch line groups Z2 have the same number of second touch lines 222.

[0144] 2 , the first end of the first touch line 221 may refer to the upper end of the first touch line 221, and the second end of the first touch line 221 may refer to the lower end of the first touch line 221. The upper ends of the plurality of first touch lines 221 are electrically connected to the first common signal line 211, and the lower ends of the plurality of first touch lines 221 are electrically connected to the touch binding terminal PAD1 in groups.

[0145] FIG6 schematically shows a schematic diagram of a touch binding terminal according to an embodiment of the present disclosure.

[0146] 6 , in an embodiment of the present disclosure, the touch binding end PAD2 includes a plurality of sensing terminals F, M first touch line groups Z1 and N second touch line groups Z2 are electrically connected to different sensing terminals F, and different first touch line groups Z1 are electrically connected to different sensing terminals F.

[0147] For example, referring to Figures 2 and 6 , the touch binding terminal PAD1 includes multiple first sensing terminals F1. The first touch wires 221 in the same first touch wire group Z1 are electrically connected to the same first sensing terminal F1 via the same first touch lead 231. The first touch wires 221 in different first touch wire groups Z1 are electrically connected to different first sensing terminals F1. In other words, the multiple first touch wires 221 in the same first touch wire group Z1 are arranged in parallel.

[0148] 3 , the first end of the second touch line 222 may refer to the left end of the first touch line 221, and the second end of the second touch line 222 may refer to the right end of the second touch line 222. The left ends of the plurality of second touch lines 222 are electrically connected to the second common signal line 212, and the right ends of the plurality of second touch lines 222 are electrically connected to the touch binding terminal PAD2 in groups.

[0149] In the embodiments of the present disclosure, different second touch line groups are electrically connected to different sensing terminals F. For example, referring to FIG3 and FIG6 , the binding terminal PAD1 includes multiple second sensing terminals F2. The second touch lines 222 in the same second touch line group Z2 are electrically connected to the same second sensing terminal F2 via the same second touch lead 232, while the second touch lines 222 in different second touch line groups Z2 are electrically connected to different second sensing terminals F2. In other words, the multiple second touch lines 222 in the same second touch line group Z2 are arranged in parallel.

[0150] In an embodiment of the present disclosure, the touch binding terminal PAD2 can be bound and connected to the first flexible circuit board, and then electrically connected to the touch sensing chip through the first flexible circuit board. When performing touch detection, the touch detection chip can selectively conduct with the sensing terminal F on the touch binding terminal PAD2 according to the set scanning timing to realize scanning of the first touch line 221 and the second touch line 222. Exemplarily, the first touch line 221 can be scanned along the second direction X, and during the scanning, m first touch line groups Z1 are connected to the touch detection chip each time. Exemplarily, the second touch line 222 can be scanned along the first direction Y, and during the scanning, n second touch line groups Z2 are connected to the touch detection chip each time. In this way, touch scanning of the entire display area AA can be realized. Wherein, m and n are both positive integers, and 1<m<M, 1<n<N.

[0151] For example, when scanning the first touch line 221, the scanning cycle can be divided into multiple first sub-stages. In each first sub-stage, m first touch line groups Z1 (such as the xth and x+2th first touch line groups Z1 in Figure 2) are connected to the touch detection chip. In this way, the m first touch line groups Z1 can form a first touch electromagnetic coil.

[0152] For example, when the stylus moves within the sensing range of the first touch electromagnetic coil, the first touch electromagnetic coil senses a corresponding electromagnetic signal, including but not limited to changes in amplitude and frequency. By analyzing this change, the first touch electromagnetic coil can determine first position information where the touch occurred. The first position information may include the coordinates of the touch point in the first direction Y. The sensing range of the first touch electromagnetic coil may include the area enclosed by the edges of the m first touch wire groups Z1.

[0153] It should be noted that the m first touch line groups Z1 may be adjacent first touch line groups Z1 or spaced apart. In two adjacent first sub-phases, the first touch line groups Z1 may partially overlap or may not overlap at all. For example, the m first touch line groups Z1 enabled by the touch detection chip each time may include two adjacent first touch line groups Z1. For another example, the m first touch line groups Z1 enabled by the touch detection chip each time may include two spaced apart first touch line groups Z1. For example, the m first touch line groups Z1 enabled by the touch detection chip each time may include the xth first touch line group Z1 and the x+2th first touch line group Z1. In this way, the areas covered by the two adjacent first touch line groups Z1 enabled can overlap, thereby improving the coverage of touch detection.

[0154] When scanning the second touch lines, the entire scanning cycle can be divided into multiple second sub-stages. In each second sub-stage, n second touch line groups Z2 (such as the yth and y+1th second touch line groups Z2 in Figure 3) are connected to the touch detection chip, so that the n second touch line groups Z2 form a second touch electromagnetic coil.

[0155] When the stylus moves within the sensing range of the second touch electromagnetic coil, the second touch electromagnetic coil senses a corresponding electromagnetic signal, including but not limited to changes in amplitude and frequency. The touch detection chip analyzes this change to determine the second location information where the touch occurred. The second location information may include the coordinates of the touch point in the second direction X. The sensing range of the second touch electromagnetic coil may include the area enclosed by the edges of the n second touch wire groups Z2.

[0156] It should be noted that the n second touch line groups Z2 can be adjacent second touch line groups Z2 or spaced apart. In two adjacent second sub-phases, the second touch line groups Z2 may partially overlap. For example, the n second touch line groups Z2 enabled by the touch detection chip each time may include two adjacent second touch line groups Z2. For another example, the n second touch line groups Z2 enabled by the touch detection chip each time may include two spaced apart second touch line groups Z2. Exemplarily, the n second touch line groups Z2 enabled by the touch detection chip each time may include the yth second touch line group Z2 and the y+2th second touch line group Z2. In this way, the areas covered by two adjacent second touch line groups Z2 enabled can overlap, thereby improving touch detection coverage. Where x and y are both positive integers, x+2≤M, y+2≤N.

[0157] It should be noted that because the first touch lines 221 and the second touch lines 222 are electrically connected to the touch detection chip via different sensing terminals F, the touch detection chip can scan the first touch lines 221 and the second touch lines 222 in a time-sharing manner or simultaneously. The specific method can be determined based on actual needs and is not limited in the embodiments of the present disclosure. When the touch detection chip scans the first touch lines 221 and the second touch lines 222 in a time-sharing manner, interference between the first touch lines 221 and the second touch lines 222 can be reduced, thereby improving touch detection accuracy.

[0158] In the embodiments of the present disclosure, the touch electromagnetic coil can be integrated onto the display substrate through the above-described method, which is conducive to the thinness and lightness of the display product. At the same time, by changing the first touch line group Z1 and the second touch line group Z2 that are selected, the size of the final touch electromagnetic coil can be adjusted, thereby achieving different touch performance. Taking the first touch line group Z1 as an example, each time the first touch line group Z1 is selected, two adjacent groups of first touch line groups Z1 can be selected, which can improve touch detection accuracy. Alternatively, each time the first touch line group Z1 is selected, two groups of first touch line groups Z1 that are spaced apart can be selected. This allows the areas covered by the two adjacent first touch line groups Z1 to overlap, which is conducive to improving touch detection coverage and reducing detection blind spots.

[0159] The display substrate according to the embodiment of the present disclosure is further described below.

[0160] FIG. 7 schematically shows a second plan view of a display substrate according to an embodiment of the present disclosure.

[0161] In some specific embodiments, the display substrate can be used in a liquid crystal display panel. Referring to FIG. 7 , the display substrate further includes a third common signal line 213 disposed on the base substrate 200. The third common signal line 213 is located in the peripheral area NA. At least one subpixel PX includes a common electrode V1. The third common signal line 213 is electrically connected to the common electrodes V1 of the plurality of subpixels PX. The third common signal line 213 is configured to provide a first electrical signal, which may also be referred to as a common voltage signal, to the common electrodes V1 of the plurality of subpixels PX.

[0162] In an embodiment of the present disclosure, the liquid crystal display panel includes a liquid crystal layer, and the sub-pixel PX includes a pixel electrode V2 in addition to the common electrode V1. By providing a data voltage signal to the pixel electrode V2 and a common voltage signal to the common electrode V1, a corresponding electric field can be formed between the pixel electrode V2 and the common electrode V1. The liquid crystal in the liquid crystal layer can be deflected under the drive of the electric field, thereby realizing the display function.

[0163] 2, 3, and 6, the touch binding terminal PAD1 includes a plurality of first sensing terminals F1, a plurality of second sensing terminals F2, a plurality of third sensing terminals F3, and a plurality of fourth sensing terminals F4. The M first touch wire groups Z1 are electrically connected to the plurality of first sensing terminals F1, with different first touch wire groups Z1 being electrically connected to different first sensing terminals F1. The N second touch wire groups Z2 are electrically connected to the plurality of second sensing terminals F2, with different second touch wire groups Z2 being electrically connected to different second sensing terminals F2.

[0164] In the embodiment of the present disclosure, the plurality of first sensing terminals F1 are arranged along the second direction X, and the plurality of second sensing terminals F2 are arranged along the second direction X. In the second direction X, the plurality of first sensing terminals F1 may be located on the same side of the plurality of second sensing terminals F2.

[0165] Multiple first sensing terminals F1 are located between two adjacent third sensing terminals F3, multiple second sensing terminals F2 are located between two adjacent fourth sensing terminals F4, one end of the first common signal line 211 is electrically connected to one third sensing terminal F3, and the other end is electrically connected to another third sensing terminal F3, one end of the second common signal line 212 is electrically connected to one fourth sensing terminal F4, and the other end is electrically connected to another fourth sensing terminal F4.

[0166] Optionally, the number of third sensing terminals F3 can be two, and in the second direction X, the two third sensing terminals F3 are located on opposite sides of the plurality of first sensing terminals F1. The two third sensing terminals F3 are respectively electrically connected to the ends of the first common signal line 211, so that the first common signal line 211 and the touch binding terminal PAD1 can form a closed ring. When the first common signal line 211 is electrically connected to the touch detection chip, the ring can also form a first touch electromagnetic coil. Correspondingly, the number of fourth sensing terminals F4 can be two, and in the second direction X, the two fourth sensing terminals F4 are located on opposite sides of the plurality of second sensing terminals F2. The two fourth sensing terminals F4 are respectively electrically connected to the ends of the second common signal line 212, so that the second common signal line 212 and the touch binding terminal PAD1 can form a closed ring. When the second common signal line 212 is electrically connected to the touch detection chip, the ring can also form a second touch electromagnetic coil.

[0167] In this way, on the one hand, the intersection between the first common signal line 211, the second common signal line 212, the first touch lead 231 and the second touch lead 232 can be reduced; at the same time, the intersection between the first common signal line 211, the second common signal line 212, the first touch lead 231 and the second touch lead 232 and existing signal lines such as the data line DL and the gate line GL can be reduced, which is beneficial to reducing interference between the lines.

[0168] Optionally, the third sensing terminal F3 and the fourth sensing terminal F4 may also supply power (or may be referred to as a sensing reference voltage) to the first common signal line 211 and the second common signal line 212. The sensing reference voltage provided by the third sensing terminal F3 and the fourth sensing terminal F4 is substantially the same as the voltage of the first electrical signal. In this manner, during touch detection, the sensing reference voltage on the first common signal line 211, the second common signal line 212, the first touch line 221, and the second touch line 222 is substantially the same as the common voltage signal, thereby preventing interference between different electrical signals.

[0169] In some specific embodiments, the orthographic projections of the plurality of first touch lines 221 on the base substrate 200 define a first pattern, the orthographic projections of the plurality of second touch lines 222 on the base substrate 200 define a second pattern, and the orthographic projection of at least one of the first pattern and the second pattern on the base substrate 200 covers the orthographic projection of the display area AA on the base substrate 200.

[0170] In the embodiment of the present disclosure, the first pattern may refer to a pattern formed by the outermost edges of the orthographic projections of the plurality of first touch lines 221 on the base substrate 200, and the second pattern may refer to a pattern formed by the outermost edges of the orthographic projections of the plurality of second touch lines 222 on the base substrate 200. For example, the first pattern and the second pattern may comprise rectangles, but the embodiments of the present disclosure are not limited thereto.

[0171] By making the first pattern (or the second pattern) cover the display area AA, the coverage of the edge of the display area AA by the touch monitoring area can be improved, thereby reducing touch blind spots.

[0172] In some specific embodiments, in the first direction Y, the first pattern protrudes from the orthographic projection of the display area AA on the base substrate 200, and in the second direction X, the first pattern is located within the orthographic projection of the display area AA on the base substrate 200. The second pattern covers the orthographic projection of the display area AA on the base substrate 200.

[0173] 2 and 3 , the top and bottom sides of the first touch line group Z1 protrude beyond the display area AA, allowing the multiple first touch line groups Z1 to cover the top and bottom edges of the display area AA. The second touch line group Z2 protrudes beyond the display area AA on both the left and right sides. Furthermore, the top and bottom two second touch line groups Z2 of the multiple second touch line groups Z2 protrude beyond the display area AA along the first direction Y. In this way, the multiple second touch lines 222 can cover the top and bottom edges and the left and right edges of the display area AA, thereby reducing the touch sensing blind area of ​​the display area AA.

[0174] Optionally, the leftmost and rightmost second touch line groups Z2 of the plurality of first touch line groups Z1 may protrude from the display area AA along the second direction X. In this way, the plurality of second touch lines 222 may cover the left and right edges of the display area AA, thereby further reducing the touch sensing blind area of ​​the display area AA.

[0175] In some specific embodiments, in the first direction Y, the second pattern includes a first side and a second side that are oppositely arranged, the display area AA includes a third side and a fourth side that are oppositely arranged, the first side and the third side have a first spacing, the second side and the fourth side have a second spacing, and at least one of the first spacing and the second spacing is smaller than the width of the second touch line group Z2.

[0176] In the embodiments of the present disclosure, unless otherwise specified, expressions such as "a first distance between the first side and the third side" refer to the average distance between the first side and the third side. Expressions such as "the width of the second touch line group Z2" refer to the average width of the second touch line group Z2. The width of the second touch line group Z2 may refer to the dimension of the second touch line group Z2 in the first direction Y.

[0177] The first side may refer to the upper side of the second pattern, the second side may refer to the lower side of the second pattern, the third side may include the upper side of the display area AA, and the fourth side may include the lower side of the display area AA. The larger the first spacing (second spacing), the stronger the magnetic field sensing capability of the upper edge (lower edge) of the display area AA, which helps improve the touch sensing effect at this edge.

[0178] The first and second spacings can be substantially the same. For example, the first spacing (second spacing) can be set to 1mm to 5mm, for example, 3mm, and the width of the second touch line group Z2 can be set to 4mm to 8mm, for example, 6.1mm. This helps ensure that the upper edge (lower edge) of the display area AA is covered by the second touch line group Z2, and the upper edge is close to the centerline of the second touch line group Z2, which further improves the touch sensing effect at this edge.

[0179] In some specific embodiments, the display substrate further includes a plurality of first touch leads 231 and a plurality of second touch leads 232, and the peripheral area NA further includes two side regions Q3 arranged opposite each other along the second direction X. The plurality of first touch leads 221 are electrically connected to the touch binding terminal PAD1 via the plurality of first touch leads 231, and the first touch lines 221 in different first touch line groups Z1 are electrically connected to the touch binding terminal PAD1 via different first touch leads 231. The plurality of second touch lines 222 are electrically connected to the touch binding terminal PAD1 via the plurality of second touch leads 232, and the second touch lines 222 in different second touch line groups Z2 are electrically connected to the touch binding terminal PAD1 via different second touch leads 232. The plurality of first touch leads 231 are located in the binding region Q2, and the plurality of second touch leads 232 are located in the same side region Q3 and extend from the side region Q3 into the binding region Q2.

[0180] For example, the two side regions Q3 are located on the left and right sides of the display area AA, respectively. In the embodiment of the present disclosure, the first touch line group Z1 is connected to the first touch lead 231 in a one-to-one correspondence. For example, the first touch lines 221 in each first touch line group Z1 are electrically connected to the same first sensing terminal F1 in the touch binding terminal PAD1 through the same first touch lead 231.

[0181] With reference to Figures 2 and 6 , the multiple first touch leads 231 include two portions with different orientations. Specifically, the peripheral area NA also includes a lead region located between the bonding region Q2 and the side region Q3. Within the lead region, one portion bends toward the right, while the other portion bends toward the left. The two portions ultimately converge on the upper side of the touch bonding terminal PAD1 and are electrically connected to the corresponding first sensing terminals F1 on the touch bonding terminal PAD1. The multiple first touch leads 231 that bend toward the right extend in parallel directions, and accordingly, the multiple first touch leads 231 that bend toward the left also extend in parallel directions.

[0182] Exemplarily, referring to FIG. 2 , after the xth first touch line group Z1 and the x+2th touch line group are connected to the touch detection chip, the xth first touch line group Z1 and the x+2th touch line group form a first touch electromagnetic coil through the first common signal line 211 and the first touch lead 231 .

[0183] With reference to Figures 3 and 6 , the second touch line group Z2 is connected to the second touch leads 232 in a one-to-one correspondence. For example, each second touch lead 232 in each second touch line group Z2 is electrically connected to the same second sensing terminal F2 on the touch binding pad PAD1 via the same second touch lead 232. Referring to Figure 3 , multiple second touch leads 232 extend from the side region Q3 on the right side of the display area AA to the binding region below the display area AA. Within the same second touch line group Z2, the right end of each second touch line 222 is electrically connected to the same second touch lead 232. The multiple second touch leads 232 follow a similar path. Specifically, the multiple second touch leads 232 extend along the first direction Y to the binding region Q2, then bend leftward in the binding region Q2. After bending, the multiple second touch leads 232 converge above the touch binding pad PAD1 and are electrically connected to the corresponding second sensing terminals F2.

[0184] For example, referring to FIG. 3 , after the yth second touch line group Z2 and the y+1th second touch line group Z2 are connected to the touch detection chip, the yth second touch line group Z2 and the y+1th second touch line group Z2 form a second touch electromagnetic coil through the second common signal line 212 and the second touch lead 232 .

[0185] In some specific embodiments, the display substrate further includes a plurality of gate lines GL and a plurality of data lines DL, and the plurality of gate lines GL and the plurality of data lines DL are located in the display area AA. With reference to FIG1 , FIG2 , FIG3 , and FIG7 , the first common signal line 211 includes a first line segment L1 located in the bonding pair area Q1 and a second line segment L2 located in the side area Q3. The second common signal line 212 includes a third line segment L3 located in the bonding pair area Q1 and a fourth line segment L4 located in the side area Q3. The first line segment L1 and the third line segment L3 both extend along the second direction X, and the second line segment L2 and the fourth line segment L4 both extend along the first direction Y. The first line segment L1 and the third line segment L3 are formed on the same layer and material as the plurality of gate lines GL. The second line segment L2 and the fourth line segment L4 are formed on the same layer and material as the plurality of data lines DL.

[0186] FIG8 schematically shows a plan view of a bonding pair area according to an embodiment of the present disclosure.

[0187] In the embodiment of the present disclosure, the data line DL and the gate line GL are arranged in different layers. With reference to Figures 1, 2, 7, and 8, in the bonding area Q1, the data line DL extends along the first direction Y, and the first line segment L1 and the third line segment L3 extend along the second direction X. By arranging the first line segment L1 and the third line segment L3 in the same layer and with the multiple gate lines GL, the first line segment L1 and the third line segment L3 can be arranged in a different layer from the data line DL, thereby reducing the cross-connection between the first line segment L1 and the third line segment L3 and the data line DL. Optionally, the first touch line 221 is electrically connected to the first line segment L1 via the first relay structure R1.

[0188] FIG9 schematically shows a plan view of a side area located on the left side of a display area according to an embodiment of the present disclosure, and FIG10 schematically shows a plan view of a side area located on the right side of a display area according to an embodiment of the present disclosure.

[0189] With reference to Figures 1, 3, 7, 9, and 10, in the side region Q3, the gate line GL extends along the second direction X, and the second line segment L2 and the fourth line segment L4 extend along the first direction Y. By arranging the second line segment L2 and the fourth line segment L4 on the same layer and with the multiple data lines DL, the second line segment L2 and the fourth line segment L4 can be arranged on a different layer from the gate line GL, thereby reducing the crossover between the second line segment L2 and the fourth line segment L4 and the gate line GL. Optionally, the second touch line 221 is electrically connected to the fourth line segment L4 via a second transfer structure R2.

[0190] Referring to FIG. 7 , in some embodiments, the display substrate further includes a third common signal line 213 disposed on the base substrate 200. The third common signal line 213 is located in the peripheral area NA. At least one subpixel PX includes a common electrode V1, and the third common signal line 213 is electrically connected to the common electrodes V1 of the plurality of subpixels PX. The orthographic projection of the third common signal line 213 on the base substrate 200 at least partially surrounds the orthographic projection of the display area AA on the base substrate 200. In the bonding pair area Q1, the orthographic projection of the third line segment L3 on the base substrate 200 is located on a side of the orthographic projection of the first line segment L1 on the base substrate 200 that is away from the orthographic projection of the third common signal line 213 on the base substrate 200. In the same side area Q3, the orthographic projection of the second line segment L2 on the base substrate 200 is located on a side of the orthographic projection of the fourth line segment L4 on the base substrate 200 that is away from the orthographic projection of the third common signal line 213 on the base substrate 200.

[0191] 7 , the third common signal line 213 surrounds at least the upper, left, and right sides of the display area AA. However, the embodiments of the present disclosure are not limited thereto. For example, the third common signal line 213 surrounds the upper, lower, left, and right sides of the display area AA.

[0192] The first common signal line 211 and the second common signal line 212 are both located outside the third common signal line 213. The outside of the third common signal line 213 may refer to a side of the third common signal line 213 away from the display area AA.

[0193] For example, the third common signal line 213 includes a fifth line segment L5 located in the bonding pair region Q1 and a sixth line segment L6 located in the side region Q3. The fifth line segment L5 extends along the second direction X, and the sixth line segment L6 extends along the first direction Y. In the bonding pair region Q1, the fifth line segment L5, the first line segment L1, and the third line segment L3 are arranged in this order in a direction away from the display area AA. In this way, the first common signal line 211 can shield the first touch control line 221 from interference from the second common signal line 212.

[0194] In the side area Q3 , the sixth line segment L6 , the fourth line segment L4 , and the second line segment L2 are sequentially arranged in a direction away from the display area AA.

[0195] In some specific embodiments, in the same side region Q3, the orthographic projections of the plurality of second touch leads 232 on the base substrate 200 are located on a side of the orthographic projection of the fourth line segment L4 on the base substrate 200 that is away from the orthographic projection of the second line segment L2 on the base substrate 200. In this way, the second common signal line 212 can shield the second touch leads 232 from interference from the first common signal line 211.

[0196] In some specific embodiments, the display substrate further includes a gate driver circuit 21, which is located in at least one side region Q3. In the same side region Q3, the orthographic projection of the fourth line segment L4 on the base substrate 200 is located on a side where the orthographic projection of the gate driver circuit 21 on the base substrate 200 is close to the orthographic projection of the third common signal line 213 on the base substrate 200.

[0197] In the embodiment of the present disclosure, gate drive circuits 21 are disposed in both side regions Q3 of the display substrate. In each side region Q3, the second line segment L2 and the fourth line segment L4 are closer to the display area AA than the gate drive circuit 21. The first touch line 221 is located on the side of the second line segment L2 facing away from the gate drive circuit 21, and the second touch line 222 and the second touch lead 232 are located on the side of the fourth line segment L4 facing away from the gate drive circuit 21. This prevents any of the first common signal line 211, the second common signal line 212, the first touch line 221, the second touch line 222, and the second touch lead 232 from overlapping with the area where the gate drive circuit 21 is located, thereby reducing line crossing.

[0198] In some specific embodiments, the orthographic projections of the plurality of first touch lines 221 and the plurality of first touch leads 231 on the base substrate 200 define a third pattern, and the orthographic projections of the plurality of second touch lines 222 and the plurality of second touch leads 232 on the base substrate 200 define a fourth pattern. The orthographic projections of the first common signal lines 211 on the base substrate 200 at least partially surround the third pattern, and the orthographic projections of the second common signal lines 212 on the base substrate 200 at least partially surround the fourth pattern.

[0199] In the embodiment of the present disclosure, the third pattern may be a pattern formed by the two outermost first touch lines 221 and the first touch leads 231 electrically connected thereto, among the plurality of first touch lines 221. The first common signal lines 211 surrounding the third pattern may mean that the first common signal lines 211 are arranged substantially parallel to the edges of the third pattern. This facilitates aligning the orientation of the first common signal lines 211 with the first touch lines 221, allowing the first common signal lines 211 to be reused as a first touch line group Z1, thereby increasing the area covered by the first touch line group Z1.

[0200] In the embodiments of the present disclosure, the fourth pattern may refer to the pattern formed by the two outermost second touch lines 222 of the plurality of second touch lines 222 and the second touch leads 232 electrically connected thereto. The second common signal lines 212 surrounding the fourth pattern may mean that the second common signal lines 212 are arranged substantially parallel to the edges of the fourth pattern. This facilitates aligning the orientation of the second common signal lines 212 and the second touch lines 222, allowing the second common signal lines 212 to be reused as a second touch line group Z2, thereby increasing the area covered by the second touch line group Z2.

[0201] FIG11 schematically shows a plan view of the routing of a second common signal line according to an embodiment of the present disclosure.

[0202] 3 and 11 , in the side region Q3 located to the left of the display area AA, the second common signal line 212 extends along the first direction Y into the lead region and makes at least four bends in the lead region. This allows the second common signal line 212 and the second touch lead 232 disposed adjacent thereto to maintain a similar orientation as much as possible, thereby allowing the second common signal line 212 to be reused as the second touch line group Z2, so that the area covered by the second touch line group Z2 extends downward.

[0203] In the embodiment of the present disclosure, the first touch line 221 and the second touch line 222 can be prepared by reusing an existing film layer or by a new film layer. The specific scheme of the film layer where the first touch line 221 and the second touch line 222 are located in the embodiment of the present disclosure is described below with reference to Figures 12 to 52.

[0204] Figures 12 to 18 schematically show one of the partial plan views of a portion of the film layers on the display substrate according to an embodiment of the present disclosure, wherein Figure 12 schematically shows one of the plan views of the second conductive layer according to an embodiment of the present disclosure, Figure 13 schematically shows one of the plan views of the first conductive layer according to an embodiment of the present disclosure, Figure 14 schematically shows a plan view of the first conductive layer and the second conductive layer according to an embodiment of the present disclosure, Figure 15 schematically shows one of the plan views of the first transparent electrode layer according to an embodiment of the present disclosure, Figure 16 schematically shows a plan view of the first conductive layer, the second conductive layer and the first transparent electrode layer according to an embodiment of the present disclosure, Figure 17 schematically shows one of the plan views of the second transparent electrode layer according to an embodiment of the present disclosure, and Figure 18 schematically shows a plan view of the first conductive layer, the second conductive layer, the first transparent electrode layer and the second transparent electrode layer according to an embodiment of the present disclosure.

[0205] With reference to Figures 12 to 18 , in some specific embodiments, the display substrate further includes a first conductive layer D1 disposed on a base substrate 200. The display substrate further includes a plurality of data lines DL, which extend along a first direction Y. The plurality of data lines DL and the plurality of first touch lines 221 are both located in the first conductive layer D1, and the orthographic projections of the plurality of first touch lines 221 on the base substrate 200 do not overlap with the orthographic projections of the plurality of data lines DL on the base substrate 200.

[0206] In the embodiment of the present disclosure, multiple data lines DL and multiple first touch lines 221 are provided in the same layer and with the same material, and at least one data line DL is substantially parallel to at least one first touch line 221. For example, a data line DL is provided on the right side of each sub-pixel PX, and a first touch line 221 is provided on the right side of one of the data lines DL, substantially parallel to the data line DL. Alternatively, a first touch line 221 may be provided on the right side of each data line DL to improve touch monitoring accuracy.

[0207] For example, the multiple sub-pixels PX include multiple sub-pixel groups arranged along the second direction X. At least one sub-pixel group includes multiple sub-pixel PX arranged along the first direction Y. Multiple sub-pixel groups are provided between two adjacent first touch lines 221 .

[0208] Optionally, the plurality of sub-pixels PX may be arranged in an array along the first direction Y and the second direction X. In the embodiment of the present disclosure, a column of sub-pixels PX may be considered as a sub-pixel group. That is, a plurality of columns of sub-pixels PX may be provided between two adjacent first touch lines 221. For example, a first touch line 221 may be provided every three columns of sub-pixels PX. This can reduce the space occupied by the first touch lines 221, thereby increasing the opening area of ​​the sub-pixels PX.

[0209] Optionally, the plurality of sub-pixels PX include three types of sub-pixels PX, namely, a first sub-pixel PX, a second sub-pixel PX, and a third sub-pixel PX. For ease of description, the first sub-pixel PX may be described as a red sub-pixel PX, the second sub-pixel PX as a green sub-pixel PX, and the third sub-pixel PX as a blue sub-pixel PX. In the embodiment of the present disclosure, the first touch line 221 may be disposed between any two sub-pixels PX, and the specific arrangement may be determined based on actual needs. For example, since the human eye is more sensitive to red and green, the first touch line 221 may be utilized to reduce crosstalk between these two colors. Specifically, the first touch line 221 may be disposed between the red sub-pixel PX and the green sub-pixel PX, and a black matrix may be disposed at the location of the first touch line 221. The additional black matrix may help reduce light leakage between the red sub-pixel PX and the green sub-pixel PX, thereby reducing crosstalk between the red sub-pixel PX and the green sub-pixel PX. It should be noted that the black matrix is ​​arranged on the side of the first touch line 221 away from the base substrate 200. The black matrix can be arranged on the display substrate or on the color filter substrate aligned with the display substrate. The specific details can be determined according to actual needs and are not limited here.

[0210] In some specific embodiments, the display substrate further includes a second conductive layer D2 disposed on the base substrate 200. The display substrate further includes a plurality of gate lines GL and a plurality of common electrode lines 241. The plurality of gate lines GL extend along the second direction X. The plurality of common electrode lines 241 extend along the second direction X. The plurality of common electrode lines 241 are electrically connected to the common electrodes V1 of the plurality of sub-pixels PX. The plurality of second touch lines 222, the plurality of gate lines GL, and the plurality of common electrode lines 241 are all located in the second conductive layer D2. The common electrode lines 241 can reduce the resistance of the transmission path of the common electrode V1 within the display area AA.

[0211] At least one common electrode line 241, at least one gate line GL, and at least one second touch line 222 are disposed between two adjacent sub-pixels PX along the first direction Y. Between two adjacent sub-pixels PX along the first direction Y, the second touch line 222 and the common electrode line 241 are symmetrically disposed about the gate line GL.

[0212] Exemplarily, between two adjacent sub-pixels PX along the first direction Y, a common electrode line 241, a gate line GL and a second touch line 222 are arranged, and the common electrode line 241 and the second touch line 222 are respectively located on the upper and lower sides of the gate line GL, and the spacing between the common electrode line 241 and the gate line GL is approximately the same as the spacing between the second touch line 222 and the gate line GL.

[0213] In an embodiment of the present disclosure, at least one sub-pixel PX includes a common electrode V1 , and a plurality of slits S are provided on the common electrode V1 , and the plurality of slits S are arranged along the second direction X.

[0214] In the same sub-pixel PX, each slit S includes a first end close to the sub-pixels PX in the previous row and a second end close to the sub-pixels PX in the next row. The orthographic projection of the second touch line 222 on the base substrate 200 crosses multiple slits S and overlaps with the orthographic projection of the second end of each slit S on the base substrate 200. The orthographic projection of the common electrode line 241 on the base substrate 200 crosses multiple slits S and overlaps with the orthographic projection of the first end of each slit S.

[0215] In the embodiments shown in Figures 12 to 18 , with reference to Figures 4 and 5 , the display substrate includes a second conductive layer D2, a gate insulating layer D8, a first conductive layer D1, a first transparent electrode layer D3, a first insulating layer D4, and a second transparent electrode layer D5. The second conductive layer D2, the gate insulating layer D8, the first conductive layer D1, the first transparent electrode layer D3, the first insulating layer D4, and the second transparent electrode layer D5 are sequentially arranged in a direction away from the base substrate 200. The second touch line 222, the gate line GL, the common electrode line 241, and the third common signal line 213 are formed from the same layer and material and are all located in the second conductive layer D2. The first touch line 221 and the data line DL are formed from the same layer and material and are both located in the first conductive layer D1. The pixel electrode V2 is located in the first transparent electrode layer D3, and the common electrode V1 is located in the second transparent electrode layer D5. This allows the first touch line 221 and the second touch line 222 to be formed by reusing existing film layers, thereby saving process steps.

[0216] It should be noted that the film layers where the first common signal lines 211 and the second common signal lines 212 are located can be configured with reference to the aforementioned embodiments, and thus will not be described in detail herein.

[0217] The first touch lead 231 can be provided in the same layer and with the same material as the first touch line 221. In the display area AA, the first touch line 221 is roughly parallel to the data line DL. In the peripheral area NA, the first touch line 221 is electrically connected to the touch binding terminal PAD1 through the first touch lead 231. At the intersection of the first touch lead 231 and the data line DL, the first touch lead 231 can be connected through the first adapter to prevent the first touch lead 231 from short-circuiting with the data line DL. The first adapter can be located in the second transparent electrode layer D5.

[0218] The second touch lead 232 can be provided in the same layer and with the same material as the second touch line 222. In the display area AA, the second touch line 222, the gate line GL, and the common electrode line 241 all extend along the first direction X. In the peripheral area NA, the second touch line 222 is electrically connected to the touch binding terminal PAD1 through the second touch lead 232. At the intersection of the second touch lead 232 and the gate line GL (common electrode line 241), the second touch lead 232 can be connected through a second transition portion to prevent the second touch lead 232 from short-circuiting with the gate line GL (common electrode line 241). The second transition portion can be located in the second transparent electrode layer D5.

[0219] In the embodiments of the present disclosure, the materials of the first and second touch lines 221 and 222 may include single metal materials such as molybdenum, aluminum, and titanium. Alternatively, the materials of the first and second touch lines 221 and 222 may include alloys of at least two of these materials. Taking a 10.1-inch display substrate with a 1920x1080 resolution as an example, the first and second touch lines 221 and 222 are both made of a molybdenum / aluminum / molybdenum material. Thirty-six first touch line groups Z1 and twenty-three second touch line groups Z2 can be provided. Each first touch line group Z1 is 6.2 mm wide and includes 55 parallel-connected first touch lines 221. The remote loop resistance formed by the first touch lines 221 is approximately 1.4 kΩ. Each second touch line group Z2 is set to 6.1mm wide and includes 54 parallel second touch lines 222. The remote loop resistance formed by the second touch lines 222 is approximately 3.2kΩ. This achieves touch accuracy of 5µm to 50µm, far exceeding that of traditional capacitive touch solutions.

[0220] In some specific embodiments, at least one subpixel PX includes a first transistor T1, and the first transistor T1 is electrically connected to at least one gate line GL. Between two adjacent subpixels PX along the first direction Y, the orthographic projection of the first transistor T1 electrically connected to the gate line GL on the base substrate 200 is located between the orthographic projection of the second touch line 222 on the base substrate 200 and the orthographic projection of the common electrode line 241 on the base substrate 200.

[0221] In an embodiment of the present disclosure, for the first transistor T1 and the gate line GL electrically connected thereto, the orthographic projection of the gate S3 of the first transistor T1 on the substrate 200 overlaps with the orthographic projection of the gate line GL on the substrate 200, and in the overlapping region, the gate S3 of the first transistor T1 is electrically connected to the gate line GL. Optionally, the gate S3 of the first transistor T1 and the gate line GL form an integral structure. The second touch line 222 and the common electrode line 241 adjacent to the gate line GL bend in a direction away from the first transistor T1 when passing through the first transistor T1, so that the second touch line 222 and the common electrode line 241 are respectively located above and below the first transistor T1.

[0222] Optionally, spacers may be provided at the location of the first transistor T1. The spacers are used to provide support between the display substrate and the cell-matching substrate to maintain the cell thickness of the liquid crystal layer. The spacers may be provided on either the display substrate or the cell-matching substrate, depending on actual needs and not limited herein.

[0223] In the embodiment of the present disclosure, by locating the second touch line 222 and the common electrode line 241 on the upper and lower sides of the first transistor T1 respectively, barrier walls can be formed on the upper and lower sides of the first transistor T1, thereby preventing the spacer from shifting.

[0224] Optionally, in the same sub-pixel PX, the first electrode S1 of the first transistor T1 overlaps with the pixel electrode V2 , and an orthographic projection of the overlapping region on the base substrate 200 overlaps with at least one second touch line 222 .

[0225] Figures 19 to 27 schematically illustrate two partial plan views of some film layers on a display substrate according to an embodiment of the present disclosure, wherein Figure 19 schematically illustrates two plan views of the second conductive layer according to an embodiment of the present disclosure, Figure 20 schematically illustrates one plan view of the third conductive layer according to an embodiment of the present disclosure, Figure 21 schematically illustrates plan views of the second and third conductive layers according to an embodiment of the present disclosure, Figure 22 schematically illustrates two plan views of the first conductive layer according to an embodiment of the present disclosure, Figure 23 schematically illustrates plan views of the second, third, and first conductive layers according to an embodiment of the present disclosure, Figure 24 schematically illustrates two plan views of the first transparent electrode layer according to an embodiment of the present disclosure, Figure 25 schematically illustrates plan views of the second, third, first conductive layers, and first transparent electrode layers according to an embodiment of the present disclosure, Figure 26 schematically illustrates two plan views of the second transparent electrode layer according to an embodiment of the present disclosure, and Figure 27 schematically illustrates plan views of the second, third, first conductive layers, first transparent electrode layers, and second transparent electrode layers according to an embodiment of the present disclosure.

[0226] With reference to Figures 19 to 27, in some specific embodiments, the display substrate further includes a first conductive layer D1 and a third conductive layer D7. The third conductive layer D7 is located on a side of the first conductive layer D1 closer to the base substrate 200. The display substrate further includes a plurality of data lines DL extending along a first direction Y and located in the third conductive layer D7. A plurality of first touch lines 221 are located in the first conductive layer D1. In the display area AA, the orthographic projection of at least one first touch line 221 on the base substrate 200 overlaps with the orthographic projection of at least one data line DL on the base substrate 200, and the ratio of the area of ​​the overlapping region to the area of ​​the first touch line 221 is greater than or equal to 90%.

[0227] In the embodiment of the present disclosure, the data line DL and the first touch line 221 are respectively arranged in the third conductive layer D7 and the first conductive layer D1, so that the data line DL and the first touch line 221 are arranged in different layers. Therefore, the orthographic projection of the data line DL on the base substrate 200 can overlap with the orthographic projection of the first touch line 221 on the base substrate 200, which is beneficial for improving the aperture ratio of the sub-pixel PX. The sub-pixel PX includes a light-transmitting area and other areas outside the light-transmitting area. The aperture ratio of the sub-pixel PX can refer to the ratio of the area of ​​the light-transmitting area to the area of ​​the other areas. In the display area AA, the data line DL and the first touch line 221 are arranged to substantially overlap, which can further improve the aperture ratio of the sub-pixel PX.

[0228] In the embodiments shown in Figures 19 to 27, the display substrate may include a second conductive layer D2, a gate insulating layer D8, a third conductive layer D7, a second insulating layer D6, a first conductive layer D1, a first transparent electrode layer D3, a first insulating layer D4, and a second transparent electrode layer D5. The second conductive layer D2, the gate insulating layer D8, the third conductive layer D7, the second insulating layer D6, the first conductive layer D1, the first transparent electrode layer D3, the first insulating layer D4, and the second transparent electrode layer D5 are sequentially arranged in a direction away from the base substrate 200. The second touch line 222, the gate line GL, the common electrode line 241, and the third common signal line 213 are formed in the same layer and made of the same material and are all located in the second conductive layer D2. The data line DL is located in the third conductive layer D7, the first touch line 221 is located in the first conductive layer D1, the pixel electrode V2 is located in the first transparent electrode layer D3, and the common electrode V1 is located in the second transparent electrode layer D5. In this way, the first touch lines 221 can be independently arranged, thereby increasing the flexibility of the routing and film thickness design, which is beneficial to improving the touch detection effect.

[0229] It should be noted that the film layers where the first common signal lines 211 and the second common signal lines 212 are located can be configured with reference to the aforementioned embodiments, and thus will not be described in detail herein.

[0230] The first touch lead 231 can be constructed from the same layer and material as the first touch line 221. This eliminates the need for a switch to prevent shorting the first touch lead 231 with the data line DL, reducing the number of vias required for the switch and thus lowering the risk of package failure. Furthermore, eliminating vias facilitates a narrower bezel, reducing the left and right bezel widths by approximately 2mm and the top and bottom bezels by approximately 3mm.

[0231] The second touch lead 232 can be provided in the same layer and with the same material as the second touch line 222. In the display area AA, the second touch line 222 and the gate line GL (common electrode line 241) extend along the second direction X. In the peripheral area NA, the second touch line 222 is electrically connected to the touch binding terminal PAD1 through the second touch lead 232. At the intersection of the second touch lead 232 and the gate line GL (common electrode line 241), the second touch lead 232 can be connected through a second connecting portion to prevent the second touch lead 232 and the gate line GL (common electrode line 241) from short-circuiting. The second connecting portion can be located in the second transparent electrode layer D5.

[0232] In the embodiment of the present disclosure, the number of first touch line group Z1 is smaller than the number of second touch line group Z2. By independently positioning the first touch lines 221 and first touch leads 231 in the first conductive layer D1, the resistance of the first touch lines 221 and first touch leads 231 is reduced. For example, because the layer containing the first touch lines 221 (first touch leads 231) does not form the structure of the first transistor T1, a wider range of materials can be selected for the first touch lines 221 (first touch leads 231), such as copper with a lower resistivity. Furthermore, the thickness of the first touch lines 221 (first touch leads 231) is not restricted by the structure of the first transistor T1, allowing for greater thickness, further reducing resistance. For example, the first touch lines 221 (first touch leads 231) can be deposited by vacuum sputtering or electroplating, and patterned by photolithography. When the first touch line 221 (first touch lead 231) is formed using a sputtering process, the thickness of the first touch line 221 (first touch lead 231) can be reduced to 900nm, and the loop resistance of the first touch lead 231 can be reduced to 0.2kΩ, which is a significant advantage. When the first touch line 221 (first touch lead 231) is formed using an electroplating process, the thickness of the first touch line 221 (first touch lead 231) can be reduced to 2000nm, and the loop resistance of the first touch lead 231 can be reduced to 0.1kΩ.

[0233] Figures 28 to 36 schematically illustrate three partial plan views of some film layers on a display substrate according to an embodiment of the present disclosure, wherein Figure 28 schematically illustrates one of the plan views of the fourth conductive layer according to an embodiment of the present disclosure, Figure 29 schematically illustrates a third plan view of the first conductive layer according to an embodiment of the present disclosure, Figure 30 schematically illustrates a plan view of the fourth conductive layer and the first conductive layer according to an embodiment of the present disclosure, Figure 31 schematically illustrates a third plan view of the first transparent electrode layer according to an embodiment of the present disclosure, Figure 32 schematically illustrates a plan view of the fourth conductive layer, the first conductive layer, and the first transparent electrode layer according to an embodiment of the present disclosure, Figure 33 schematically illustrates a third plan view of the second conductive layer according to an embodiment of the present disclosure, Figure 34 schematically illustrates a plan view of the fourth conductive layer, the first conductive layer, the first transparent electrode layer, and the second conductive layer according to an embodiment of the present disclosure, Figure 35 schematically illustrates a third plan view of the second transparent electrode layer according to an embodiment of the present disclosure, and Figure 36 schematically illustrates a plan view of the fourth conductive layer, the first conductive layer, the first transparent electrode layer, the second conductive layer, and the second transparent electrode layer according to an embodiment of the present disclosure. Figure 37 schematically shows a cross-sectional view along the section line A2-A2′ in Figure 36, Figure 38 schematically shows a cross-sectional view along the section line B2-B2′ in Figure 36, and Figure 39 schematically shows a schematic diagram of the common electrode line and the second touch line extending from the peripheral area to the display area.

[0234] With reference to Figures 28 to 39 , in some specific embodiments, the display substrate further includes a second conductive layer D2 and a fourth conductive layer D9. The fourth conductive layer D9 is located on a side of the second conductive layer D2 closer to the base substrate 200. The display substrate further includes a plurality of common electrode lines 241 extending along the second direction X and electrically connected to the common electrodes V1 of the plurality of sub-pixels PX. The plurality of common electrode lines 241 are located in the fourth conductive layer D9, and the plurality of second touch lines 222 are located in the second conductive layer D2. In the display area AA, the orthographic projection of at least one second touch line 222 on the base substrate 200 overlaps with the orthographic projection of at least one common electrode line 241 on the base substrate 200, and the ratio of the area of ​​the overlapping region to the area of ​​the second touch line 222 is greater than or equal to 90%.

[0235] In the embodiment of the present disclosure, the common electrode lines 241 and the second touch lines 222 are disposed in the fourth conductive layer D9 and the second conductive layer D2, respectively, so that the common electrode lines 241 and the second touch lines 222 are disposed in different layers. Therefore, the orthographic projection of the common electrode lines 241 on the base substrate 200 can overlap with the orthographic projection of the second touch lines 222 on the base substrate 200, thereby facilitating an improvement in the aperture ratio of the sub-pixel PX. For example, referring to FIG. 39 , in the peripheral area NA, the common electrode lines 241 and the second touch lines 222 can be disposed separately or overlappingly. In the portion of the peripheral area NA near the display area AA, the common electrode lines 241 and the second touch lines 222 gradually merge to achieve overlap. After merging, the common electrode lines 241 and the second touch lines 222 extend into the display area AA. Thus, in the display area AA, the common electrode lines 241 and the second touch lines 222 are disposed substantially overlappingly, further improving the aperture ratio of the sub-pixel PX.

[0236] Taking a 1920x1200 resolution display substrate at 10.1 as an example, when the second touch lines 222 and the common electrode lines 241 are arranged in the same layer and made of the same material, the aperture ratio of the sub-pixel PX is approximately 54%. When the second touch lines 222 and the common electrode lines 241 are arranged in different layers and overlap with each other, the aperture ratio of the sub-pixel PX is greater than or equal to 56%.

[0237] In some specific embodiments, the display substrate further includes a plurality of second touch leads 232, a gate drive circuit 21, and a third common signal line 213. The third common signal line 213 is located in the peripheral area NA. At least one subpixel PX includes a common electrode V1. The third common signal line 213 is electrically connected to the common electrode V1 of the plurality of subpixels PX. The plurality of second touch lines 222 are electrically connected to the touch binding terminal PAD1 via the plurality of second touch leads 232. The second touch lines 222 in different second touch line groups Z2 are electrically connected to the touch binding terminal PAD1 via different second touch leads 232. The plurality of second touch leads 232 are located in the second conductive layer D2. The layer where the first common signal line 211, the second common signal line 212, the third common signal line 213, and the gate S3 drive circuit 21 are located is located on a side of the second conductive layer D2 close to the base substrate 200. The orthographic projections of the plurality of second touch leads 232 on the base substrate 200 overlap with the orthographic projections of the first common signal line 211 , the second common signal line 212 , the third common signal line 213 and the gate driving circuit 21 on the base substrate 200 .

[0238] In the embodiments shown in FIG28 to FIG39 , the display substrate may include a fourth conductive layer D9, a gate insulating layer D8, a first conductive layer D1, a first transparent electrode layer D3, a first insulating layer D4, a second conductive layer D2, a third insulating layer D10, and a second transparent electrode layer D5. The fourth conductive layer D9, the gate insulating layer D8, the first conductive layer D1, the first transparent electrode layer D3, the first insulating layer D4, the second conductive layer D2, the third insulating layer D10, and the second transparent electrode layer D5 are sequentially arranged in a direction away from the base substrate 200. The gate line GL, the common electrode line 241, and the third common signal line 213 are formed in the same layer and made of the same material and are all located in the fourth conductive layer D9. The first touch line 221 and the data line DL are formed in the same layer and made of the same material and are all located in the first conductive layer D1. The pixel electrode V2 is located in the first transparent electrode layer D3, the second touch line 222 is located in the second conductive layer D2, and the common electrode V1 is located in the second transparent electrode layer D5. In this way, the second touch lines 222 can be independently provided, thereby increasing the flexibility of the routing and film thickness design, and facilitating improved touch detection effects.

[0239] It should be noted that the film layers where the first common signal lines 211 and the second common signal lines 212 are located can be configured with reference to the aforementioned embodiments, and thus will not be described in detail herein.

[0240] The first touch lead 231 can be provided in the same layer and with the same material as the first touch line 221. In the display area AA, the first touch line 221 is roughly parallel to the data line DL. In the peripheral area NA, the first touch line 221 is electrically connected to the touch binding terminal PAD1 through the first touch lead 231. At the intersection of the first touch lead 231 and the data line DL, the first touch lead 231 can be connected through the first connecting portion to prevent the first touch lead 231 from short-circuiting with the data line DL. The first connecting portion can be located in the second transparent electrode layer D5.

[0241] The second touch lead 232 can be provided on the same layer and with the same material as the second touch line 222. In this way, the second touch lead 232 can avoid short circuiting with the gate line GL (common electrode line 241) without switching, which can reduce the vias required for switching, which is conducive to reducing the risk of package failure. Moreover, when the second touch lead 232 extends from the side area Q3 toward the binding area Q2, it can pass through the area where at least one of the first common signal line 211, the second common signal line 212, the third common signal line 213 and the gate drive circuit 21 is located, which is conducive to achieving a narrow border. In this way, the left and right borders can be reduced by about 2mm, and the upper and lower borders can be reduced by about 5mm.

[0242] In the embodiment of the present disclosure, the number of second touch line group Z2 is smaller than the number of first touch line group Z1. By independently positioning the second touch lines 222 and second touch leads 232 in the second conductive layer D2, the resistance of the second touch lines 222 and second touch leads 232 is reduced. For example, because the layer where the second touch lines 222 (second touch leads 232) reside does not form the structure of the first transistor T1, a wider range of materials can be selected for the second touch lines 222 (second touch leads 232), such as copper with a lower resistivity. Furthermore, the thickness of the second touch lines 222 (second touch leads 232) is not constrained by the structure of the first transistor T1, allowing for greater thickness, further reducing resistance. For example, the second touch lines 222 (second touch leads 232) can be deposited by vacuum sputtering or electroplating, and patterned by photolithography. When the second touch line 222 (second touch lead 232) is formed using a sputtering process, the thickness of the second touch line 222 (second touch lead 232) can be as low as 900nm, and the far-end loop resistance of the second touch lead 232 can be reduced to 0.5kΩ, which is a significant advantage. When the second touch line 222 (second touch lead 232) is formed using an electroplating process, the thickness of the second touch line 222 (second touch lead 232) can be as high as 2000nm, and the far-end loop resistance of the second touch lead 232 can be reduced to 0.2kΩ.

[0243] Figures 40 to 50 schematically show four partial plan views of a portion of the film layer on the display substrate according to an embodiment of the present disclosure, wherein Figure 40 schematically shows a second plan view of the fourth conductive layer according to an embodiment of the present disclosure, Figure 41 schematically shows a second plan view of the third conductive layer according to an embodiment of the present disclosure, Figure 42 schematically shows a plan view of the fourth conductive layer and the third conductive layer according to an embodiment of the present disclosure, Figure 43 schematically shows a fourth plan view of the second conductive layer according to an embodiment of the present disclosure, Figure 44 schematically shows a plan view of the fourth conductive layer, the third conductive layer, and the second conductive layer according to an embodiment of the present disclosure, and Figure 45 schematically shows a plan view of the first conductive layer according to an embodiment of the present disclosure. FIG46 schematically shows a plan view of the fourth conductive layer, the third conductive layer, the second conductive layer, and the first conductive layer according to an embodiment of the present disclosure. FIG47 schematically shows a fourth plan view of the first transparent electrode layer according to an embodiment of the present disclosure. FIG48 schematically shows a plan view of the fourth conductive layer, the third conductive layer, the second conductive layer, the first conductive layer, and the first transparent electrode layer according to an embodiment of the present disclosure. FIG49 schematically shows a fourth plan view of the second transparent electrode layer according to an embodiment of the present disclosure. FIG50 schematically shows a plan view of the fourth conductive layer, the third conductive layer, the second conductive layer, the first conductive layer, the first transparent electrode layer, and the second transparent electrode layer according to an embodiment of the present disclosure. FIG51 schematically shows a cross-sectional view along the section line A3-A3′ in FIG50. FIG52 schematically shows a cross-sectional view along the section line B3-B3′ in FIG50.

[0244] With reference to Figures 40 to 52 , in some specific embodiments, the display substrate further includes a first conductive layer D1, a second conductive layer D2, a third conductive layer D7, and a fourth conductive layer D9. The fourth conductive layer D9, the third conductive layer D7, the second conductive layer D2, and the first conductive layer D1 are sequentially arranged in a direction away from the base substrate 200. The display substrate further includes a plurality of common electrode lines 241 and a plurality of data lines DL. The plurality of data lines DL extend along a first direction Y. The plurality of common electrode lines 241 extend along a second direction X. The plurality of common electrode lines 241 are electrically connected to the common electrodes V1 of the plurality of sub-pixels PX. The plurality of first touch lines 221 are located in the first conductive layer D1, the plurality of second touch lines 222 are located in the second conductive layer D2, the plurality of data lines DL are located in the third conductive layer D7, and the plurality of common electrode lines 241 are located in the fourth conductive layer D9. In the display area AA, the orthographic projection of at least one first touch line 221 on the base substrate 200 overlaps with the orthographic projection of at least one data line DL on the base substrate 200, and the ratio of the area of ​​the overlapping region to the area of ​​the first touch line 221 is greater than or equal to 90%. And / or, the orthographic projection of at least one second touch line 222 on the base substrate 200 overlaps with the orthographic projection of at least one common electrode line 241 on the base substrate 200, and the ratio of the area of ​​the overlapping region to the area of ​​the second touch line 222 is greater than or equal to 90%.

[0245] In the display area AA, the data line DL is substantially overlapped with the first touch line 221 , and the common electrode line 241 is substantially overlapped with the second touch line 222 , thereby further improving the aperture ratio of the sub-pixel PX.

[0246] Taking a 1920×1200 resolution display substrate at 10.1 as an example, when the first touch line 221 overlaps the data line DL and the second touch line 222 overlaps the common electrode line 241 , the aperture ratio of the sub-pixel PX is greater than or equal to 62%.

[0247] In addition, when the first touch lines 221 and the data lines DL are arranged in the same layer and with the same material, to ensure the aperture ratio of the sub-pixels PX, one first touch line 221 is provided for every three columns of sub-pixels PX. When the first touch lines 221 and the data lines DL are arranged in different layers, a first touch line 221 can be provided for each data line DL. In this case, the aperture ratio of the sub-pixels PX can be increased. At the same time, the number of first touch lines 221 is tripled, and the resistance of the first touch lines 221 can be reduced to 1 / 18 of the original value.

[0248] It should be noted that the thickness settings of the first touch line 221 (first touch lead 231 ) and the second touch line 222 (second touch lead 232 ) can refer to the above embodiments, and thus will not be described in detail here.

[0249] In the embodiments shown in Figures 40 to 52, the display substrate may include a fourth conductive layer D9, a gate insulating layer D8, a third conductive layer D7, a second insulating layer D6, a second conductive layer D2, a third insulating layer D10, a first conductive layer D1, a first transparent electrode layer D3, a first insulating layer D4, and a second transparent electrode layer D5, and the fourth conductive layer D9, the gate insulating layer D8, the third conductive layer D7, the second insulating layer D6, the second conductive layer D2, the third insulating layer D10, the first conductive layer D1, the first transparent electrode layer D3, the first insulating layer D4, and the second transparent electrode layer D5 are arranged in sequence along a direction away from the base substrate 200. The gate line GL, common electrode line 241, and third common signal line 213 are layered and made of the same material, all located in the fourth conductive layer D9. The data line DL is located in the third conductive layer D7, the second touch line 222 is located in the second conductive layer D2, the first touch line 221 is located in the first conductive layer D1, the pixel electrode V2 is located in the first transparent electrode layer D3, and the common electrode V1 is located in the second transparent electrode layer D5. This allows the first touch line 221 and the second touch line 222 to be independently arranged, thereby increasing the flexibility of the routing and film thickness design of the first touch line 221 and the second touch line 222, and further improving the touch detection effect.

[0250] It should be noted that the film layers where the first common signal lines 211 , the second common signal lines 212 , the first touch leads 231 , and the second touch leads 232 are located can be configured with reference to the above embodiments, and thus will not be described in detail herein.

[0251] In the embodiments shown in FIG. 12 to FIG. 18 and the embodiments shown in FIG. 28 to FIG. 39 , the pixel electrode V2 may be coupled to the first transistor T1 .

[0252] Specifically, in some embodiments, the display substrate further includes a first conductive layer D1, a first transparent electrode layer D3, and a first insulating layer D4. The first transparent electrode layer D3 is located on a side of the first conductive layer D1 facing away from the base substrate 200. The first insulating layer D4 is located on a side of the first transparent electrode layer D3 facing away from the base substrate 200. Multiple first touch lines 221 are located in the first conductive layer D1. At least one subpixel PX includes a first transistor T1 and a pixel electrode V2. The pixel electrode V2 is located in the first transparent electrode layer D3, and the first electrode S1 of the first transistor T1 is located in the first conductive layer D1. The first insulating layer D4 covers the pixel electrode V2, the first electrode S1 of the first transistor T1, and the multiple first touch lines 221. In the same subpixel PX, the pixel electrode V2 is overlapped with the first electrode S1 of the first transistor T1.

[0253] In the embodiment of the present disclosure, the first transistor T1 further includes a second electrode S2 and a gate S3. The gate S3 is electrically connected to the gate line GL, and the second electrode S2 is electrically connected to the data line DL. Optionally, the data line DL and the second electrode S2 of the first transistor T1 can be disposed in the first conductive layer D1. That is, in the embodiment of the present disclosure, the data line DL, the first electrode S1 and the second electrode S2 of the first transistor T1, and the plurality of first touch lines 221 are disposed in the same layer and made of the same material. After forming the first conductive layer D1, the first transparent electrode layer D3 can be directly formed, with the pixel electrode V2 overlapping the first electrode S1 of the first transistor T1. Subsequently, a first insulating layer D4 is formed on the side of the first transparent electrode layer D3 facing away from the base substrate 200. Optionally, a second transparent electrode layer D5 is also disposed on the side of the first insulating layer D4 facing away from the base substrate 200. At least one sub-pixel PX further includes a common electrode V1, which is disposed in the second transparent electrode layer D5. The pixel electrode V2 , the first electrode S1 of the first transistor T1 and the plurality of first touch lines 221 are covered by the first insulating layer D4 , so that the pixel electrode V2 , the first electrode S1 of the first transistor T1 and the plurality of first touch lines 221 are insulated from the common electrode V1 .

[0254] In the embodiments shown in FIG. 19 to FIG. 27 and the embodiments shown in FIG. 40 to FIG. 52 , the pixel electrode V2 may be electrically connected to the first transistor T1 through a first via hole.

[0255] Specifically, in some embodiments, the display substrate further includes a first conductive layer D1, a second insulating layer D6, a third conductive layer D7, a first transparent electrode layer D3, and a first insulating layer D4. The second insulating layer D6 is located on a side of the third conductive layer D7 facing away from the base substrate 200. The first conductive layer D1 is located on a side of the second insulating layer D6 facing away from the base substrate 200. The first transparent electrode layer D3 is located on a side of the second insulating layer D6 facing away from the base substrate 200. The first insulating layer D4 is located on a side of the first transparent electrode layer D3 facing away from the base substrate 200. Multiple first touch lines 221 are located in the first conductive layer D1. At least one subpixel PX includes a first transistor T1 and a pixel electrode V2. The pixel electrode V2 is located in the first transparent electrode layer D3, the first electrode S1 of the first transistor T1 is located in the third conductive layer D7, the second insulating layer D6 covers the first electrode S1 of the first transistor T1, and the first insulating layer D4 covers the pixel electrode V2 and the multiple first touch lines 221. In the same sub-pixel PX, the pixel electrode V2 is electrically connected to the first electrode S1 of the first transistor T1 through a first via hole penetrating the second insulating layer D6 .

[0256] In the embodiment of the present disclosure, the data line DL and the second electrode S2 of the first transistor T1 can both be disposed in the third conductive layer D7. That is, in the embodiment of the present disclosure, the data line DL, the first electrode S1, and the second electrode S2 of the first transistor T1 are disposed in the same layer and made of the same material, while the first touch line 221 is disposed solely in the first conductive layer D1. After forming the second insulating layer D6, a first via hole can be formed in the second insulating layer D6, exposing the first electrode S1 of the first transistor T1. After forming the first conductive layer D1, the first transparent electrode layer D3 can be directly formed, electrically connecting the pixel electrode V2 to the first electrode S1 of the first transistor T1 through the first via hole. Subsequently, a first insulating layer D4 is formed on the side of the first transparent electrode layer D3 facing away from the base substrate 200. Optionally, a second transparent electrode layer D5 is also disposed on the side of the first insulating layer D4 facing away from the base substrate 200. At least one subpixel PX also includes a common electrode V1, which is disposed in the second transparent electrode layer D5. The pixel electrode V2 and the plurality of first touch lines 221 are covered by the first insulating layer D4 , so that the pixel electrode V2 and the plurality of first touch lines 221 are insulated from the common electrode V1 .

[0257] In some specific embodiments, the plurality of sub-pixels PX include a plurality of sub-pixel groups arranged along the second direction X, and at least one sub-pixel group includes a plurality of sub-pixel PX arranged along the first direction Y. At least one first touch line 221 is disposed between two adjacent sub-pixel groups.

[0258] In the embodiment of the present disclosure, a column of sub-pixels PX can be regarded as a sub-pixel group. When the first touch line 221 and the data line DL are arranged in different layers, that is, the first touch line 221 is located in the first conductive layer D1 and the data line DL is located in the third conductive layer D7, a first touch line 221 can be set between every two adjacent columns of sub-pixels PX, and the first touch line 221 and the data line DL overlap. In this way, the touch detection accuracy can be improved on the basis of minimizing the impact on the aperture ratio or even not affecting the aperture ratio (the first touch line 221 overlaps the data line DL).

[0259] In some specific embodiments, the plurality of sub-pixels PX include a plurality of sub-pixel groups, the plurality of sub-pixel groups being arranged along a second direction X. At least one sub-pixel group includes a plurality of sub-pixels PX arranged along a first direction Y, and the sub-pixels PX in different sub-pixel groups are different. At least one sub-pixel PX includes a common electrode V1 having a plurality of slits S disposed thereon. In the at least one sub-pixel group, the orthographic projection of the i-th slit S of the plurality of sub-pixels PX on the base substrate 200 defines a fifth pattern, and the orthographic projection of the at least one first touch line 221 on the base substrate 200 overlaps with the fifth pattern. Here, i is a positive integer.

[0260] 53 and 54 schematically illustrate schematic diagrams of the i-th slit according to an embodiment of the present disclosure.

[0261] Referring to Figure 53, the i-th slit S may refer to a slit located in the middle of a sub-pixel PX. In some embodiments, the i-th slit S may refer to a slit located in the middle of a sub-pixel PX, that is, there is at least one slit between the i-th slit S and the adjacent data lines on both sides of it, and the number of slits between the i-th slit S and the adjacent data lines on both sides is not equal, that is, the distance between the first touch line 221 and the adjacent data lines on both sides is not equal.

[0262] 54 , in some embodiments, the i-th slit S may refer to a slit located in the middle of a sub-pixel PX, that is, the distance between the first touch line 221 and the adjacent data lines on both sides thereof is approximately equal. In some embodiments, the distance between the first touch line 221 and the adjacent data lines on both sides thereof is equal.

[0263] In a column of sub-pixels PX, the orthographic projections of the i-th slits S of the plurality of sub-pixels PX on the base substrate 200 may define a fifth pattern, and the fifth pattern may be substantially parallel to the orthographic projections of the data lines DL on the base substrate 200. The first touch line 221 overlaps with the i-th slits S in the column of sub-pixels PX, thereby reducing the overlapping area between the first touch line 221 and the common electrode V1, thereby facilitating interference reduction between the first touch line 221 and the common electrode V1.

[0264] At least some embodiments of the present disclosure further provide a display panel, comprising the display substrate described above, having a display area AA and a peripheral area NA and related structures therein. For example, the display panel may be a liquid crystal display panel.

[0265] At least some embodiments of the present disclosure further provide a display device, which may include any device or product having a display function. For example, the display device may be a smartphone, a mobile phone, an e-book reader, a desktop computer (PC), a laptop PC, a netbook PC, a personal digital assistant (PDA), a portable multimedia player (PMP), a digital audio player, a mobile medical device, a camera, a wearable device (such as a head-mounted device, electronic clothing, an electronic bracelet, an electronic necklace, an electronic accessory, an electronic tattoo, or a smart watch), a television, etc.

[0266] It should be understood that the display device according to the embodiment of the present disclosure has all the characteristics and advantages of the above-mentioned display substrate and display panel. For details, please refer to the above description and will not be repeated here.

[0267] Those skilled in the art will appreciate that the features described in the various embodiments and / or claims of this disclosure may be combined and / or coupled in various ways, even if such combinations and / or couplings are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure may be combined and / or coupled in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or couplings are intended to fall within the scope of this disclosure.

[0268] The embodiments of the present disclosure are described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Although each embodiment has been described separately above, this does not mean that the measures in each embodiment cannot be used in combination to advantage. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art may make various substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A display substrate, comprising a display area and a peripheral area at least partially surrounding the display area, in, The display substrate further comprises: substrate substrate; A plurality of sub-pixels are disposed on the base substrate and located in the display area, the plurality of sub-pixels are arranged in an array along a first direction and a second direction, and the first direction and the second direction intersect; A first common signal line, a second common signal line and a touch binding end are arranged on the base substrate, wherein the first common signal line, the second common signal line and the touch binding end are all located in the peripheral area, wherein the peripheral area includes a binding pair area and a binding area that are arranged relatively along the first direction, and the touch binding end is located in the binding area; A plurality of first touch lines and a plurality of second touch lines are arranged on the base substrate, the plurality of first touch lines and the plurality of second touch lines are at least located in the display area, the plurality of first touch lines and the plurality of second touch lines are arranged with insulation intervals, the plurality of first touch lines extend along the first direction, and the plurality of second touch lines extend along the second direction; The first ends of the plurality of first touch lines are electrically connected to the first common signal line, and the second ends are electrically connected to the touch binding end; the first ends of the plurality of second touch lines are electrically connected to the second common signal line, and the second ends are electrically connected to the touch binding end; The plurality of first touch lines include M first touch line groups, the plurality of second touch lines include N second touch line groups, one first touch line group includes at least one first touch line, different first touch line groups include different first touch lines, one second touch line group includes at least one second touch line, different second touch line groups include different second touch lines; The touch binding end includes a plurality of sensing terminals, the M first touch wire groups and the N second touch wire groups are electrically connected to different sensing terminals, and different first touch wire groups are electrically connected to different sensing terminals, and different second touch wire groups are electrically connected to different sensing terminals; Wherein, M and N are both positive integers.

2. The display substrate according to claim 1, in, The touch binding end includes a plurality of first sensing terminals, a plurality of second sensing terminals, a plurality of third sensing terminals and a plurality of fourth sensing terminals, wherein the plurality of first sensing terminals are located between two adjacent third sensing terminals, and the plurality of second sensing terminals are located between two adjacent fourth sensing terminals; Wherein, M first touch line groups are electrically connected to the plurality of first sensing terminals, different first touch line groups are electrically connected to different first sensing terminals, N second touch line groups are electrically connected to the plurality of second sensing terminals, and different second touch line groups are electrically connected to different second sensing terminals; One end of the first common signal line is electrically connected to one of the third sensing terminals, and the other end is electrically connected to another of the third sensing terminals. One end of the second common signal line is electrically connected to one of the fourth sensing terminals, and the other end is electrically connected to another of the fourth sensing terminals.

3. The display substrate according to claim 1, in, The orthographic projections of the plurality of first touch lines on the base substrate define a first pattern, the orthographic projections of the plurality of second touch lines on the base substrate define a second pattern, and at least one of the first pattern and the second pattern covers the orthographic projection of the display area on the base substrate.

4. The display substrate according to claim 3, in, In the first direction, the first pattern protrudes from the orthographic projection of the display area on the base substrate, and in the second direction, the first pattern is located within the orthographic projection of the display area on the base substrate; The second pattern covers the orthographic projection of the display area on the base substrate.

5. The display substrate according to claim 3, in, In the first direction, the second pattern includes a first side and a second side that are oppositely arranged, the display area includes a third side and a fourth side that are oppositely arranged, the first side and the third side have a first spacing, the second side and the fourth side have a second spacing, and at least one of the first spacing and the second spacing is smaller than the width of the second touch line group.

6. The display substrate according to claim 1, in, The display substrate further includes a plurality of first touch leads and a plurality of second touch leads, and the peripheral area further includes two side areas arranged opposite to each other along the second direction; The plurality of first touch wires are electrically connected to the touch binding end through the plurality of first touch wires, and the first touch wires in different first touch wire groups are electrically connected to the touch binding end through different first touch wires. Fixed end electrical connection; The plurality of second touch wires are electrically connected to the touch binding end through the plurality of second touch leads, and the second touch wires in different second touch wire groups are electrically connected to the touch binding end through different second touch leads; The plurality of first touch leads are located in the binding area, and the plurality of second touch leads are located in the same side area and extend from the side area to the binding area.

7. The display substrate according to claim 6, in, The display substrate further comprises a plurality of gate lines and a plurality of data lines, wherein the plurality of gate lines and the plurality of data lines are located in the display area; Wherein, the first common signal line includes a first line segment located in the binding pair area and a second line segment located in the side area, the second common signal line includes a third line segment located in the binding pair area and a fourth line segment located in the side area, the first line segment and the third line segment both extend along the second direction, and the second line segment and the fourth line segment both extend along the first direction; The first line segment and the third line segment are in the same layer and are made of the same material as the plurality of gate lines; The second line segment and the fourth line segment are in the same layer and are made of the same material as the plurality of data lines.

8. The display substrate according to claim 7, in, The display substrate further comprises a third common signal line disposed on the base substrate, the third common signal line is located in the peripheral area, at least one of the sub-pixels comprises a common electrode, and the third common signal line is electrically connected to the common electrodes of the plurality of sub-pixels; The orthographic projection of the third common signal line on the base substrate at least partially surrounds the orthographic projection of the display area on the base substrate; Wherein, in the binding pair area, the orthographic projection of the third line segment on the substrate is located on a side where the orthographic projection of the first line segment on the substrate is away from the orthographic projection of the third common signal line on the substrate; In the same side area, the orthographic projection of the second line segment on the base substrate is located on a side where the orthographic projection of the fourth line segment on the base substrate is away from the orthographic projection of the third common signal line on the base substrate.

9. The display substrate according to claim 8, in, The display substrate further comprises a gate driving circuit, and the gate driving circuit is located in at least one of the side regions; In the same side area, the orthographic projection of the fourth line segment on the base substrate is located on a side where the orthographic projection of the gate driving circuit on the base substrate is close to the orthographic projection of the third common signal line on the base substrate.

10. The display substrate according to claim 7, in, In the same side area, the orthographic projections of the plurality of second touch-control leads on the base substrate are located on a side where the orthographic projection of the fourth line segment on the base substrate is away from the orthographic projection of the second line segment on the base substrate.

11. The display substrate according to claim 6, in, The orthographic projections of the plurality of first touch lines and the plurality of first touch leads on the base substrate define a third pattern, and the orthographic projections of the plurality of second touch lines and the plurality of second touch leads on the base substrate define a fourth pattern; The orthographic projection of the first common signal line on the base substrate at least partially surrounds the third pattern, and the orthographic projection of the second common signal line on the base substrate at least partially surrounds the fourth pattern.

12. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a first conductive layer, a first transparent electrode layer and a first insulating layer, wherein the first transparent electrode layer is located on a side of the first conductive layer away from the base substrate, the first insulating layer is located on a side of the first transparent electrode layer away from the base substrate, and the plurality of first touch control lines are located in the first conductive layer; At least one of the sub-pixels comprises a first transistor and a pixel electrode, wherein the pixel electrode is located in the first transparent electrode layer, the first electrode of the first transistor is located in the first conductive layer, and the first insulating layer covers the pixel electrode, the first electrode of the first transistor and the plurality of first touch lines; In the same sub-pixel, the pixel electrode is connected to the first electrode of the first transistor.

13. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a first conductive layer, a second insulating layer, a third conductive layer, a first transparent electrode layer and a first insulating layer, wherein the second insulating layer is located on a side of the third conductive layer away from the base substrate, the first conductive layer is located on a side of the second insulating layer away from the base substrate, the first transparent electrode layer is located on a side of the first conductive layer away from the base substrate, and the first insulating layer is located on a side of the first transparent electrode layer away from the base substrate; The plurality of first touch control lines are located in the first conductive layer; At least one of the sub-pixels comprises a first transistor and a pixel electrode, wherein the pixel electrode is located in the first transparent electrode layer, the first electrode of the first transistor is located in the third conductive layer, the second insulating layer covers the first electrode of the first transistor, and the first insulating layer covers the pixel electrode and the plurality of first touch lines; In the same sub-pixel, the pixel electrode is electrically connected to the first electrode of the first transistor through a first via hole penetrating the second insulating layer.

14. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a first conductive layer disposed on the base substrate; The display substrate further comprises a plurality of data lines, and the plurality of data lines extend along the first direction; The plurality of data lines and the plurality of first touch lines are both located in the first conductive layer, and the orthographic projections of the plurality of first touch lines on the base substrate do not overlap with the orthographic projections of the plurality of data lines on the base substrate; The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and at least one of the sub-pixel groups includes a plurality of the sub-pixels arranged along the first direction; A plurality of the sub-pixel groups are arranged between two adjacent first touch control lines.

15. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a second conductive layer disposed on the base substrate; The display substrate further comprises a plurality of gate lines and a plurality of common electrode lines, the plurality of gate lines extending along the second direction, the plurality of common electrode lines extending along the second direction, and the plurality of common electrode lines being electrically connected to the common electrodes of the plurality of sub-pixels; The plurality of second touch control lines, the plurality of gate lines and the plurality of common electrode lines are all located in the second conductive layer; The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and at least one of the sub-pixel groups includes a plurality of the sub-pixels arranged along the first direction. Wherein, between two adjacent sub-pixels along the first direction, at least one common electrode line, at least one gate line and at least one second touch line are arranged; Between two adjacent sub-pixels along the first direction, the second touch line and the common The electrode lines are symmetrically arranged with respect to the gate lines.

16. The display substrate according to claim 15, in, At least one of the sub-pixels includes a first transistor, the first transistor being electrically connected to at least one gate line; Between two adjacent sub-pixels along the first direction, the orthographic projection of the first transistor electrically connected to the gate line on the base substrate is located between the orthographic projection of the second touch line on the base substrate and the orthographic projection of the common electrode line on the base substrate.

17. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a first conductive layer and a third conductive layer, wherein the third conductive layer is located on a side of the first conductive layer close to the base substrate; The display substrate further includes a plurality of data lines, the plurality of data lines extend along the first direction, the plurality of data lines are located in the third conductive layer, and the plurality of first touch control lines are located in the first conductive layer; In the display area, an orthographic projection of at least one of the first touch lines on the base substrate overlaps with an orthographic projection of at least one of the data lines on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the first touch line is greater than or equal to 90%.

18. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a second conductive layer and a fourth conductive layer, wherein the fourth conductive layer is located on a side of the second conductive layer close to the base substrate; The display substrate further comprises a plurality of common electrode lines, the plurality of common electrode lines extending along the second direction, the plurality of common electrode lines being electrically connected to the common electrodes of the plurality of sub-pixels; The plurality of common electrode lines are located in the fourth conductive layer, and the plurality of second touch control lines are located in the second conductive layer; In the display area, an orthographic projection of at least one of the second touch control lines on the base substrate overlaps with an orthographic projection of at least one of the common electrode lines on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the second touch control line is greater than or equal to 90%.

19. The display substrate according to any one of claims 1 to 11, in, The display substrate further comprises a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer, wherein the fourth conductive layer, the third conductive layer, the second conductive layer and the first conductive layer are sequentially arranged in a direction away from the base substrate; The display substrate further comprises a plurality of common electrode lines and a plurality of data lines, the plurality of data lines extending along the first direction, the plurality of common electrode lines extending along the second direction, and the plurality of common electrode lines being electrically connected to the common electrodes of the plurality of sub-pixels; The plurality of first touch lines are located in the first conductive layer, the plurality of second touch lines are located in the second conductive layer, the plurality of data lines are located in the third conductive layer, and the plurality of common electrodes are located in the fourth conductive layer; In the display area, The orthographic projection of at least one of the first touch lines on the base substrate overlaps with the orthographic projection of at least one of the data lines on the base substrate, and the ratio of the area of ​​the overlapping region to the area of ​​the first touch line is greater than or equal to 90%; and / or, An orthographic projection of at least one of the second touch control lines on the base substrate overlaps with an orthographic projection of at least one of the common electrode lines on the base substrate, and a ratio of an area of ​​the overlapping region to an area of ​​the second touch control line is greater than or equal to 90%.

20. The display substrate according to claim 18 or 19, in, The display substrate further includes a plurality of second touch control leads, a gate driving circuit and a third common signal line; The third common signal line is located in the peripheral area, at least one of the sub-pixels includes a common electrode, the third common signal line is electrically connected to the common electrodes of the plurality of sub-pixels, the plurality of second touch lines are electrically connected to the touch binding end through the plurality of second touch leads, and the second touch lines in different second touch line groups are electrically connected to the touch binding end through different second touch leads; The plurality of second touch control leads are located in the second conductive layer, and the layer where the first common signal line, the second common signal line, the third common signal line and the gate driving circuit are located is located on a side of the second conductive layer close to the base substrate; The orthographic projections of the plurality of second touch leads on the base substrate overlap with the orthographic projections of at least one of the first common signal line, the second common signal line, the third common signal line and the gate driving circuit on the base substrate.

21. The display substrate according to any one of claims 1 to 11, in, The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, one sub-pixel group includes a plurality of sub-pixels arranged along the first direction, and the sub-pixels in different sub-pixel groups are different; At least one first touch line is arranged between two adjacent sub-pixel groups.

22. The display substrate according to any one of claims 1 to 11, in, The plurality of sub-pixels include a plurality of sub-pixel groups, the plurality of sub-pixel groups are arranged along the second direction, and one sub-pixel group includes a plurality of sub-pixels arranged along the first direction; At least one of the sub-pixels comprises a common electrode, and a plurality of slits are arranged on the common electrode; In at least one of the sub-pixel groups, an orthographic projection of the i-th slit of the plurality of sub-pixels on the base substrate defines a fifth pattern, and an orthographic projection of at least one of the first touch control lines on the base substrate overlaps with the fifth pattern; Wherein, i is a positive integer.

23. A display device, in, Comprising the display substrate as claimed in any one of claims 1 to 22.

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