Method for producing gallium arsenide monocrystal, method for producing gallium arsenide monocrystal substrate, gallium arsenide monocrystal substrate, and gallium arsenide monocrystal
By controlling the thermal environment of the gallium arsenide single crystal growth device, the method addresses the challenge of high dislocation densities in large-diameter substrates, enhancing semiconductor device yields.
Patent Information
- Application Number
- PCT/JP2023/036226
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-10-04
- Publication Date
- 2025-04-10
AI Technical Summary
Existing methods for producing gallium arsenide single crystal substrates with large diameters and off-angles greater than 4° from the (100) plane result in high average dislocation densities, leading to reduced semiconductor device yields.
A manufacturing method for gallium arsenide single crystals involves controlling the thermal environment of the crystal growth device by dividing the diameter-increasing portion of the crucible into upper and lower regions, with the upper region spaced apart from the crucible holder and the lower region in contact, to achieve uniform heat distribution and reduce thermal fluctuations.
This method enables the production of gallium arsenide single crystal substrates with extremely small average dislocation densities on large diameter substrates, even with off-angles up to 20°, thereby improving the yield of semiconductor devices.
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Abstract
Description
Method for manufacturing gallium arsenide single crystal, method for manufacturing gallium arsenide single crystal substrate, gallium arsenide single crystal substrate, and gallium arsenide single crystal
[0001] The present disclosure relates to a method for producing a gallium arsenide single crystal, a method for producing a gallium arsenide single crystal substrate, a gallium arsenide single crystal substrate, and a gallium arsenide single crystal.
[0002] International Publication No. 2006 / 106644 (Patent Document 1) discloses a silicon (Si)-doped gallium arsenide single crystal ingot (hereinafter also referred to as a "GaAs single crystal ingot") that is applied to a gallium arsenide single crystal substrate (hereinafter also referred to as a "GaAs single crystal substrate"). The GaAs single crystal ingot has an average dislocation density of 50 cm -2 When the carrier concentration in the portion with a solidification rate of 0.1 is C0.1 and the carrier concentration in the portion with a solidification rate of 0.8 is C0.8, the relationship C0.8 / C0.1<2.0 is satisfied. Furthermore, Patent Document 1 discloses that the carrier concentration of the GaAs single crystal ingot is 1.0×10 17 cm -3 Above 1.0 x 10 19 cm -3 International Publication No. 2021 / 251349 (Patent Document 2) discloses that the average value of the dislocation density is 500 cm -2 The atomic concentration of Si is 2.0×10 or less. 17 cm -3 1.5 x 10 19 cm -3 and the carrier concentration is 5.5×10 17 cm -3 The following GaAs single crystal ingot is disclosed.
[0003] Japanese Patent Laid-Open No. 2011-148693 (Patent Document 3) and Japanese Patent Laid-Open No. 2011-148694 (Patent Document 4) both disclose Si-doped n-type GaAs single crystal substrates. The GaAs single crystal substrates each have an average dislocation density of 40 to 100 cm -2 and 15-30 cm -2 and the atomic concentration of Si is 5.0 × 10 16 cm -3 Above 5.0 x 1017 cm -3 or less, and 5.0 x 10 16 cm -3 Above 5.0 x 10 17 cm -3 JP 2011-527280 A (Patent Document 5) and Sasane et al., "VGF Method for Low Dislocation Density GaAs Wafers Suitable for Mass Production of Semiconductor Lasers," Hitachi Cable, No. 20, August 2001, pp. 33-36 (Non-Patent Document 1) disclose a measurement method in which a mass having a predetermined size is formed on a main surface and dislocations present in the mass are counted to determine the dislocation density.
[0004] International Publication No. 2006 / 106644 International Publication No. 2021 / 251349 JP 2011-148693 A JP 2011-148694 A JP 2011-527280 A
[0005] Sasane et al., "Low Dislocation Density GaAs Wafers by VGF Method Suitable for Mass Production of Semiconductor Lasers," Hitachi Cable, No. 20, August 2001, pp. 33-36
[0006] A method for producing a gallium arsenide single crystal according to the present disclosure is a method for producing a cylindrical gallium arsenide single crystal. The method includes growing a gallium arsenide single crystal from a seed crystal using a gallium arsenide single crystal production apparatus. The growth-side surface of the seed crystal is a plane having an off-angle of 4° or more and 20° or less from the (100) plane of the gallium arsenide single crystal. The gallium arsenide single crystal production apparatus includes a crucible having a partially cylindrical shape, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a seed crystal housing portion, an increasing diameter portion connected to the seed crystal housing portion, and a straight body portion connected to the increasing diameter portion on the side opposite the seed crystal housing portion. The seed crystal housing portion has a cylindrical cavity that opens to the side connected to the increasing diameter portion and has a bottom wall formed on the opposite side. The increasing diameter section has a truncated cone shape that expands axially upward and is connected to the seed crystal accommodation section at the smaller diameter side of the increasing diameter section. The straight body section has a hollow cylindrical shape and is connected to the larger diameter side of the increasing diameter section. The crucible holder holds the increasing diameter section. The increasing diameter section consists of an upper region and a lower region. The upper region is spaced apart from the crucible holder and the lower region is in contact with the crucible holder.
[0007] FIG. 1 is a flowchart showing an example of a method for producing a gallium arsenide single crystal and a method for producing a gallium arsenide single crystal substrate according to this embodiment. FIG. 2 is a longitudinal sectional view schematically illustrating a gallium arsenide single crystal production apparatus used in the process of growing a gallium arsenide single crystal, in connection with the method for producing a gallium arsenide single crystal according to this embodiment. FIG. 3 is an enlarged view of a main portion of FIG. 2. FIG. 4 is a plan view illustrating the main surface of a gallium arsenide single crystal substrate according to this embodiment and a measurement location (measurement region) for measuring the carrier concentration in the substrate. FIG. 5 is an explanatory diagram illustrating a virtual lattice set on the main surface of the gallium arsenide single crystal substrate shown in FIG. 4, in which squares with sides of 2 mm are arranged in parallel so as to maximize the number of squares without overlapping each other, in order to determine the dislocation density on the main surface. FIG. 6 is an explanatory diagram illustrating a Hall measurement sample prepared using the gallium arsenide single crystal substrate shown in FIG. 4. FIG. 7 is a perspective view schematically illustrating a gallium arsenide single crystal according to this embodiment.
[0008] [Problem to be Solved by the Present Disclosure] In recent years, as disclosed in the above-mentioned Patent Documents 1 to 5 and Non-Patent Document 1, research and development has been underway with the aim of producing GaAs single crystals with good crystallinity and obtaining GaAs single crystal substrates from the GaAs single crystals with extremely low average dislocation densities at their main surfaces. The reason for this is that semiconductor devices can be produced from such substrates with high yields. However, when GaAs single crystal substrates with large diameters, approximately 8 inches, and main surfaces with an off-angle of 4° or more from the (100) plane of the GaAs single crystal are obtained using the methods disclosed in the above-mentioned Patent Documents 1 to 5 and Non-Patent Document 1, the GaAs single crystal substrates tend to have high average dislocation densities at their main surfaces, which adversely affects the yield of semiconductor devices. Therefore, a large-diameter GaAs single crystal substrate with extremely low average dislocation densities at its main surfaces with a relatively large off-angle has not yet been realized, and its development is eagerly awaited.
[0009] In view of the above circumstances, the present disclosure has an object to provide a method for manufacturing a gallium arsenide single crystal for obtaining a large-diameter gallium arsenide single crystal substrate having an extremely small average value of dislocation density, etc., on a main surface having a relatively large off-angle. The present disclosure also has an object to provide a method for manufacturing the gallium arsenide single crystal substrate, the gallium arsenide single crystal substrate, and the gallium arsenide single crystal.
[0010] [Advantages of the Present Disclosure] The present disclosure provides a method for producing a gallium arsenide single crystal for obtaining a large-diameter gallium arsenide single crystal substrate having an extremely small average dislocation density, etc., on a main surface having a relatively large off-angle. Furthermore, the present disclosure also provides a method for producing the gallium arsenide single crystal substrate, the gallium arsenide single crystal substrate, and the gallium arsenide single crystal.
[0011] [Summary of the Embodiments] First, an overview of the embodiments of the present disclosure will be described. The inventors conducted extensive research to solve the above-mentioned problems. The inventors focused on producing GaAs single crystals with good crystallinity while controlling the thermal environment of a gallium arsenide single crystal manufacturing apparatus (hereinafter also referred to as a "GaAs single crystal manufacturing apparatus") so as to achieve a more uniform heat distribution within the crystal growing in the crucible. Specifically, in the GaAs single crystal manufacturing apparatus used in the process of growing gallium arsenide single crystals, the increasing diameter section is divided into an upper region and a lower region, and the upper region is separated from the crucible holder and the lower region is in contact with the crucible holder. As a result, the thermal environment in the above process was controlled to satisfy the relationship q(A1) < q(A2), where q is the heat flux from the inside of the crucible toward the crucible holder, A1 is the upper region, A2 is the lower region, q(A1) is the amount of heat flux passing through the upper region, and q(A2) is the amount of heat flux passing through the lower region. As a result, the inventors discovered that by suppressing the occurrence of thermal fluctuations within the crystal during growth and achieving uniform heat distribution, thermal strain within the crystal can be minimized even for large single crystals with diameters of approximately 8 inches. Thus, a manufacturing method for producing large-diameter GaAs single crystal substrates using GaAs single crystals has been achieved, with extremely low average dislocation densities and other characteristics on the main surfaces with a relatively large off-angle. Furthermore, a manufacturing method for GaAs single crystals for obtaining the GaAs single crystal substrates has also been developed, completing the present disclosure.
[0012] Next, embodiments of the present disclosure will be described. [1] A method for producing a gallium arsenide single crystal according to one aspect of the present disclosure is a method for producing a cylindrical gallium arsenide single crystal. The method includes growing a gallium arsenide single crystal from a seed crystal using a gallium arsenide single crystal production apparatus. The growth-side surface of the seed crystal is a plane having an off-angle of 4° or more and 20° or less from the (100) plane of the gallium arsenide single crystal. The gallium arsenide single crystal production apparatus includes a partially cylindrical crucible, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a seed crystal housing portion, an increasing diameter portion connected to the seed crystal housing portion, and a straight body portion connected to the increasing diameter portion on the side opposite the seed crystal housing portion. The seed crystal housing portion has a cylindrical cavity that opens to the side connected to the increasing diameter portion and has a bottom wall formed on the opposite side. The increasing diameter section has a truncated cone shape that expands axially upward and is connected to the seed crystal accommodation section at the smaller diameter side of the increasing diameter section. The straight body section has a hollow cylindrical shape and is connected to the larger diameter side of the increasing diameter section. The crucible holder holds the increasing diameter section. The increasing diameter section consists of an upper region and a lower region. The upper region is spaced apart from the crucible holder and the lower region is in contact with the crucible holder.
[0013] The method for producing a gallium arsenide single crystal having these characteristics can produce a gallium arsenide single crystal with extremely small thermal strain inside the crystal. As a result, the gallium arsenide single crystal obtained by the above-mentioned production method has an extremely small average value of dislocation density on a main surface having a relatively large off-angle, and can be used as a material for producing a large-diameter gallium arsenide single crystal substrate.
[0014] [2] When the surface area of the upper region is S(A1) and the surface area of the lower region is S(A2), the increased diameter portion preferably satisfies the following formula I: 0.2≦S(A2) / (S(A1)+S(A2))≦0.6 Formula I In this case, a gallium arsenide single crystal having the above-mentioned characteristics can be easily obtained.
[0015] [3] It is preferable that the upper region faces the crucible holder in a direction perpendicular to the growth direction of the gallium arsenide single crystal, in which case a gallium arsenide single crystal having the above-mentioned characteristics can be easily obtained.
[0016] [4] The crucible holder is preferably made of a single material, in which case gallium arsenide single crystals having the above-mentioned characteristics can be more easily obtained.
[0017] [5] The material is preferably made of quartz, in which case a gallium arsenide single crystal having the above-mentioned characteristics can be more easily obtained.
[0018] [6] The material is preferably opaque, in which case gallium arsenide single crystals having the above-mentioned characteristics can be more easily obtained.
[0019] [7] A method for manufacturing a gallium arsenide single crystal substrate according to one embodiment of the present disclosure is a method for manufacturing a gallium arsenide single crystal substrate having a circular main surface. The manufacturing method includes a step of cutting the gallium arsenide single crystal obtained by the manufacturing method for the gallium arsenide single crystal into a disk shape and processing it to obtain a gallium arsenide single crystal substrate. This manufacturing method for a gallium arsenide single crystal substrate having such characteristics can produce a large-diameter gallium arsenide single crystal substrate with extremely low average dislocation densities on the main surface having a relatively large off-angle. As a result, semiconductor devices can be produced from the gallium arsenide single crystal substrate with a high yield, even when a semiconductor layer is formed on the main surface.
[0020] [8] A gallium arsenide single crystal substrate according to one embodiment of the present disclosure is a gallium arsenide single crystal substrate having a circular main surface. The diameter of the gallium arsenide single crystal substrate is 200 mm or more and 210 mm or less. The main surface is a plane having an off-angle of 4° or more and 20° or less from the (100) plane of the gallium arsenide single crystal. The off-axis direction of the plane having the off-axis angle is any of the [01-1], [0-1-1], [0-11], and
[011] directions. The average dislocation density of the main surface is 0 cm -2 3.77cm or more -2In a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel without overlapping on the main surface, the ratio of the number of squares without dislocations to the total number of squares constituting the lattice is 98.04% or more. The gallium arsenide single crystal substrate contains silicon. The silicon concentration is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal substrate is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 A gallium arsenide single crystal substrate having such characteristics has a large diameter and a very small average dislocation density on a main surface having a relatively large off-angle. As a result, even when a semiconductor layer is formed on the main surface, semiconductor devices can be obtained from the gallium arsenide single crystal substrate with a high yield.
[0021] [9] The gallium arsenide single crystal substrate preferably contains boron. The concentration of the boron is preferably 1.0×10 18 cm -3 Above 1.0 x 10 19 cm -3 In this case, the gallium arsenide single crystal substrate has fewer dislocations.
[0022]
[10] A gallium arsenide single crystal according to one embodiment of the present disclosure is a cylindrical gallium arsenide single crystal. The diameter of the circular plane forming the surface of the gallium arsenide single crystal is 200 mm or more and 210 mm or less. The circular plane is a plane having an off-angle of 4° or more and 20° or less from the (100) plane of the gallium arsenide single crystal. The off-direction of the plane having the off-angle is any one of the [01-1], [0-1-1], [0-11], and
[011] directions. The average dislocation density in the circular plane is 0 cm -2 3.77cm or more -2In a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel without overlapping on the circular surface, the ratio of the number of squares without dislocations to the total number of squares constituting the lattice is 98.04% or more. The gallium arsenide single crystal contains silicon. The silicon concentration is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 A gallium arsenide single crystal having these characteristics has extremely small thermal strain inside the crystal. As a result, the gallium arsenide single crystal has an extremely small average value of dislocation density on a main surface having a relatively large off-angle, and is provided as a material for producing a large-diameter gallium arsenide single crystal substrate.
[0023]
[11] The axial length of the cylindrical shape is preferably 40 mm or more and 110 mm or less. In this case, a large number of gallium arsenide single crystal substrates having the above-mentioned characteristics are provided.
[0024]
[12] and
[13] The carrier concentration at one end of the gallium arsenide single crystal is 0.8 × 10 18 cm -3 1.5 x 10 18 cm -3 The carrier concentration at the other end of the gallium arsenide single crystal is 1.5×10 18 cm -3 3.5 x 10 18 cm -3 In this case, a large number of gallium arsenide single crystal substrates having the above-mentioned characteristics are provided.
[0025] [Details of the embodiment] One embodiment according to the present disclosure (hereinafter also referred to as "the present embodiment") will be described in further detail below, but the present disclosure is not limited thereto. The following description may be made with reference to the drawings, and the same or corresponding elements in the present specification and drawings will be designated by the same reference numerals, and the same description will not be repeated. The drawings are shown with the scale adjusted appropriately to facilitate understanding of each component, and the scale of each component shown in the drawings does not necessarily match the scale of the actual component.
[0026] In this specification, the expression "A to B" means the upper and lower limits of a range (i.e., A or more and B or less), and when no unit is specified for A and only a unit is specified for B, the units of A and B are the same. Furthermore, when a compound or the like is represented by a chemical formula in this specification, the chemical formula is intended to include any known atomic ratios when the atomic ratio is not particularly limited, and is not necessarily limited to only those within a stoichiometric range.
[0027] As used herein, "device yield" refers to the yield obtained by multiplying the processing yield, which indicates the percentage of wafers (e.g., microLED (Light Emitting Diode: μLED)-formed wafers) in which a semiconductor layer is formed on a gallium arsenide single crystal substrate without cracks, chips, or the like occurring during processing of the substrate, by the performance yield, which indicates the percentage of μLEDs obtained from the wafer that meet the required predetermined performance. The "device yield" is expressed as a percentage. The "processing yield" is expressed as the percentage of the substrate in which cracks, chips, or the like do not occur in the series of processes from the process of performing epitaxial growth to form a semiconductor layer, etc., on the gallium arsenide single crystal substrate to the process of forming a μLED-formed wafer. The "performance yield" is expressed as the percentage of non-defective products obtained by performing a burn-in accelerated degradation test on μLEDs obtained from the wafer and determining whether they are good or bad based on the degree of degradation after the test. An example of a wafer having a semiconductor layer formed on the substrate is a vertical cavity surface emitting laser (VCSEL) wafer. In this case, the "processing yield" is expressed as the percentage of the substrate that does not crack or chip in a series of processes from the process of epitaxially growing a gallium arsenide single crystal substrate to form a semiconductor layer, etc., to the process of forming a VCSEL-formed wafer. The "performance yield" is expressed as the percentage of non-defective VCSELs obtained from the wafer, which are subjected to a burn-in accelerated degradation test and judged as good or bad based on the degree of degradation after the test.
[0028] In this specification, the "main surface" of a gallium arsenide single crystal substrate refers to both of the two circular faces of the substrate. A gallium arsenide single crystal substrate falls within the scope of the present invention if at least one of the two faces satisfies the scope of the claims of the present disclosure. An epitaxial film may be disposed on the "main surface" of the gallium arsenide single crystal substrate. Furthermore, in this specification, the "face" used in the term "in-plane" refers to the "main surface." In this specification, when the diameter of a gallium arsenide single crystal substrate is described as "8 inches," this means that the diameter is within the range of 200 mm to 210 mm. The diameter is measured using a known outer diameter measuring instrument such as a vernier caliper.
[0029] As used herein, the "circular surface forming the surface" of a gallium arsenide single crystal refers to both of the two circular surfaces included in the surface of the single crystal having a cylindrical shape. A gallium arsenide single crystal falls within the scope of the present invention if at least one of these two circular surfaces satisfies the scope of the claims of the present disclosure. As used herein, when the diameter of the "circular surface forming the surface" of a gallium arsenide single crystal is described as "8 inches," this means that the diameter is within the range of 200 mm to 210 mm. The diameter of the gallium arsenide single crystal is also measured using a known outer diameter measuring device such as a vernier caliper.
[0030] In the crystallographic descriptions in this specification, individual orientations are represented by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. A negative index in crystallographic terms is usually represented by placing a "- (bar)" before the number, but when this is expressed in this specification, a negative sign is placed before the number.
[0031] [Method for Manufacturing Gallium Arsenide Single Crystal] The method for manufacturing a gallium arsenide single crystal (GaAs single crystal) according to this embodiment is a method for manufacturing a cylindrical gallium arsenide single crystal. The manufacturing method includes growing a GaAs single crystal from a seed crystal using a gallium arsenide single crystal manufacturing apparatus (GaAs single crystal manufacturing apparatus). The growth-side surface of the seed crystal is a plane having an off-angle of 4° to 20° from the (100) plane of the gallium arsenide single crystal. The GaAs single crystal manufacturing apparatus includes a partially cylindrical crucible, a crucible holder for holding the crucible, and a heating element for heating the crucible. The crucible includes a seed crystal housing portion, an increasing diameter portion connected to the seed crystal housing portion, and a straight body portion connected to the increasing diameter portion on the side opposite the seed crystal housing portion. The seed crystal accommodating portion has a cylindrical cavity that opens to the side connected to the increasing diameter portion and has a bottom wall formed on the opposite side. The increasing diameter portion has a truncated cone shape that expands axially upward and is connected to the seed crystal accommodating portion on the small diameter side of the increasing diameter portion. The straight body portion has a hollow cylindrical shape and is connected to the large diameter side of the increasing diameter portion. The crucible holder holds the increasing diameter portion. The increasing diameter portion consists of an upper region and a lower region. The upper region is spaced apart from the crucible holder, and the lower region is in contact with the crucible holder.
[0032] Specifically, the manufacturing method preferably includes steps such as those shown in the flowchart of FIG. 1 . FIG. 1 is a flowchart shown as an example of a method for manufacturing a gallium arsenide single crystal and a method for manufacturing a gallium arsenide single crystal substrate according to this embodiment. According to FIG. 1 , the method for manufacturing a GaAs single crystal includes a step S10 (first step: preparation step) of preparing a GaAs single crystal growth apparatus, a seed crystal, and a chunk of gallium arsenide (hereinafter also referred to as "bulk GaAs"), and a step S20 (second step: GaAs single crystal obtaining step) of growing a GaAs single crystal from the seed crystal using the GaAs single crystal manufacturing apparatus. Furthermore, according to FIG. 1 , the method for manufacturing a GaAs single crystal substrate preferably includes a step S30 (third step: GaAs single crystal substrate obtaining step) of cutting the GaAs single crystal obtained by the GaAs single crystal manufacturing method into a disk shape and processing it to obtain a GaAs single crystal substrate.
[0033] The step S20 of obtaining a GaAs single crystal can include the steps of: accommodating a seed crystal in a seed crystal accommodation section, and accommodating chunk GaAs together with silicon in the diameter increasing section and the straight body section (raw material loading step S21); heating the crucible with a heating element to melt a portion of the seed crystal and the chunk GaAs into a gallium arsenide melt (hereinafter also referred to as "GaAs melt") and bringing the GaAs melt into contact with the remainder of the seed crystal (raw material melting step S22); and growing a GaAs single crystal from the GaAs melt on the remainder of the seed crystal (GaAs single crystal growing step S23).
[0034] In particular, in the GaAs single crystal growth step S23, the thermal environment of the GaAs single crystal growth apparatus is controlled to satisfy the relationship q(A1) < q(A2), where q is the heat flux from the inside of the crucible toward the crucible holder, A1 is the upper region, A2 is the lower region, q(A1) is the amount of heat flux passing through the upper region, and q(A2) is the amount of heat flux passing through the lower region. In other words, in the GaAs single crystal growth step S23, the amount of heat flux passing through the lower region (q(A2)) is always controlled to be greater than the amount of heat flux passing through the upper region (q(A1)).
[0035] To solve the above problems, the present inventors focused on performing step S20 of obtaining a GaAs single crystal while satisfying the relationship q(A1)<q(A2) by controlling the thermal environment of a GaAs single crystal growth apparatus that grows a GaAs single crystal, which is the raw material for a GaAs single crystal substrate. Specifically, the inventors investigated the control of the thermal output of the heating element, as well as the structure of the increasing diameter section of the crucible that constitutes the apparatus and the structure of the crucible holder that holds the crucible. In particular, the inventors came up with the idea of dividing the increasing diameter section into an upper region and a lower region, with the upper region separated from the crucible holder and the lower region in contact with the crucible holder.
[0036] Furthermore, with regard to the diameter increasing section, when the surface area of the upper region constituting the section is S(A1) and the surface area of the lower region is S(A2), an attempt was made to create a structure that satisfies the following formula I. Note that the surface area of the upper region (S(A1)) and the surface area of the lower region (S(A2)) both refer to the surface area of the crucible holder side in the diameter increasing section. 0.2≦S(A2) / (S(A1)+S(A2))≦0.6 Formula I
[0037] Alternatively, regarding the relationship between the increasing diameter section and the crucible holder, attempts were made to position the upper region facing the crucible holder in a direction perpendicular to the growth direction of the GaAs single crystal. Through these trial and error experiments, it was discovered that controlling the heat flux from the inside of the crucible toward the crucible holder so that q(A1) < q(A2) would result in a uniform heat distribution within the GaAs single crystal growing in the crucible. As a result, it was possible to achieve an extremely low average dislocation density on the main surface having a relatively large off-angle in a GaAs single crystal substrate obtained from the GaAs single crystal. In addition, the dislocation density reduction effect achieved by silicon doping resulted in a GaAs single crystal substrate with extremely low or no dislocations. Based on the above, the present inventors have completed a method for producing a GaAs single crystal substrate having a large diameter and an extremely small average dislocation density on a main surface having a relatively large off-angle. The GaAs single crystal substrate can produce semiconductor devices with a high yield even when a semiconductor layer is formed on the main surface. It is appropriate for the structure of the increased diameter portion to satisfy the relationship 0.1<S(A2) / (S(A1)+S(A2))<0.8, where S(A1) is the surface area of the upper region and S(A2) is the surface area of the lower region.
[0038] In the step S20 for obtaining a GaAs single crystal, if the relationship between q(A1) and q(A2) does not satisfy the relationship q(A1)<q(A2) but satisfies a relationship such as q(A1)≧q(A2), a GaAs single crystal similar to that disclosed in the above-mentioned patent documents may be produced. In this case, if an attempt is made to obtain a GaAs single crystal substrate having a large diameter of approximately 8 inches and a main surface with an off-angle of 4° or more from the (100) plane of the GaAs single crystal, the average dislocation density of the main surface may deteriorate, potentially adversely affecting device yield. Alternatively, if the relationship between q(A1) and q(A2) does not satisfy the relationship q(A1)<q(A2) but satisfies a relationship such as q(A1)≧q(A2), it may not be possible to grow the substrate as a single crystal.
[0039] Here, in the course of further investigations to solve the above-mentioned problems, the present inventors further discovered the following concern when GaAs single crystals are produced by the methods disclosed in the above-mentioned Patent Documents 1 to 5 and Non-Patent Document 1. Specifically, the inventors discovered that when a GaAs single crystal substrate having a large diameter of about 200 mm and a main surface formed of a plane having an off-angle of 4° or more from the (100) plane of the GaAs single crystal is obtained by the methods disclosed in the above-mentioned prior art documents, the in-plane carrier concentration distribution of the main surface varies. There was a concern that the variation in carrier concentration distribution would frequently cause cracking, chipping, etc., of the GaAs single crystal substrate during processing. Based on this discovery, the present inventors performed the above-mentioned step S20 of producing a GaAs single crystal using a seed crystal having a crystal plane on its surface that is off-angled from the (100) plane of the GaAs single crystal by 4° or more and 20° or less. As a result, when a GaAs single crystal substrate is obtained from the GaAs single crystal produced in this manner, the carrier concentration distribution on the main surface of the substrate is extremely uniform, which suggests that this has a favorable effect on device yield. Therefore, the GaAs single crystal obtained by the GaAs single crystal manufacturing method according to the present disclosure has an extremely small average value of dislocation density on the main surface having a relatively large off-angle, and can be provided as a material for obtaining a large-diameter gallium arsenide single crystal substrate.
[0040] Hereinafter, an overview of the GaAs single crystal growth apparatus and each step included in the GaAs single crystal manufacturing method will be described with reference to FIGS. 2 and 3. FIG. 2 is a vertical cross-sectional view schematically illustrating a gallium arsenide single crystal manufacturing apparatus used in the step of growing a gallium arsenide single crystal, relating to the manufacturing method of a gallium arsenide single crystal according to this embodiment. FIG. 3 is an enlarged view of a main portion of FIG. 2. The manufacturing method of a GaAs single crystal according to this embodiment is a manufacturing method of a GaAs single crystal having a cylindrical shape. The manufacturing method includes, for example, a step of growing a GaAs single crystal using a GaAs single crystal growth apparatus 10 shown in FIG. 2 (step S20 of obtaining a GaAs single crystal). The GaAs single crystal growth apparatus 10 includes a crucible 5 having a partially cylindrical shape, a crucible holder 6 for holding the crucible 5, and a heating element 7 for heating the crucible 5. The GaAs single crystal growth apparatus 10 can grow GaAs single crystals by the vertical boat method using a crucible. Hereinafter, the vertical boat method will be abbreviated as the VB method. The VB method includes the vertical Bridgman method and the vertical temperature gradient freeze method.
[0041] <GaAs Single Crystal Growth Apparatus> (Crucible) As shown in FIG. 2 , the crucible 5 in the GaAs single crystal growth apparatus 10 has a structure in which a portion thereof is cylindrical. Specifically, the crucible 5 includes a cylindrical seed crystal accommodation portion 51, an increasing diameter portion 52 connected to the seed crystal accommodation portion 51, and a straight body portion 53 connected to the increasing diameter portion 52 on the side opposite the seed crystal accommodation portion 51. The seed crystal accommodation portion 51 has a cavity that opens to the side connected to the increasing diameter portion 52 and has a bottom wall formed on the side opposite the increasing diameter portion 52. The seed crystal accommodation portion 51 can accommodate and hold a seed crystal 8 a in the cavity. The increasing diameter portion 52 has a truncated cone shape that expands upward in the axial direction of the crucible 5, and is connected to the seed crystal accommodation portion 51 on the smaller diameter side of the increasing diameter portion 52. The body portion 53 has a hollow cylindrical shape and is connected to the larger-diameter side of the increasing diameter portion 52. The increasing diameter portion 52 and the body portion 53 function to hold bulk GaAs (specifically, polycrystalline gallium arsenide) therein. Furthermore, as described below, the increasing diameter portion 52 and the body portion 53 function to grow a GaAs single crystal 81 as a crystalline solid by solidifying a GaAs melt 82, which is a molten state of bulk GaAs or the like. Various materials that can withstand the temperature of the GaAs melt 82 are used for the crucible 5. For example, pyrolytic boron nitride (pBN) is used as the material for the crucible 5. The inner diameter of the body portion 53 corresponds to the diameter of the GaAs single crystal 81 to be grown, and is, for example, 200 mm or more and 215 mm or less. The increasing diameter portion 52 will be described in more detail below with reference to FIG. 3 .
[0042] (Increasing Diameter Section) As shown in FIG. 3 , the increasing diameter section 52 is composed of an upper region 521 and a lower region 522. The upper region 521 is spaced apart from the crucible holder 6, and the lower region 522 is in contact with the crucible holder 6. The upper region 521 refers to the region of the increasing diameter section 52 that is axially upper. The lower region 522 refers to the region of the increasing diameter section 52 that is axially lower than the upper region 521. The region of the increasing diameter section 52 in which the heat flux from the inside of the crucible 5 toward the crucible holder 6 is mainly based on radiation is defined as the upper region 521. The region of the increasing diameter section 52 in which the heat flux from the inside of the crucible 5 toward the crucible holder 6 is mainly based on radiation and thermal conduction is defined as the lower region 522. The boundary between upper region 521 and lower region 522 is determined by the structural difference between whether it is separated from or in contact with crucible holder 6. The boundary between upper region 521 and lower region 522 is also determined by the manner in which heat constituting the heat flux from the inside of crucible 5 toward crucible holder 6 is transmitted.
[0043] The GaAs single crystal growth apparatus 10, having the above-described structures in the upper region 521 and the lower region 522, can achieve a uniform heat distribution within the GaAs single crystal grown in the crucible. Specifically, the above-described structures in the upper region 521 and the lower region 522 enable the heat flux in the upper region 521 from the interior of the crucible 5 toward the crucible holder 6 to be based mainly on radiation. The heat flux in the lower region 522 from the interior of the crucible 5 toward the crucible holder 6 to be based mainly on radiation and thermal conduction. This allows the GaAs single crystal growth apparatus 10 to increase the heat flux in the lower region 522 from the interior of the crucible 5 toward the crucible holder 6 by the amount of thermal conduction compared to that in the upper region 521, thereby easily satisfying the relationship q(A1)<q(A2).
[0044] In particular, with the structure of the upper region 521 separated from the crucible holder 6, the heat flux in the upper region 521 from the interior of the crucible 5 toward the crucible holder 6 can be based mainly on radiation. Therefore, with the above structure, the GaAs single crystal growth apparatus 10 can achieve a sufficiently uniform heat distribution within the growing GaAs single crystal 81. Furthermore, with the structure of the lower region 522 in contact with the crucible holder 6, although thermal fluctuations occur within the growing GaAs single crystal 81 due to the above-mentioned thermal conduction, the structure of the crucible 5 allows the direction of heat conduction to be toward the seed crystal accommodation section 51. Therefore, the GaAs single crystal growth apparatus 10 can significantly suppress the amount of the above-mentioned thermal fluctuations. Therefore, with the above-mentioned structure, the GaAs single crystal growth apparatus 10 can extremely reduce thermal distortion within the GaAs single crystal 81.
[0045] For example, when the surface area of upper region 521 is S(A1) and the surface area of lower region 522 is S(A2), it is preferable that increasing diameter portion 52 satisfies the following formula I: 0.2≦S(A2) / (S(A1)+S(A2))≦0.6 Formula I With such a structure of increasing diameter portion 52, GaAs single crystal growth apparatus 10 can easily adjust the relationship between the amount of heat flux in upper region 521 from inside crucible 5 toward crucible holder 6 and the amount of heat flux in lower region 522 from inside crucible 5 toward crucible holder 6 so as to satisfy q(A1)<q(A2). The amount of heat flux in the upper region 521 from inside the crucible 5 toward the crucible holding stand 6 means the amount of heat flux passing through the upper region 521, and the amount of heat flux in the lower region 522 from inside the crucible 5 toward the crucible holding stand 6 means the amount of heat flux passing through the lower region 522.
[0046] The above formula I is preferably the following formula I'. Furthermore, S(A2) / (S(A1)+S(A2)) is more preferably 0.5. 0.3≦S(A2) / (S(A1)+S(A2))≦0.5 (Formula I') When S(A2) / (S(A1)+S(A2)) is less than 0.2 or greater than 0.6, the heat distribution inside the growing GaAs single crystal 81 may not be sufficiently uniform, and the effect of extremely reducing the average dislocation density may not be sufficient. In particular, when S(A2) / (S(A1)+S(A2)) is, for example, 0.1 or less, the lower region 522 held by the crucible holder 6 is too small, making it difficult to grow the GaAs single crystal 81 while stabilizing the crucible 5, which may adversely affect the growth of the GaAs single crystal 81. If (A2) / (S(A1)+S(A2)) is, for example, 0.8 or more, the lower region 522 held by the crucible holder 6 will be too large, and the relationship between the above q(A1) and q(A2) will become q(A1)≧q(A2), etc., which may have an adverse effect on the growth of the GaAs single crystal.
[0047] Preferably, upper region 521 faces crucible holder 6 in a direction perpendicular to the growth direction of GaAs single crystal 81. Due to the above-described structure of upper region 521, the heat flux in upper region 521 in the direction from the inside of crucible 5 toward crucible holder 6 is mainly due to radiation. As a result, in step S20 of obtaining a GaAs single crystal, GaAs single crystal growth apparatus 10 can suppress the occurrence of thermal fluctuations inside GaAs single crystal 81 during growth, making the heat distribution uniform and reducing thermal strain inside GaAs single crystal 81.
[0048] (Crucible Holder) The GaAs single crystal growth apparatus 10 includes a crucible holder 6 that holds the diameter-increasing portion 52. The crucible holder 6 may have, for example, a cylindrical appearance. The crucible holder 6 is preferably made of a single material. Examples of such materials include quartz, alumina, and silicon carbide. The material is preferably quartz. In particular, the material is preferably opaque. When the crucible holder 6 is made of an opaque material with poor heat dissipation, the lower region 522 is in contact with the crucible holder 6, so that the direction of heat conduction constituting the heat flux in the lower region 522 can be axially downward (toward the seed crystal accommodation portion 51). In this case, the crucible holder 6 can significantly reduce the amount of thermal fluctuation described above. The outer diameter of crucible holder 6 can correspond to or be the same as the outer diameter of body portion 53, and is, for example, 215 mm or more and 230 mm or less.
[0049] As used herein, "opaque" refers to a transmittance of 10% or less for light with wavelengths of 1600 to 2400 nm. Whether the material constituting the crucible holder 6 is opaque or not is evaluated using, for example, a recording spectrophotometer (product name (product number): "U-4000", manufactured by Hitachi, Ltd.). Specifically, parallel plate samples with uniform transmittance and shape of the member used as the material for the crucible holder 6 are prepared, and the samples are measured with the recording spectrophotometer to evaluate whether they are opaque or not.
[0050] (Heater) The GaAs single crystal growth apparatus 10 is equipped with a heater 7 that heats the crucible 5. The heater 7 may consist of two elements. In this case, the two elements are arranged so as to surround the outer periphery of the crucible 5. Each heater 7 is divided into multiple sections perpendicular to the axis of the crucible. This allows each heater 7 to be configured in multiple stages. Furthermore, the output of the heater 7 can be controlled independently for each element and for each section. Therefore, the temperature at the interface between the GaAs single crystal 81 and the GaAs melt 82 is precisely controlled. For example, a known electric heater may be used as the heater 7.
[0051] The GaAs single crystal growth apparatus 10 can include thermocouples 75 capable of measuring the temperature of the crucible 5 heated by the heating element 7. A plurality of thermocouples 75 may be arranged outside the crucible 5 along the axial direction. In this case, it is preferable that at least a plurality of thermocouples 75 are arranged outside the crucible 5 along the axial direction, near a height corresponding to the interface between the GaAs single crystal 81 and the GaAs melt 82 in the crucible 5. Based on the temperatures measured by each thermocouple 75, the temperatures of various locations of the GaAs single crystal 81 growing in the crucible 5 can be estimated. In particular, the radial temperature distribution at the interface can be estimated based on the temperatures measured by each thermocouple 75, thereby indirectly evaluating the uniformity of the heat distribution inside the GaAs single crystal 81 during crystal growth. In other words, by adopting the above-described structures of the diameter increasing section 52 and the crucible holder 6 and controlling the heat output of the heating element 7, the temperatures measured by the thermocouples 75 are optimized, thereby making the heat distribution inside the GaAs single crystal 81 during crystal growth more uniform.
[0052] <Steps Included in the Method for Manufacturing GaAs Single Crystal> (First Step: Preparation Step S10) As shown in FIG. 1 , in the method for manufacturing a GaAs single crystal substrate according to this embodiment, the first step is the preparation step S10. In the preparation step S10, the GaAs single crystal growth apparatus 10, the seed crystal 8a, and the bulk GaAs are prepared for manufacturing the GaAs single crystal. The seed crystal 8a is made of a GaAs single crystal. The seed crystal 8a and the bulk GaAs may be prepared by known methods or may be obtained commercially.
[0053] The seed crystal 8a preferably has a cylindrical shape that can be accommodated in the seed crystal accommodation unit 51. The growth-side surface of the seed crystal is a plane having an off-angle of 4° to 20° from the (100) plane of the gallium arsenide single crystal. Specifically, the crystal plane of the circular plane that forms the cylindrical surface of the seed crystal 8a is a plane inclined from the (100) plane of the GaAs single crystal by an angle selected from an angle range of 4° to 20°. In this case, the inclined plane is preferably inclined in any one of the [01-1], [0-1-1], [0-11], and
[011] directions of the GaAs single crystal. When the method for producing a GaAs single crystal according to this embodiment is performed using the seed crystal 8a having such crystal plane characteristics, the GaAs single crystal substrate obtained from the GaAs single crystal produced by the above-described method has an extremely uniform carrier concentration distribution on its main surface.
[0054] (Second Step: Step S20 of Obtaining GaAs Single Crystal) Next, in the method for manufacturing a GaAs single crystal substrate according to this embodiment, step S20 of growing a GaAs single crystal is carried out using the GaAs single crystal manufacturing apparatus. Step S20 of obtaining a GaAs single crystal includes the following steps: step S21 of loading raw materials, step S22 of melting raw materials, and step S23 of growing a GaAs single crystal. In step S20 of obtaining a GaAs single crystal, these steps are carried out in this order.
[0055] 1) Raw Material Charging Step S21 The raw material charging step S21 is a step of accommodating a seed crystal 8a in the seed crystal accommodating portion 51 and accommodating chunk GaAs together with silicon in the increasing diameter portion 52 and the straight body portion 53. The raw material charging step S21 includes a seed crystal charging step and a gallium arsenide charging step. The raw material charging step S21 may further include a sealant placement step. As shown in FIG. 2 , in the seed crystal charging step, a seed crystal 8a made of a GaAs single crystal is charged into the hollow portion of the seed crystal accommodating portion 51 of the crucible 5. The seed crystal 8a can be charged into the seed crystal accommodating portion 51 by, for example, a known method. In the gallium arsenide charging step, a plurality of chunks made of polycrystalline GaAs are charged as chunk GaAs into the increasing diameter portion 52 and the straight body portion 53 of the crucible 5 and stacked. Furthermore, in the gallium arsenide charging step, the silicon concentration of the GaAs single crystal obtained by this manufacturing method is 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 A predetermined amount of silicon is added to the increased diameter portion 52 and the body portion 53 of the crucible 5 so as to satisfy the following: In the sealant placement step, a sealant known in the VB method (e.g., a solid sealant made of BO (boron oxide)) is preferably placed on the above-mentioned mass.
[0056] 2) Raw Material Melting Step S22 In the raw material melting step S22, the crucible 5 is heated with the heating element 7 to melt a portion of the seed crystal 8a and the bulk GaAs into a GaAs melt 82, and the GaAs melt 82 is brought into contact with the remainder of the seed crystal 8a. In this step, the seed crystal 8a and the GaAs melt 82 are brought into contact with each other in order to obtain a GaAs single crystal 81. This enables the GaAs single crystal 81 to grow on the remainder of the seed crystal 8a in the next step of this manufacturing method. Specifically, in the raw material melting step S22, the crucible 5 containing the seed crystal 8a, the bulk GaAs, and preferably a solid sealant therein is supported on the crucible holder 6. At this time, as described above, the upper region 521 of the increased diameter portion 52 of the crucible 5 is separated from the crucible holder 6, and the lower region 522 is in contact with the crucible holder 6. Thereafter, a current is supplied to the heating element 7 to heat the crucible 5. As a result, the mass melts into a GaAs melt 82. Next, a portion of the seed crystal 8a also melts, and the remainder of the seed crystal 8a comes into contact with the GaAs melt 82 at the interface. If a solid sealant is placed on the mass in the raw material charging step S21, it is preferable that the mass melts into the GaAs melt 82 and the sealant also melts into a liquid sealant (not shown in FIG. 4 ).
[0057] 3) GaAs Single Crystal Growth Step S23 The GaAs single crystal growth step S23 is a step of growing a GaAs single crystal 81 from the GaAs melt 82 on the remaining portion of the seed crystal 8a. In the GaAs single crystal growth step S23, for example, the crucible 5 is gradually lowered downward (toward the seed crystal accommodation portion 51) along its axis relative to the heating element 7, thereby forming a temperature gradient in the crucible 5 such that the temperature on the seed crystal 8a side is lower and the temperature on the GaAs melt 82 side is higher. This causes the GaAs melt 82 in contact with the seed crystal 8a to solidify, and a GaAs single crystal 81 is continuously grown from the GaAs melt 82 on the remaining portion of the seed crystal 8a. The speed at which the crucible 5 is lowered downward along its axis is not particularly limited, but is, for example, 1 to 5 mm / hour.
[0058] The GaAs single crystal growth step S23 is performed while controlling the thermal environment in the GaAs single crystal manufacturing apparatus based on the above-described structure in which the upper region 521 of the increased diameter portion 52 of the crucible 5 is separated from the crucible holder 6 and the lower region 522 is in contact with the crucible holder 6, and the structure of the crucible holder 6. Specifically, the heat flux in the upper region 521 from the inside of the crucible 5 toward the crucible holder 6 is based mainly on radiation. Furthermore, the heat flux in the lower region 522 from the inside of the crucible 5 toward the crucible holder 6 is based mainly on radiation and thermal conduction. As a result, the GaAs single crystal growth process S23 is carried out so as to satisfy the relationship q(A1) < q(A2), where q is the heat flux in the direction from inside the crucible 5 toward the crucible holder 6, A1 is the upper region 521, A2 is the lower region 522, q(A1) is the amount of the heat flux passing through the upper region 521, and q(A2) is the amount of the heat flux passing through the lower region 522.
[0059] In particular, to easily satisfy the relationship q(A1)<q(A2), it is preferable that increasing diameter portion 52 satisfies the following formula I, where S(A1) is the surface area of upper region 521 and S(A2) is the surface area of lower region 522: 0.2≦S(A2) / (S(A1)+S(A2))≦0.6 Formula I Furthermore, to easily satisfy the relationship q(A1)<q(A2), it is also preferable that upper region 521 faces crucible holder 6 in a direction perpendicular to the growth direction of GaAs single crystal 81.
[0060] In the GaAs single crystal growth step S23, the crucible 5 is subsequently pulled downward along its axis relative to the heating element 7, causing the interface between the GaAs single crystal 81 and the GaAs melt 82 to rise toward the liquid sealant, and the GaAs melt 82 to solidify. This makes it possible to grow the GaAs single crystal 81 upward along the axis of the crucible 5 in the GaAs single crystal growth step S23. The crystal growth of the GaAs single crystal 81 continues until solidification of the GaAs melt 82 remaining in the straight body portion 53 of the crucible 5 is completed. In this manner, an ingot of the GaAs single crystal 81 is obtained.
[0061] Here, the carrier concentration of the ingot of the GaAs single crystal 81 is 0.8×10 when the solidification rate is 0.3. 18 cm -3 1.5 x 10 18 cm -3 The carrier concentration of the ingot of the GaAs single crystal 81 is preferably 2.5×10 when the solidification rate is 0.85. 18 cm -3 3.5 x 10 18 cm -3 or less. In this specification, the term "solidification rate" refers to the ratio of the mass of a cylinder formed from the end of the ingot on the seed crystal side to the cut surface to the total mass of the ingot when the ingot is cut in a direction perpendicular to its growth direction to produce a cylinder. In other words, the term "solidification rate" refers to a parameter indicating the extent to which solidification has progressed accompanying the growth of the ingot during the GaAs single crystal growth step S23, in which solidification of GaAs melt 82 begins from the side in contact with seed crystal 8a and an ingot of GaAs single crystal 81 is grown. Therefore, a solidification rate of 0 indicates that the entire GaAs melt 82 is in a molten state, a solidification rate of 1 indicates that the entire GaAs melt 82 has solidified, and a solidification rate of 0.5 indicates that solidification, which progresses from the seed crystal 8a side, has progressed to 50 mass% of the entire GaAs melt 82. The method for measuring the carrier concentration of the GaAs single crystal and the GaAs single crystal substrate will be described later.
[0062] <Effects> According to the GaAs single crystal manufacturing method of this embodiment, in the GaAs single crystal obtaining step S20 (particularly the GaAs single crystal growing step S23), the GaAs single crystal 81 is grown while the thermal environment of the GaAs single crystal growth apparatus 10 is controlled. This suppresses the occurrence of thermal fluctuations within the GaAs single crystal 81 during growth, resulting in uniform heat distribution, minimizing thermal strain within the crystal even for large single crystals with diameters of approximately 8 inches. As a result, a GaAs single crystal is produced that has extremely small average values of dislocation density on its main surface with a relatively large off-angle, and is suitable for obtaining large-diameter GaAs single crystal substrates. Therefore, even when a semiconductor layer is formed on the main surface, semiconductor devices can be fabricated from the GaAs single crystal substrate with a high yield.
[0063] In the above manufacturing method, the growth direction of GaAs single crystal 81 is preferably normal to the circular plane forming the cylindrical surface of seed crystal 8a. That is, the growth direction of GaAs single crystal 81 is preferably normal to a plane tilted from the (100) plane of GaAs single crystal by an angle selected from the angular range of 4° to 20° toward any of the [01-1], [0-1-1], [0-11], and
[011] directions of the GaAs single crystal. Furthermore, the GaAs single crystal substrate according to this embodiment can be obtained by cutting the GaAs single crystal ingot, as described below, with a plane tilted from the (100) plane of GaAs single crystal by an angle selected from the angular range of 4° to 20° as the main surface. Here, the above cutting may be performed in a direction perpendicular to the growth direction of GaAs single crystal 81. As a result, the carrier concentration distribution becomes extremely uniform within the plane of the main surface of the GaAs single crystal substrate produced by the above manufacturing method. Note that if the growth direction of the GaAs single crystal 81 is set to a normal direction at an angle exceeding 20° from the (100) plane of the GaAs single crystal, it may not be possible to grow a GaAs single crystal having the desired low average dislocation density described above.
[0064] [Method for Manufacturing GaAs Single Crystal Substrate] <Step 3: Step S30 of Obtaining a GaAs Single Crystal Substrate> The method for manufacturing a gallium arsenide single crystal substrate (GaAs single crystal substrate) according to this embodiment is a method for manufacturing a GaAs single crystal substrate having a circular main surface. As shown in FIG. 1 , the manufacturing method includes a step of cutting the GaAs single crystal obtained by the GaAs single crystal manufacturing method into a disk shape and processing it to obtain a GaAs single crystal substrate (Step S30 of Obtaining a GaAs Single Crystal Substrate). Specifically, Step S30 of Obtaining a GaAs Single Crystal Substrate includes a cutting step of cutting the GaAs single crystal obtained by the GaAs single crystal manufacturing method into a disk shape to obtain a GaAs single crystal substrate precursor, and an outer periphery grinding step of processing the GaAs single crystal substrate precursor by grinding the outer periphery, etc., to obtain a GaAs single crystal substrate having a circular main surface. Step S30 of obtaining a GaAs single crystal substrate includes the following cutting step, outer periphery grinding step, and, if necessary, a polishing step described below, and these steps may be performed in this order.
[0065] The cutting step is a step of slicing the ingot made of GaAs single crystal 81 removed from the crucible 5 into wafers having a predetermined thickness in order to obtain a disk-shaped GaAs single crystal substrate precursor. Furthermore, the periphery grinding step is a step of grinding the periphery of the GaAs single crystal substrate precursor to obtain a GaAs single crystal substrate having a circular main surface. The cutting step and the periphery grinding step may use known cutting and periphery grinding methods. Furthermore, the polishing step is a step of mirror-finishing the main surface. For the polishing step, known polishing methods may be used.
[0066] <Effects> By carrying out the above steps, a GaAs single crystal substrate having a circular main surface is manufactured. According to the method for manufacturing a GaAs single crystal substrate of this embodiment, a GaAs single crystal substrate is manufactured from a low-dislocation or dislocation-free GaAs single crystal produced by the above-mentioned GaAs single crystal manufacturing method, thereby providing a GaAs single crystal substrate that can improve device yield.
[0067] [Gallium Arsenide Single Crystal Substrate] FIG. 4 is a plan view illustrating the main surface of a gallium arsenide single crystal substrate according to this embodiment and a measurement location (measurement region) for measuring the carrier concentration in the substrate. As shown in FIG. 4, the gallium arsenide single crystal substrate (GaAs single crystal substrate) 1 according to this embodiment is a GaAs single crystal substrate having a circular main surface 11. The diameter of the GaAs single crystal substrate 1 is 200 mm or more and 210 mm or less. The main surface 11 is a plane having an off-angle of 4° or more and 20° or less from the (100) plane of the GaAs single crystal. The off-axis direction of the plane having the off-axis angle is any of the [01-1], [0-1-1], [0-11], and
[011] directions. The average dislocation density of the main surface 11 is 0 cm -2 3.77cm or more -2 In a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel on the main surface 11 without overlapping each other, the ratio of the number of squares without dislocations to the total number of squares constituting the lattice is 98.04% or more. The GaAs single crystal substrate 1 contains silicon. The concentration of the silicon is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the GaAs single crystal substrate 1 is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 The GaAs single crystal substrate 1 having these characteristics has an extremely small average dislocation density on the main surface 11 having a relatively large off-angle. This makes it possible to obtain semiconductor devices with a high yield even when a semiconductor layer is formed on the main surface 11.
[0068] The reason why the GaAs single crystal substrate 1 can improve device yield is as follows. Specifically, the GaAs single crystal substrate 1 is obtained from a GaAs single crystal produced, for example, by the GaAs single crystal manufacturing method described above, or preferably produced by the GaAs single crystal substrate manufacturing method described above. Therefore, even if the GaAs single crystal substrate 1 is a large single crystal with a diameter of approximately 8 inches, as described above, it can be made of a low-dislocation or dislocation-free GaAs single crystal produced so as to minimize thermal strain within the crystal. Additionally, the GaAs single crystal substrate 1 is preferably made of a GaAs single crystal grown from a seed crystal whose cylindrical surface is inclined at an angle selected from the range of 4° to 20° from the (100) plane of the GaAs single crystal. GaAs single crystal substrate 1 with these characteristics has an extremely low average in-plane dislocation density on the main surface 11 and an extremely uniform carrier concentration distribution. This prevents the GaAs single crystal substrate 1 from cracking or chipping during processing. Furthermore, many semiconductor devices in which a semiconductor layer is formed on the GaAs single crystal substrate 1 can meet predetermined performance requirements. From the above, it is believed that semiconductor devices can be fabricated with a good yield even when a semiconductor layer is formed on the main surface of a GaAs single crystal substrate 1 that is large in diameter and has a relatively large off-angle (specifically, 4° to 20°).
[0069] <Major Surface> As described above, the GaAs single crystal substrate 1 has a circular major surface 11. In this specification, the term "circular shape" used to describe the shape of the major surface includes not only a geometrically circular shape but also a shape in which the major surface does not form a geometrically circular shape due to the presence of at least one of a notch, an orientation flat (hereinafter also referred to as "OF"), and an index flat (hereinafter also referred to as "IF") on the periphery of the major surface. Here, "a shape in which the major surface does not form a geometrically circular shape" refers to a shape in which, among line segments extending from any point on the periphery of the major surface to the center of the main surface, the lengths of line segments extending from any point on the notch, OF, or IF to the center of the main surface are shorter. Furthermore, "a shape in which the main surface does not form a geometrically circular shape" also includes a shape in which the lengths of all line segments extending from any point on the periphery of the main surface to the center of the main surface are not necessarily the same due to the shape of the GaAs single crystal used as the raw material for the GaAs single crystal substrate. In this case, the center of the main surface refers to the position of the center of gravity, and the diameter of the GaAs single crystal substrate refers to the length of the longest line segment extending from any point on the periphery of the GaAs single crystal substrate, passing through the center of the main surface, to another point on the periphery.
[0070] The surface roughness of the main surface 11 is preferably 0.3 nm or less in terms of surface roughness Sa as defined in JIS B 0681-2:2018. This allows the main surface 11 of the GaAs single crystal substrate 1 to have a mirror-like surface, which can contribute to improving device characteristics. The surface roughness Sa of the main surface 11 is more preferably 0.2 nm or less, and even more preferably 0.1 nm or less. The surface roughness Sa of the main surface 11 is measured using an intermittent contact mode of a known atomic force microscope (e.g., a product name "Dimension 3000" manufactured by Bruker). More specifically, the surface roughness Sa of the main surface 11 is measured by using the atomic force microscope to correspond the 512 × 512 pixel size for calculating the surface roughness Sa to any square region on the main surface 11 measuring 0.2 μm in length and 0.2 μm in width. This allows the surface roughness Sa of that region to be determined.
[0071] The surface roughness Sa does not need to be 0.3 nm or less in all of the regions measured on the main surface 11, but it is sufficient that the surface roughness Sa measured in at least one of the multiple regions set on the main surface 11 of the GaAs single crystal substrate 1 is 0.3 nm or less. As the regions on the main surface 11 for measuring the surface roughness Sa, for example, a total of five regions can be selected, with the center O of the GaAs single crystal substrate 1 and any four points (not shown) on a circumference 5 mm inward from the outer edge of the GaAs single crystal substrate 1 as the centers of the measurement range.
[0072] (Off Angle and Off Direction) The main surface 11 is a plane having an off angle of 4° or more and 20° or less from the (100) plane of the GaAs single crystal. The off direction of the plane having the off angle is any of the [01-1], [0-1-1], [0-11], and
[011] directions. In other words, the [01-1], [0-1-1], [0-11], and
[011] directions of the GaAs single crystal are four directions equivalent to the [01-1] direction of the GaAs single crystal, and are crystallographically represented as the <110> direction.
[0073] The main surface 11 is preferably a plane having an off-angle of 6° to 15° from the (100) plane of the GaAs single crystal. In this case, the GaAs single crystal substrate 1 can further improve device yield. A GaAs single crystal substrate having an off-angle of the main surface of less than 4° from the (100) plane of the GaAs single crystal may be able to achieve the above-described effects of the present disclosure even by using other means. A GaAs single crystal substrate having an off-angle of the main surface of more than 20° from the (100) plane of the GaAs single crystal may have difficulty achieving the above-described effects of the present disclosure as long as it is based on the GaAs single crystal manufacturing method according to the present embodiment.
[0074] In this disclosure, the crystal plane of main surface 11 is assumed to have an accuracy error of ±0.5°. For example, when it is said that main surface 11 is "a plane having an off-angle of 6° from the (100) plane of GaAs single crystal," this means that main surface 11 may be a plane having an off-angle of 5.5° to 6.5° from the (100) plane. The off-angle from the (100) plane of main surface 11 of GaAs single crystal substrate 1 is measured using a known crystal orientation measurement device (for example, product name (product number) "2991G2" manufactured by Rigaku Corporation).
[0075] <Diameter> The diameter of the GaAs single crystal substrate 1 is 200 mm or more and 210 mm or less. This allows for an improved device yield in a large-diameter GaAs single crystal substrate 1 having a diameter of 200 mm or more and 210 mm or less. Here, the diameter of the GaAs single crystal substrate 1 is determined based on the circular shape before the OF, IF, etc. are formed, even if the main surface does not have a geometrically circular shape due to the influence of OF, IF, etc. Furthermore, as described above, the diameter of the GaAs single crystal substrate 1 is measured using a known outer diameter measuring instrument such as a vernier caliper.
[0076] <Dislocation Density> The average dislocation density of the main surface 11 is 0 cm -2 3.77cm or more -2 or less. Furthermore, in a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel without overlapping on the main surface 11, the ratio of the number of squares in which dislocations are not present to the total number of squares constituting the lattice (hereinafter also referred to as the "dislocation-free rate") is 98.04% or more. The average dislocation density of the main surface 11 and the dislocation-free rate are specifically determined by counting the number of corrosion pits (hereinafter also referred to as "etch pits") that appear on the main surface 11 after etching the main surface 11 with molten potassium hydroxide. In other words, the GaAs single crystal substrate 1 according to this embodiment has an average number of etch pits of 0 cm -2 3.77cm or more -2or less, and the dislocation-free rate is 98.04% or more. The upper limit of the dislocation-free rate is 100%. Although etch pits are not academically synonymous with dislocations, they are considered to be equivalent to dislocations in this technical field.
[0077] (Method of calculating the number of etch pits) Figure 5 is an explanatory diagram illustrating a state in which a virtual lattice is set on the main surface of the gallium arsenide single crystal substrate shown in Figure 4, in which squares with sides of 2 mm are laid out in parallel so as to maximize the number of squares without overlapping each other. Hereinafter, a specific method of calculating the number of etch pits will be described with reference to Figure 5.
[0078] First, the main surface 11 of the GaAs single crystal substrate 1 is immersed in molten potassium hydroxide at 500°C for 10 minutes. The GaAs single crystal substrate 1 is then removed from the molten potassium hydroxide. A known method is used to immerse the GaAs single crystal substrate 1. Next, as shown in FIG. 5 , a virtual lattice G is established on the main surface 11 of the GaAs single crystal substrate 1 by arranging as many 2 mm squares as possible in parallel without overlapping each other. Each square constituting the virtual lattice G is then observed with a known optical microscope (e.g., the trade name "ECLIPSE (registered trademark) LV150N" manufactured by Nikon Corporation), and the number of etch pits appearing in one field of view of the optical microscope is counted. In this case, the observation with the optical microscope is performed at a magnification of 50x. As a result, one field of view of the optical microscope is 2 mm x 2 mm, corresponding to the size of the square. Therefore, the number of etch pits per field of view is calculated as the number of dislocations per square constituting the virtual lattice G. In addition, the area is 100 μm 2 Only etch pits that are confirmed to be equal to or greater than this shall be counted in the number of etch pits.
[0079] Finally, the etch pits counted for each square constituting the virtual lattice G were 1 cm 2The dislocation density for each square is then calculated. The sum of the dislocation densities is then divided by the number of squares to determine the average dislocation density for the main surface. The dislocation-free rate is then calculated by determining the ratio of the number of squares that are free of dislocations to the total number of squares that make up the virtual lattice G. In this specification, the phrase "laying the squares so as to maximize the number of parallel squares without overlapping each other" on the main surface 11 means that when the squares are laid out parallel to the main surface 11 without overlapping each other, and the squares overlap the periphery of the main surface 11 and its outside, the squares are excluded from the elements that make up the virtual lattice G. This is because the number of dislocations in the region near the periphery, including the periphery of the main surface 11 of the GaAs single crystal substrate 1, varies greatly from substrate to substrate, and is typically not used as a material for semiconductor devices.
[0080] The average dislocation density of the main surface 11 is 0 cm -2 3cm or more -2 Preferably, it is equal to or less than 0 cm -2 2.88cm or more -2 The dislocation-free rate is preferably 99.0% or more, and more preferably 99.45% or more, which makes it possible to provide GaAs single crystal substrates with improved device yields.
[0081] <Dopant> The GaAs single crystal substrate 1 according to this embodiment contains silicon (Si). The atomic concentration of the Si is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The atomic concentration of Si is 1.4×10 18 cm -3 Above 1.0 x 10 19 cm -3 Preferably, it is 1.8×10 or less. 18 cm -3 Above 5.0 x 10 18 cm -3In this case, the GaAs single crystal substrate 1 is given n-type (electron-donating) conductivity and the effect of reducing dislocation density is obtained.
[0082] The GaAs single crystal substrate 1 preferably contains boron (B). In this case, the atomic concentration of B is 1.0×10 18 cm -3 Above 1.0 x 10 19 cm -3 The atomic concentration of B is preferably 1.5×10 or less. 18 cm -3 Above 5.0 x 10 18 cm -3 or less. In this case, the GaAs single crystal substrate 1 has fewer dislocations. The atomic concentrations of Si and B in the GaAs single crystal substrate 1 are both measured using glow discharge mass spectrometry (GDMS). When the GaAs single crystal substrate 1 is obtained through the above-mentioned GaAs single crystal manufacturing method, the B is produced by a reaction between silicon added to the raw material gallium arsenide and boron oxide, which functions as a sealant. As a result, the B may be contained in the GaAs single crystal substrate 1.
[0083] <Carrier concentration> The carrier concentration of the GaAs single crystal substrate 1 is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 The carrier concentration is 1.2×10 18 cm -3 3.8 x 10 18 cm -3 Preferably, it is 1.4 × 10 or less. 18 cm -3 3.6 x 10 18 cm -3or less. In this case, the GaAs single crystal substrate 1 is given n-type (electron-donating) conductivity. The carrier concentration of the GaAs single crystal substrate 1 is determined by performing Hall measurement using the Van der Pauw method on a rectangular slice obtained by cleaving the GaAs single crystal substrate 1 at room temperature of 25°C. The rectangular slice has dimensions of, for example, 4 mm length x 4 mm width x 600 μm thickness. Hereinafter, a method for measuring the carrier concentration of the GaAs single crystal substrate 1 will be described with reference to FIGS. 4 and 6. FIG. 6 is an explanatory diagram illustrating a Hall measurement sample prepared using the gallium arsenide single crystal substrate shown in FIG. 4.
[0084] First, a GaAs single crystal substrate 1 to be measured is prepared from a GaAs single crystal obtained according to the GaAs single crystal manufacturing method described above. Next, as shown in FIG. 4 , four intersections are defined for this GaAs single crystal substrate 1, where the circumference 5 mm inward from its outer edge intersects with half lines extending from the center O of the main surface 11 of the GaAs single crystal substrate 1 in the [01-1], [0-1-1], [0-11], and
[011] directions of the GaAs single crystal. Furthermore, rectangular slices 11a measuring 4 mm long, 4 mm wide, and 600 μm thick are prepared, each centered on one of the four intersections. Next, as shown in FIG. 6 , electrodes 21 made of an alloy containing gold, nickel, and germanium are formed on the four corners of the rectangular slice 11a, thereby obtaining four Hall measurement samples. The shape of the electrodes 21 is not limited to the rectangular shape shown in the figure, but may be sector-shaped or circular. The carrier concentration is determined by applying Hall measurement by the Van der Pauw method to four Hall measurement samples equipped with such electrodes 21 in an atmosphere at 25°C. In this specification, the term "carrier concentration of the GaAs single crystal substrate" refers to the average value of the carrier concentrations obtained from the four Hall measurement samples. Furthermore, the value obtained by subtracting the minimum value from the maximum value of the carrier concentrations obtained from the four Hall measurement samples and dividing the result by the average value is defined as the second carrier concentration ([max - min] / average) of the GaAs single crystal substrate. The second carrier concentration represents the variation in carrier concentration at the main surface 11 of the GaAs single crystal substrate 1, and the smaller this value, the more uniform the carrier concentration distribution at the main surface 11 is evaluated to be.
[0085] [Gallium Arsenide Single Crystal] FIG. 7 is a perspective view schematically illustrating a gallium arsenide single crystal according to this embodiment. As shown in FIG. 7, a gallium arsenide single crystal (GaAs single crystal) 100 according to this embodiment is a GaAs single crystal having a cylindrical shape. The diameter of a circular face 110 forming the surface of the GaAs single crystal 100 is 200 mm or more and 210 mm or less. The circular face 110 is a face having an off-angle of 4° or more and 20° or less from the (100) face of the GaAs single crystal. The off-direction of the face having the off-angle is any one of the [01-1], [0-1-1], [0-11], and
[011] directions. The average dislocation density in the circular face 110 is 0 cm -2 3.77cm or more -2 In a virtual lattice formed by arranging as many squares, each 2 mm on a side, as possible in parallel without overlapping on a circular surface 110, the ratio of the number of squares without dislocations to the total number of squares constituting the lattice is 98.04% or more. The GaAs single crystal 100 contains silicon. The concentration of the silicon is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the GaAs single crystal 100 is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 The GaAs single crystal 100 having these characteristics has extremely small thermal strain inside the crystal. Therefore, the GaAs single crystal 100 has an extremely small average value of dislocation density on the main surface having a relatively large off-angle, and is provided as a material for producing large-diameter GaAs single crystal substrates.
[0086] In particular, in the GaAs single crystal 100, the axial length of the cylindrical shape is preferably 40 mm or more and 110 mm or less. When the axial length of the cylindrical shape is 40 mm or more, a larger number of GaAs single crystal substrates with high device yields can be provided. When the axial length of the cylindrical shape is 110 mm or less, GaAs single crystal substrates with little variation in carrier concentration between product lots can be provided.
[0087] The reason why the GaAs single crystal 100 can provide a GaAs single crystal substrate with improved device yield is the same as the reason why the GaAs single crystal substrate 1 described above can improve device yield, so redundant explanation will not be repeated.
[0088] <Circular Surface Forming the Surface of the GaAs Single Crystal> The GaAs single crystal 100 has a cylindrical shape. This allows the GaAs single crystal 100 to have a circular surface 110 forming its surface. In this specification, the shape of the circular surface 110 includes not only a geometrically circular shape but also a shape that does not form a geometrically circular shape. Here, the "shape that does not form a geometrically circular shape" of the circular surface 110 refers to a shape in which the lengths of all line segments extending from any point on the periphery of the circular surface 110 to the center of the circular surface 110 are not necessarily the same. In this case, the center of the circular surface 110 is the position of the center of gravity. The diameter of the circular surface 110 is the length of the longest line segment extending from any point on the periphery of the circular surface 110, passing through the center of the circular surface 110, and extending to another point on the periphery.
[0089] (Off Angle and Off Direction) The circular surface 110 is a surface having an off angle of 4° or more and 20° or less from the (100) plane of the GaAs single crystal. The off direction of the surface having the off angle is any of the [01-1], [0-1-1], [0-11], and
[011] directions. The characteristics of the off angle and off direction of the circular surface 110 in the GaAs single crystal 100 are the same as the characteristics of the off angle and off direction of the "major surface 11" of the GaAs single crystal substrate 1 described above, and therefore will not be described again. The preferred range of the off angle of the circular surface 110 is also the same as the preferred range of the off angle of the major surface 11. In the present disclosure, the crystal plane of the circular surface 110 has an accuracy error of ±0.5°, similar to the major surface 11 of the GaAs single crystal substrate 1.
[0090] <Diameter> The diameter of the circular surface 110 that forms the surface of the GaAs single crystal 100 is 200 mm or more and 210 mm or less. As described above, the diameter of the circular surface 110 that forms the surface of the GaAs single crystal 100 is measured using a known outer diameter measuring device such as a vernier caliper.
[0091] <Dislocation Density> The average value of the dislocation density of the circular surface 110 is 0 cm -2 3.77cm or more -2 The average dislocation density and the dislocation-free rate of the circular surface 110 are the same as those of the main surface 11 of the GaAs single crystal substrate 1, and therefore, a redundant description will not be repeated. The preferred ranges of the average dislocation density and the dislocation-free rate of the circular surface 110 are also the same as those of the main surface 11 of the GaAs single crystal substrate 1. The preferred ranges of the average dislocation density and the dislocation-free rate of the circular surface 110 are also the same as those of the main surface 11. The method for calculating the number of etch pits on the circular surface 110 is the same as that for the main surface 11. Therefore, the number of etch pits on circular surface 110 can be determined by replacing the term "main surface 11" used in the explanation of the method for calculating the number of etch pits on main surface 11 with the term "circular surface 110" and applying the above calculation method.
[0092] <Dopant> The GaAs single crystal 100 contains silicon (Si). The atomic concentration of Si is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The characteristics and effects of the dopant in GaAs single crystal 100 are the same as those of the dopant in GaAs single crystal substrate 1 described above, and therefore will not be described again. It should be noted that GaAs single crystal 100 preferably contains boron (B) as a dopant, and the range of the B content (atomic concentration) in this case is also the same as that of GaAs single crystal substrate 1. The dopant concentration in GaAs single crystal 100 is also determined by the same measurement method as that for GaAs single crystal substrate 1.
[0093] <Carrier concentration> The carrier concentration of the GaAs single crystal 100 is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 The characteristics and effects of the carrier concentration of GaAs single crystal 100 are the same as those of GaAs single crystal substrate 1 described above, and therefore redundant description will not be repeated. The carrier concentration and second carrier concentration of GaAs single crystal 100 can also be determined by the same measurement method as that of GaAs single crystal substrate 1. Therefore, the carrier concentration and second carrier concentration of GaAs single crystal 100 can be determined by applying the above measurement method, substituting the term "circular surface 110" for the term "major surface 11" used in the description of the method for measuring the carrier concentration and second carrier concentration of GaAs single crystal substrate 1.
[0094] In particular, the carrier concentration at one end of the GaAs single crystal 100 is 0.8×10 18 cm -3 1.5 x 10 18 cm -3 The carrier concentration at the other end of the GaAs single crystal 100 is preferably 1.5×10 or less. 18 cm -3 3.5 x 10 18 cm -3 In this case, the GaAs single crystal 100 is appropriately given n-type (electron-donating) conductivity characteristics.
[0095] Furthermore, the carrier concentration of the GaAs single crystal 100 is 0.8×10 when the solidification rate is 0.3. 18 cm -3 1.5 x 10 18 cm -3 The carrier concentration of the GaAs single crystal 100 is preferably 2.5×10 or less when the solidification rate is 0.85. 18 cm -3 3.5 x 10 18 cm -3or less. In this case, good epitaxial growth is achieved on a GaAs single crystal substrate obtained from GaAs single crystal 100. As used herein, the term "solidification rate" refers to the ratio of the mass of a cylindrical body formed from the seed crystal end of GaAs single crystal 100 to the total mass of GaAs single crystal 100, when GaAs single crystal 100 is cut in a direction perpendicular to its growth direction to produce the cylindrical body.
[0096] The present disclosure will be described in more detail below with reference to examples, but the present disclosure is not limited to these examples. In these examples, the inventors used a GaAs single crystal growth apparatus such as that shown in FIG. 2 to produce GaAs single crystals for each sample by the vertical Bridgeman method, and then obtained GaAs single crystal substrates from the GaAs single crystals for each sample. In the following description, samples 11 to 18 and samples 21 to 25 are examples, and samples 101 to 103 and samples 201 to 203 are comparative examples.
[0097] First Example [Manufacturing of GaAs Single Crystal Substrates] GaAs single crystal substrates of samples 11 to 18 and samples 101 to 103, each having a diameter of 205 mm, were manufactured in the following manner.
[0098] <Sample 101> (Step 1: Preparation Step S10) A known GaAs single crystal growth apparatus employing the vertical Bridgman method was prepared, and a seed crystal and bulk GaAs consisting of GaAs polycrystals were produced by known methods. The GaAs single crystal growth apparatus was configured such that the entire surface of the increasing diameter section facing the crucible holder was in contact with the crucible holder. Therefore, the heat flux from the inside of the crucible toward the crucible holder in the increasing diameter section of the GaAs single crystal growth apparatus was primarily composed of radiation and thermal conduction throughout the entire section. Therefore, the entire increasing diameter section was considered to be the lower region. In this case, the value of S(A2) / (S(A1)+S(A2)) in the increasing diameter section, as shown in Equation I, was 1. The inner diameter of the straight body of the GaAs single crystal growth apparatus was 210 mm. The seed crystal was cylindrical, and the circular crystal plane forming the surface of the cylindrical shape was a plane having an off-angle of 4° in the
[011] direction from the (100) plane.
[0099] (Second Step: Step S20 of Obtaining GaAs Single Crystals) 1) Raw Material Loading Step S21 Using a known method, a seed crystal was loaded into the hollow portion of the seed crystal accommodating portion of a crucible provided in a GaAs single crystal growth apparatus. Furthermore, multiple chunks of polycrystalline GaAs were loaded into the diameter-increasing portion and the body portion of the crucible and stacked. A trace amount of silicon (Si) was also added. Furthermore, a sealant made of BO was placed on the chunks of GaAs.
[0100] 2) Raw Material Melting Step S22: Current was supplied to the heating element to heat the crucible, thereby converting the sealant into a liquid sealant and converting the bulk GaAs charged into the diameter-increasing portion and the barrel portion into a GaAs melt. Furthermore, the heating element for heating the seed crystal receiving portion was controlled to melt a portion of the seed crystal received in the cavity. This brought the remainder of the seed crystal into contact with the GaAs melt.
[0101] 3) GaAs Single Crystal Growth Step S23: The output of the heating element for heating the crucible was controlled, and the crucible was gradually lowered (toward the seed crystal housing portion) along its axis relative to the heating element, creating a temperature gradient in the crucible such that the temperature on the seed crystal side was lower and the temperature on the GaAs melt side was higher. This resulted in continuous crystal growth of a GaAs single crystal from the GaAs melt on the remaining portion of the seed crystal. The speed at which the crucible was lowered along its axis was 2 mm / hour.
[0102] In the GaAs single crystal growth step S23, the output of the heating element for heating the crucible was controlled, and the crucible was pulled downward along its axis relative to the heating element, solidifying the GaAs melt, thereby growing a GaAs single crystal upward along the axis of the crucible. Thereafter, crystal growth of the GaAs single crystal continued until solidification of the GaAs melt remaining in the barrel of the crucible was completed, thereby obtaining a GaAs single crystal ingot.
[0103] In the preparation of the GaAs single crystal substrate of sample 101, the entire surface of the enlarged diameter portion facing the crucible holder is in contact with the crucible holder, and therefore the entire enlarged diameter portion is considered to be the lower region. In this case, the heat flux in the enlarged diameter portion from the inside of the crucible toward the crucible holder is mainly composed of radiation and thermal conduction throughout the entire region. Therefore, in the GaAs single crystal growth step S23, it was difficult to sufficiently suppress the occurrence of thermal fluctuations within the growing GaAs single crystal 81.
[0104] (Third Step: Step S30 of Obtaining a GaAs Single Crystal Substrate) Using a known cutting method and a known outer peripheral grinding method, a GaAs single crystal substrate having a predetermined thickness and a circular main surface was obtained from the GaAs single crystal ingot removed from the crucible. The main surface of the GaAs single crystal substrate was then polished by a known method to obtain a mirror finish. Thus, the GaAs single crystal substrate of sample 101 was obtained. The crystal plane of the main surface of the GaAs single crystal substrate had an off-angle of 4° from the (100) plane in the
[011] direction. Furthermore, the surface roughness Sa of the main surface of the GaAs single crystal substrate measured by the above-mentioned measurement method was 0.15 nm.
[0105] <Sample 102> In preparation step S10, a GaAs single crystal substrate of sample 102 was obtained in the same manner as sample 101, except that a cylindrical seed crystal was prepared in which the circular crystal plane forming the surface of the cylindrical shape was a plane having an off-angle of 6° in the
[011] direction from the (100) plane. Therefore, in the GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of sample 102, the value of S(A2) / (S(A1)+S(A2)) shown in formula I above was 1. Furthermore, in GaAs single crystal growth step S23, the entire diameter-increasing portion was the lower region, and the heat flux in the diameter-increasing portion from the inside of the crucible toward the crucible holder was mainly constituted by radiation and thermal conduction, making it difficult to sufficiently suppress the occurrence of thermal fluctuations inside GaAs single crystal 81 during growth. The crystal plane of the main surface of the GaAs single crystal substrate of sample 102 was a plane having an off-angle of 6° in the
[011] direction from the (100) plane. The surface roughness Sa of the main surface of the GaAs single crystal substrate measured by the above-mentioned measuring method was 0.15 nm.
[0106] <Sample 11> In preparation step S10, a GaAs single crystal growth apparatus employing the vertical Bridgeman method, as shown in Figure 2, was prepared, and a cylindrical seed crystal was prepared, the growth surface of which was a plane oriented at an off-angle of 4° in the
[011] direction from the (100) plane of the GaAs single crystal. The GaAs single crystal substrate of Sample 11 was obtained in the same manner as Sample 101, except that: (1) a GaAs single crystal growth apparatus was used; (2) a GaAs single crystal growth apparatus; (3) a GaAs single crystal substrate; (4) a GaAs single crystal substrate; (5) a GaAs single crystal substrate; (6) a GaAs single crystal substrate; (7) a GaAs single crystal substrate; (8) a GaAs single crystal substrate; (9) a GaAs single crystal substrate; (10) a GaAs single crystal substrate; (11) a GaAs single crystal substrate; (12) a GaAs single crystal substrate; (13) a GaAs single crystal substrate; (14) a GaAs single crystal substrate; (15) a GaAs single crystal substrate; (16) a GaAs single crystal substrate; (17) a GaAs single crystal substrate; (18) a GaAs single crystal substrate; (19) a GaAs single crystal substrate; (20) a GaAs single crystal substrate; (21) a GaAs single crystal substrate; (22) a GaAs single crystal substrate; (23) a GaAs single crystal substrate; (24) a GaAs single crystal substrate; (25) a GaAs single crystal substrate; (26) a GaAs single crystal substrate; (27) a GaAs single crystal substrate; (28) a GaAs single crystal substrate; (29) a GaAs single crystal substrate; (30) a GaAs single crystal substrate; (31) a GaAs single crystal substrate; (32) a GaAs single crystal substrate; (33) a GaAs single crystal substrate; (34) a GaAs single crystal substrate; (35) a GaAs single crystal substrate; (36) a GaAs single crystal substrate; (3 The crystal plane of the main surface of the GaAs single crystal substrate of Sample 11 was a plane having an off-angle of 4° in the
[011] direction from the (100) plane. The surface roughness Sa of the main surface of the GaAs single crystal substrate measured by the above-mentioned measuring method was 0.15 nm.
[0107] <Samples 12 to 18, and Sample 103> In preparation step S10, GaAs single crystal substrates of Samples 12 to 18, and Sample 103 were obtained in the same manner as Sample 11, except that a cylindrical seed crystal was prepared in which the circular crystal plane forming the surface of the cylindrical shape was tilted at an off-angle of 6 to 22 degrees from the (100) plane in the
[011] direction, as shown in Table 1 below. The crystal plane of the main surface of the GaAs single crystal substrate of Samples 12 to 18, and Sample 103 was a plane having an off-angle of 6 to 22 degrees from the (100) plane in the
[011] direction, as shown in Table 1 below. The surface roughness Sa of the main surface of the GaAs single crystal substrate, measured by the above-mentioned measurement method, was 0.15 nm.
[0108] Here, samples 12 and 13 are GaAs single crystal substrates obtained from the same GaAs single crystal ingot with an off-angle of 6°. However, sample 12 is a GaAs single crystal substrate obtained from a portion of the ingot where the solidification rate was 0.27, while sample 13 is a GaAs single crystal substrate obtained from a portion of the ingot where the solidification rate was 0.89. Samples 16 and 17 are GaAs single crystal substrates obtained from the same GaAs single crystal ingot with an off-angle of 15°. However, sample 16 is a GaAs single crystal substrate obtained from a portion of the ingot where the solidification rate was 0.27, while sample 17 is a GaAs single crystal substrate obtained from a portion of the ingot where the solidification rate was 0.89.
[0109] <Characteristics Evaluation> The above-described measurement method or calculation method was performed on the GaAs single crystal substrates of Samples 11 to 18 and Samples 101 to 103, and the silicon atomic concentration, carrier concentration, second carrier concentration, boron atomic concentration, average dislocation density, and dislocation-free rate were determined for each sample. The results are shown in Table 1. Table 1 also shows the off-angle of the main surface of the GaAs single crystal substrate of each sample, the structure of the increased diameter portion (presence or absence of an upper region and a lower region), the value of S(A2) / (S(A1)+S(A2)) shown in the above formula I, and the like.
[0110] <Device Yield> VCSELs were fabricated using the GaAs single crystal substrates of Samples 11 to 18 and Samples 101 to 103 according to the method disclosed in JP 2008-283137 A. In this case, the device yield (%) was calculated by multiplying the processing yield, which indicates the percentage of VCSEL-formed wafers containing multiple VCSEL portions obtained from the GaAs single crystal substrates without cracks, chips, or other defects occurring during processing, by the performance yield, which indicates the percentage of VCSELs obtained from the wafers that met the required performance. The "performance yield" was evaluated using the following accelerated degradation test. The "VCSEL portion" refers to the device-like portion on the VCSEL-formed wafer that can function as a VCSEL after being divided and packaged. The VCSEL portions were divided into VCSELs measuring 500 μm long x 500 μm wide.
[0111] First, before conducting the accelerated degradation test, an initial characteristic evaluation was performed on each VCSEL portion in the VCSEL-formed wafer fabricated for each sample in the on-wafer state. In the initial characteristic evaluation, VCSEL portions with an optical output of 4 mW or more at an operating current of 9 mA were determined to be non-defective. Furthermore, VCSEL portions with an optical output of less than 4 mW at an operating current of 9 mA were marked as defective on the wafer. Next, the wafer was divided into chips. Next, 40 non-defective chips (i.e., unmarked chips) were randomly selected from the chips and mounted to obtain VCSELs. Furthermore, an accelerated degradation test was performed on the VCSELs by applying an applied current of 18 mA at an ambient temperature of 80°C for 100 hours. After that, each VCSEL was returned to room temperature, and its optical output at an operating current of 9 mA was evaluated. In the above evaluation, VCSELs whose optical output had decreased by 10% or less compared to before the accelerated aging test (i.e., optical output of 3.6 mW or more) were considered to be good products, and the ratio of the number of good products to the 40 samples was considered to be the performance yield. The results are shown in Table 1. In Table 1, samples whose element yield was 90% or more were rated A, samples whose element yield was 80% or more but less than 90% were rated B, and samples whose element yield was less than 80% were rated C.
[0112]
[0113] <Discussion> In the GaAs single crystal substrates of Samples 11 to 18, the off-angle of the main surface is 4 to 20°, and the average dislocation density of the main surface is 0 cm -2 3.77cm or more -2 The dislocation-free rate was 98.04% or more. Furthermore, the silicon atomic concentration was 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3Furthermore, the device yield for these GaAs single crystal substrates was 89.8% or more, and was judged to be A or B. In contrast, the GaAs single crystal substrates of samples 101 and 102 had an off-angle of 4 to 6° on their main surfaces, but the average dislocation density on the surface was 3.77 cm -2 The dislocation-free rate exceeded 98.04%, and the dislocation-free rate was less than 98.04%. The GaAs single crystal substrates of samples 101 and 102 were produced using a GaAs single crystal manufacturing apparatus with a structure in which the entire surface of the diameter-increasing portion was in contact with the crucible holder. In this case, the device yield for these GaAs single crystal substrates was less than 80%, and was judged to be C. The GaAs single crystal substrate of sample 103 had an off-angle of 22° on its main surface, and the average dislocation density on the main surface was 3.77 cm -2 In this case, the device yield of the GaAs single crystal substrate of sample 103 was less than 80%, and was judged as C.
[0114] Second Example [Fabrication of GaAs Single Crystal Substrates] GaAs single crystal substrates of samples 21 to 25 and samples 201 to 203, each having a diameter of 205 mm, were fabricated in the following manner.
[0115] <Sample 201> The GaAs single crystal substrate of the above-mentioned sample 102 was obtained as the GaAs single crystal substrate of the sample 201.
[0116] <Sample 202> In preparation step S10, a GaAs single crystal growth apparatus was prepared, the diameter-increasing section of which consisted of an upper region and a lower region, with the upper region separated from the crucible holder and the lower region in contact with the crucible holder. The value of S(A2) / (S(A1)+S(A2)) in the diameter-increasing section of the crucible, as shown in formula I above, was 0.1. Otherwise, the GaAs single crystal substrate of sample 202 was obtained in the same manner as sample 12. The crystal plane of the main surface of the GaAs single crystal substrate of sample 202 was a plane with an off-angle of 6° from the (100) plane in the
[011] direction. Furthermore, the surface roughness Sa of the main surface of the GaAs single crystal substrate, as measured by the above-described measurement method, was 0.15 nm.
[0117] <Samples 21 to 23, Sample 25, and Sample 203> In preparation step S10, GaAs single crystal substrates of Samples 21 to 23, Sample 25, and Sample 203 were obtained in the same manner as Sample 202, except that a GaAs single crystal growth apparatus having an increased diameter portion structure as described below was prepared. The GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of Sample 21 had a value of S(A2) / (S(A1)+S(A2)) shown in Formula I above at the increased diameter portion of the crucible of 0.2. The GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of Sample 22 had a value of S(A2) / (S(A1)+S(A2)) shown in Formula I above at the increased diameter portion of the crucible of 0.3. The GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of sample 23 had a value of S(A2) / (S(A1)+S(A2)) shown in formula I above at the increased diameter portion of the crucible of 0.4. The GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of sample 25 had a value of S(A2) / (S(A1)+S(A2)) shown in formula I above at the increased diameter portion of the crucible of 0.6. The GaAs single crystal growth apparatus used to produce the GaAs single crystal substrate of sample 203 had a value of S(A2) / (S(A1)+S(A2)) shown in formula I above at the increased diameter portion of the crucible of 0.8.
[0118] <Sample 24> The GaAs single crystal substrate of Sample 12 described above was obtained as the GaAs single crystal substrate of Sample 24.
[0119] <Characteristics Evaluation> The above-described measurement method or calculation method was performed on the GaAs single crystal substrates of Samples 21 to 25 and Samples 201 to 203, and the silicon atomic concentration, carrier concentration, second carrier concentration, boron atomic concentration, average dislocation density, and dislocation-free rate of each sample were determined. The results are shown in Table 2. Table 2 also shows the off-angle of the main surface of the GaAs single crystal substrate of each sample, the structure of the increased diameter portion (presence or absence of an upper region and a lower region), the value of S(A2) / (S(A1)+S(A2)) shown in the above formula I, and the like.
[0120] <Device Yield> The device yield (%) of samples 21 to 25 and samples 201 to 203 was determined by applying the same method as that for determining the device yield in Example 1 to the GaAs single crystal substrates. The results are shown in Table 2. In Table 2, as in Table 1, samples with a device yield of 90% or more were judged as A, samples with a device yield of 80% or more but less than 90% were judged as B, and samples with a device yield of less than 80% were judged as C.
[0121]
[0122] <Discussion> In the GaAs single crystal substrates of Samples 21 to 25, the off-angle of the main surface is 6°, and the average dislocation density of the main surface is 0 cm -2 3.77cm or more -2 The dislocation-free rate was 98.04% or more. Furthermore, the silicon atomic concentration was 1.0 × 10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 Furthermore, the device yield of these GaAs single crystal substrates was 89.5% or more, and was judged to be A or B. In contrast, the GaAs single crystal substrate of sample 201 had an off-angle of 6° on its main surface, but the average dislocation density on the surface was 3.77 cm -2 The dislocation-free rate exceeded 98.04%, and the dislocation-free rate was less than 98.04%. The GaAs single crystal substrate of sample 201 was produced using a GaAs single crystal manufacturing apparatus with a structure in which the entire surface of the diameter-increasing portion was in contact with the crucible holder. In this case, the device yield for the GaAs single crystal substrate of sample 201 was less than 80%, and it was judged to be C. The GaAs single crystal substrates of samples 202 and 203 had an off-angle of 6° on their main surfaces, but the average surface dislocation density was 3.77 cm -2and the dislocation-free rate was less than 98.04%. Furthermore, the GaAs single crystal substrates of samples 202 and 203 did not satisfy the relationship 0.1 < S(A2) / (S(A1) + S(A2)) < 0.8. In this case, the device yield for these GaAs single crystal substrates was less than 80%, and they were judged to be C. In particular, the GaAs single crystal substrate of sample 202 had a lower region held by the crucible holder that was too small, making it difficult to grow GaAs single crystals while keeping the crucible stable, which is presumed to have had an adverse effect on the growth of the GaAs single crystal. It is estimated that the GaAs single crystal substrate of sample 203 had a lower region held by the crucible holder that was too large, causing the relationship between q(A1) and q(A2) to be q(A1) ≥ q(A2), etc., which adversely affected the growth of the GaAs single crystal.
[0123] Although the embodiments and examples of the present disclosure have been described above, it is also planned from the beginning that the configurations of the above-described embodiments and examples may be appropriately combined.
[0124] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims, not by the embodiments and examples described above, and is intended to include meanings equivalent to the claims and all modifications within the scope of the claims.
[0125] S10 Preparation step, S20 Step of obtaining GaAs single crystal, S21 Raw material charging step, S22 Raw material melting step, S23 GaAs single crystal growth step, S30 Step of obtaining GaAs single crystal substrate, 10 GaAs single crystal growth apparatus 5 Crucible, 51 Seed crystal accommodation section, 52 Diameter increasing section, 521 Upper region, 522 Lower region, 53 Straight body section, 6 Crucible holder, 7 Heating element, 75 Thermocouple, 8a Seed crystal, 81 Gallium arsenide single crystal (GaAs single crystal), 82 Gallium arsenide melt (GaAs melt), 1 Gallium arsenide single crystal substrate (GaAs single crystal substrate), 11 Main surface, 11a Rectangular slice, 21 Electrode, G Virtual lattice, O Center, 100 Gallium arsenide single crystal (GaAs single crystal), 110 circular face.
Claims
1. A method for producing a cylindrical gallium arsenide single crystal, the method comprising: growing a gallium arsenide single crystal from a seed crystal using a gallium arsenide single crystal production apparatus; a growth side surface of the seed crystal is a surface having an off angle of 4° or more and 20° or less from a (100) plane of the gallium arsenide single crystal; the gallium arsenide single crystal production apparatus comprises a crucible having a partially cylindrical shape, a crucible holder for holding the crucible, and a heating element for heating the crucible; the crucible comprises a seed crystal accommodating section, an increased diameter section connected to the seed crystal accommodating section, and a straight body section connected to the increased diameter section on the side opposite to the seed crystal accommodating section; the seed crystal accommodating section has a cylindrical cavity that opens to the side connected to the increased diameter section and has a bottom wall formed on the opposite side; a crucible holder that holds the increasing diameter portion, the increasing diameter portion including an upper region and a lower region, the upper region being spaced apart from the crucible holder, and the lower region being in contact with the crucible holder.
1. A method for producing a gallium arsenide single crystal, wherein the increasing diameter portion has a truncated cone shape expanding axially upward and is connected to the seed crystal accommodating portion at a smaller diameter side of the increasing diameter portion; the straight body portion has a hollow cylindrical shape and is connected to the larger diameter side of the increasing diameter portion; the crucible holder that holds the increasing diameter portion, the increasing diameter portion including an upper region and a lower region, the upper region being spaced apart from the crucible holder, and the lower region being in contact with the crucible holder.
2. The method for producing a gallium arsenide single crystal according to claim 1, wherein the increased diameter portion satisfies the following formula I, where S(A1) is the surface area of the upper region and S(A2) is the surface area of the lower region: 0.2≦S(A2) / (S(A1)+S(A2))≦0.6 Formula I 3. A method for producing a gallium arsenide single crystal according to claim 1 or 2, wherein the upper region faces the crucible holder in a direction perpendicular to the growth direction of the gallium arsenide single crystal.
4. A method for producing gallium arsenide single crystals according to any one of claims 1 to 3, wherein the crucible holder is made of a single material.
5. The method for producing gallium arsenide single crystals according to claim 4, wherein the material is made of quartz.
6. The method for producing a gallium arsenide single crystal according to claim 4 or 5, wherein the material is opaque.
7. A method for producing a gallium arsenide single crystal substrate having a circular main surface, said method comprising the steps of: cutting the gallium arsenide single crystal obtained by the method for producing a gallium arsenide single crystal according to any one of claims 1 to 6 into a disk shape; and processing the gallium arsenide single crystal to obtain a gallium arsenide single crystal substrate.
8. A gallium arsenide single crystal substrate having a circular main surface, the diameter of the gallium arsenide single crystal substrate being 200 mm or more and 210 mm or less, the main surface being a plane having an off angle of 4° or more and 20° or less from a (100) plane of the gallium arsenide single crystal, the off direction of the plane having the off angle being any of the [01-1], [0-1-1], [0-11], or [011] directions, and the average dislocation density of the main surface being 0 cm -2 3.77cm or more -2 a ratio of the number of squares having no dislocations to the total number of squares constituting the lattice is 98.04% or more; the gallium arsenide single crystal substrate contains silicon, and the concentration of the silicon is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal substrate is 0.8×10 18 cm -3 Above 4.0 x 10 18 cm -3 The following is a gallium arsenide single crystal substrate.
9. The gallium arsenide single crystal substrate contains boron, and the concentration of the boron is 1.0×10 18 cm -3 Above 1.0 x 10 19 cm -3 9. The gallium arsenide single crystal substrate of claim 8, wherein:
10. A gallium arsenide single crystal having a cylindrical shape, wherein a diameter of a circular face forming a surface of the gallium arsenide single crystal is 200 mm or more and 210 mm or less, the circular face is a face having an off angle of 4° or more and 20° or less from a (100) face of the gallium arsenide single crystal, the off direction of the face having the off angle is any one of the [01-1], [0-1-1], [0-11], or [011] directions, and the average value of the dislocation density on the circular face is 0 cm -2 3.77cm or more -2 in a virtual lattice formed by arranging as many squares, each having a side length of 2 mm, on the circular surface as possible in parallel without overlapping each other, the ratio of the number of squares having no dislocations to the total number of squares constituting the lattice is 98.04% or more, the gallium arsenide single crystal contains silicon, and the concentration of the silicon is 1.0×10 18 cm -3 Above 5.0 x 10 19 cm -3 The carrier concentration of the gallium arsenide single crystal is 0.8×10 or less. 18 cm -3 Above 4.0 x 10 18 cm -3 Below is a gallium arsenide single crystal.
11. The gallium arsenide single crystal according to claim 10, wherein the axial length of the cylindrical shape is not less than 40 mm and not more than 110 mm.
12. The carrier concentration at one end of the gallium arsenide single crystal is 0.8 x 10 18 cm -3 Above 1.5 x 10 18 cm -3 The carrier concentration at the other end of the gallium arsenide single crystal is 1.5×10 18 cm -3 Above 3.5 x 10 18 cm -3 11. The gallium arsenide single crystal of claim 10, wherein:
13. The carrier concentration at one end of the gallium arsenide single crystal is 0.8 x 10 18 cm -3 Above 1.5 x 10 18 cm -3 The carrier concentration at the other end of the gallium arsenide single crystal is 1.5×10 18 cm -3 Above 3.5 x 10 18 cm -3 12. The gallium arsenide single crystal of claim 11, wherein:
Citation Information
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