Light detection device and solid-state imaging device

Abstract

The present invention provides a light detection device comprising: a stacked structure comprising a first substrate provided with a light detection element, and a second substrate provided with a readout circuit which reads a detection signal from the light detection element; a signal line that conveys the detection signal from the first substrate to the second substrate; and a low-resistance structure surrounding the signal line, wherein in a cross-sectional view of the light detection device as cut along the stacking direction of the stacked structure, the low-resistance structure is divided into a first substrate side and a second substrate side, and two divided surfaces of the low-resistance structure are each covered by a first insulating film.

Description

Photodetector and solid-state imaging device

[0001] The present disclosure relates to a photodetector device and a solid-state imaging device.

[0002] In recent years, imaging devices with a three-dimensional structure have been proposed to further reduce the size of imaging devices (photodetection devices). An example of such a device is the imaging device disclosed in Patent Document 1. The technology disclosed in Patent Document 1 achieves the miniaturization of the imaging device by stacking and bonding a first substrate on which a plurality of imaging elements (photodetection elements) are provided and a second substrate on which a readout circuit including a plurality of pixel transistors that read pixel signals from each imaging element is provided.

[0003] Japanese Patent Application Laid-Open No. 2020-88380

[0004] In the imaging device (photodetection device) disclosed in Patent Document 1, each imaging element (photodetection element) performs photoelectric conversion on incident light to generate electric charges, and the generated electric charges are stored in a plurality of charge accumulation units provided on a first substrate having a plurality of imaging elements. Furthermore, in the imaging device, each charge accumulation unit is electrically connected by a signal line to an amplification transistor, which is one of the pixel transistors, included in a readout circuit on a second substrate. Furthermore, the signal line extends in the stacking direction of the two substrates (first substrate, second substrate) and is provided in plurality within the imaging device.

[0005] In the imaging device (photodetector), a shield structure made of a conductor is provided on each substrate to surround each signal line in order to suppress noise leakage from one signal line to another. Specifically, the shield structure consists of two parts provided on each of the two substrates, and the two parts are arranged so as to overlap each other when the imaging device is viewed from above, surrounding the common signal line. Furthermore, in the imaging device, the parts of the shield structure provided on each substrate are sufficiently spaced apart to prevent unintended short circuits between the substrates due to the shield structure caused by misalignment that occurs when the two substrates are joined.

[0006] However, the above shielding structure is unable to fully demonstrate its shielding function due to its structure, and there is a limit to the effectiveness of the shielding function.

[0007] Therefore, the present disclosure proposes a photodetector and a solid-state imaging device having a shielding structure that effectively exhibits a shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates.

[0008] According to the present disclosure, there is provided a photodetector comprising a laminated structure consisting of a first substrate on which a photodetection element is provided and a second substrate on which a readout circuit for reading out a detection signal from the photodetection element is provided, a signal line for conveying the detection signal from the first substrate to the second substrate, and a low-resistance structure surrounding the signal line, wherein, in a cross-sectional view of the photodetector taken along the stacking direction of the laminated structure, the low-resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low-resistance structure are each covered with a first insulating film.

[0009] Furthermore, according to the present disclosure, there is provided a solid-state imaging device comprising a laminated structure consisting of a first substrate on which an imaging element is provided and a second substrate on which a readout circuit for reading out pixel signals from the imaging element is provided, a signal line for transporting the pixel signals from the first substrate to the second substrate, and a low-resistance structure surrounding the signal line, wherein, in a cross-sectional view of the solid-state imaging device cut along the stacking direction of the laminated structure, the low-resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low-resistance structure are each covered with a first insulating film.

[0010] FIG. 1 is an explanatory diagram showing an example of a planar configuration of an imaging device according to an embodiment of the present disclosure. FIG. 2 is an explanatory diagram showing an example of a configuration of a pixel and a readout circuit shown in FIG. 1 . FIG. 3 is an explanatory diagram showing an example of a cross-sectional configuration of an imaging device according to a first embodiment of the present disclosure. FIG. 4 is an explanatory diagram (part 1) showing a method for manufacturing an imaging device according to a first embodiment of the present disclosure. FIG. 5 is an explanatory diagram (part 2) showing a method for manufacturing an imaging device according to a first embodiment of the present disclosure. FIG. 6 is an explanatory diagram showing an example of a cross-sectional configuration of an imaging device according to a second embodiment of the present disclosure. FIG. 7 is an explanatory diagram (part 1) showing a method for manufacturing an imaging device according to a second embodiment of the present disclosure. FIG. 8 is an explanatory diagram (part 2) showing a method for manufacturing an imaging device according to a second embodiment of the present disclosure. FIG. 9 is an explanatory diagram showing an example of a cross-sectional configuration of an imaging device according to a third embodiment of the present disclosure. FIG. 10 is an explanatory diagram (part 1) showing a method for manufacturing an imaging device according to a third embodiment of the present disclosure. FIG. 11 is an explanatory diagram (part 2) showing a method for manufacturing an imaging device according to a third embodiment of the present disclosure. FIG. 10 is an explanatory diagram showing an example cross-sectional configuration of an imaging device according to a fifth embodiment of the present disclosure. FIG. 11 is an explanatory diagram showing an example planar configuration of an imaging device according to a fifth embodiment of the present disclosure. FIG. 12 is an explanatory diagram (part 1) showing a method for manufacturing an imaging device according to a fifth embodiment of the present disclosure. FIG. 13 is an explanatory diagram (part 2) showing a method for manufacturing an imaging device according to a fifth embodiment of the present disclosure. FIG. 14 is an explanatory diagram showing an example cross-sectional configuration of an imaging device according to a sixth embodiment of the present disclosure. FIG. 15 is an explanatory diagram showing an example of a schematic functional configuration of a camera. FIG. 16 is a block diagram showing an example of a schematic functional configuration of a smartphone. FIG. 17 is a schematic diagram of the appearance of an unmanned aerial vehicle. FIG. 18 is a block diagram showing an example of a schematic functional configuration of an unmanned aerial vehicle.

[0011] Preferred embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. In this specification and drawings, components having substantially the same functional configurations are designated by the same reference numerals, and redundant description will be omitted.

[0012] The drawings referred to in the following description are for explaining and facilitating understanding of one embodiment of the present disclosure, and for the sake of clarity, the shapes, dimensions, ratios, etc. shown in the drawings may differ from the actual ones. Furthermore, the design of the devices shown in the drawings can be modified as appropriate, taking into consideration the following description and known technologies.

[0013] Furthermore, in the following description, "electrically connected" means connecting a plurality of elements directly or indirectly via another element.

[0014] The description will be given in the following order: 1. Schematic configuration of imaging device 2. Background 3. First embodiment 3.1 Detailed configuration 3.2 Manufacturing method 4. Second embodiment 4.1 Detailed configuration 4.2 Manufacturing method 5. Third embodiment 5.1 Detailed configuration 5.2 Manufacturing method 6. Fourth embodiment 7. Fifth embodiment 7.1 Detailed configuration 7.2 Manufacturing method 8. Sixth embodiment 9. Summary 10. Application examples 10.1 Application example to a camera 10.2 Application example to a smartphone 10.3 Application example to an unmanned aerial vehicle 11. Supplementary information

[0015] <<1. Schematic Configuration of Imaging Device>> First, before describing details of an embodiment of the present disclosure, a schematic configuration of an imaging device 1 according to an embodiment of the present disclosure will be described with reference to Figures 1 and 2. Figure 1 is an explanatory diagram showing an example configuration of an imaging device 1 according to an embodiment of the present disclosure. Figure 2 is an explanatory diagram showing an example configuration of a pixel 12 and a readout circuit 22 shown in Figure 1.

[0016] As shown in FIG. 1 , the imaging device (photodetector) 1 has three substrates (a first substrate 10, a second substrate 20, and a third substrate 30). The imaging device 1 has a three-dimensional structure (a laminated structure) configured by bonding (joining) the three substrates (the first substrate 10, the second substrate 20, and the third substrate 30). The first substrate 10, the second substrate 20, and the third substrate 30 are laminated in this order. Note that in the embodiment of the present disclosure, the imaging device 1 is not limited to a laminate of three substrates, and may be, for example, a laminate of the first substrate 10 and the second substrate 20.

[0017] In detail, the first substrate 10 has a plurality of pixels 12 that perform photoelectric conversion on a semiconductor substrate 11. The plurality of pixels 12 are arranged in a matrix in a pixel region (array region) 13 on the first substrate 10.

[0018] The second substrate 20 has, on a semiconductor substrate 21, a readout circuit 22 that outputs pixel signals based on the charges output from the pixels 12. The second substrate 20 has a plurality of pixel drive lines 23 extending in the row direction and a plurality of vertical signal lines 24 extending in the column direction.

[0019] The third substrate 30 has a logic circuit 32 that processes pixel signals on a semiconductor substrate 31. The logic circuit 32 has, for example, a vertical drive circuit 33, a column signal processing circuit 34, a horizontal drive circuit 35, and a system control circuit 36. The logic circuit 32 (specifically, the horizontal drive circuit 35) outputs an output voltage Vout for each pixel 12 to the outside.

[0020] More specifically, the vertical drive circuit 33, for example, sequentially selects a plurality of pixels 12 row by row. The column signal processing circuit 34, for example, performs analog-to-digital conversion and correlated double sampling (CDS) on pixel signals output from each pixel 12 in the row selected by the vertical drive circuit 33. The column signal processing circuit 34 extracts the signal level of the pixel signal by performing CDS processing, for example, and holds pixel data corresponding to the amount of light received by each pixel 12. The horizontal drive circuit 35, for example, sequentially outputs the pixel data held in the column signal processing circuit 34 to the outside. The system control circuit 36, for example, controls the driving of each block (the vertical drive circuit 33, the column signal processing circuit 34, and the horizontal drive circuit 35) in the logic circuit 32.

[0021] As shown in FIG. 2, the pixel 12 is electrically connected to one readout circuit 22 .

[0022] In detail, each pixel 12 includes, for example, a photoelectric conversion unit (photodetector element, image sensor) 101, a transfer transistor 102 electrically connected to the photoelectric conversion unit 101, and a floating diffusion (charge storage unit) 103 that temporarily stores charge output from the photoelectric conversion unit 101 via the transfer transistor 102. The photoelectric conversion unit 101 performs photoelectric conversion and generates charge according to the amount of received light. The cathode of the photoelectric conversion unit 101 is electrically connected to the source of the transfer transistor 102, and the anode of the photoelectric conversion unit 101 is electrically connected to a reference potential line (e.g., ground). The drain of the transfer transistor 102 is electrically connected to the floating diffusion 103, and the gate of the transfer transistor 102 is electrically connected to a pixel drive line 23. The transfer transistor 102 transfers the charge generated in the photoelectric conversion unit 101 to the floating diffusion 103. The transfer transistor 102 is, for example, a complementary metal oxide semiconductor (CMOS) transistor.

[0023] As described above, the pixel 12 , that is, the photoelectric conversion unit 101 , the transfer transistor 102 , and the floating diffusion 103 are provided on the first substrate 10 .

[0024] The readout circuit 22 includes pixel transistors. For example, the readout circuit 22 includes a reset transistor 201, an amplification transistor 202, and a selection transistor 203. Note that the selection transistor 203 may be omitted as necessary.

[0025] The source of the reset transistor 201 (the input terminal of the readout circuit 22) is electrically connected to the floating diffusion 103, and the drain of the reset transistor 201 is electrically connected to the power supply line VDD and the drain of the amplification transistor 202. The gate of the reset transistor 201 is electrically connected to a pixel drive line 23 (see FIG. 1). The source of the amplification transistor 202 is electrically connected to the drain of the selection transistor 203, and the gate of the amplification transistor 202 is electrically connected to the source of the reset transistor 201. The source of the selection transistor 203 (the output terminal of the readout circuit 22) is electrically connected to a vertical signal line 24, and the gate of the selection transistor 203 is electrically connected to the pixel drive line 23 (see FIG. 1). The reset transistor 201, the amplification transistor 202, and the selection transistor 203 are, for example, CMOS transistors.

[0026] In addition, the floating diffusion 103 and the amplification transistor 202 are electrically connected via a signal line (not shown), and the amplification transistor 202 can read out a signal of a voltage corresponding to the level of charge held in the floating diffusion 103.

[0027] As described above, the readout circuit 22 is provided on the second substrate 20 .

[0028] The operation of the pixel 12 and readout circuit 22 shown in FIG. 2 will be described below. When the transfer transistor 102 is turned on, it transfers the charge of the photoelectric conversion unit 101 to the floating diffusion 103. The reset transistor 201 resets the potential of the floating diffusion 103 to a predetermined potential. When the reset transistor 201 is turned on, it resets the potential of the floating diffusion 103 to the potential of the power supply line VDD. The selection transistor 203 controls the output timing of the pixel signal from the readout circuit 22. The amplification transistor 202 generates, as the pixel signal, a signal (voltage signal) whose voltage corresponds to the level of the charge held in the floating diffusion 103. When the selection transistor 203 is turned on, the amplification transistor 202 amplifies the potential of the floating diffusion 103 and outputs a voltage corresponding to the amplified potential to the column signal processing circuit 34 via the vertical signal line 24.

[0029] In the embodiment of the present disclosure, the configurations of the pixels 12 and the readout circuit 22 are not limited to the configuration shown in Fig. 2. In the embodiment of the present disclosure, for example, a plurality of pixels 12 may be connected to one readout circuit 22, or the readout circuit 22 may further include other pixel transistors. In addition, in the embodiment of the present disclosure, some of the transistors constituting the readout circuit 22 may be provided on the first substrate 10.

[0030] <<2. Background>> Next, the background that led the inventors to create the embodiments of the present disclosure will be described.

[0031] As described above, in the imaging device 1 disclosed in Patent Document 1, multiple signal lines are provided to connect the floating diffusion 103 and the amplification transistor 202. Furthermore, each signal line extends in the stacking direction of the two substrates (first substrate, second substrate). Furthermore, in Patent Document 1, a shield structure made of a conductor is provided to surround each signal line in order to suppress noise leakage from one signal line to another. Specifically, the shield structure is composed of two portions provided on each of the two substrates, and the two portions are arranged to overlap each other when the imaging device 1 is viewed from above, surrounding the common signal line.

[0032] Furthermore, misalignment that occurs when joining the two substrates (first substrate 10, second substrate 20) may unintentionally electrically connect the two portions of the shielding structure, potentially resulting in an unintentional electrical connection (short circuit) between the two substrates. Therefore, in Patent Document 1, the two portions of the shielding structure are spaced apart sufficiently (in the stacking direction) to avoid the occurrence of a short circuit.

[0033] However, in the above-mentioned shielding structure, if the distance between the two parts of the shielding structure is widened in order to more reliably prevent short circuits, the likelihood of noise leaking from the signal line located between the two parts of the shielding structure to other signal lines increases. Therefore, if the distance between the two parts of the shielding structure is widened, it becomes difficult for the shielding structure to fully exhibit its shielding function. Therefore, when fabricating a shielding structure, it is necessary to precisely adjust the distance between the two parts of the shielding structure so that the shielding function can be fully exhibited while avoiding short circuits.

[0034] In Patent Document 1, the shielding structure is fabricated simultaneously with the wiring to prevent an increase in the number of processes, and the distance between the two portions of the shielding structure is adjusted using dry etching. This makes it easy for the distance to vary. Therefore, in Patent Document 1, it is difficult to accurately adjust the distance between the two portions of the shielding structure so as to fully demonstrate the shielding function while avoiding the occurrence of short circuits. In addition, when the shielding structure is formed using wiring as in Patent Document 1, the resistance of the shielding structure increases as the wiring becomes finer, thereby weakening the shielding effect of the shielding structure.

[0035] In view of this situation, the present inventors have come up with an embodiment of the present disclosure that provides a shielding structure that can effectively exhibit a shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates. That is, the shielding structure according to the embodiment of the present disclosure can effectively exhibit a shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates. The following describes in detail the embodiment of the present disclosure that the present inventors have created.

[0036] <<3. First Embodiment>> <3.1 Detailed Configuration> First, a detailed configuration of the imaging device 1 according to the first embodiment of the present disclosure will be described with reference to Figures 3A and 3B. Figure 3A is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of each substrate. Figure 3B is an explanatory diagram showing an example planar configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a plan view of the cut surface of the imaging device 1 cut along dashed line A in Figure 3A.

[0037] 3A, the imaging device (photodetector, solid-state imaging device) 1 according to this embodiment has two substrates (a first substrate 10 and a second substrate 20). The imaging device 1 has a three-dimensional structure (a stacked structure) formed by bonding (joining) the two substrates (the first substrate 10 and the second substrate 20).

[0038] The first substrate 10 has a semiconductor substrate 11 provided with a photoelectric conversion unit (photodetector element, image sensor) (not shown), a transfer transistor 114 electrically connected to the photoelectric conversion unit, and a floating diffusion (FD) 112 that temporarily holds the charge output from the photoelectric conversion unit 101 via the transfer transistor 114. Furthermore, the first substrate 10 has a wiring layer 15 made of wiring 602 and an interlayer insulating film (inter-wiring insulating film) 601 on the surface of the semiconductor substrate 11 facing the second substrate 20 (the junction surface side). The first substrate 10 also has a color filter (not shown), an on-chip lens 110, and the like on the side of the semiconductor substrate 11 opposite the second substrate 20. Furthermore, the first substrate 10 has a pad 116 connected to an external power supply, and the pad 116 is exposed from an opening penetrating the semiconductor substrate 11.

[0039] The second substrate 20 is also provided with a readout circuit 22 that reads out (processes) pixel signals (detection signals) from the photoelectric conversion units. The readout circuit 22 has a plurality of pixel transistors (e.g., a reset transistor 201, an amplification transistor 202, and a selection transistor 203), and these pixel transistors are provided on a semiconductor substrate 21 of the second substrate 20. Furthermore, the second substrate 20 has a wiring layer 25 made up of wiring 602 and an interlayer insulating film (inter-wiring insulating film) 601 on the surface of the semiconductor substrate 21 facing the first substrate 10 (bonding surface side). As described above, in this embodiment, the wiring layer 15 of the first substrate 10 and the wiring layer 25 of the second substrate 20 face each other and are bonded to each other, thereby forming a stacked structure of the two substrates (the first substrate 10 and the second substrate 20). Hereinafter, the surface of the wiring layer 15 of the first substrate 10 facing the second substrate 20 and the surface of the wiring layer 25 of the second substrate 20 facing the first substrate 10 will be referred to as a bonding surface.

[0040] 3A , in this embodiment, the pixels 12 on the first substrate 10 and the readout circuit 22 on the second substrate 20 are electrically connected via a signal line 430. Specifically, the floating diffusion (charge storage section) 112 and the amplification transistor 214 are electrically connected via the signal line 430, and the signal line 430 carries charges (detection signals, pixel signals) from the floating diffusion 112. Furthermore, the signal line 430 is composed of a through electrode 130 that penetrates the wiring layer 15 of the first substrate 10 and a through electrode 230 that penetrates the wiring layer 25 of the second substrate 20. The through electrodes 130 and 230 are electrically connected via a bonding electrode 132 provided on the wiring layer 15 of the first substrate 10 and a bonding electrode 232 provided on the wiring layer 25 of the second substrate 20, forming one signal line 430. The bonding electrodes 132 and 232 can be made of, for example, copper (Cu).

[0041] Furthermore, in this embodiment, a low-resistance structure 140 that penetrates the wiring layer 15 of the first substrate 10 and a low-resistance structure 240 that penetrates the wiring layer 25 of the second substrate 20 are provided as shield structures so as to surround the signal line 430. That is, the shield structure in this embodiment is divided into a first substrate 10 side and a second substrate 20 side in a cross-sectional view cut along the stacking direction of the two substrates (first substrate 10, second substrate 20) in the three-dimensional structure (stacked structure).

[0042] The low-resistance structures 140, 240 are formed from a low-resistance material. The low-resistance structures 140, 240 are formed from a material containing at least one selected from the group consisting of copper (Cu), cobalt (Co), tungsten (W), silver (Ag), ruthenium (Ru), titanium (Ti), tantalum (Ta), and carbon (C). More specifically, the low-resistance structures 140, 240 can be formed from metals such as copper, cobalt, tungsten, silver, and ruthenium, nitrides such as titanium nitride (TiN) and tantalum nitride (TaN), or carbon materials such as graphene and carbon nanotubes. In this embodiment, the shield structure is not fabricated simultaneously with the wiring, which allows for a wider range of materials to be selected than the shield structure disclosed in Patent Document 1, thereby enabling the resistance of the shield structure to be kept lower. In particular, in this embodiment, the resistance of the shield structure can be kept lower even when the wiring is miniaturized, allowing the shield mechanism to effectively perform its shielding function.

[0043] Furthermore, in this embodiment, the surface of the low-resistance structure 140 facing the low-resistance structure 240 and the surface of the low-resistance structure 240 facing the low-resistance structure 140, i.e., the cut surfaces of the shield structure, are covered with insulating films (first insulating films) 142 and 242, respectively. Therefore, the surface of the low-resistance structure 140 facing the low-resistance structure 240 and the surface of the low-resistance structure 240 facing the low-resistance structure 140 are not exposed at the bonding surface between the first substrate 10 and the second substrate 20. Furthermore, the insulating films 142 and 242 are provided so as to cover the above-mentioned bonding surfaces of the wiring layers 15 and 25 excluding bonding electrodes including bonding electrodes 132 and 232 that electrically connect the signal line 430.

[0044] The insulating films 142, 242 can be formed from a material different from the interlayer insulating film (inter-wiring insulating film) 601 of the wiring layers 15, 25 of each substrate (first substrate 10, second substrate 20). That is, the material can be, for example, an insulating film such as an oxide film. In this embodiment, the film thickness of each insulating film 142, 242 can be, for example, 0.1 μm to 0.3 μm. Therefore, the spacing between the low-resistance structures 140 and 240, i.e., the spacing between the two portions of the shield structure, is, for example, 0.2 to 0.6 μm. In this embodiment, the film thickness of the insulating films 142, 242 can be made with little variation by adjusting the film formation conditions for the insulating films 142, 242. Furthermore, according to this embodiment, by using insulating films 142, 242 with little variation in film thickness, it is easy to accurately adjust the spacing between the low-resistance structures 140 and 240, i.e., the spacing between the two portions of the shield structure. Therefore, in this embodiment, the unshielded area of ​​the signal line 430 can be narrowed while avoiding the occurrence of short circuits. Specifically, this embodiment can prevent noise from leaking from a signal line 430 located between two portions of the shielding structure to another signal line 430. As a result, this embodiment allows the shielding structure to effectively exhibit its shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates.

[0045] Furthermore, in this embodiment, insulating films (second insulating films) 118 and 218 are provided between the low-resistance structure 140 and the semiconductor substrate 11, and between the low-resistance structure 240 and the semiconductor substrate 21. The insulating films 118 and 218 function as stopper films when etching the interlayer insulating film 601 and as cap films that protect the wiring 602. Specifically, the insulating films 118 and 218 can be formed from, for example, silicon nitride (SiN) or silicon carbide (SiC). In this embodiment, by fabricating a shielding structure using such stopper films and cap films, the low-resistance structures 140 and 240 that form the shielding structure can be extended to a height where they contact the stopper films and cap films. As a result, in this embodiment, the unshielded area of ​​the signal line 430 can be narrowed, allowing the shielding structure to effectively exhibit its shielding function.

[0046] Furthermore, in this embodiment, the first substrate 10 has an array region in which multiple photoelectric conversion units (photodetector elements) 101 are arranged in a matrix, and a peripheral region provided around the array region. As shown in FIG. 3B , in the array region of the first substrate 10, the low-resistance structures 140 of the shielding structure are formed in a grid shape so as to surround the rectangular through electrodes 130 of each signal line 430. Furthermore, as shown in FIG. 3B , in the peripheral region of the first substrate 10, the low-resistance structures 140 (the portions of the shielding structure on the first substrate 10 side) are electrically connected to pads 116 connected to an external power supply, and thus can be set to a fixed potential. In this embodiment, because the low-resistance structures 140 are connected to the pads 116 in the peripheral region, there is no need to provide pads or wiring, etc., in the array region to set the low-resistance structures 140 to a fixed potential. Therefore, according to this embodiment, it is possible to prevent unintended electrical connection between the low-resistance structures 140 and the low-resistance structures 240 in the array region. In addition, in this embodiment, the low-resistance structure 240 provided on the second substrate 20 side can also have a configuration similar to the low-resistance structure 140 on the first substrate 10 side, and is electrically connected in the peripheral region to a pad 116 that is common to the low-resistance structure 140 or a pad (not shown) different from the low-resistance structure 140.

[0047] As described above, in this embodiment, the surface of the low-resistance structure 140 facing the low-resistance structure 240 and the surface of the low-resistance structure 240 facing the low-resistance structure 140, i.e., the cut surface of the shield structure, are covered with insulating films 142 and 242, respectively. In this embodiment, the film thicknesses of the insulating films 142 and 242 can be made to have little variation by adjusting the film formation conditions for the insulating films 142 and 242. Therefore, according to this embodiment, by using the insulating films 142 and 242 with little variation in film thickness, it is easy to accurately adjust the distance between the low-resistance structure 140 and the low-resistance structure 240, i.e., the distance between the two portions of the shield structure. As a result, in this embodiment, the unshielded area of ​​the signal line 430 can be narrowed while avoiding the occurrence of short circuits, thereby suppressing noise leakage from the signal line 430 located between the two portions of the shield structure to other signal lines 430. Therefore, according to this embodiment, the shielding structure can effectively exhibit a shielding function while avoiding the occurrence of short circuits due to misalignment when bonding the substrates.

[0048] Furthermore, in this embodiment, insulating films 118 and 218 are provided between the low-resistance structure 140 and the semiconductor substrate 11, and between the low-resistance structure 240 and the semiconductor substrate 21, functioning as stopper films when etching the interlayer insulating film 601 and as cap films that protect the wiring 602. In this embodiment, by fabricating a shielding structure using such stopper films and cap films, the low-resistance structures 140 and 240 that form the shielding structure can be extended to a height where they contact the stopper films and cap films. As a result, in this embodiment, the unshielded area of ​​the signal line 430 can be made narrower, allowing the shielding structure to effectively exhibit its shielding function.

[0049] Furthermore, in this embodiment, the shield structure is not fabricated simultaneously with the wiring, which allows for a wider range of materials to be selected for construction and enables the resistance value of the shield structure to be kept lower than in the shield structure disclosed in Patent Document 1. In particular, in this embodiment, even when the wiring is miniaturized, the resistance value of the shield structure can be kept lower, allowing the shield mechanism to effectively demonstrate its shielding function.

[0050] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIGS. 3A and 3B, but can be modified in various ways.

[0051] 4A and 4B, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described. 4A and 4B are explanatory views showing the method for manufacturing the imaging device according to this embodiment, and correspond to the cross-sectional view of FIG. 3A in detail.

[0052] First, as shown in the upper left of FIG. 4A , various semiconductor processes are used to form up to the wiring layer 15 on the semiconductor substrate 11, and the wiring layer 15 is then covered with an insulating film made of an oxide film or the like. Next, as shown in the upper center of FIG. 4A , grooves that will become the shield structure (low resistance structure 140) are formed using lithography, dry etching, or the like. Next, as shown in the upper right of FIG. 4A , a metal or the like that will become the shield structure (low resistance structure 140) is embedded using techniques such as CVD (Chemical Vapor Deposition) or plating, and the surface is planarized using etching or CMP (Chemical Mechanical Polishing).

[0053] Next, as shown in the lower left of FIG. 4A , an insulating film 142 made of an oxide film or the like is formed to a thickness of 0.1 μm to 0.3 μm. The thickness of the insulating film 142 is used to adjust the spacing of the shield structure separated into the first substrate 10 and the second substrate 20 (more specifically, the spacing between the low-resistance structures 140 and 240). Next, as shown in the lower left of FIG. 4A , a groove for the through electrode 130 of the signal line 430 is processed.

[0054] Next, as shown in the upper left of FIG. 4B , the grooves are filled with metal and then planarized to form the through electrodes 130 and bonding electrodes 132. At this time, adjustments are made so that only the bonding electrodes 132 connected to the through electrodes 130 of the signal lines 430 are exposed from the insulating film 142, and the shield structure (low resistance structure 140) is not exposed. Subsequently, as shown in the upper right of FIG. 4B , the shield structure (low resistance structure 240), the through electrodes 230 of the signal lines 430, etc. are formed on the second substrate 20 in the same manner as the first substrate 10.

[0055] Next, as shown in the lower left of FIG. 4B , the first substrate 10 and the second substrate 20 are bonded together, and the through electrodes 130 and 230 that become the signal lines 430 are connected. At this time, the pitch (the pitch of the through electrodes 130 and 230 in the direction perpendicular to the stacking direction) of the signal lines 430 (the through electrodes 130 and 230) is required to be greater than approximately twice the value allowed for misalignment at the bonding surfaces. Generally, the misalignment at the bonding surfaces is several times greater than the misalignment between the wiring of each substrate. Therefore, in this embodiment, the pitch of the signal lines 430, i.e., the miniaturization of the photoelectric conversion unit 101, etc., is determined based on the value allowed for misalignment at the bonding surfaces. Furthermore, as shown in the lower right of FIG. 4B , after bonding the first substrate 10 and the second substrate 20, the semiconductor substrate 11 of the first substrate 10 is polished to a desired thickness, and a color filter (not shown), an on-chip lens 110, a pad 116 (not shown), etc. are processed to obtain the imaging device 1 according to this embodiment.

[0056] <<4. Second Embodiment>> <4.1 Detailed Configuration> Next, a detailed configuration of an imaging device 1 according to a second embodiment of the present disclosure will be described with reference to Fig. 5. Fig. 5 is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of the substrates.

[0057] In this embodiment, as shown in FIG. 5 , unlike the first embodiment, an air gap 500, which is a cavity, is provided between the shield structure (low-resistance structure 140, 240) and the signal line 430 (through electrode 130, 230). This reduces the capacitance value of the parasitic capacitance generated between the signal line 430 (through electrode 130, 230) and the shield structure (low-resistance structure 140, 240), thereby enabling faster signal transmission of the signal line 430. In this embodiment, the depth (length) of each air gap 500 in the stacking direction may be the same as that of the divided shield structure, i.e., the low-resistance structure 140, 240, or may be shorter than that of the low-resistance structure 140, 240. Since this embodiment is similar to the first embodiment except for the provision of the air gap 500, a detailed description of the configuration of the imaging device 1 will be omitted here.

[0058] In this embodiment, an air gap 500 may also be provided between the shield structure (low resistance structures 140 and 240 ) and the wiring 602 of the wiring layers 15 and 25 .

[0059] As described above, according to this embodiment, by providing the air gap 500 between the signal line 430 (the through electrodes 130, 230) and the shield structure (the low-resistance structures 140, 240), it is possible to reduce the capacitance value of the parasitic capacitance occurring between the signal line 430 and the shield structure and increase the speed of signal transmission of the signal line 430. Note that in this embodiment, a low-k film with a low dielectric constant may be provided in the portion of the air gap 500.

[0060] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIG. 5, but can be modified in various ways.

[0061] 6A and 6B, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described. Figures 6A and 6B are explanatory views showing the method for manufacturing the imaging device according to this embodiment, and correspond in detail to the cross-sectional views of Figure 5.

[0062] First, as shown in the upper left of Fig. 6A , various semiconductor processes are used to form up to the wiring layer 15 on the semiconductor substrate 11, and the wiring layer 15 is then covered with an insulating film made of an oxide film or the like. Next, as shown in the upper right of Fig. 5A , grooves that will become the shield structure (low resistance structure 140) and the through electrode 130 of the signal line 430 are formed using lithography, dry etching, or the like.

[0063] 6A, metal or the like that will become the shield structure (low resistance structure 140) and the through electrode 130 of the signal line 430 is embedded using techniques such as CVD or plating, and planarized using etching or CMP. Then, as shown in the lower right of FIG. 6A, a groove is formed by removing part of the insulating film between the shield structure (low resistance structure 140) and the through electrode 130.

[0064] Next, as shown in the upper left of FIG. 6B , an insulating film 142 is formed. At this time, the width of the groove and the conditions for forming the insulating film 142 are adjusted so that the insulating film 142 does not fill the groove between the shield structure (low-resistance structure 140) and the through electrode 130, but covers only the upper part with the insulating film 142. In this way, an air gap 500 is formed. Furthermore, as shown in the upper right of FIG. 6B , the insulating film 142 is planarized using CMP or the like.

[0065] 6B , the upper portion of the through electrode 130 is exposed, and a metal that will become a bonding electrode is embedded therein, followed by planarization. At this time, adjustments are made so that only the bonding electrode 132 connected to the through electrode 130 of the signal line 430 is exposed from the insulating film 142, and the shield structure (low-resistance structure 140) is not exposed.

[0066] Furthermore, similarly to the first substrate 10, the second substrate 20 also has a shield structure (low resistance structure 240), through electrodes 230 for signal lines 430, and air gaps 500 formed thereon. Then, similarly to the first embodiment, after bonding the first substrate 10 and the second substrate 20, the semiconductor substrate 11 of the first substrate 10 is shaved to a desired thickness, and a color filter (not shown), an on-chip lens 110, a pad 116 (not shown), and the like are processed, thereby obtaining the imaging device 1 according to this embodiment.

[0067] <<5. Third Embodiment>> <5.1 Detailed Configuration> Next, a detailed configuration of an imaging device 1 according to a third embodiment of the present disclosure will be described with reference to Fig. 7A and Fig. 7B . Fig. 7A is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of each substrate. Fig. 7B is an explanatory diagram showing an example planar configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a plan view of the cut surface of the imaging device 1 cut along dashed lines A and B in Fig. 7A .

[0068] In the first and second embodiments, the shielding structure is fabricated independently of the wiring, rather than simultaneously, which inevitably increases the number of steps, making it difficult to suppress increases in manufacturing cost and time.

[0069] Furthermore, in the first and second embodiments described above, if the signal lines 430 and the like are further miniaturized, the shield structure must be provided between the signal lines 430, and therefore must be further miniaturized relative to the signal lines 430 and the pitch of the bonding electrodes 132, 232 between the substrates. Therefore, if the signal lines 430 and the like are further miniaturized, the shield structure must be fabricated using a process that allows for finer fabrication than the process used to fabricate the signal lines 430 and the like. For example, if the diameter of the signal lines 430 (more specifically, the through electrodes 130, 230) is 0.5 μm and the pitch is 1 μm, the shield structure will be formed within the 0.5 μm width between the signal lines 430. Therefore, in the first and second embodiments described above, it is difficult to suppress increases in manufacturing cost and manufacturing time.

[0070] Therefore, in this embodiment, the shielding structure is designed to be fabricated simultaneously with the signal line 430, that is, the shielding structure can be fabricated using the process for fabricating the signal line 430, etc., thereby eliminating the need for a more miniaturized process. Therefore, this embodiment makes it possible to suppress increases in manufacturing cost and manufacturing time.

[0071] In this embodiment, as shown in FIG. 7A , the imaging device (photodetector, solid-state imaging device) 1 also has two substrates (a first substrate 10 and a second substrate 20). The imaging device 1 has a three-dimensional structure (a stacked structure) formed by bonding (joining) the two substrates. Note that the first substrate 10 is similar to that of the first embodiment except that a pad 116 connected to an external power supply is provided on the surface of the semiconductor substrate 11 opposite to the second substrate 20. Therefore, a detailed description of the first substrate 10 will be omitted here. Furthermore, the second substrate 20 is similar to that of the first embodiment, so a detailed description of the second substrate 20 will be omitted here.

[0072] 7A , in this embodiment as well, the floating diffusion 112 and the amplification transistor 214 are electrically connected via a signal line 430. Furthermore, the signal line 430 is made up of a through electrode 130 that penetrates the wiring layer 15 of the first substrate 10 and a through electrode 230 that penetrates the wiring layer 25 of the second substrate 20. The through electrodes 130 and 230 are electrically connected at their joint surfaces to form one signal line 430.

[0073] Furthermore, in this embodiment as well, a low-resistance structure 140 that penetrates the wiring layer 15 of the first substrate 10 and a low-resistance structure 240 that penetrates the wiring layer 25 of the second substrate 20 are provided as shield structures so as to surround the signal line 430. That is, the shield structure in this embodiment is divided into a first substrate 10 side and a second substrate 20 side in a cross-sectional view cut along the stacking direction of the two substrates (first substrate 10, second substrate 20) in the three-dimensional structure (stacked structure).

[0074] Furthermore, in the plan view shown in FIG. 7B , the low-resistance structures 140, 240 have a ring-like shape surrounding the circular signal line 430 (through electrode 130, 230). In plan view, an insulating film is provided between the signal line 430 (through electrode 130, 230) and the low-resistance structures 140, 240, and the film thickness of the insulating film is, for example, approximately 0.1 μm. In this embodiment, the distance between the signal line 430 (through electrode 130, 230) and the low-resistance structures 140, 240 can be accurately adjusted by adjusting the film thickness of the insulating film. Therefore, according to this embodiment, the shielding function of the shielding structure can be stably obtained while suppressing variations in the capacitance value of the parasitic capacitance occurring between the signal line 430 and the shielding structure. Furthermore, in this embodiment, taking into consideration process variations and breakdown voltage, the diameter of the signal line 430 (through electrodes 130, 230) in plan view is required to be smaller than the inner diameter of the ring-shaped low resistance structures 140, 240.

[0075] 7B , in this embodiment, conductive patterns 144, 244 are provided that are perpendicular to the signal line 430 and extend in a direction parallel to the bonding surface so as to connect to the ends of the low-resistance structures 140, 240 on the bonding surface side. The conductive patterns 144, 244 are provided so as to cover the entire bonding surface except for the signal line 430. Furthermore, insulating films 142, 242, which will be described later, are provided so as to cover the conductive patterns 144, 244.

[0076] In this embodiment, as in the first embodiment, the low-resistance structure 140 is electrically connected to the pad 116 connected to the external power supply in the peripheral region of the first substrate 10 via a conductive pattern 144, a through-hole wiring (not shown), etc. In addition, in this embodiment, the low-resistance structure 240 provided on the second substrate 20 side can also have a configuration similar to the low-resistance structure 140 on the first substrate 10 side, and is electrically connected to the pad 116 shared with the low-resistance structure 140 in the peripheral region via a conductive pattern 244, a through-hole wiring (not shown), etc. Note that the conductive patterns 144, 244 in a plan view are not particularly limited and may be a solid film covering the entire bonding surface except for the signal line 430, or may be a wiring-like film extending across the bonding surface in the row direction or column direction.

[0077] In this embodiment, as in the first embodiment, the low-resistance structures 140, 240 and the conductive patterns 144, 244 are formed from a low-resistance material. The low-resistance structures 140, 240 are formed from a material containing at least one selected from the group consisting of, for example, copper, cobalt, tungsten, silver, ruthenium, titanium, tantalum, and carbon. More specifically, the low-resistance structures 140, 240 and the conductive patterns 144, 244 can be formed from, for example, metals such as copper, cobalt, tungsten, silver, and ruthenium, nitrides such as titanium nitride and tantalum nitride, or carbon materials such as graphene and carbon nanotubes. In this embodiment, by forming the shielding structure from such a lower-resistance material, the shielding function of the shielding structure can be stably obtained even when the low-resistance structures 140, 240 are thinned for miniaturization, for example.

[0078] Furthermore, in this embodiment, since such a shielding structure can be fabricated simultaneously with the signal line 430, a more refined process is not required to fabricate the shielding structure, and therefore increases in manufacturing costs and manufacturing time can be suppressed.

[0079] Also in this embodiment, the cut surfaces of the shield structure are covered with insulating films (first insulating films) 142 and 242. In particular, the end of the low-resistance structure 140 on the bonding surface side and the conductive pattern 144 connected to that end, and the end of the low-resistance structure 240 on the bonding surface side and the conductive pattern 244 connected to that end are covered with the insulating films 142 and 242, respectively. Therefore, the surface of the low-resistance structure 140 facing the low-resistance structure 240 and the surface of the low-resistance structure 240 facing the low-resistance structure 140 are not exposed at the bonding surface between the first substrate 10 and the second substrate 20. That is, the insulating films 142 and 242 are provided to cover the areas on the bonding surfaces excluding the ends of the through electrodes 130 and 230 of the signal line 430.

[0080] In this embodiment, the insulating films 142 and 242 can also be formed from a material different from the interlayer insulating film 601 of the wiring layers 15 and 25 of each substrate (first substrate 10 and second substrate 20). That is, the material can be, for example, an insulating film such as an oxide film. In this embodiment, the film thickness of each insulating film 142 and 242 can be, for example, 0.1 μm to 0.3 μm. Therefore, the spacing between the low-resistance structures 140 and 240, i.e., the spacing between the two portions of the shield structure, is, for example, 0.2 to 0.6 μm. In this embodiment, the film thickness of the insulating films 142 and 242 can be reduced by adjusting the film formation conditions for the insulating films 142 and 242. Furthermore, according to this embodiment, by using insulating films 142 and 242 with reduced film thickness variation, it is easy to accurately adjust the spacing between the low-resistance structures 140 and 240, i.e., the spacing between the two portions of the shield structure. Therefore, in this embodiment, the unshielded area of ​​the signal line 430 can be narrowed while avoiding the occurrence of short circuits. Specifically, this embodiment can prevent noise from leaking from a signal line 430 located between two portions of the shielding structure to another signal line 430. As a result, this embodiment allows the shielding structure to effectively exhibit its shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates.

[0081] Furthermore, in this embodiment, insulating films (second insulating films) 118 and 218 are provided on the end of the low-resistance structure 140 opposite the bonding surface and the end of the low-resistance structure 240 opposite the bonding surface. The insulating films 118 and 218 function as stopper films when etching the interlayer insulating film 601 and as cap films that protect the wiring 602. Specifically, the insulating films 118 and 218 can be formed from, for example, silicon nitride or silicon carbide. In this embodiment, too, by fabricating a shielding structure using such stopper films and cap films, the low-resistance structures 140 and 240 forming the shielding structure can be extended to a height where they contact the stopper films and cap films. As a result, in this embodiment, too, the unshielded area of ​​the signal line 430 can be narrowed, allowing the shielding structure to effectively exhibit its shielding function.

[0082] 7A and 7B, the configuration of the imaging device 1 can be modified in various ways. For example, in this embodiment, the through electrodes 130, 230 of the signal line 430 may have a rectangular or polygonal shape in plan view, and in this case, the low-resistance structures 140, 240 may have a frame shape.

[0083] 8A and 8B, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described. Figures 8A and 8B are explanatory views showing the method for manufacturing the imaging device according to this embodiment, and correspond to the cross-sectional view of Figure 7A in detail.

[0084] First, as shown in the upper left of FIG. 8A , various semiconductor processes are used to form the wiring layer 15 on the semiconductor substrate 11, and the wiring layer 15 is then covered with an insulating film such as an oxide film. Next, as shown in the upper center of FIG. 8A , vias (vias matching the outer size of the low-resistance structure 140) that will become the shield structure (low-resistance structure 140 and conductive pattern 144) are formed using lithography, dry etching, or other techniques. At this time, the formation of the vias is stopped by an insulating film (stopper film) 118 that also functions as a metal diffusion prevention film so as not to expose the wiring 602 on the top surface of the first substrate 10. Next, as shown in the upper right of FIG. 8A , metal films and insulating films that will become the shield structure (low-resistance structure 140 and conductive pattern 144) are formed.

[0085] 8A , etching back is performed to remove the insulating film / metal film / insulating film (stopper film) 118 at the bottom of the via while leaving the metal film / insulating film on the sidewall of the via, thereby exposing the wiring of the first substrate 10. At this time, the metal film / insulating film outside the via may be covered with, for example, a resist (not shown) or the like so that the metal film / insulating film outside the via is not removed by etching.

[0086] 8A , metal that will become the through electrode 130 of the signal line 430 is embedded using techniques such as CVD or plating, and then planarized using etching, CMP, etc. At this time, the metal film that will become the shielding structure may be covered with, for example, a resist (not shown) so that the metal film is not exposed to the surface.

[0087] Next, as shown on the left side of Fig. 8B , a shield structure (low resistance structure 240) and through electrodes 230 for signal lines 430 are formed on the second substrate 20 in the same manner as on the first substrate 10. Furthermore, as shown in the center and right side of Fig. 8B , the first substrate 10 and the second substrate 20 are bonded and processed in the same manner as in the first embodiment. In this manner, the imaging device 1 according to this embodiment can be obtained.

[0088] As described above, in this embodiment, the shielding structure can be fabricated simultaneously with the signal line 430, so that fabricating the shielding structure does not require a more refined process, and therefore increases in manufacturing costs and manufacturing time can be suppressed.

[0089] 6. Fourth Embodiment Next, a detailed configuration of an imaging device 1 according to a fourth embodiment of the present disclosure will be described with reference to Fig. 9A and Fig. 9B. Fig. 9A is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of each substrate. Fig. 9B is an explanatory diagram showing an example planar configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a plan view of the cut surfaces of the imaging device 1 cut along dashed lines A, B, and B' in Fig. 9A.

[0090] In this embodiment, similarly to the third embodiment described above, the low-resistance structure 140 is electrically connected to the pad 116 connected to the external power supply via a conductive pattern 144, a through-wire (not shown), etc. Also in this embodiment, the low-resistance structure 240 provided on the second substrate 20 side is electrically connected via a conductive pattern 244, a through-wire (not shown), etc.

[0091] Furthermore, in the third embodiment, the conductive patterns 144, 244 in plan view were solid films that covered the entire bonding surface except for the signal line 430, but in this embodiment, they are wiring-like films that extend across the bonding surface in the row or column direction.

[0092] In detail, in this embodiment, as shown in FIG. 9B , the conductive pattern 144 is a wiring-like film extending along the row and column directions on the bonding surface. Meanwhile, the conductive pattern 244 is a wiring-like film extending along the column direction on the bonding surface. Note that in this embodiment, the conductive patterns 144 and 244 may have different shapes, or may have the same shape, or may be wiring-like films extending along the row direction on the bonding surface; this is not particularly limited. Note that this embodiment is similar to the third embodiment except for the shapes of the conductive patterns 144 and 244. Therefore, a detailed description of the configuration of the imaging device 1 will be omitted here, except for the shapes of the conductive patterns 144 and 244.

[0093] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIGS. 9A and 9B, but can be modified in various ways.

[0094] <<7. Fifth Embodiment>> <7.1 Detailed Configuration> Next, a detailed configuration of an imaging device 1 according to a fifth embodiment of the present disclosure will be described with reference to Fig. 10A and Fig. 10B . Fig. 10A is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of each substrate. Fig. 10B is an explanatory diagram showing an example planar configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a plan view of the cut surface of the imaging device 1 cut along dashed lines A and B in Fig. 10A .

[0095] In the third and fourth embodiments described above, similarly to the third embodiment described above, the low-resistance structures 140, 240 are electrically connected to the pad 116 connected to the external power supply via the conductive patterns 144, 244. In the present embodiment, the low-resistance structures 140, 240 are not limited to being connected via the conductive patterns 144, 244, and may be electrically connected to the pad 116 via wiring in the wiring layers 15, 25 of the substrates 10, 20, for example.

[0096] 10A and 10B , wirings 148 and 248 are provided in the wiring layers 15 and 25 so as to connect to the end portions of the low-resistance structures 140 and 240 on the bonding surface side. In addition, the wirings 148 and 248 have, for example, a ring shape so as to surround the signal line 430 (through electrodes 130 and 230) in the plan view shown in FIG. 10B . The wirings 148 and 248 are electrically connected to the pad 116 connected to an external power supply. Note that in this embodiment, the pad 116 is exposed through an opening penetrating the semiconductor substrate 11, similar to the first embodiment. Note that this embodiment is similar to the third embodiment except for the connection of the low-resistance structures 140 and 240 to the pad 116. Therefore, a detailed description of the configuration of the imaging device 1 will be omitted here, except for the connection of the low-resistance structures 140 and 240 to the pad 116.

[0097] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in FIGS. 10A and 10B, but can be modified in various ways.

[0098] 11A and 11B, an example of a method for manufacturing the imaging device 1 according to this embodiment will be described. Figures 11A and 11B are explanatory views showing the method for manufacturing the imaging device according to this embodiment, and correspond in detail to the cross-sectional view of Figure 10A.

[0099] First, as shown in the upper left of FIG. 11A , various semiconductor processes are used to form the wiring layer 15 on the semiconductor substrate 11, and the wiring layer 15 is then covered with an insulating film such as an oxide film. Next, as shown in the upper center of FIG. 11A , vias (vias matching the outer size of the low-resistance structure 140) that will become the shield structure (low-resistance structure 140) are formed using lithography, dry etching, or other techniques. At this time, the formation of the vias is stopped by an insulating film (stopper film) 118 that also functions as a metal diffusion prevention film so as not to expose the wiring 602 on the top surface of the first substrate 10. Next, as shown in the upper right of FIG. 11A , a metal film that will become the shield structure (low-resistance structure 140) is formed.

[0100] Next, as shown in the lower left of Fig. 11A, etching back is performed to leave the metal film on the sidewall of the via, and the metal film remaining on the sidewall of the via is connected to the wiring of the first substrate 10. Subsequently, as shown in the lower right of Fig. 11A, an insulating film is formed to cover the sidewall of the via.

[0101] Subsequently, as shown in the upper left part of FIG. 11B, metal that will become the through electrode 130 of the signal line 430 is embedded using techniques such as CVD or plating, and planarized using etching, CMP, or the like.

[0102] Next, as shown in the upper right of Fig. 11B , a shield structure (low resistance structure 240) and through electrodes 230 for signal lines 430 are formed on the second substrate 20 in the same manner as on the first substrate 10. Furthermore, as shown in the lower part of Fig. 11B , the first substrate 10 and the second substrate 20 are bonded and processed in the same manner as in the first embodiment. In this manner, the imaging device 1 according to this embodiment can be obtained.

[0103] <<8. Sixth Embodiment>> Next, a detailed configuration of an imaging device 1 according to a sixth embodiment of the present disclosure will be described with reference to Fig. 12. Fig. 12 is an explanatory diagram showing an example cross-sectional configuration of the imaging device 1 according to this embodiment, and more specifically, corresponds to a cross-sectional view of the imaging device 1 cut along the stacking direction of the substrates.

[0104] 12 , the imaging device 1 may have a third substrate 30 including a semiconductor substrate. The third substrate 30 is further stacked on the stacked structure of the first substrate 10 and the second substrate 20. The third substrate 30 may also be provided with, for example, a control circuit that controls the pixels 12, an image processing circuit that processes pixel signals from the pixels 12, or a memory element that stores the pixel signals. Furthermore, signal lines (not shown) that carry pixel signals may be provided between the second substrate 20 and the third substrate, and the signal lines may be surrounded by the above-mentioned shielding structure (not shown).

[0105] In this embodiment, the configuration of the imaging device 1 is not limited to the configuration shown in Fig. 12. In this embodiment, for example, the through electrodes 130, 230 of the signal line 430 may be rectangular in plan view, and in this case, the low-resistance structures 140, 240 may be frame-shaped. Furthermore, the through electrodes 130, 230 of the signal line 430 may be tapered in cross-sectional view.

[0106] <<9. Summary>> As described above, in each embodiment of the present disclosure, the shielding structure can effectively exhibit a shielding function while avoiding the occurrence of short circuits due to misalignment when bonding substrates.

[0107] In the above-described embodiment of the present disclosure, the case where the present disclosure is applied to an imaging device has been described, but the embodiment of the present disclosure is not limited thereto and may be applied to, for example, a distance measuring device that measures distance using a photodetector element, or other semiconductor devices. In such cases, the signal lines to be shielded by the low-resistance structures 140, 240 of the shield structure are not limited to signal lines electrically connecting between the floating diffusion and the amplification transistor, but are not particularly limited as long as they electrically connect two substrates.

[0108] The descriptions of specific lengths and shapes in the above description do not necessarily mean the same values ​​as mathematically defined numerical values ​​or geometrically defined shapes. In particular, the descriptions of specific lengths and shapes in the following description also include shapes similar to those that have allowable differences (errors and distortions) in the imaging device (photodetector) 1, its manufacturing process, and its use and operation.

[0109] Furthermore, the imaging device 1 according to the embodiment of the present disclosure can be manufactured using methods, devices, and conditions that are used in the manufacture of general semiconductor devices. That is, the imaging device 1 according to the present embodiment can be manufactured using existing semiconductor device manufacturing processes.

[0110] Examples of the above-mentioned methods include physical vapor deposition (PVD), CVD, and atomic layer deposition (ALD). Examples of PVD methods include vacuum deposition, electron beam (EB) deposition, various sputtering methods (magnetron sputtering, RF (radio frequency)-direct current (DC) combined bias sputtering, electron cyclotron resonance (ECR) sputtering, facing target sputtering, and high frequency sputtering), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods include plasma CVD, thermal CVD, metal organic (MO) CVD, and photo-CVD. Other methods include electroplating, electroless plating, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, and flexographic printing, stamping, spraying, and various coating methods such as air doctor coater, blade coater, rod coater, knife coater, squeeze coater, reverse roll coater, transfer roll coater, gravure coater, kiss coater, cast coater, spray coater, slit orifice coater, and calendar coater. Examples of patterning methods include chemical etching such as shadow masking, laser transfer, and photolithography, and physical etching using ultraviolet light or a laser. Additionally, examples of planarization techniques include CMP, laser planarization, and reflow.

[0111] <<10. Application Examples>> <10.1 Application Example to a Camera> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure may be applied to a camera or the like. Therefore, with reference to FIG. 13 , a configuration example of a camera 700 as an electronic device to which the present technology is applied will be described. FIG. 13 is an explanatory diagram showing an example of a schematic functional configuration of a camera 700 to which the technology according to the present disclosure (the present technology) can be applied.

[0112] As shown in FIG. 13, the camera 700 includes an imaging device 1, an optical lens 710, a shutter mechanism 712, a drive circuit unit 714, and a signal processing circuit unit 716.

[0113] The optical lens 710 focuses image light (incident light) from a subject onto the imaging surface of the imaging device 1. This causes signal charge to accumulate for a certain period of time in the imaging element of the imaging device 1. The shutter mechanism 712 opens and closes to control the light irradiation period and light blocking period of the imaging device 1. The drive circuit unit 714 supplies drive signals to the imaging device 1 to control the signal transfer operation and the shutter operation of the shutter mechanism 712. In other words, the imaging device 1 transfers signals based on the drive signals (timing signals) supplied from the drive circuit unit 714. The signal processing circuit unit 716 performs various signal processing. For example, the signal processing circuit unit 716 outputs the processed video signal to a storage medium such as a memory (not shown) or a display unit (not shown).

[0114] The above describes an example configuration of the camera 700. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be modified as appropriate depending on the technical level at the time of implementation.

[0115] 10.2. Example of Application to a Smartphone The technology according to the present disclosure may also be applied to a smartphone or the like. Therefore, a configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described with reference to Fig. 14. Fig. 14 is a block diagram showing an example of a schematic functional configuration of a smartphone 900 to which the technology according to the present disclosure (the present technology) can be applied.

[0116] 14 , the smartphone 900 includes a CPU (Central Processing Unit) 901, a ROM (Read Only Memory) 902, and a RAM (Random Access Memory) 903. The smartphone 900 also includes a storage device 904, a communication module 905, and a sensor module 907. The smartphone 900 also includes an imaging device 1, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. The smartphone 900 may also include a processing circuit such as a DSP (Digital Signal Processor) instead of or in addition to the CPU 901.

[0117] The CPU 901 functions as an arithmetic processing unit and control device, and controls all or part of the operations within the smartphone 900 in accordance with various programs recorded in the ROM 902, RAM 903, storage device 904, etc. The ROM 902 stores programs and calculation parameters used by the CPU 901. The RAM 903 temporarily stores programs used in the execution of the CPU 901 and parameters that change as appropriate during the execution. The CPU 901, ROM 902, and RAM 903 are interconnected by a bus 914. The storage device 904 is a data storage device configured as an example of a storage unit of the smartphone 900. The storage device 904 is configured, for example, by a magnetic storage device such as an HDD (hard disk drive), a semiconductor storage device, an optical storage device, etc. This storage device 904 stores programs executed by the CPU 901, various data, and various data acquired from outside.

[0118] The communication module 905 is a communication interface configured with, for example, a communication device for connecting to the communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), or wireless USB (WUSB). The communication module 905 may also be a router for optical communication, a router for asymmetric digital subscriber line (ADSL), or a modem for various communications. The communication module 905 transmits and receives signals between the Internet and other communication devices using a predetermined protocol such as TCP (Transmission Control Protocol) / IP (Internet Protocol). The communication network 906 connected to the communication module 905 is a wired or wireless network, such as the Internet, a home LAN, infrared communication, or satellite communication.

[0119] The sensor module 907 includes various sensors such as a motion sensor (e.g., an acceleration sensor, a gyro sensor, a geomagnetic sensor, etc.), a biometric information sensor (e.g., a pulse sensor, a blood pressure sensor, a fingerprint sensor, etc.), or a position sensor (e.g., a GNSS (Global Navigation Satellite System) receiver, etc.).

[0120] The imaging device 1 is provided on the surface of the smartphone 900 and can capture an image of an object located on the front or back side of the smartphone 900. Specifically, the imaging device 1 can be configured to which the technology according to the present disclosure (the present technology) is applied, and can include an imaging element (not shown) and a signal processing circuit (not shown) that performs imaging signal processing on a signal photoelectrically converted by the imaging element. Furthermore, the imaging device 1 can further include an optical system mechanism (not shown) that includes an imaging lens, a zoom lens, a focus lens, and the like, and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. The imaging element collects incident light from an object as an optical image, and the signal processing circuit photoelectrically converts the formed optical image on a pixel-by-pixel basis, reads out the signal from each pixel as an imaging signal, and performs image processing to obtain a captured image.

[0121] The display device 910 is provided on the surface of the smartphone 900 and can be, for example, a display device such as an LCD (Liquid Crystal Display) or an organic EL (Electro Luminescence) display. The display device 910 can display an operation screen, captured images acquired by the imaging device 1 described above, and the like.

[0122] The speaker 911 can output, for example, telephone call audio and audio accompanying the video content displayed by the display device 910 described above to the user.

[0123] The microphone 912 can collect, for example, the user's voice during a call, voice including commands to activate functions of the smartphone 900, and voice from the surrounding environment of the smartphone 900.

[0124] The input device 913 is a device operated by a user, such as a button, a keyboard, a touch panel, or a mouse. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and instruct processing operations.

[0125] The above describes an example configuration of the smartphone 900. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be changed as appropriate depending on the technical level at the time of implementation.

[0126] 10.3 Application Example to Unmanned Aerial Vehicles The technology according to the present disclosure can also be applied to an imaging device 1 mounted on an unmanned aerial vehicle (drone). An unmanned aerial vehicle that can be equipped with an imaging device 1 according to an embodiment of the present disclosure will now be described with reference to FIGS. 15 and 16 . FIG. 15 is a schematic diagram of the exterior of an unmanned aerial vehicle 920, and more specifically, a schematic diagram of the unmanned aerial vehicle 920 as viewed from the front. FIG. 16 is a block diagram showing an example of a general functional configuration of the unmanned aerial vehicle 920.

[0127] The unmanned aerial vehicle 920 shown in Figure 15 is a small unmanned aircraft that can fly using autonomous flight functions and self-sustaining attitude control functions, etc. As shown in Figure 16, the unmanned aerial vehicle 920 mainly has a propeller 930, a propeller drive unit 932, a flight control unit 934, a positioning unit 940, and a flight control communication unit 950. Furthermore, an imaging device 1 is provided on the front of the unmanned aerial vehicle 920, etc., and can capture images of objects, etc. Each functional unit of the unmanned aerial vehicle 920 is described below.

[0128] 15, a plurality of propellers 930 are provided on the top of the unmanned aerial vehicle 920, and rotate using power transmitted from a propeller drive unit 932 provided inside the unmanned aerial vehicle 920, thereby providing thrust to the unmanned aerial vehicle 920 and maintaining the horizontal attitude of the unmanned aerial vehicle 920. The propeller drive unit 932 is also provided inside the unmanned aerial vehicle 920, and rotates each propeller 930 according to control from a flight control unit 934, which will be described later.

[0129] The positioning unit 940 is provided inside the unmanned aerial vehicle 920, and acquires two-dimensional position information (longitude information, latitude information) and altitude information, which are position information of the unmanned aerial vehicle 920, as well as attitude information and acceleration information of the unmanned aerial vehicle 920, and outputs these to a flight control unit 934, which will be described later. The output position information, attitude information, etc. are used to fly the unmanned aerial vehicle 920 to a desired location and to maintain the unmanned aerial vehicle 920 in a horizontal attitude.

[0130] As shown in FIG. 16 , the positioning unit 940 mainly includes an attitude detection unit 942, a GPS (Global Positioning System) unit 944, and an altimeter 946. In detail, the attitude detection unit 942 includes, for example, a gyro sensor that combines an acceleration sensor and an angular velocity sensor, and detects the attitude (tilt, direction, etc.) and acceleration of the unmanned aerial vehicle 920. The GPS unit 944 is composed of a current position measurement device that performs measurements using GPS signals from GPS satellites, and can acquire two-dimensional position information (latitude information, longitude information) of the unmanned aerial vehicle 920 on the Earth's surface. The altimeter 946 can acquire altitude information (height from the Earth's surface) of the unmanned aerial vehicle 920.

[0131] Note that the positioning unit 940 does not need to include the altimeter 946 if altitude information with sufficient accuracy can be acquired using the GPS unit 944. However, the altitude information acquired by the GPS unit 944 may have low accuracy depending on the positioning state, and in this case, the altitude information may not be sufficiently accurate as altitude information to be used for flying the unmanned air vehicle 920. Therefore, in order to acquire altitude information with sufficient accuracy, it is preferable that the positioning unit 940 includes the altimeter 946.

[0132] When the flight control unit 934 receives a control signal from a control device (not shown) held by the pilot, it controls the propeller drive unit 932 in accordance with the flight instructions of the control signal, while utilizing the position information and attitude information obtained by the positioning unit 940 described above.

[0133] The flight control communication unit 950 communicates wirelessly with a control device (not shown) owned by the pilot, and transmits and receives control signals and the like used for flying the unmanned aerial vehicle 920. For example, the flight control communication unit 950 receives control signals from the control device at predetermined time intervals and outputs the received control signals to the flight control unit 934 described above.

[0134] By applying the technology disclosed herein to the unmanned aerial vehicle 920, for example, images can be taken by an imaging device 1 mounted on the unmanned aerial vehicle 920.

[0135] The above shows an example of the configuration of the unmanned aerial vehicle 920. Each of the above components may be configured using general-purpose components, or may be configured using hardware specialized for the function of each component. Such a configuration may be modified as appropriate depending on the technical level at the time of implementation.

[0136] Furthermore, the technology disclosed herein (the present technology) is not limited to application to unmanned aerial vehicles 920, but may also be realized as an imaging device 1 mounted on any type of moving body, such as an automobile (including an autonomous vehicle), an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, a robot, etc.

[0137] <<11. Supplementary Information>> Although preferred embodiments of the present disclosure have been described in detail above with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to such examples. It is clear that a person skilled in the art of the present disclosure can conceive of various modified or altered examples within the scope of the technical idea described in the claims, and it is understood that these also naturally fall within the technical scope of the present disclosure.

[0138] Furthermore, the effects described herein are merely descriptive or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that will be apparent to those skilled in the art from the description of this specification, in addition to or in place of the above-described effects.

[0139] The present technology can also be configured as follows. (1) A photodetector including a stacked structure including a first substrate on which photodetection elements are provided and a second substrate on which a readout circuit for reading out detection signals from the photodetection elements is provided, a signal line for transmitting the detection signal from the first substrate to the second substrate, and a low-resistance structure surrounding the signal line, wherein in a cross-sectional view of the photodetector cut along a stacking direction of the stacked structure, the low-resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low-resistance structure are each covered with a first insulating film. (2) The photodetector according to (1), wherein the first substrate has an array region in which a plurality of the photodetection elements are arranged in a matrix, and a peripheral region provided around the array region, and a portion of the low-resistance structure on the first substrate side is set to a fixed potential by being electrically connected to a pad provided in the peripheral region. (3) The photodetector according to (2) above, wherein the first insulating film has a film thickness of 0.1 μm to 0.3 μm. (4) The photodetector according to (2) or (3) above, wherein each of the first and second substrates includes a semiconductor substrate and a wiring layer provided on a surface of the semiconductor substrate on the bonding surface side between the first substrate and the second substrate, and the first insulating film is provided on the bonding surface side of the wiring layer. (5) The photodetector according to (4) above, wherein the wiring layer includes wiring and an inter-wiring insulating film, and the first insulating film includes a material different from that of the inter-wiring insulating film. (6) The photodetector according to (5) above, further including a second insulating film provided between the divided low-resistance structure and the semiconductor substrate. (7) The photodetector according to (6) above, wherein the second insulating film includes silicon nitride or silicon carbide. (8) The photodetector according to any one of (1) to (7) above, comprising a plurality of the signal lines, wherein in a plan view of the photodetector, the low resistance structure has a lattice shape so as to surround each of the signal lines.(9) The photodetector according to any one of (1) to (8), wherein an air gap is provided between the signal line and the low-resistance structure. (10) The photodetector according to (9), wherein the length of the air gap in the stacking direction is the same as or shorter than that of the divided low-resistance structure. (11) The photodetector according to (4), wherein, in a plan view of the photodetector, the low-resistance structure has a ring-like shape so as to surround the signal line. (12) The photodetector according to (11), wherein the low-resistance structure penetrates the wiring layer, is electrically connected to a conductive pattern provided between the wiring layer and the first insulating film, and is electrically connected to the pad via the conductive pattern. (13) The photodetector according to (12), wherein the conductive pattern has a solid film or a wiring shape. (14) The photodetector according to any one of (1) to (13), wherein the low-resistance structure includes at least one selected from the group consisting of copper, cobalt, tungsten, silver, ruthenium, titanium, tantalum, and carbon. (15) The photodetector according to (14), wherein the low-resistance structure includes titanium nitride, tantalum nitride, graphene, or carbon nanotubes. (16) The photodetector according to any one of (1) to (15), wherein the stacked structure further includes a third substrate. (17) A solid-state imaging device comprising: a laminated structure consisting of a first substrate on which an imaging element is provided and a second substrate on which a readout circuit for reading out pixel signals from the imaging element is provided; signal lines for transporting the pixel signals from the first substrate to the second substrate; and a low-resistance structure surrounding the signal lines, wherein in a cross-sectional view of the solid-state imaging device cut along the stacking direction of the laminated structure, the low-resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low-resistance structure are each covered with a first insulating film.(18) The solid-state imaging device according to (17), wherein the signal line electrically connects a charge accumulation section provided on the first substrate, which accumulates charges generated in the imaging element, to an amplification transistor provided on the second substrate, which reads out the charges from the charge accumulation section.

[0140] 1 Imaging device 10, 20, 30 Substrate 11, 21, 31 Semiconductor substrate 12 Pixel 13 Pixel region 15, 25 Wiring layer 22 Readout circuit 23 Pixel drive line 24 Vertical signal line 32 Logic circuit 33 Vertical drive circuit 34 Column signal processing circuit 35 Horizontal drive circuit 36 ​​System control circuit 101 Photoelectric conversion unit 102, 114 Transfer transistor 103, 112 Floating diffusion 110 On-chip lens 116 Pad 118, 142, 218, 242 Insulating film 130, 230 Through electrode 132, 232 Bonding electrode 140, 240 Low resistance structure 144, 244 Conductive pattern 148, 248, 602 Wiring 201 Reset transistor 202, 214 Amplifying transistor 203 Select transistor 430 Signal line 500 Air gap 601 Interlayer insulating film 700 Camera 710 Optical lens 712 Shutter mechanism 714 Drive circuit unit 716 Signal processing circuit unit 900 Smartphone 901 CPU 902 ROM 903 RAM 904 Storage device 905 Communication module 906 Communication network 907 Sensor module 910 Display device 911 Speaker 912 Microphone 913 Input device 914 Bus 920 Unmanned aerial vehicle 930 Propeller 932 Propeller drive unit 934 Flight control unit 940 Positioning unit 942 Attitude detection unit 944 GPS unit 946 Altimeter 950 Flight control communication unit

Claims

1. A photodetection device comprising: a layered structure consisting of a first substrate having a photodetection element and a second substrate having a readout circuit for reading out a detection signal from the photodetection element; a signal line for conveying the detection signal from the first substrate to the second substrate; and a low resistance structure surrounding the signal line, wherein in a cross-sectional view of the photodetection device cut along the stacking direction of the layered structure, the low resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low resistance structure are each covered with a first insulating film.

2. The photodetection device described in claim 1, wherein the first substrate has an array region in which a plurality of the photodetection elements are arranged in a matrix, and a peripheral region provided around the array region, and a portion of the low resistance structure on the first substrate side is electrically connected to a pad provided in the peripheral region, and is set to a fixed potential.

3. The photodetector according to claim 2, wherein the first insulating film has a thickness of 0.1 μm to 0.3 μm.

4. The photodetector device of claim 2, wherein each of the first and second substrates comprises: a semiconductor substrate; and a wiring layer provided on a surface of the semiconductor substrate facing the bonding surface between the first substrate and the second substrate; and the first insulating film is provided on a surface of the wiring layer facing the bonding surface.

5. The photodetector according to claim 4, wherein the wiring layer includes a wiring and an inter-wiring insulating film, and the first insulating film includes a material different from that of the inter-wiring insulating film.

6. The photodetector according to claim 5, further comprising a second insulating film provided between the divided low resistance structure and the semiconductor substrate.

7. The photodetector device according to claim 6, wherein the second insulating film includes silicon nitride or silicon carbide.

8. The photodetector according to claim 1, comprising a plurality of said signal lines, wherein in a plan view of said photodetector, said low resistance structure has a lattice shape so as to surround each of said signal lines.

9. The photodetector according to claim 1, wherein an air gap is provided between the signal line and the low resistance structure.

10. The photodetector according to claim 9, wherein the length of the air gap in the stacking direction is the same as or shorter than that of the divided low resistance structure.

11. The photodetector according to claim 4, wherein, in a plan view of the photodetector, the low resistance structure has a ring-like shape so as to surround the signal line.

12. The photodetector device described in claim 11, wherein the low resistance structure penetrates the wiring layer, is electrically connected to a conductive pattern provided between the wiring layer and the first insulating film, and is electrically connected to the pad via the conductive pattern.

13. The photodetector according to claim 12, wherein the conductive pattern has a solid film or wiring shape.

14. The photodetection device of claim 1, wherein said low resistance structure comprises at least one selected from the group consisting of copper, cobalt, tungsten, silver, ruthenium, titanium, tantalum, and carbon.

15. The optical detection device of claim 14, wherein the low resistance structure comprises titanium nitride, tantalum nitride, graphene, or carbon nanotubes.

16. The photodetector device of claim 1, wherein the laminate further comprises a third substrate.

17. A solid-state imaging device comprising: a laminated structure consisting of a first substrate on which an imaging element is provided and a second substrate on which a readout circuit for reading out pixel signals from the imaging element is provided; a signal line for transporting the pixel signals from the first substrate to the second substrate; and a low resistance structure surrounding the signal line, wherein in a cross-sectional view of the solid-state imaging device cut along the stacking direction of the stacked structure, the low resistance structure is divided into a first substrate side and a second substrate side, and the two divided surfaces of the low resistance structure are each covered with a first insulating film.

18. The solid-state imaging device described in claim 17, wherein the signal line electrically connects a charge accumulation section provided on the first substrate, which accumulates charge generated in the imaging element, and an amplifying transistor provided on the second substrate, which reads out the charge from the charge accumulation section.

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