DC current blocking apparatus for transformers in HF link converters
The DC blocking circuit addresses the challenge of DC current flow in high-frequency transformers by applying a compensating DC voltage, effectively preventing saturation and losses, and offering a more cost-effective and simpler solution than existing methods.
Patent Information
- Application Number
- PCT/US2024/049543
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-10-02
- Filing Date
- 2024-10-02
- Publication Date
- 2025-04-10
AI Technical Summary
High-frequency transformers in power converters face challenges with DC current flow due to small offsets or deviations in switching, leading to core saturation and potential device destruction. Existing solutions, such as series capacitors or high-bandwidth control circuits, are either costly, bulky, or difficult to implement effectively.
A DC blocking circuit is introduced, comprising switches and diodes connected in antiparallel, which applies a compensating DC voltage to offset any unintended DC voltage in the primary winding. This circuit includes a current sensor and control circuit to determine the presence of a DC component and adjust the switching accordingly.
The DC blocking circuit effectively mitigates DC current in high-frequency transformers, preventing saturation and additional losses, while being more cost-effective and simpler to implement compared to traditional solutions.
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Figure US2024049543_10042025_PF_FP_ABST
Abstract
Description
DC CURRENT BLOCKING APPARATUS FOR TRANSFORMERS IN HF LINK CONVERTERSCROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Application Serial No. 63 / 587,228, filed on 2 October 2023, which is incorporated herein by reference in its entirety as if fully set forth below.FIELD OF THE DISCLOSURE
[0002] The various embodiments of the present disclosure relate generally to power converters.BACKGROUND
[0003] The need for high-frequency (HF) link converters in a wide variety of applications is growing. Starting from a variety of circuits in the past, including the full bridge DC / DC converter, the Dual Active Bridge (DAB) converter, and HF Link Cycloconverter, to more recent implementations of Isolated Inertia-Less Converters (IIC) and Universal Minimal Converters (UMC), the ability to reduce the size of the galvanic isolation barrier from a 60 Hz transformer to a high-frequency transformer, is of great interest. In most of these implementations, a first power converter (often a full bridge), generates a high-frequency waveform, typically a square or quasi-square wave, which is then applied to the “primary” port of an HF transformer. A second power converter, located on the “secondary” port of the transformer, then processes the high-frequency waveform, to realize the desired output. In some cases, the second converter may be a diode rectifier to provide a DC output voltage. It could also be a different type of converter that directly generates single- or three-phase AC output voltages.
[0004] The basic power conversion approach requires that a high-frequency waveform be applied to the HF transformer. The transformer is designed to operate at high frequency without saturating the magnetic core, or exceeding dissipation limits for the core or copper windings. These design procedures are well known to one skilled in the art. The HF transformer size reduction occurs because the flux in the core at a given voltage varies inversely with the frequency. This suggests that the converter should be operated at the highest frequency that is consistent with losses and efficiency targets.
[0005] It is well known that as the size of the HF transformer reduces, the number of turns needed, and thus the amount of copper wire needed reduces. For such transformers, the DC resistance of the primary and secondary windings can become low - particularly for high- power transformers. As the primary converter is producing the square (or quasi-square) waveform by switching the bridge devices, any small offset or deviation in switching, can produce a net DC voltage on the bridge terminals. FIG. 1 A shows a schematic of a typical DAB power converter. The power converter comprises a DC bridge comprises four switches connected to the primary winding and an AC bridge comprising four switches connected to the secondary winding of the transformer. FIG. IB shows representative waveforms of the voltages across the primary (vp„) and secondary (viee) windings, as well as the current (ip) flowing in the transformer. The average value of both vpriand vsecshould be nearly zero, or else the DC current will flow in the two windings. This DC current can cause core saturation and result in converter malfunction, possibly destruction.
[0006] For instance, if vpriis switching between + / - 500 V at 40 kHz (i.e., with a period of 25 ps), with what is intended to be a square wave, and a slight inaccuracy of 50 ns (0.125%) is present in the definition of the switching edges; calculating the average DC voltage, we see that an average voltage of 2 V can be impressed across the transformer. A high-power transformer handling 200 A at + / -500 V (100 kW), may have a primary winding DC resistance of 1 mQ. This could easily result in 2,000 A of DC current in the winding if it is not controlled. This can result in transformer saturation and, in this case, the destruction of the device due to overheating and loss of control.
[0007] This problem is well-known and is generally addressed in one of two ways. A series capacitor between the primary winding and DC bridge can be used to block the DC current and is a good solution at low current levels, as shown in FIG. 1A. However, at high currents, the cost and size of a series capacitor that can handle the rms currents can become excessive and limit the viability of such a converter. For example, taking the DAB converter with the ratings previously specified, a series DC blocking capacitor of around 320 pF at 200 A rms current handling would be needed to eliminate the DC bias in the transformer winding, which is expensive and bulky. This approach can also add excessive loop inductance, which can deleteriously impact converter performance. A second approach is to use control circuits that measure the DC current, and then adjust the duty cycle of the converter to reduce the DC voltage applied to the winding to zero. This approach requires high-bandwidth precisionmeasurements and control, as it is necessary to control the switching to better than 100 psec accuracy (0.0004%) to control the DC current in the winding. This is very challenging and is also sensitive to other factors, such as ripple voltage. This problem is discussed in the literature, but the solution most often used is the series capacitor. Accordingly, a better solution is needed.BRIEF SUMMARY
[0008] An exemplary embodiment of the present disclosure provides a power converter comprising a transformer, a first bridge, a second bridge, and a DC blocking circuit. The transformer can comprise a first winding and a second winding. The first bridge can be electrically coupled to the first winding. The second bridge can be electrically coupled to the second winding. The DC blocking circuit can be electrically coupled in series to the first winding and the first bridge and configured to apply a DC voltage to compensate for DC voltage in the primary winding.
[0009] In any of the embodiments disclosed herein, the DC blocking circuit can comprise a first switch, a first diode electrically connected in antiparallel with the first switch, a second switch, and a second diode electrically connected in antiparallel with the second switch.
[0010] In any of the embodiments disclosed herein, the power converter can further comprise a current sensor and a control circuit. The current sensor can be configured to generate a current signal indicative of a measurement of a current flowing through the first winding. The control circuit can be configured to send gating signals to the first and second switches based, at least in part, on the current signal, to open and close the first and second switches.
[0011] In any of the embodiments disclosed herein, the control circuit can be configured to determine whether the current flowing through the first winding has a DC component.
[0012] In any of the embodiments disclosed herein, the control circuit can be configured such that, if the control circuit determines the current flowing through the first winding does not have a DC component, the control circuit sends a gating signal to close the first and second switches with a specified duty cycle.
[0013] In any of the embodiments disclosed herein, the control circuit can be configured such that, if the control circuit determines the current flowing through the first winding has a DC component, the control circuit sends a gating signal to open one of the first and second switches.
[0014] In any of the embodiments disclosed herein, the control circuit can be configured such that, if the control circuit determines the current flowing through the first winding has a positiveDC component, the control circuit sends a gating signal to open the first switch and close the second switch.
[0015] In any of the embodiments disclosed herein, the control circuit can be configured such that, if the control circuit determines the current flowing through the first winding has a negative DC component, the control circuit sends a gating signal to close the first switch and open the second switch.
[0016] In any of the embodiments disclosed herein, the control circuit can comprise a low pass filter configured to filter the current signal.
[0017] In any of the embodiments disclosed herein, the control circuit can further comprise a comparator configured to compare the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.
[0018] In any of the embodiments disclosed herein, the control circuit can further comprise a proportional-integral (PI) controller configured to receive an output from the comparator and generate, based on the received output from the comparator, the gating signals.
[0019] In any of the embodiments disclosed herein, the first diode can be electrically connected antiparallel with the second diode.
[0020] In any of the embodiments disclosed herein, the AC bridge can comprise an output comprising one or more capacitors.
[0021] In any of the embodiments disclosed herein, the first and second switches can be connected in antiseries, wherein the serially connected first and second switches are electrically connected in parallel with a capacitor.
[0022] In any of the embodiments disclosed herein, the AC bridge can comprise an output comprising one or more inductors.
[0023] In any of the embodiments disclosed herein, the transformer can be a high-frequency transformer.
[0024] Another embodiment of the present disclosure provides a method of compensating for DC current in a power converter. The power converter can be any of the power converters disclosed herein. The method can comprise applying, with the DC blocking circuit, a DC voltage to compensate for DC voltage in the primary winding.
[0025] In any of the embodiments disclosed herein, the method can further comprise: generating, with a current sensor, a current signal indicative of a measurement of a current flowing through the first winding, and sending, with a control circuit, gating signals to the firstand second switches based, at least in part, on the current signal, to open and close the first and second switches.
[0026] In any of the embodiments disclosed herein, the method can further comprise, determining, with the control circuit, whether the current flowing through the first winding has a DC component.
[0027] In any of the embodiments disclosed herein, sending, with a control circuit, gating signals to the first and second switches, can comprise sending gating signals to close the first and second switches if the control circuit determines the current flowing through the first winding does not have a DC component.
[0028] In any of the embodiments disclosed herein, sending, with a control circuit, gating signals to the first and second switches, can comprise sending gating signals to open one of the first and second switches if the control circuit determines the current flowing through the first winding has a DC component.
[0029] In any of the embodiments disclosed herein, sending, with a control circuit, gating signals to the first and second switches, can comprise sending gating signals to open the first switch and close the second switch, if the control circuit determines the current flowing through the first winding has a positive DC component.
[0030] In any of the embodiments disclosed herein, sending, with a control circuit, gating signals to the first and second switches, can comprise sending gating signals to close the first switch and open the second switch, if the control circuit determines the current flowing through the first winding has a negative DC component.
[0031] In any of the embodiments disclosed herein, the method can further comprise low pass filtering, with the control circuit, the current signal.
[0032] In any of the embodiments disclosed herein, the method can further comprise comparing, with a comparator of the control circuit, the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.
[0033] In any of the embodiments disclosed herein, the method can further comprise generating, with a proportional-integral (PI) controller of the control circuit, the gating signals, based on a received output from the comparator.
[0034] These and other aspects of the present disclosure are described in the Detailed Description below and the accompanying drawings. Other aspects and features of embodimentswill become apparent to those of ordinary skill in the art upon reviewing the following description of specific, exemplary embodiments in concert with the drawings. While features of the present disclosure may be discussed relative to certain embodiments and figures, all embodiments of the present disclosure can include one or more of the features discussed herein. Further, while one or more embodiments may be discussed as having certain advantageous features, one or more of such features may also be used with the various embodiments discussed herein. In similar fashion, while exemplary embodiments may be discussed below as device, system, or method embodiments, it is to be understood that such exemplary embodiments can be implemented in various devices, systems, and methods of the present disclosure.BRIEF DESCRIPTION OF THE DRAWINGS
[0035] The following detailed description of specific embodiments of the disclosure will be better understood when read in conjunction with the appended drawings. For the purpose of illustrating the disclosure, specific embodiments are shown in the drawings. It should be understood, however, that the disclosure is not limited to the precise arrangements and instrumentalities of the embodiments shown in the drawings.
[0036] FIGS. 1A-B provide a schematic of a conventional dual active bridge (DAB) converter structure with blocking capacitors (FIG. 1 A) and key waveforms (FIG. IB).
[0037] FIG. 2 provide a schematic of a conventional universal minimal converter (UMC) (top) and waveforms of the transformer primary side current over two switching cycles (bottom).
[0038] FIGS. 3A-B provide waveforms without a saturation prevention mechanism showing the effect of mismatch in the durations of positive and negative half cycles with 0.05% higher duty cycles of (FIG. 3A) positive and (FIG. 3B) negative half cycles resulting in DC current responsible for transformer saturation and additional losses.
[0039] FIG. 4 provides a DC blocking circuit and controller, in accordance with some embodiments of the present disclosure.
[0040] FIGS. 5A-B provide waveforms depicting the principle of operation of the DC blocking circuit shown in FIG. 4 with positive and negative DC offset compensation for power flow from (FIG. 5A) DC to AC and (FIG. 5B) AC to DC sides of the UMC.
[0041] FIGS. 6A-B provide waveforms from using the DC blocking circuit in FIG. 4 showing the DC saturation elimination under the effect of mismatch in the durations of positive andnegative half cycles with 0.05% higher duration of (FIG. 6A) positive and (FIG. 6B) negative half cycles.
[0042] FIG. 7 provides a schematic of an isolated inertia-less power converter (IIC) for DC to three-phase AC conversion.
[0043] FIGS. 8A-B provide waveforms of the IIC for power flow from (FIG. 8A) DC to AC and (FIG. 8B) AC to DC sides.
[0044] FIGS. 9A-B provide waveforms in an IIC without the saturation prevention mechanism showing the effect of mismatch in the durations of positive and negative half cycles with 1% higher duration of (FIG. 9A) positive and (FIG. 9B) negative half cycles resulting in a large value of DC current.
[0045] FIG. 10 provides a DC blocking circuit and controller, in accordance with some embodiments of the present disclosure.
[0046] FIGS. 11A-B provide waveforms depicting the principle of operation of the DC blocking circuit shown in FIG. 10 with positive and negative DC offset compensation for power flow from (FIG. 11A) DC to AC and (FIG. 1 IB) AC to DC sides of the IIC converter.
[0047] FIGS. 12A-B provide waveforms from using the DC blocking circuit in FIG. 10 showing the DC saturation elimination under the effect of mismatch in the durations of positive and negative half cycles with 0.5% higher duration of (FIG. 12A) positive and (FIG. 12B) negative half cycles.DETAILED DESCRIPTION
[0048] Although preferred exemplary embodiments of the disclosure are explained in detail, it is to be understood that other exemplary embodiments are contemplated. Accordingly, it is not intended that the disclosure is limited in its scope to the details of construction and arrangement of components set forth in the following description or illustrated in the drawings. The disclosure is capable of other exemplary embodiments and of being practiced or carried out in various ways. Also, in describing the preferred exemplary embodiments, specific terminology will be resorted to for the sake of clarity.
[0049] To facilitate an understanding of the principles and features of the present disclosure, various illustrative embodiments are explained below. The components, steps, and materials described hereinafter as making up various elements of the embodiments disclosed herein are intended to be illustrative and not restrictive. Many suitable components, steps, and materialsthat would perform the same or similar functions as the components, steps, and materials described herein are intended to be embraced within the scope of the disclosure. Such other components, steps, and materials not described herein can include, but are not limited to, similar components or steps that are developed after development of the embodiments disclosed herein.
[0050] As used in the specification and the appended claims, the singular forms “a,” “an” and “the” include plural referents unless the context clearly dictates otherwise.
[0051] Also, in describing the preferred exemplary embodiments, terminology will be resorted to for the sake of clarity. It is intended that each term contemplates its broadest meaning as understood by those skilled in the art and includes all technical equivalents which operate in a similar manner to accomplish a similar purpose.
[0052] Ranges can be expressed herein as from “about” or “approximately” one particular value and / or to “about” or “approximately” another particular value. When such a range is expressed, another exemplary embodiment includes from the one particular value and / or to the other particular value.
[0053] Similarly, as used herein, “substantially free” of something, or “substantially pure”, and like characterizations, can include both being “at least substantially free” of something, or “at least substantially pure”, and being “completely free” of something, or “completely pure”.
[0054] By ‘ ‘comprising” or “containing” or “including” is meant that at least the named compound, member, particle, or method step is present in the composition or article or method, but does not exclude the presence of other compounds, materials, particles, method steps, even if the other such compounds, material, particles, method steps have the same function as what is named.
[0055] Mention of one or more method steps does not preclude the presence of additional method steps or intervening method steps between those steps expressly identified. Similarly, it is also to be understood that the mention of one or more components in a device or system does not preclude the presence of additional components or intervening components between those components expressly identified.
[0056] The materials described as making up the various members of the invention are intended to be illustrative and not restrictive. Many suitable materials that would perform the same or a similar function as the materials described herein are intended to be embraced within the scope of the invention. Such other materials not described herein can include, but are notlimited to, for example, materials that are developed after the time of the development of the invention.
[0057] Reference will now be made in detail to exemplary embodiments of the disclosed technology, examples of which are illustrated in the accompanying drawings and disclosed herein. Wherever convenient, the same references numbers will be used throughout the drawings to refer to the same or like parts.
[0058] As discussed above, there is a need in power converters to inject a compensating DC voltage in series with the primary winding to offset any unintended DC voltage that is generated across the bridge. In conventional systems, this is realized using a power supply injecting the compensating voltage to mitigate the effect of mismatched positive and negative half cycles across the transformer. However, this approach requires preferably an independent and isolated power supply with an auxiliary transformer for, say, 200 W for an injection of just 1 VDC at 200 A. This can also be problematic, as there is a possibility of saturation of this auxiliary transformer, leading to further complexity. This necessitates a simple, active, source-less, and low-loss method for injecting the required DC voltage. Accordingly, embodiments of the present disclosure provide the concept of a DC blocking circuit to address the challenges in the prior art for the series compensation of DC voltage in high-frequency transformers.
[0059] FIG. 2 shows a Universal Minimal Converter (UMC) as an example of a HF link converter that converts from DC to three-phase AC. There are two bridges - the DC bridge 205 and AC bridge 210, connected by a HF link transformer 215. Among the various possible modes of operation, two modes are shown at the bottom of FIG. 2. It can be observed that the operation of each switching cycle is independent with net zero flux in the transformer for an ideal case. However, any deviation on the switching edges, due to a variety of reasons, including unequal propagation delays, unequal device characteristics such as threshold voltages or capacitances, and asymmetric circuit layout, can result in minute deviations from the net zero DC flux leading to the development of a DC voltage which translated into a high DC current.
[0060] FIGS. 3 A-B show the waveforms without DC blocking circuits of the present disclosure under the ideal case without any mismatch and with the mismatch in the gating pulses. These results are obtained with the DC voltage source of 500 V and a switching frequency of 50 kHz. It can be observed from FIGS. 3A-B that even with a 0.05% (10 ns) mismatch in the durations of positive and negative half cycles, a DC voltage is Developed, leading to DC current in thetransformer. This DC current not only leads to additional losses but also may cause transformer saturation.
[0061] FIG. 4 provides a circuit diagram of an exemplary power converter of the present disclosure that includes a DC blocking circuit. The power converter can comprise a transformer 405 having a first winding 406 and a second winding 407. As those skilled in the art would appreciate, the first 406 and second 407 windings can have different numbers of turns to allow for various voltage levels of step-up / down. The transformer 405 can be many different transformers known in the art, including, but not limited to, a high frequency transformer. The first winding 406 can be electrically coupled to a first bridge, such as a DC bridge (not shown in FIG. 4), and the second winding 407 can be electrically coupled to a second bridge, such as an AC bridge (also not shown in FIG. 4). The power converter can further comprise a DC blocking circuit (denoted in FIG. 4 by the dashed box). The DC blocking circuit can be configured to compensate for DC voltage in the primary winding 406. For example, the DC blocking circuit can be configured to inject / apply a voltage to the transformer 405 to compensate for DC voltage.
[0062] In some embodiments, the DC blocking circuit can comprise a first switch 410, a first diode 415 electrically connected in parallel with the first switch 410, a second switch 420, and a second diode 425 electrically connected in parallel with the second switch 420. As shown in FIG. 4, in some embodiments, the first diode 415 can be electrically connected antiparallel with the second diode 425. By opening one of the first 410 and second 420 switches and closing the other of the first 410 and second 420 switches, the inherent voltage of the first 415 or second 425 diode can be injected to the converter to compensate for DC voltage in the transformer 405.
[0063] In some embodiments, the power converter can further comprise a current sensor (not shown) configured to generate a current signal indicative of a measurement of a current (ip) flowing through the first winding 406. The current sensor can be the same current sensor utilized in a power converter for measuring output and / or input current of the converter or can be a distinct current sensor.
[0064] In some embodiments, the power converter can further comprise a control circuit 430. The control circuit 430 can be configured to generate and send gating signals to the first 410 and second 420 switches based, at least in part, on the current signal, to open and close the first 410 and second 420 switches. For example, as explained in more detail below in the Examplessection, the control circuit 430 can be configured to determine whether the current flowing through the first winding 406 has a DC component. If the control circuit 430 determines the current flowing through the first winding 406 does not have a DC component, the control circuit 430 can send a gating signal to close the first 410 and second 420 switches. In this scenario, no voltage from the first diode 415 or second diode 425 is injected to the transformer 405. Alternatively, if the control circuit 430 determines the current flowing through the first winding 406 has a DC component, the control circuit 430 can send a gating signal to open one of the first 410 and second 420 switches, thereby injecting voltage from the first 415 or second 425 diode into the transformer 405. The opening / closing of the first / second 410 420 or second / first 420 410 switches, respectively, can be based on the polarity of the DC component, i.e., positive or negative. For example, if the control circuit 430 determines the current flowing through the first winding 406 has a positive DC component, the control circuit 430 can send a gating signal to open the first switch 410 and close the second switch 420. Similarly, if the control circuit 430 determines the current flowing through the first winding 406 has a negative DC component, the control circuit 430 can send a gating signal to close the first switch 410 and open the second switch 420.
[0065] FIG. 4 provides an exemplary control circuit 430 for controlling the DC blocking circuit shown in FIG. 4. The control circuit 430, however, is exemplary only and the disclosure is not limited to the specific control circuit shown in FIG. 4. As shown in FIG. 4, in some embodiments, the circuit 430 can comprise a low pass filter 435 configured to filter the current signal. In some embodiments, the control circuit 430 can further comprise a comparator 440 configured to compare the low pass filtered current signal to zero to determine if the current flowing through the first winding 406 has a negative or positive DC component. In some embodiments, the control circuit 430 can further comprise a proportional-integral (PI) controller configured to receive an output from the comparator 440 and generate, based on the received output from the comparator 440, the gating signals.
[0066] The embodiment of the DC blocking circuit shown in FIG. 4 can be particular advantageous in power converters having an output connected to one or more capacitors, as shown in FIG. 2 (o).
[0067] FIG. 10 provides an alternative embodiment of a power converter of the present disclosure. The power converter can comprise a transformer 1005 having a first winding 1006 and a second winding 1007. The first finding 1006 can be connected to a first bridge, such asa DC bridge (not shown), and the second winding 1007 can be connected to a second bridge, such as an AC bridge (not shown). The power converter can further comprise a DC blocking circuit (denoted by the dashed box in FIG. 10). The DC blocking circuit can comprise a first switch 1010, a first diode 1015 in parallel with the first switch 1015, a second switch 1020, and a second diode 1025 in parallel with the second switch 1020. As shown in FIG. 10, the first 1010 and second 1020 switches can be connected to each other in antiseries (i.e., the switches are connected such that both switches do not conduct current at the same time). The DC blocking circuit can further comprise a capacitor 1050 in parallel with the serially connected first 1010 and second 1020 switches. The power converter can further comprise a control circuit 1030 to generate gating signals to control the first 1010 and second 1020 switches. Additional details regarding operation of the control circuit 1030 are provided in the example section below.
[0068] The embodiment of the DC blocking circuit shown in FIG. 10 can be particularly advantageous in power converters having an output connected to one or more inductors, such as in the IIC shown in FIG. 7.EXAMPLES
[0069] Below, certain exemplary embodiments of the present disclosure are provided. These embodiments, however, are exemplary only and should not be construed as limiting the scope of the present disclosure.
[0070] DC Blocker — Active DC voltage series compensation using the on-state drop across diode
[0071] FIG. 4 shows an exemplary DC Blocker circuits (DC Blocker-I), also referred to herein as a DC blocking circuit. The circuit comprises two antiparallel connected switches forming an AC switch (S) with the diodes (Da and Db). Appropriate power supply, control, sensing logic and gate drive circuits are assumed, and represent approaches well known to one skilled in the art. A current sensor (such as a LEM sensor) is typically already used in such HF Link converters, especially in such high-power converters, and can be shared between the main converter and the DC Blocker-I. The AC switch (S) is assumed to be generally conducting. The AC switch S needs to be designed to block only 20-30 V, and thus, switches with much lower on-state resistance (Rdson) within a few mO (e.g., 1 mO j can be utilized. Additionally, since S comprises parallel connected switches, it reduces the conduction losses to 1 / 4thcompared to a single switch.
[0072] FIGS. 5A-B show how the DC Blocker could be operated. If we assume that the switching waveform generated by the bridge is a pure square waveform with no measured DC content, the switch S would remain in the ON state, and the converter would operate in the normal intended fashion with only the equivalent ON-state resistance of the switch in series with the HF transformer winding. Conversely, if the net voltage across the winding was, for example, a small positive voltage (due to switching waveform irregularities), this would result in an increase in the winding’s DC current. Herein, the DC Blocker receives the measured DC current signal and acts to minimize it via its local controller (shown in FIG. 4) by switching S OFF for the appropriate direction of voltage and current. This necessarily brings one of the diodes in series with the HF transformer winding for a finite duty cycle to balance the Volt- seconds across the transformer. More specifically, for every instant that S is OFF, a diode will be forward-biased, thus injecting a 1 - 1 ,3 V (e.g., for Si devices) in series with the winding. This voltage effectively clips the winding’s voltage during the positive or negative half cycles. As a result, DC voltages below the on-state voltage value of the diodes can be compensated.
[0073] The simulated results for the operation of the DC blocker-I with the earlier discussed scenario of 0.05% mismatch in the positive and negative half-cycle durations are depicted in FIGS. 6A-B. It can be seen from FIGS. 6A-B that under the occurrence of any mismatch event, the DC component of current in the HF transformer can be mitigated, hence avoiding transformer saturation and extra losses. This is simply realized by modulating the duty cycle of the switch (S) to drop the appropriate average voltage across the diodes. It can also be seen from FIG. 6A that for the slightly higher duration of the positive half cycle, the appropriate DC voltage is blocked across Db. A similar effect is observed for the mismatched edges, causing the DC voltage of opposite polarity. It is to be noted that the DC Blocker-I shown in FIG. 4 is applicable for a generic HF-link isolated topology irrespective of the direction of power transfer or the nature of voltage or current through the transformer with only constraint of the maximum DC voltage blocking capability defined by the diode on-state voltage drop.
[0074] DC Blocker — Series Compensation of DC voltage with energy recovery
[0075] The DC Blocker I (FIG. 4) offers a novel series compensation method to suppress DC current in HF transformers for HF-link isolated converters. Although its implementation can be extended to any HF-link isolated converter, the DC Blocker I implementation comes with a minor loss penalty (i.e., S and diode conduction losses). More importantly, in its simplest implementation, the DC Blocker I voltage injection is limited to the on-state voltage of onediode, which may trigger the need for several switches (S) in series for higher voltage power converters (e.g., >400V). In such applications, the loss penalty may render the solution unfeasible. In light of this, a lossless method for series voltage injection is needed as an extension to the proposed DC Blocker concept.
[0076] To address the afore-discussed challenges, FIG. 10 provides a low-loss method for reducing DC bias currents in HF-link transformer windings, i.e., the DC Blocker II. To demonstrate the applicability of the proposed DC Blocker II, an Isolated Inertial-less Converter (IIC) is used as another example of a DC to three-phase AC HF-link converter, see Fig. 7. Similar to the DAB and UMC circuits, here are two bridges - the DC bridge and the AC bridge, connected by a HF-link transformer. The voltages vprt and vSec are defined as shown.
[0077] Examining a single switching cycle, we can see two distinct possibilities, based on the modulation control on the AC-side plus the action of the “flipping” logic for the output bridge, which acts to maintain zero DC flux in the transformer. The current in the transformer can have two representative shapes, as shown in FIGS. 8A-B. FIG. 8A shows the waveform when the energy over the cycle flows from the DC to the AC side, while FIG. 8B shows the waveform when energy flows from the AC to the DC side over the cycle. Many such cycles are used to realize the controlled transfer of power between the DC and AC sides. Closer examination shows that the DAB converter of FIG. 1A exhibits similar waveforms, depending on the direction of energy flow, and for low leakage inductance and roughly equal primary and secondary voltages (a preferred operating point for DAB converters). As such, this can be viewed as a generalization of the phenomenon being discussed. Again, in all these converters, any deviation on the switching edges, due to a variety of reasons, including unequal propagation delays, unequal device characteristics such as threshold voltages or capacitances, and asymmetric circuit layout, can result in minute deviations from a pure square wave, resulting in high DC currents in the exposed winding.
[0078] However, one can see that in both the representative waveforms, the current ipis well- defined and relatively stable just prior to switching. For the DAB converter, the energy transfer inductance is the leakage inductance (Lik), while in the IIC, the winding current is defined by the output bridge state and the AC side currents, which are also flowing in the output inductance. In both cases, the currents just prior to switching are stable and well-defined for the duration of and around the switching transition. Depending on the direction of energy flowover the cycle (as selected by the controller), the current (relative to the polarity of vpri) has the same or a reversed polarity as the voltage.
[0079] Thus, if we see the current flow just prior to a switching edge, the current iphas a polarity, which reverses shortly after the edge, and continues with the reversed polarity until the next edge. This is typically true in the case of the IIC but may not be true for the DAB under certain operating conditions.
[0080] FIGS. 9A-B show the waveforms for the aforementioned IIC configuration without the saturation prevention mechanism under the ideal case without any mismatch and with the mismatch in the durations of gating pulses, respectively. The parameters for the conducted study are similar to those for the earlier results (FIG. 3), with a duration of mismatch of 1%. It can be observed from FIGS. 9A-B that for a 1% mismatch in the durations of positive and negative half cycles, DC voltage is developed across the transformer winding, leading to the flow of high value of DC current (1600 A) in the transformer. This DC current leads to transformer saturation.
[0081] FIG. 10 shows the exemplary DC Blocker-II circuit that is added in series with the primary winding to achieve low-loss compensation of the DC current in the high-frequency link transformer. It comprises a capacitor C, and an AC switch (S) that is made of two Silicon Carbide or similar MOSFETs (SI and S2) in series as shown, and which is in parallel with the capacitor. Appropriate power supply, control, sensing logic and gate drive circuits are assumed, and represent approaches well known to one skilled in the art. A current sensor (such as a LEM sensor) is typically already used in such HF-link converters, especially in such high-power converters, and can be shared between the main converter and the DC Blocker.
[0082] Switch S is assumed to be generally conducting. As such, the switch generates additional switching loss. For the 500 V / 200 A / 100 kW converter discussed earlier, a typical main bridge device could be a 1700 V / 10 mfi device. Device S would need to handle only 20- 30 V and could be of much lower on-state resistance. Such devices are relatively inexpensive, with Rdson of less than 1 mQ being quite common. Paralleling several devices to achieve a composite Rdson of 0.25 mQ seems very feasible. With 200 A in S, one would generate around 10 W in losses total between all the devices (for a 100 kW converter), which represents a minimal loss in efficiency.
[0083] FIGS. 11 A-B show how the DC Blocker-II could be operated with positive and negative DC offset compensation for power flow from (FIG. 11 A) DC to AC and (FIG. 1 IB) AC to DCsides of the IIC converter. If it is assumed that the switching waveform generated by the bridge is a pure square waveform with no DC content, the switch S would remain ON, and the converter would operate in the normal intended fashion. If the net voltage across the winding was, for example, a small positive voltage (due to switching waveform irregularities), this would result in an increase in the winding current, which would be sensed and through the action of a controller (to be discussed later) would turn off the switch a small duration before the next switching transition - which is generally at a fixed frequency and is completely known. The winding current is now diverted into the capacitor C, causing the voltage across it to increase as shown in FIGS. 11 A-B.
[0084] At time duration T / 2, the main bridge switches and a short time later causes the primary winding current to reverse. This in turn causes the current in the capacitor to reverse, which causes the voltage across C to begin to decrease. The switch S is controlled such that as the voltage across C reaches zero, it is fully turned ON, causing the winding current to once again flow through the switch. If the voltage across the winding over the switching cycle is considered, it can be seen that the action of the capacitor C and switch S, caused the injection of a small net “positive” volt-seconds across the winding. This is effectively in series with the winding and can counter the small positive voltage that was injected by the main bridge. Similarly, if a negative voltage was to be injected, the other switching transition would be used - with very similar principles. Using standard control techniques (e.g., a P-I controller), we can operate the S-C combination such that the net DC current in the winding is zero for both positive and negative injection.
[0085] It should be noted that the process of storing energy in C, and then subsequently recovering it is essentially lossless. Control of the duration for which S is OFF, and a selection of the switching transition to compensate positive or negative bias voltage, can be a key operating mechanism for the DC Blocker II. The current in the capacitor can only flow in C when the switch S is OFF, reducing the rms current rating substantially. As an example, for the 100 kW converter use case, a 50 pF capacitor can be used where the current in C flows for 6% of the time, with significant reduction in capacitance, rms current rating and losses (compared with a DC voltage injection). The switches also never see more than ~20 V, allowing the use of lower voltage rating MOSFETs.
[0086] The simulated results for the operation of the DC blocker-II with the earlier discussed scenario of 0.5% mismatch in the positive and negative half-cycle durations are depicted inFIGS. 12A-B. It can be seen from FIGS. 12A-B that under the occurrence of any mismatch event, the DC component of current in the HF transformer is eliminated, hence avoiding transformer saturation and extra losses. This is simply realized by modulating the duty cycle of the switches S 1 and S2 to compensate the appropriate DC offset voltage using the capacitor C. In this way, the DC offset compensation can be realized irrespective of the direction of power transfer in lossless manner without any constraint on the maximum DC voltage blocking capability at much lower cost and with simpler control.
[0087] The use of capacitive voltage injection in series with a transformer winding, where the amount of DC injection can be controlled and where the capacitor is charged and discharged using well-defined waveforms of the intrinsic HF Link converter itself, presents many advantages over conventional converters.
[0088] The present disclosure can further be characterized by the following embodiments:Embodiment 1 : A power converter comprising: a transformer comprising a first winding and a second winding; a first bridge electrically coupled to the first winding; a second bridge electrically coupled to the second winding; and a DC blocking circuit electrically coupled in series to the first winding and the first bridge and configured to apply a DC voltage to compensate for DC voltage in the primary winding.Embodiment 2: The power converter of Embodiment 1, wherein the DC blocking circuit comprises: a first switch; a first diode electrically connected in antiparallel with the first switch; a second switch; and a second diode electrically connected in antiparallel with the second switch.Embodiment 3: The power converter of any of Embodiments 1-2, further comprising: a current sensor configured to generate a current signal indicative of a measurement of a current flowing through the first winding; and a control circuit configured to send gating signals to the first and second switches based, at least in part, on the current signal, to open and close the first and second switches.Embodiment 4: The power converter of Embodiment 3, wherein the control circuit is configured to determine whether the current flowing through the first winding has a DC component.Embodiment 5: The power converter of any of Embodiments 3-4, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding does not have a DC component, the control circuit sends a gating signal to close the first and second switches.Embodiment 6: The power converter of any of Embodiments 3-5, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a DC component, the control circuit sends a gating signal to open one of the first and second switches with a specified duty cycle.Embodiment 7: The power converter of any of Embodiments 3-6, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a positive DC component, the control circuit sends a gating signal to open the first switch and close the second switch.Embodiment 8: The power converter of any of Embodiments 3-7, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a negative DC component, the control circuit sends a gating signal to close the first switch and open the second switch.Embodiment 9: The power converter of any of Embodiments 3-8, wherein the control circuit comprises a low pass filter configured to filter the current signal.Embodiment 10: The power converter of Embodiment 9, wherein the control circuit further comprises a comparator configured to compare the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.Embodiment 11 : The power converter of Embodiment 10, wherein the control circuit further comprises a proportional-integral (PI) controller configured to receive an output from the comparator and generate, based on the received output from the comparator, the gating signals. Embodiment 12: The power converter of any of Embodiments 2-11, wherein the first diode is electrically connected antiparallel with the second diode.Embodiment 13: The power converter of any of Embodiments 1-12, wherein the AC bridge comprises an output comprising one or more capacitors.Embodiment 14: The power converter of any of Embodiments 2-11, wherein the first and second switches are connected in antiseries, wherein the serially connected first and second switches are electrically connected in parallel with a capacitor.Embodiment 15: The power converter of any of Embodiments 1-14, wherein the AC bridge comprises an output comprising one or more inductors.Embodiment 16: The power converter of any of Embodiment 1-15, wherein the transformer is a high-frequency transformer.Embodiment 17: A method of compensating for DC current in a power converter, the power converter comprising: a transformer comprising a first winding and a second winding; a first bridge electrically coupled to the first winding; a second bridge electrically coupled to the second winding; and a DC blocking circuit electrically coupled in series to the first winding and the first bridge, the method comprising: applying, with the DC blocking circuit, a DC voltage to compensate for DC voltage in the primary winding.Embodiment 18: The method of Embodiment 17, wherein the DC blocking circuit comprises: a first switch; a first diode electrically connected in antiparallel with the first switch; a second switch; and a second diode electrically connected in antiparallel with the second switch.Embodiment 19: The method of any of Embodiments 17-18, further comprising: generating, with a current sensor, a current signal indicative of a measurement of a current flowing through the first winding; and sending, with a control circuit, gating signals to the first and second switches based, at least in part, on the current signal, to open and close the first and second switches.Embodiment 20: The method of Embodiment 19, further comprising, determining, with the control circuit, whether the current flowing through the first winding has a DC component.Embodiment 21: The method of any of Embodiments 19-20, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to close the first and second switches if the control circuit determines the current flowing through the first winding does not have a DC component.Embodiment 22: The method of any of Embodiments 19-21, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to open one of the first and second switches with a specified duty cycle if the control circuit determines the current flowing through the first winding has a DC component.Embodiment 23: The method of any of Embodiments 19-22, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to open the first switch and close the second switch, if the control circuit determines the current flowing through the first winding has a positive DC component.Embodiment 24: The method of any of Embodiments 19-23, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to close the first switch and open the second switch, if the control circuit determines the current flowing through the first winding has a negative DC component.Embodiment 25: The method of any of Embodiments 19-24, further comprising, low pass filtering, with the control circuit, the current signal.Embodiment 26: The method of Embodiment 25, further comprising, comparing, with a comparator of the control circuit, the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.Embodiment 27: The method of Embodiment 26, further comprising generating, with a proportional-integral (PI) controller of the control circuit, the gating signals, based on a received output from the comparator.Embodiment 28: The method of any of Embodiments 18-27, wherein the first diode is electrically connected antiparallel with the second diode.Embodiment 29: The method of any of Embodiments 17-28, wherein the AC bridge comprises an output comprising one or more capacitors.Embodiment 30: The method of any of Embodiments 18-27, wherein the first and second switches are connected in antiseries, wherein the serially connected first and second switches are electrically connected in parallel with a capacitor.Embodiment 31: The method of any of Embodiments 17-30, wherein the AC bridge comprises an output comprising one or more inductors.Embodiment 32: The method of any of Embodiments 17-31, wherein the transformer is a high-frequency transformer.
[0089] It is to be understood that the embodiments and claims disclosed herein are not limited in their application to the details of construction and arrangement of the components set forth in the description and illustrated in the drawings. Rather, the description and the drawings provide examples of the embodiments envisioned. The embodiments and claims disclosed herein are further capable of other embodiments and of being practiced and carried out in various ways. Also, it is to be understood that the phraseology and terminology employed herein are for the purposes of description and should not be regarded as limiting the claims.
[0090] Accordingly, those skilled in the art will appreciate that the conception upon which the application and claims are based may be readily utilized as a basis for the design of other structures, methods, and systems for carrying out the several purposes of the embodiments and claims presented in this application. It is important, therefore, that the claims be regarded as including such equivalent constructions.
[0091] Furthermore, the purpose of the foregoing Abstract is to enable the United States Patent and Trademark Office and the public generally, and especially including the practitioners in the art who are not familiar with patent and legal terms or phraseology, to determine quickly from a cursory inspection the nature and essence of the technical disclosure of the application. The Abstract is neither intended to define the claims of the application, nor is it intended to be limiting to the scope of the claims in any way.
Claims
CLAIMSWhat is claimed is:
1. A power converter comprising: a transformer comprising a first winding and a second winding; a first bridge electrically coupled to the first winding; a second bridge electrically coupled to the second winding; and a DC blocking circuit electrically coupled in series to the first winding and the first bridge and configured to apply a DC voltage to compensate for DC voltage in the primary winding.
2. The power converter of claim 1, wherein the DC blocking circuit comprises: a first switch; a first diode electrically connected in antiparallel with the first switch; a second switch; and a second diode electrically connected in antiparallel with the second switch.
3. The power converter of claim 2, further comprising: a current sensor configured to generate a current signal indicative of a measurement of a current flowing through the first winding; and a control circuit configured to send gating signals to the first and second switches based, at least in part, on the current signal, to open and close the first and second switches.
4. The power converter of claim 3, wherein the control circuit is configured to determine whether the current flowing through the first winding has a DC component.
5. The power converter of claim 4, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding does not have a DC component, the control circuit sends a gating signal to close the first and second switches.
6. The power converter of claim 4, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a DC component, the control circuit sends a gating signal to open one of the first and second switches with a specified duty cycle.
7. The power converter of claim 6, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a positive DCcomponent, the control circuit sends a gating signal to open the first switch and close the second switch.
8. The power converter of claim 7, wherein the control circuit is configured such that, if the control circuit determines the current flowing through the first winding has a negative DC component, the control circuit sends a gating signal to close the first switch and open the second switch.
9. The power converter of claim 4, wherein the control circuit comprises a low pass filter configured to filter the current signal.
10. The power converter of claim 9, wherein the control circuit further comprises a comparator configured to compare the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.
11. The power converter of claim 10, wherein the control circuit further comprises a proportional-integral (PI) controller configured to receive an output from the comparator and generate, based on the received output from the comparator, the gating signals.
12. The power converter of claim 2, wherein the first diode is electrically connected antiparallel with the second diode.
13. The power converter of claim 12, wherein the AC bridge comprises an output comprising one or more capacitors.
14. The power converter of claim 2, wherein the first and second switches are connected in antiseries, wherein the serially connected first and second switches are electrically connected in parallel with a capacitor.
15. The power converter of claim 14, wherein the AC bridge comprises an output comprising one or more inductors.
16. The power converter of any of claims 1-15, wherein the transformer is a high-frequency transformer.
17. A method of compensating for DC current in a power converter, the power converter comprising: a transformer comprising a first winding and a second winding; a first bridge electrically coupled to the first winding; a second bridge electrically coupled to the second winding; and a DC blocking circuit electrically coupled in series to the first winding and the first bridge, the method comprising:applying, with the DC blocking circuit, a DC voltage to compensate for DC voltage in the primary winding.
18. The method of claim 17, wherein the DC blocking circuit comprises: a first switch; a first diode electrically connected in antiparallel with the first switch; a second switch; and a second diode electrically connected in antiparallel with the second switch.
19. The method of claim 18, further comprising: generating, with a current sensor, a current signal indicative of a measurement of a current flowing through the first winding; and sending, with a control circuit, gating signals to the first and second switches based, at least in part, on the current signal, to open and close the first and second switches.
20. The method of claim 19, further comprising, determining, with the control circuit, whether the current flowing through the first winding has a DC component.
21. The method of claim 20, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to close the first and second switches if the control circuit determines the current flowing through the first winding does not have a DC component.
22. The method of claim 20, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to open one of the first and second switches with a specified duty cycle if the control circuit determines the current flowing through the first winding has a DC component.
23. The method of claim 22, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to open the first switch and close the second switch, if the control circuit determines the current flowing through the first winding has a positive DC component.
24. The method of claim 23, wherein sending, with a control circuit, gating signals to the first and second switches, comprises sending gating signals to close the first switch and open the second switch, if the control circuit determines the current flowing through the first winding has a negative DC component.
25. The method of claim 20, further comprising, low pass filtering, with the control circuit, the current signal.
26. The method of claim 25, further comprising, comparing, with a comparator of the control circuit, the low pass filtered current signal to zero to determine if the current flowing through the first winding has a negative or positive DC component.
27. The method of claim 26, further comprising generating, with a proportional-integral (PI) controller of the control circuit, the gating signals, based on a received output from the comparator.
28. The method of claim 18, wherein the first diode is electrically connected antiparallel with the second diode.
29. The method of claim 28, wherein the AC bridge comprises an output comprising one or more capacitors.
30. The method of claim 18, wherein the first and second switches are connected in antiseries, wherein the serially connected first and second switches are electrically connected in parallel with a capacitor.
31. The method of claim 30, wherein the AC bridge comprises an output comprising one or more inductors.
32. The method of any of claims 17-31, wherein the transformer is a high-frequency transformer.
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