Silicon crystal, silicon crystal defect treatment method, and defect characterization method

Abstract

A silicon crystal, a silicon crystal defect treatment method, and a defect characterization method. The silicon crystal defect treatment method comprises: providing a silicon crystal, wherein the silicon crystal includes self-interstitial defects; and executing a rapid heat treatment process on the silicon crystal, so as to at least eliminate self-interstitial defects within a preset distance from a surface of the silicon crystal. By means of executing a rapid heat treatment process on a silicon crystal, self-interstitial defects in the silicon crystal can be quickly and effectively reduced or even completely eliminated.

Description

Silicon crystal, method for processing silicon crystal defects, and method for characterizing defects Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a silicon crystal, a method for processing silicon crystal defects, and a method for characterizing the defects. Background Art

[0002] Single-crystal silicon wafers are the most important substrate material for the integrated circuit industry. Due to the limitations of the growth process, the grown silicon ingots will have defects. Currently, the native defects in single-crystal silicon are mainly divided into two categories: 1) self-interstitial defects; 2) vacancy defects. When the crystal growth rate is too low or the temperature gradient is too large, a large number of self-interstitial atoms will be generated in the silicon crystal, which will then aggregate to form self-interstitial defects such as self-interstitial clusters (B-defects) and dislocations (A-defects). During the subsequent device manufacturing process, self-interstitial defects can have a detrimental effect on the prepared devices, such as increasing device leakage current and reducing breakdown voltage. In particular, due to current process limitations, the elimination of self-interstitial defects is very difficult. Therefore, how to effectively eliminate self-interstitial defects in silicon crystals is particularly critical.

[0003] The prior art discloses a method for reducing native dislocations in heavily boron-doped Czochralski silicon wafers, comprising: placing the heavily boron-doped Czochralski silicon wafer at 1000°C-1100°C for 1-2 hours in an argon atmosphere with a purity greater than 99.99%, and then cooling it naturally; wherein the boron doping concentration of the heavily boron-doped Czochralski silicon wafer is 7×10 19 cm -3 -1.1×10 20 cm -3 This technical solution is simple in process and easy to operate; it can quickly and effectively reduce or even eliminate native dislocations in heavily boron-doped Czochralski silicon wafers, effectively improving the quality of heavily boron-doped Czochralski silicon wafers; it is particularly suitable for boron doping concentrations of 7×10 19 cm -3 -1.1×10 20 cm -3 Although this technical solution has shown good results in removing native dislocations in heavily boron-doped Czochralski silicon wafers, its boron doping concentration needs to be above 7×10 19 cm -3 -1.1×10 20 cm -3 , which has certain limitations. Furthermore, this method has not demonstrated good results on other types of silicon wafers, such as lightly boron-doped silicon wafers and melt-zone silicon wafers, and also has specific requirements for the heat treatment atmosphere. Therefore, a more universal method is needed to remove self-interstitial defects in silicon crystals.

[0004] Summary of the Invention

[0005] The purpose of the present invention is to provide a silicon crystal, a method for processing silicon crystal defects and a method for characterizing defects, so as to solve the problem of how to quickly and effectively reduce or even eliminate self-interstitial defects in single crystal silicon crystals.

[0006] To solve the above technical problems, the present invention provides a method for treating silicon crystal defects, comprising:

[0007] Providing a silicon crystal, wherein the silicon crystal contains self-interstitial defects;

[0008] A rapid thermal process is performed on the silicon crystal to at least eliminate self-interstitial defects within a preset distance from the surface of the silicon crystal.

[0009] Optionally, the rapid thermal treatment process includes an annealing stage, the temperature range of the annealing stage is 1100°C to 1350°C and the annealing time range is 10 seconds to 240 seconds, and the atmosphere of the annealing stage is a mixed atmosphere of argon and nitrogen, pure argon or pure nitrogen atmosphere.

[0010] Optionally, the temperature range of the annealing stage is 1175°C to 1350°C.

[0011] Optionally, the annealing time of the annealing stage ranges from 80 seconds to 160 seconds.

[0012] Optionally, the rapid thermal treatment process also includes a heating stage, which is located before the annealing stage. The heating rate of the heating stage is greater than 1°C / s, and the atmosphere of the heating stage is pure argon or a mixed atmosphere of argon and nitrogen, wherein the proportion of nitrogen in the mixed atmosphere is greater than 1%.

[0013] Optionally, the rapid thermal treatment process further includes a loading stage, which is located before the heating stage. The loading temperature is 400°C-800°C, the atmosphere of the loading stage is pure argon, and the introduction time of the pure argon is 0.1min-10min.

[0014] Optionally, the rapid thermal treatment process can be performed in a normal pressure environment or a reduced pressure environment, wherein the pressure of the reduced pressure environment is 1 torr-100 torr.

[0015] Optionally, when the silicon crystal is subjected to a rapid thermal processing process, a nitride layer and an oxide layer are generated on the surface of the silicon crystal. After the silicon crystal undergoes the rapid thermal processing process, a hydrofluoric acid solution is used to remove the nitride layer and the oxide layer on the surface of the silicon crystal.

[0016] Based on the same inventive concept, the present invention also provides a defect characterization method, which is a silicon crystal treated by any of the above-mentioned silicon crystal defect treatment methods, including: first using a dry etching method or a wet etching method to reveal the self-gap type defects in the silicon crystal, and then using an optical detection method to characterize the self-gap type defects of the silicon crystal.

[0017] Based on the same inventive concept, the present invention also provides a silicon crystal, which is treated by any of the above-mentioned methods for treating silicon crystal defects and has no self-gap defects within a preset distance from the surface of the silicon crystal.

[0018] In the silicon crystal, silicon crystal defect treatment method, and defect characterization method provided by the present invention, a rapid thermal process is performed on the silicon crystal to eliminate at least self-interstitial defects within a predetermined distance from the surface of the silicon crystal. These self-interstitial defects include type A defects and type B defects. In other words, performing a rapid thermal process on the silicon crystal can quickly and effectively reduce or even completely eliminate self-interstitial defects in the silicon crystal. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Those skilled in the art will appreciate that the accompanying drawings are provided for a better understanding of the present invention and do not constitute any limitation on the scope of the present invention.

[0020] FIG1 is a flow chart of a method for processing silicon crystal defects according to an embodiment of the present invention.

[0021] 2 to 6 are schematic diagrams showing the distribution of self-interstitial defects in different silicon crystals in the first experiment according to an embodiment of the present invention.

[0022] FIG. 7 is a histogram of self-interstitial defects in different silicon crystals in the first experiment of an embodiment of the present invention.

[0023] 8 and 9 are schematic diagrams showing the distribution of self-interstitial defects in different silicon crystals in the second experiment according to an embodiment of the present invention.

[0024] FIG. 10 is a histogram of self-interstitial defects in different silicon crystals in the second experiment according to an embodiment of the present invention.

[0025] 11 and 12 are schematic diagrams showing the distribution of self-interstitial defects in different silicon crystals in the third experiment of an embodiment of the present invention.

[0026] FIG. 13 is a histogram of self-interstitial defects in different silicon crystals in the third experiment of an embodiment of the present invention.

[0027] In the attached figure:

[0028] 10-Silicon crystal; 10a-Self-interstitial defect. DETAILED DESCRIPTION

[0029] To make the objects, advantages, and features of the present invention more clearly apparent, the present invention is further described below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale. They are only used to conveniently and clearly assist in illustrating the purposes of the embodiments of the present invention. In addition, the structures shown in the drawings are often part of the actual structure. In particular, different drawings may need to illustrate different focuses and sometimes use different scales.

[0030] As used in the present invention, the singular forms "a", "an", and "the" include plural objects, the term "or" is generally used to include the meaning of "and / or", the term "several" is generally used to include the meaning of "at least one", and the term "at least two" is generally used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features specified as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features. In addition, as used in the present invention, an element is provided on another element, which generally only indicates that there is a connection, coupling, cooperation or transmission relationship between the two elements, and the connection, coupling, cooperation or transmission between the two elements can be direct or indirect through an intermediate element, and should not be understood to indicate or imply the spatial position relationship between the two elements, that is, one element can be in any orientation such as inside, outside, above, below, or to the side of another element, unless the content clearly indicates otherwise. For those skilled in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0031] FIG1 is a flow chart of a method for processing silicon crystal defects according to an embodiment of the present invention. As shown in FIG1 , this embodiment provides a method for processing silicon crystal defects, comprising:

[0032] Step S10, providing a silicon crystal, wherein the silicon crystal contains self-interstitial defects;

[0033] Step S20 , performing a rapid thermal process on the silicon crystal to at least eliminate self-gap defects within a preset distance from the surface of the silicon crystal.

[0034] In step S10, the silicon crystal is, for example, a single crystal silicon crystal. The single crystal silicon crystal contains self-interstitial defects. Specifically, when the crystal growth rate is too low or the temperature gradient is too large, a large number of self-interstitial atoms will be generated in the single crystal silicon crystal, which will then aggregate to produce self-interstitial defects. Self-interstitial defects include A-defects and B-defects. A-defects are, for example, dislocations, and B-defects are, for example, self-interstitial clusters.

[0035] In step S20, the rapid thermal treatment process includes a loading stage, a heating stage and an annealing stage in sequence. The loading stage is located before the heating stage, and the loading stage is used to load the silicon crystal into the rapid annealing furnace. The temperature of the loading stage is, for example, 400°C-800°C, and preferably, the temperature of the loading stage is, for example, 600°C. The atmosphere of the loading stage is, for example, pure argon, and the time for passing the pure argon is, for example, 0.1min-10min. Preferably, the time for passing the pure argon is 1min. In order to protect the rapid annealing furnace, the rapid annealing furnace is usually filled with an argon atmosphere when it is on standby. The loading stage is followed by a heating stage. After the loading of the silicon crystal is completed, the atmosphere is switched to a mixed atmosphere of argon and nitrogen and the temperature is increased, that is, the atmosphere of the heating stage is a mixed atmosphere of argon and n% nitrogen, where n>1, that is, the proportion of nitrogen in the mixed atmosphere of the heating stage is greater than 1%. The heating rate of the heating stage is greater than 1°C / s. The temperature is raised to the target temperature and the annealing stage begins. The atmosphere can be selected to continue to maintain the Ar+n% N2 mixed atmosphere in the heating stage, or it can be switched to pure argon or pure nitrogen atmosphere, that is, the atmosphere in the annealing stage is a mixed atmosphere of argon and nitrogen, pure argon or pure nitrogen atmosphere.

[0036] The temperature of the annealing stage is, for example, in the range of 1100° C. to 1350° C., preferably, the temperature of the annealing stage is 1175° C. to 1350° C. The duration of the annealing stage is, for example, 10 seconds to 240 seconds, preferably, the duration of the annealing stage is 80 seconds to 160 seconds. The rapid thermal processing process can be performed in a normal pressure environment or a reduced pressure environment, wherein the pressure of the reduced pressure environment is, for example, 1 torr to 100 torr, preferably, the pressure of the reduced pressure environment is 15 torr.

[0037] After the rapid thermal treatment process, that is, after the annealing stage, the atmosphere is set to pure argon, and the temperature is reduced to 400°C-800°C, which is the standby temperature of the rapid annealing furnace. Preferably, the standby temperature of the rapid annealing furnace is 500°C, and the cooling rate is at least greater than 5°C / s.

[0038] During the rapid thermal processing of the silicon crystal, a nitride layer and an oxide layer are formed on the surface of the silicon crystal. Therefore, after the silicon crystal undergoes the rapid thermal processing, a hydrofluoric acid solution is used to remove the nitride layer and the oxide layer on the surface of the silicon crystal. The concentration of the hydrofluoric acid solution is less than 20%, and preferably 5%.

[0039] In step S20, a rapid thermal process is performed on the silicon crystal to eliminate at least self-interstitial defects within a predetermined distance from the surface of the silicon crystal. The region within the predetermined distance from the surface of the silicon crystal is also referred to as the near-surface layer. This includes the near-surface layer on the upper surface and the near-surface layer on the lower surface of the silicon crystal. The predetermined distance from the surface of the silicon crystal is, for example, less than 20 microns, preferably, from 1 micron to 10 microns, and further preferably, from 1 micron to 5 microns.

[0040] This embodiment also provides a defect characterization method for a silicon crystal treated by any of the above-mentioned methods for treating silicon crystal defects, comprising: firstly using a dry etching method or a wet etching method to visualize the self-gap type defects in the silicon crystal, and then using an optical detection method to characterize the self-gap type defects in the silicon crystal. Specifically, the dry etching method is, for example, a vapor phase etching process. The wet etching method is, for example, a buffer solution of nitric acid, hydrofluoric acid, and acetic acid. The optical detection method is, for example, a laser scattering method, that is, by scanning the surface of the silicon crystal, calculating the position of the protrusion or depression on the silicon crystal, and the equivalent size of the protrusion or depression, to characterize the self-gap type defects in the silicon crystal.

[0041] This embodiment also provides a silicon crystal, which is treated by any of the above-mentioned methods for treating silicon crystal defects, and has no self-gap type defects within a preset distance range from the surface of the silicon crystal. The preparation method of the silicon crystal adopts a zone melting method or a vertical pulling method. The silicon crystal can be a P-type silicon crystal or an N-type silicon crystal. Native self-gap type defects are formed in the silicon crystal. After the rapid thermal treatment process, there are no self-gap type defects within a preset distance range from the surface of the silicon crystal. It is worth noting that the preset distance range from the surface of the silicon crystal refers to the distance from the upper or lower surface of the silicon crystal, that is, the distance in the perpendicular direction to the upper and lower surfaces of the silicon crystal. The preset distance range is, for example, less than 20 microns, preferably, the preset distance is 1 micron to 10 microns, and further, the preset distance is 1 micron to 5 microns.

[0042] Table 1 Conditions of the first experiment

[0043] As shown in Table 1, the inventors conducted experimental verification. Five experimental groups were set up in this experiment. The first group served as the control group, consisting of raw silicon wafers that did not undergo the rapid thermal processing. The first group included silicon wafer 1. Groups 2 through 5 were all experimental groups, all undergoing the rapid thermal processing. The temperature rise phase of the rapid thermal processing used a mixed atmosphere of argon and 5% nitrogen. The annealing phase of the rapid thermal processing used an oxygen atmosphere, a mixed atmosphere of argon and 5% nitrogen, a pure argon atmosphere, and a pure nitrogen atmosphere, respectively. Specifically, the annealing atmosphere of the rapid thermal processing of Groups 2 through 5 was different. Specifically, the annealing atmosphere of Group 2 was pure oxygen, the annealing atmosphere of Group 3 was pure argon, the annealing atmosphere of Group 4 was a mixed atmosphere of argon and 5% nitrogen, and the annealing atmosphere of Group 5 was pure nitrogen. The rapid thermal processing temperature and time of Groups 2 through 5 were the same. Specifically, the temperature of the rapid thermal processing of Groups 2 through 5 was set to 1250°C, and the time of the rapid thermal processing of Groups 2 through 5 was set to 20 seconds.

[0044] Figures 2 to 6 are schematic diagrams of the distribution of self-gap type defects in different silicon crystals in Experiment 1 of an embodiment of the present invention. Figure 7 is a bar graph of self-gap type defects in different silicon crystals in the first experiment of an embodiment of the present invention. The silicon crystals that completed the experiment were characterized by an optical detection method to obtain a distribution diagram of self-gap type defects contained in the crystal. Specifically, Figure 2 is a schematic diagram of the distribution of self-gap type defects of silicon wafer 1 in the first group of experiments, Figure 3 is a schematic diagram of the distribution of self-gap type defects of silicon wafer 2 in the second group of experiments, Figure 4 is a schematic diagram of the distribution of self-gap type defects of silicon wafer 3 in the third group of experiments, Figure 5 is a schematic diagram of the distribution of self-gap type defects of silicon wafer 4 in the fourth group of experiments, and Figure 6 is a schematic diagram of the distribution of self-gap type defects of silicon wafer 5 in the fifth group of experiments. Figure 7 compares the number of self-gap type defects in the silicon crystal under each experimental condition in a bar graph to more clearly compare the effect of eliminating self-gap type defects. By comparing FIG2 and FIG3-FIG6 in combination with FIG7, it can be seen that in an oxygen atmosphere, the number of self-interstitial defects 10a in the silicon crystal 10 is almost unable to be reduced. On the contrary, the above defects can be effectively reduced in an argon and 5% nitrogen mixed atmosphere, a pure argon atmosphere, and a pure nitrogen atmosphere.

[0045] Furthermore, the number of self-interstitial defects in the fifth group under pure nitrogen atmosphere was lower than that in the fourth group under a mixture of argon and nitrogen, and the third group under pure argon. This is because at high temperatures, vacancy-self-interstitial atom pairs are generated in the silicon crystal. Since the diffusion rate of self-interstitial atoms is faster than that of vacancies, residual vacancies remain in the silicon crystal. At high temperatures, these residual vacancies can combine with self-interstitial defects, thereby eliminating self-interstitial defects. The difference between the different atmospheres is that in an oxygen atmosphere, due to the oxidation of the silicon crystal surface, self-interstitial atoms are injected into the silicon crystal, causing the residual vacancies in the near-surface layer of the silicon crystal to recombine. In addition, the injected self-interstitial atoms also inhibit the elimination of self-interstitial defects. Conversely, in a nitrogen atmosphere, the silicon crystal surface is nitrided, and vacancies are injected into the silicon crystal, increasing the vacancy concentration near the surface layer of the silicon crystal, thereby promoting the elimination of self-interstitial defects in the near-surface layer. In an argon atmosphere, the elimination of self-interstitial defects is promoted solely by the residual vacancies at high temperature, and the effect is worse than that in a nitrogen atmosphere. Therefore, the more nitrogen there is, the more vacancies are injected into the near-surface layer of the silicon crystal, and the more self-interstitial defects are eliminated. Therefore, the number of self-interstitial defects in the fifth group under a pure nitrogen atmosphere is even smaller.

[0046] Table 2 Second experimental conditions

[0047] As shown in Table 2, in another embodiment, the inventors conducted further experimental verification. Based on the results of the previous embodiment, we continue to select the silicon crystal containing self-gap defects involved in the previous embodiment. In this embodiment, three experimental groups are set up, one of which has the same experimental conditions as the experimental conditions of the fifth group in the previous embodiment. Two new experimental conditions are added in this embodiment, namely the sixth group and the seventh group. Specifically, the annealing time and annealing atmosphere of the annealing stage of the sixth and seventh groups are the same as those of the fifth group, that is, the annealing time of the annealing stage is 20 seconds, and the annealing atmosphere adopts a pure nitrogen atmosphere. However, the temperature of the annealing stage of the sixth and seventh groups is different from that of the fifth group. It decreases successively on the basis of the fifth group. The temperature of the annealing stage of the sixth group is, for example, 1100°C, and the temperature of the annealing stage of the seventh group is, for example, 1000°C.

[0048] Figures 8 and 9 are schematic diagrams of the distribution of self-interstitial defects in different silicon crystals from the second experiment of an embodiment of the present invention. Figure 10 is a bar graph of self-interstitial defects in different silicon crystals from the second experiment of an embodiment of the present invention. The silicon crystals that completed the experiment were characterized using optical inspection methods to show the distribution of self-interstitial defects contained in the crystals. Specifically, Figure 8 is a schematic diagram of the distribution of self-interstitial defects in silicon wafer 6 from the sixth experiment, and Figure 9 is a schematic diagram of the distribution of self-interstitial defects in silicon wafer 7 from the seventh experiment. Figure 10 provides a bar graph comparing the number of self-interstitial defects in the silicon crystals under each experimental condition, to more clearly compare the effectiveness of eliminating self-interstitial defects. By comparing Figure 6 from the first experiment with Figures 8, 9, and 10 from the second experiment, it can be seen that under the experimental conditions of a pure nitrogen atmosphere and an annealing time of 20 seconds, increasing the annealing temperature can enhance the removal of self-interstitial defects 10a in silicon crystal 10, ultimately completely eliminating the defects. As shown in Figure 6, self-interstitial defects 10a are essentially absent from silicon crystal 10. This is because at high temperatures, vacancy-self-interstitial atom pairs are generated in silicon crystals. Since the diffusion rate of self-interstitial atoms is faster than that of vacancies, residual vacancies remain in the silicon crystal. At high temperatures, these residual vacancies can combine with self-interstitial defects, thereby eliminating the self-interstitial defects. Therefore, the higher the annealing temperature, the better the removal of self-interstitial defects 10a in silicon crystal 10.

[0049] Table 3 Conditions of the third experiment

[0050] As shown in Table 3, in another embodiment, the inventors conducted further experimental verification. Based on the results of the previous embodiment, we continue to select the silicon crystal containing self-gap defects involved in the previous embodiment. In this embodiment, three experimental groups are set up, one of which has the same experimental conditions as the experimental conditions of the fifth group in the previous embodiment. Two new experimental conditions are added in this embodiment, namely the eighth group and the ninth group. Specifically, the temperature and annealing atmosphere of the annealing stage of the eighth and ninth groups are the same as those of the fifth group, that is, the temperature of the annealing stage is 1250°C, and the annealing atmosphere adopts a pure nitrogen atmosphere. However, the time of the annealing stage of the eighth and ninth groups is different from that of the fifth group. It increases successively on the basis of the fifth group. The time of the annealing stage of the eighth group is, for example, 60 seconds, and the time of the annealing stage of the ninth group is, for example, 90 seconds.

[0051] Figures 11 and 12 are schematic diagrams of the distribution of self-interstitial defects in different silicon crystals from the third experiment of an embodiment of the present invention. Figure 13 is a bar graph of self-interstitial defects in different silicon crystals from the third experiment of an embodiment of the present invention. The silicon crystals that completed the experiment were characterized using optical inspection methods to show the distribution of self-interstitial defects contained in the crystals. Specifically, Figure 11 is a schematic diagram of the distribution of self-interstitial defects in silicon wafer 8 from the eighth experiment, and Figure 12 is a schematic diagram of the distribution of self-interstitial defects in silicon wafer 9 from the ninth experiment. Figure 13 provides a bar graph comparing the number of self-interstitial defects in the silicon crystals under each experimental condition to more clearly compare the effectiveness of eliminating self-interstitial defects. By comparing Figure 6 from the first experiment with Figures 11, 12, and 13 from the second experiment, it is shown that in a pure nitrogen atmosphere and an annealing temperature of 1250°C, increasing the annealing time can enhance the removal of self-interstitial defects 10a in silicon crystal 10, ultimately completely eliminating the defects. As shown in Figure 8, self-interstitial defects 10a are essentially absent from silicon crystal 10. This is because at high temperatures, vacancy-self-interstitial atom pairs are generated in silicon crystals. Since the diffusion rate of self-interstitial atoms is faster than that of vacancies, residual vacancies remain in the silicon crystal. At high temperatures, these residual vacancies can combine with self-interstitial defects, eliminating the self-interstitial defects. The longer the high temperature is maintained, the more effective the removal of self-interstitial defects 10a in silicon crystal 10 becomes, ultimately completely eliminating the defects.

[0052] In summary, in the silicon crystal, the method for processing silicon crystal defects, and the method for characterizing defects provided in the embodiments of the present invention, a rapid thermal treatment process is performed on the silicon crystal to at least eliminate self-gap defects within a preset distance from the surface of the silicon crystal, wherein the self-gap defects include type A defects and type B defects. A specific study was conducted on the effects of different annealing temperatures, different annealing times, and different annealing atmospheres on the removal of self-gap defects. Experiments have shown that increasing the annealing temperature and increasing the annealing time can increase the effect of removing self-gap defects. In addition, under a nitrogen atmosphere, the surface of the silicon crystal is nitrided, vacancies are injected into the silicon crystal, and the vacancy concentration near the surface layer of the silicon crystal increases, thereby promoting the elimination of self-gap defects near the surface layer. Through the research of this embodiment, it is found that the atmosphere of the annealing stage is a mixed atmosphere of argon and nitrogen, pure argon or pure nitrogen atmosphere, the temperature range of the annealing stage is 1100°C to 1350°C and the annealing time range is 10 seconds to 240 seconds, which can quickly and effectively reduce or even completely eliminate self-interstitial defects in silicon crystals. Furthermore, the temperature range of the annealing stage is 1175°C to 1350°C, and the annealing time range is 80 seconds to 160 seconds, which has a better effect on eliminating self-interstitial defects in silicon crystals.

[0053] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0054] Furthermore, it should be recognized that although the present invention has been disclosed above with reference to preferred embodiments, the above embodiments are not intended to limit the present invention. Any person skilled in the art can utilize the above disclosed technical content to make many possible changes and modifications to the technical solution of the present invention, or modify it into equivalent embodiments with equivalent variations, without departing from the scope of the technical solution of the present invention. Therefore, any simple modifications, equivalent variations, and modifications made to the above embodiments based on the technical essence of the present invention, without departing from the content of the technical solution of the present invention, shall still fall within the scope of protection of the technical solution of the present invention.

Claims

1. A method for processing silicon crystal defects, characterized in that: include: Providing a silicon crystal, wherein the silicon crystal contains self-interstitial defects; A rapid thermal process is performed on the silicon crystal to at least eliminate self-interstitial defects within a preset distance from the surface of the silicon crystal.

2. The method for processing silicon crystal defects according to claim 1, characterized in that: The rapid thermal processing process includes an annealing stage, the temperature range of the annealing stage is 1100° C. to 1350° C. and the annealing time range is 10 seconds to 240 seconds, and the atmosphere of the annealing stage is a mixed atmosphere of argon and nitrogen, pure argon or pure nitrogen atmosphere.

3. The method for processing silicon crystal defects according to claim 2, characterized in that: The temperature range of the annealing stage is 1175°C to 1350°C.

4. The method for processing silicon crystal defects according to claim 2, characterized in that: The annealing time of the annealing stage ranges from 80 seconds to 160 seconds.

5. The method for processing silicon crystal defects according to claim 2, characterized in that: The rapid thermal processing process also includes a heating stage, which is located before the annealing stage. The heating rate of the heating stage is greater than 1°C / s. The atmosphere of the heating stage is pure argon or a mixed atmosphere of argon and nitrogen, wherein the proportion of nitrogen in the mixed atmosphere is greater than 1%.

6. The method for processing silicon crystal defects according to claim 5, characterized in that: The rapid thermal treatment process also includes a loading stage, which is located before the heating stage. The loading temperature is 400° C.-800° C., and the atmosphere of the loading stage is pure argon gas. The introduction time of the pure argon gas is 0.1 min-10 min.

7. The method for processing silicon crystal defects according to claim 1, characterized in that: The rapid thermal processing process can be performed in a normal pressure environment or a reduced pressure environment, wherein the pressure of the reduced pressure environment is 1 torr-100 torr.

8. The method for processing silicon crystal defects according to claim 1, characterized in that: When the silicon crystal is subjected to a rapid thermal processing, a nitride layer or an oxide layer is generated on the surface of the silicon crystal. After the silicon crystal is subjected to the rapid thermal processing, a hydrofluoric acid solution is used to remove the nitride layer or the oxide layer on the surface of the silicon crystal.

9. The method for processing silicon crystal defects according to claim 1, characterized in that: The preset distance from the surface of the silicon crystal is less than 20 microns.

10. The method for processing silicon crystal defects according to claim 9, characterized in that: The preset distance from the surface of the silicon crystal is 1 micron to 10 microns.

11. The method for processing silicon crystal defects according to claim 10, characterized in that: The preset distance from the surface of the silicon crystal is 1 micron to 5 microns.

12. A defect characterization method, characterized in that: The silicon crystal treated by the method for treating silicon crystal defects according to any one of claims 1 to 11 comprises: firstly using a dry etching method or a wet etching method to reveal the self-gap type defects in the silicon crystal, and then using an optical detection method to characterize the self-gap type defects of the silicon crystal.

13. A silicon crystal, characterized in that: The silicon crystal treated by the method for treating silicon crystal defects according to any one of claims 1 to 11 has no self-gap type defects within a preset distance from the surface of the silicon crystal.

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