Doherty power amplifier and electronic device comprising same

The integration of a Doherty power amplifier with a network circuit providing specific phase differences addresses the inefficiencies and complexity of multi-antenna systems, enhancing efficiency and reducing power consumption.

WO2025089684A1PCT designated stage expired Publication Date: 2025-05-01SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/KR2024/015458
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-10-27
Filing Date
2024-10-14
Publication Date
2025-05-01

AI Technical Summary

Technical Problem

As the number of antennas increases in communication devices, the number of RF parts, including power amplifiers, also increases, leading to complexity and inefficiency in signal processing and power management.

Method used

The implementation of a Doherty power amplifier with a network circuit that includes an output matching circuit, a power distribution circuit, and input matching circuits, configured to provide specific phase differences, enhances the efficiency of the power amplifier by optimizing load impedance modulation.

Benefits of technology

This configuration improves the efficiency of the Doherty power amplifier, reducing power consumption and enhancing performance, particularly in low output power conditions, while also simplifying the heat dissipation system.

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Abstract

In embodiments, a two-stage Doherty power amplifier is provided. The two-stage Doherty power amplifier may comprise: a drive amplification circuit; a Doherty amplification circuit including a carrier amplifier and a peaking amplifier; and a network circuit arranged between the drive amplification circuit and the Doherty amplification circuit. The network circuit may comprise: an output matching circuit for the drive amplification circuit; a power distribution circuit for distributing an output of the drive amplification circuit to each of the carrier amplifier and the peaking amplifier; a first input matching circuit for the carrier amplifier; and a second input matching circuit for the peaking amplifier. The power distribution circuit may be configured to provide a phase difference of a specified magnitude in a first direction. Each of the first input matching circuit and the second input matching circuit may be configured to provide the phase difference of the specified magnitude in a second direction opposite to the first direction.
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Description

Doherty power amplifier and electronic device including the same

[0001] The present disclosure relates to a Doherty power amplifier and an electronic device including the Doherty power amplifier.

[0002] To enhance communication performance, products equipped with multiple antennas are being developed. As the number of antennas increases, the number of RF components (e.g., power amplifiers (PAs)) required to process signals received or radiated through the antennas also increases.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above-described matters constitute prior art related to the present disclosure.

[0004] In embodiments of the present disclosure, a two-stage Doherty power amplifier is provided. The two-stage Doherty power amplifier may include a drive amplifier circuit, a Doherty amplifier circuit including a carrier amplifier and a peaking amplifier, and a network circuit disposed between the drive amplifier circuit and the Doherty amplifier circuit. The network circuit may include an output matching circuit for the drive amplifier circuit, a power distribution circuit for distributing an output of the drive amplifier circuit to each of the carrier amplifier and the peaking amplifier, a first input matching circuit for the carrier amplifier, and a second input matching circuit for the peaking amplifier. The power distribution circuit may be configured to provide a phase difference of a specified magnitude in a first direction. Each of the first input matching circuit and the second input matching circuit may be configured to provide a phase difference of the specified magnitude in a second direction opposite to the first direction.

[0005] In embodiments of the present disclosure, an electronic device including a two-stage Doherty power amplifier is provided. The electronic device may include a plurality of antennas, a plurality of filters for the plurality of antennas, a plurality of RF processing circuits for the plurality of antennas, and a processor. Each RF processing circuit of the plurality of RF processing circuits may include a two-stage Doherty power amplifier. The two-stage Doherty power amplifier may include a drive amplifier circuit, a Doherty amplifier circuit including a carrier amplifier and a peaking amplifier, and a network circuit disposed between the drive amplifier circuit and the Doherty amplifier circuit. The network circuit may include an output matching circuit for the drive amplifier circuit, a power distribution circuit for distributing an output of the drive amplifier circuit to each of the carrier amplifier and the peaking amplifier, a first input matching circuit for the carrier amplifier, and a second input matching circuit for the peaking amplifier. The power distribution circuit may be configured to provide a phase difference of a specified magnitude in a first direction. Each of the first input matching circuit and the second input matching circuit may be configured to provide a phase difference of the specified size in a second direction opposite to the first direction.

[0006] Figure 1 illustrates a wireless communication system.

[0007] Figure 2a illustrates an example of network entities of an electronic device.

[0008] FIG. 2b illustrates an example of an electronic device including a Doherty power amplifier (PA).

[0009] Figure 2c shows another example of an electronic device including a Doherty power amplifier.

[0010] Figure 3 shows an example of a two-stage Doherty power amplifier.

[0011] Fig. 4 shows an example of components of a network circuit of a two-stage Doherty power amplifier.

[0012] Figures 5a to 5c show examples of network circuits of a two-stage Doherty power amplifier.

[0013] Fig. 6 shows another example of a network circuit of a two-stage Doherty power amplifier.

[0014] Figure 7 shows examples of Smith charts of a two-stage Doherty power amplifier.

[0015] Figures 8a and 8b show examples of the performance of a two-stage Doherty power amplifier.

[0016] Figure 9 shows an example of components of a two-stage Doherty power amplifier.

[0017] Figure 10 illustrates examples of components of an electronic device.

[0018] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0019] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0020] In the following description, terms referring to signals (e.g., signal, information, message, signaling), terms referring to network entities (e.g., electronic device, unit, RU, DU, CU, module, communication module, RF unit, RF module, RF circuit), terms referring to components of devices, terms referring to parts of electronic devices (e.g., substrate, PCB (printed circuit board), FPCB (flexible PCB), module, antenna, antenna element, circuit, processor, chip, component, device), terms referring to circuits (e.g., PCB, FPCB, signal line, feeding line, data line, RF signal line, antenna line, RF path, RF module, RF circuit, splitter, divider, coupler, combiner), etc. are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, the terms '...bu', '...gi', '...mul', '...che', etc. used below may mean at least one shape structure or a unit that processes a function.

[0021] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0022] Figure 1 illustrates a wireless communication system.

[0023] Referring to FIG. 1, FIG. 1 illustrates a base station (110) and a terminal (120) as some of the nodes utilizing a wireless channel in a wireless communication system. Although FIG. 1 illustrates only one base station, the wireless communication system may further include other base stations identical or similar to the base station (110).

[0024] The base station (110) is a network infrastructure that provides wireless access to the terminal (120). The base station (110) has coverage defined based on the distance at which a signal can be transmitted. In addition to the base station, the base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', '5th generation node', 'next generation nodeB (gNB)', 'wireless point', 'transmission / reception point (TRP)', or other terms having equivalent technical meanings.

[0025] The terminal (120) is a device used by a user and communicates with the base station (110) via a wireless channel. The link from the base station (110) to the terminal (120) is referred to as a downlink (DL), and the link from the terminal (120) to the base station (110) is referred to as an uplink (UL). In addition, although not shown in FIG. 1, the terminal (120) and another terminal may communicate with each other via a wireless channel. In this case, the link between the terminal (120) and another terminal (device-to-device link, D2D) is referred to as a sidelink, and the sidelink may be used interchangeably with the PC5 interface. In some other embodiments, the terminal (120) may be operated without the involvement of a user. In one embodiment, the terminal (120) is a device that performs machine type communication (MTC) and may not be carried by the user. Additionally, according to one embodiment, the terminal (120) may be an NB (narrowband)-IoT (internet of things) device. The terminal (120) may be referred to as a 'user equipment (UE)', a 'customer premises equipment (CPE)', a 'mobile station', a 'subscriber station', a 'remote terminal', a 'wireless terminal', an electronic device', a 'user device', or other terms having equivalent technical meanings.

[0026] The base station (110) can transmit a signal to the terminal (120). The terminal (120) can receive a signal from the base station (110). According to one embodiment, a circuit including a Doherty power amplifier according to embodiments of the present disclosure may be included in the base station (110). The terminal (120) can transmit a signal to the base station (110). The base station (110) can receive a signal from the terminal (120). According to one embodiment, a circuit including a Doherty power amplifier according to embodiments of the present disclosure may be included in the terminal (120). For example, the base station (110) and the terminal (120) can transmit and receive wireless signals in a relatively low frequency band (e.g., frequency range 1 (FR 1) of NR). In addition, for example, the base station (110) and the terminal (120) can transmit and receive wireless signals in a relatively high frequency band (e.g., FR 2 (or, FR 2-1, FR 2-2, FR 2-3), FR 3 of NR), millimeter wave (mmWave) band (e.g., 28 GHz, 30 GHz, 38 GHz, 60 GHz)). To improve channel gain, the base station (110) and the terminal (120) can perform beamforming. Here, the beamforming can include transmission beamforming and reception beamforming. The base station (110) and the terminal (120) can provide directionality to a transmission signal or a reception signal. To this end, the base station (110) and the terminal (120) can select serving beams through a beam search or beam management procedure. After serving beams are selected, subsequent communications can be performed through resources that have a QCL relationship with the resource that transmitted the serving beams.

[0027] In a communication system with a relatively large cell radius of a base station, each base station is installed to include the functions of a digital processing unit (or DU (distributed unit)) and an RF (radio frequency) processing unit (or RU (radio unit)). However, in 4G (4 th As higher frequency bands are used in the 5G generation and / or subsequent communication systems (e.g., 5G) and the cell coverage of base stations becomes smaller, the number of base stations to cover a specific area has increased. The installation cost burden on operators for installing base stations has also increased. In order to minimize the installation cost of base stations, a structure has been proposed in which the DU and RU (or MMU (Massive MIMO Unit)) of the base station are separated, one or more RUs are connected to one DU via a wired network, and one or more RUs are geographically distributed to cover a specific area. Hereinafter, the deployment structure and expansion examples of base stations according to various embodiments of the present disclosure are described through FIG. 2a.

[0028] FIG. 2A illustrates examples of network entities of an electronic device. For example, the electronic device may include the base station (110) of FIG. 1. The base station (110) may be divided into two or more entities via a fronthaul. Unlike a backhaul, a fronthaul refers to an interface between a DU and an RU between a wireless network and a core network. While FIG. 2A illustrates an example of a fronthaul structure between a DU and one RU, this is merely for convenience of explanation and the present disclosure is not limited thereto. In other words, embodiments of the present disclosure may also be applied to a fronthaul structure between one DU and multiple RUs. For example, embodiments of the present disclosure may be applied to a fronthaul structure between one DU and two RUs. Furthermore, embodiments of the present disclosure may also be applied to a fronthaul structure between one DU and three RUs.

[0029] Referring to FIG. 2A, the base station (110) may include a DU (210) and a RU (220). The fronthaul (215) between the DU (210) and the RU (220) is F x It can be operated through an interface. For operation of the fronthaul (215), interfaces such as CPRI (common public radio interface), eCPRI (enhanced common public radio interface), and ROE (radio over ethernet) can be used, for example.

[0030] As communication technology advances, mobile data traffic increases, significantly increasing the bandwidth requirements for the fronthaul between the digital unit and the wireless unit. In a deployment such as a centralized / cloud radio access network (C-RAN), the DU (210) performs functions for the packet data convergence protocol (PDCP), radio link control (RLC), media access control (MAC), and physical (PHY) layer, and the RU (220) can be implemented to perform functions for the PHY layer in addition to the RF (radio frequency) function.

[0031] The DU (210) may be responsible for upper layer functions of a wireless network. For example, the DU (210) may perform functions of the MAC layer and a part of the PHY layer. Here, a part of the PHY layer refers to functions performed at a higher level among the functions of the PHY layer, and may include, for example, channel encoding (or channel decoding), scrambling (or descrambling), modulation (or demodulation), and layer mapping (or layer demapping). According to an embodiment, if the DU (210) complies with the O-RAN standard, it may be referred to as an O-DU (O-RAN DU). The DU (210) may be replaced with a first network entity for a base station (e.g., gNB) in embodiments of the present disclosure, if necessary.

[0032] The RU (220) may be responsible for lower layer functions of a wireless network. For example, the RU (220) may perform a part of the PHY layer, an RF function. Here, a part of the PHY layer refers to functions of the PHY layer that are performed at a relatively lower level than the DU (210), and may include, for example, iFFT transformation (or FFT transformation), CP insertion (CP removal), and digital beamforming. The RU (220) may be referred to as an 'access unit (AU)', an 'access point (AP)', a 'transmission / reception point (TRP)', a 'remote radio head (RRH)', a 'radio unit (RU)', or other terms having an equivalent technical meaning thereto. According to an embodiment, when the RU (220) complies with the O-RAN standard, it may be referred to as an O-RU (O-RAN RU). RU (220) may be represented as a second network entity for a base station (e.g., gNB) in embodiments of the present disclosure, as needed. In one embodiment, a circuit including a Doherty power amplifier may be included in RU (220) of a base station (110) having a distributed arrangement.

[0033] FIG. 2B illustrates an example of an electronic device (e.g., a base station (110), a terminal (120), and an RU (220)) including a Doherty power amplifier (PA). An example of an electronic device including a power amplifier (PA) is illustrated. For example, the electronic device may be a base station (110). For example, the device may be an RU (220).

[0034] Referring to FIG. 2B, the electronic device may include a plurality of antennas (250-1, 250-2, ..., 250-N) (N is an integer greater than or equal to 2). The electronic device may include an RF processing circuit to transmit a wireless signal. In order for signals to be radiated through the plurality of antennas, the RF processing circuit may include a plurality of RF paths. The electronic device may include an up converter for up-converting a baseband digital transmission signal to a transmission frequency, and a digital-to-analog converter (DAC) for converting the up-converted digital transmission signal to an analog RF transmission signal. For example, the electronic device may include a DAC for each RF path. The electronic device may include DACs ((230-1, 230-2, ..., 230-N)).

[0035] In a wireless communication system, a transmission signal from a base station or terminal is transmitted through a wireless channel and thus suffers from severe attenuation. To this end, an electronic device may be configured to include an amplifier for amplifying the transmission signal. A power amplifier may be placed in an RF path to amplify a signal transmitted through the air. According to embodiments of the present disclosure, the electronic device may include a Doherty power amplifier. For example, a Doherty power amplifier may be placed in each RF path. The electronic device may include a plurality of Doherty power amplifiers (240-1, 240-2, ..., 240-N). An analog RF signal output through a DAC (230-i) may be amplified through a Doherty power amplifier (240-i). The Doherty power amplifier (240-i) may amplify an applied signal and transmit the amplified signal to an antenna (250-i).

[0036] Beamforming technology is being used as one of the technologies to mitigate propagation path loss and increase the transmission distance of radio waves. Beamforming generally uses multiple antennas to concentrate the reception area of ​​radio waves or increase the directivity of reception sensitivity in a specific direction. Therefore, instead of forming a signal in an isotropic pattern using a single antenna, an electronic device may be equipped with multiple antennas to form beamforming coverage. According to one embodiment, the electronic device may include a Massive MIMO Unit (MMU). A form in which multiple antennas are gathered may be referred to as an antenna array, and each antenna included in the array may be referred to as an array element or antenna element. The antenna array may be configured in various forms, such as a linear array or a planar array. The antenna array may be referred to as a massive antenna array.

[0037] To achieve higher data capacity, the number of RF paths must be increased, or the power per RF path must be increased. Increasing the number of RF paths increases the size of the product, and there are space constraints for installing actual base station equipment. To increase antenna gain through higher output power without increasing the number of RF paths, multiple antenna elements can be connected to a single RF path using a divider (or splitter). As the signal radiates through multiple antenna elements, the antenna gain can be increased. The antenna elements corresponding to an RF path may be referred to as a sub-array.

[0038] FIG. 2C illustrates another example of an electronic device (e.g., a base station (110), a terminal (120), and an RU (220)) including a Doherty power amplifier. For example, the electronic device may be the base station (110). For example, the device may be an RU (220). The electronic device may transmit and / or receive signals using the sub-array described above. Hereinafter, a 3x1 sub-array is described as an example in FIG. 2C.

[0039] Referring to FIG. 2C, the electronic device may include a plurality of antennas. The plurality of antennas may be distributed in sub-array units. The sub-array may include a plurality of antenna elements. For example, a first sub-array of the electronic device may include antenna elements (251-1, 251-2, 251-3). A second sub-array of the electronic device may include antenna elements (252-1, 252-2, 252-3). In this manner, the Nth sub-array of the electronic device may include antenna elements (251-N, 251-N, 251-N). The electronic device may include an RF processing circuit to transmit a wireless signal. In order for signals to be radiated through the plurality of antennas, the RF processing circuit may include a plurality of RF paths. For example, the electronic device may include a DAC for each RF path. The electronic device may include DACs ((230-1, 230-2, ..., 230-N)).

[0040] Each RF path can be connected to a sub-array. Sub-array technology refers to a technology for increasing the gain of a signal by dividing the supplied signal and supplying it to multiple antenna elements. The electronic device may include a Doherty power amplifier. For example, a Doherty power amplifier may be arranged in each RF path. The electronic device may include a plurality of Doherty power amplifiers (240-1, 240-2, ..., 240-N). An analog RF signal output through a DAC (230-i) may be amplified through the Doherty power amplifier (240-i). The Doherty power amplifier (240-i) may amplify the supplied signal and transmit the amplified signal to the antenna elements (251-i, 252-i, 253-i) of the sub-array of the corresponding RF path.

[0041] In FIGS. 2b and 2c, the RF path in which the Doherty power amplifier proposed through the embodiments of the present disclosure is arranged is described. Meanwhile, the RF path illustrated in FIGS. 2b and 2c is only an example for explaining the transmission process of the RF signal to the power amplifier and the antenna. It is not interpreted that an RF processing circuit having a structure different from the structure illustrated in FIGS. 2b and 2c is excluded from the embodiments. In addition, FIGS. 2b and 2c are only examples for explaining the RF path and are not interpreted as limiting the implementation method of the Doherty power amplifier of the present disclosure. For example, the circuit including the Doherty power amplifier may be arranged on a substrate (e.g., PCB) in an electronic device (e.g., base station (110), terminal (120), RU (220)), or may be implemented as a single component (e.g., power amplifier module (PAM), RFIC). For example, an RFIC (e.g., beamforming RFIC, monolithic microwave integrated circuit (MMIC) MMU RFIC, mmWave RFIC) may include multiple RF paths, each of which may include a Doherty power amplifier. Hereinafter, exemplary circuits of Doherty power amplifiers according to embodiments are described with reference to FIGS. 3 to 9 .

[0042] Electronic devices supporting wireless communication can consume a lot of power in the RF transmitter. In particular, the power amplifier of the electronic device can consume a lot of power. Communication technologies such as long term evolution (LTE) technology and 5G new radio (NR) utilize OFDM, which can result in a high peak-to-average power ratio (PAPR). To reduce peak signal loss, the power amplifier may be required to operate in a region backed off by the PAPR from the maximum output power. In this case, the efficiency of the power amplifier may decrease. To overcome this reduced efficiency, the electronic device according to embodiments of the present disclosure may include a Doherty power amplifier. The Doherty power amplifier can provide high efficiency in the back-off region through a load modulation technique.

[0043] An electronic device (e.g., a base station (110), a terminal (120), or a network entity (e.g., an RU (220), a repeater) associated with the base station (110)) according to embodiments of the present disclosure may include a Doherty power amplifier. Techniques for improving the efficiency of a two-stage Doherty power amplifier are described in the present disclosure. By optimizing components within the two-stage Doherty power amplifier, a power amplifier that provides improved performance and is miniaturized can be provided. As the efficiency of the two-stage Doherty power amplifier is improved, power consumption including the two-stage Doherty power amplifier can be reduced.

[0044] Fig. 3 illustrates an example of a two-stage Doherty power amplifier (e.g., Doherty power amplifier (240-1), Doherty power amplifier (240-2), ..., Doherty power amplifier (240-N)). The two-stage Doherty power amplifier described from Fig. 3 onward exemplifies the Doherty power amplifier of Figs. 2b and 2c.

[0045] Referring to FIG. 3, a two-stage Doherty power amplifier (300) may include a drive amplifier circuit (310), a network circuit (340), and a Doherty amplifier circuit (370). The Doherty amplifier circuit (370) may include a Doherty power amplifier as a main amplifier circuit. For example, the Doherty amplifier circuit (370) may include a carrier amplifier and a peaking amplifier. The carrier amplifier may be referred to as a main amplifier, and the peaking amplifier may be referred to as an auxiliary amplifier. Generally, at low output, the carrier amplifier operates to maintain high efficiency, and at high output, the two amplifiers, i.e., the carrier amplifier and the peaking amplifier, may operate in parallel. The carrier amplifier may be generally an AB class amplifier (operating point shifted to class A bias) or a B class amplifier (operating point at the cutoff point of the transistor). The peaking amplifier may be generally a C class amplifier (operating point below the cutoff point of the transistor) and may form a lot of distortion. For example, as input power is included, the peaking amplifier may operate. The formed distortion may be maintained by adjusting the bias so that it cancels out the distortion of the carrier amplifier. The Doherty amplifier circuit (370) may include a structure for connecting the carrier amplifier and the peaking amplifier. For the basic operating principle of the Doherty amplifier circuit (370), a load modulation technique by the output current of the peaking amplifier or an active load pull technique may be used. For example, the load modulation technique may provide an efficiency improvement in the back-off region by modulating the load impedance according to the output power.

[0046] The drive amplifier circuit (310) may be used to drive signals to be applied to the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370). The drive amplifier circuit (310) may be connected to the Doherty amplifier circuit (370) via a network circuit (340). The network circuit (340) may include a power distribution circuit (350) and an input matching circuit (360). In terms of being disposed between the drive amplifier circuit (310) and the Doherty amplifier circuit (370), the network circuit (340) may be referred to as an inter-stage network circuit, an inter-network circuit, a connection network circuit, a connection circuit, an inter-stage circuit, and / or equivalent technical terms thereof, in addition to the network circuit.

[0047] Since the carrier amplifier of the Doherty amplifier circuit (370) operates as a class AB amplifier, the input capacitance of the capacitor of the carrier amplifier may have a constant size depending on the input power. The peaking amplifier of the Doherty amplifier circuit (370) may operate as a class C amplifier. For example, the peaking amplifier may include a MOSFET (metal oxide semiconductor field effect transistor) amplifier. Due to the characteristics of the class C amplifier (e.g., the operating point is below the cutoff point), the input capacitance of the capacitor of the peaking amplifier may have a characteristic of nonlinearly increasing depending on the input power (e.g., the power applied to the peaking amplifier). The difference in input capacitance causes a change in impedance. If the network circuit (340) is designed without considering the impedance difference of the carrier amplifier and the peaking amplifier depending on the output power, the load impedance of the drive amplifier circuit (310) may be reverse-modulated in an unsuitable direction. The network circuit (340) according to embodiments of the present disclosure may be configured to control the load impedance of the drive amplifier circuit (310) based on the impedance difference between the carrier amplifier and the peaking amplifier according to the output power in the two-stage Doherty power amplifier (300). For example, the power distribution circuit (350) may be configured to rotate the input RF signal by a specified amount of phase (e.g., about 90 degrees, about -90 degrees), and the input matching circuit (360) may be configured to reversely rotate the input RF signal by the specified amount of phase. In addition to modulating the load impedance of the Doherty amplifier circuit (370), the load impedance of the drive amplifier circuit (310) is also modulated according to the output power, thereby increasing the efficiency of the two-stage Doherty power amplifier (300). Hereinafter, specific examples of the network circuit (340) of the two-stage Doherty power amplifier (300) will be described with reference to FIGS. 4 to 6.

[0048] FIG. 4 shows an example of components of a network circuit (e.g., network circuit (340)) of a two-stage Doherty power amplifier (e.g., two-stage Doherty power amplifier (300)).

[0049] Referring to Fig. 4, a two-stage Doherty power amplifier (300) may include a Doherty amplifier circuit (370). The Doherty amplifier circuit (370) may include a carrier amplifier and a peaking amplifier. Since the carrier amplifier operates as a class AB amplifier, the capacitance (C) of the input capacitor (471) of the carrier amplifier inp, c ) can have a constant size regardless of the input power. Since the peaking amplifier operates as a class C amplifier, the input capacitor (473) between the gate and source terminals of the peaking amplifier has a variable capacitance (C) depending on the input power. inp, p ) can be understood as providing a variable capacitance. The network circuit (340) is connected to the input terminal (481) (Z) of the carrier amplifier. s,c *) and the input terminal (483) of the above peaking amplifier (Z s,p *) can be linked to.

[0050] Each amplifier circuit (e.g., drive amplifier circuit (310), Doherty amplifier circuit (370)) of the two-stage Doherty power amplifier (300) may have a matching network circuit at each of the input and output terminals. The matching network circuit connected to the input terminal may be referred to as an input matching network (IMN) (or input matching circuit), and the matching network circuit connected to the output terminal may be referred to as an output matching network (OMN) (or output matching circuit). The drive load (401) (Z L,d) may represent a drive amplifier circuit (310). The network circuit (340) may include an output matching circuit (403) for the drive amplifier circuit (310) and an input matching circuit (360) for the Doherty amplifier circuit (370).

[0051] The network circuit (340) may include a power distribution circuit (350). The power distribution circuit (350) may be arranged between the output matching circuit (403) and the input matching circuit (360). The power distribution circuit (350) may be configured to distribute power to the carrier amplifier and the peaking amplifier. The power distribution circuit (350) may be configured to distribute the amplified power from the drive amplifier circuit (310) to each of the carrier amplifier and the peaking amplifier. For example, the power distribution circuit (350) of the network circuit (340) may include a Wilkinson power divider. The power distribution circuit (350) may include a first line (451), a second line (453), and an isolation resistor (455) (R iso ) may be included. The first line (451) has a 90 degree phase difference. It can provide an impedance of size (Z0 is the characteristic impedance). The second line (453) has a phase difference of 90 degrees. The network circuit (340) may include an offset line (457). The offset line (457) may be configured to compensate for a phase difference between an input signal to the carrier amplifier and an input signal to the peaking amplifier between the power distribution circuit (350) and the input matching circuit (360). The network circuit (340) may include an input matching circuit (360). The input matching circuit (360) may include a first input matching circuit (461) for the carrier amplifier and a second input matching circuit (463) for the peaking amplifier.

[0052] For example, the carrier amplifier and the peaking amplifier may be matched at maximum output power. Accordingly, the power distribution circuit (350), the offset line (457) for phase optimization, and the output matching circuit (403) may be in an impedance matching state. However, the capacitance of the input capacitor (471) of the carrier amplifier and the input capacitor (473) of the peaking amplifier may vary depending on the input power. As described above, since the carrier amplifier is biased to the Class-AB point, the input capacitor (471) of the carrier amplifier has a constant capacitance depending on the input power. On the other hand, since the peaking amplifier is biased to the Class-C point, the input capacitor (473) of the peaking amplifier has a nonlinear capacitance depending on the input power. For example, the capacitance value of the input capacitor (473) of the carrier amplifier may increase from a low value to a high value depending on the output power. Since it is assumed that the carrier amplifier and the peaking amplifier are matched at maximum output power, at low output power when the peaking amplifier is turned off, the circuit of the peaking amplifier may cause mismatch. The mismatch causes a change in the input impedance of the power distribution circuit (350), and the change may change the load impedance of the drive amplifier circuit (310).

[0053] In order to solve the above-described problem, the network circuit (340) according to the embodiments of the present disclosure is configured to perform a phase rotation of a specified size based on a power distribution circuit (350) and an input matching circuit (360), so that the load impedance of the drive amplifier circuit (310)

[0054] Figures 5a to 5c illustrate examples of a network circuit (e.g., a network circuit (340)) of a two-stage Doherty power amplifier (e.g., a two-stage Doherty power amplifier (300)). The network circuit (340) includes an input terminal (481) (Z) of a carrier amplifier of a Doherty amplifier circuit (370). s,c *) and the input stage (483) of the peaking amplifier of the Doherty amplifier circuit (370) (Z s,p *) can be connected to the input capacitor (471) of the carrier amplifier. The capacitance (C) of the input capacitor (471) of the carrier amplifier inp, c ) is fixed, but the capacitance (C) of the input capacitor (473) of the peaking amplifier inp, p ) may vary depending on the power size. Identical reference numbers may indicate identical descriptions.

[0055] Referring to FIG. 5a, the network circuit (340) may include an output matching circuit (403) for the drive amplifier circuit (310). The output matching circuit (403) may function as a band pass filter. For example, the output matching circuit (403) may include an inductor (503a) (L s,d ), inductor (503b) (L p,d ), capacitor (503c) (C s,d ) may be included. The inductor (503a) and the capacitor (503c) may be arranged in series, and the inductor (503b) may be arranged in parallel. For example, the output matching circuit (403) may have a phase of about 0 degrees. The network circuit (340) may include an input matching circuit (360) for the Doherty amplifier circuit (370). The input matching circuit (360) may include a first input matching circuit (461) for the carrier amplifier and a second input matching circuit (463) for the peaking amplifier. The input matching circuit (360) may function as a low pass filter. For example, the first input matching circuit (461) may include a capacitor (561a) (C) arranged in parallel. p,c) and inductors (561b) (L) arranged in series s,c ) may be included. The second input matching circuit (463) may include a capacitor (563a) (C) arranged in parallel. p,p ) and inductors (563b) (L) arranged in series s,p ) may be included. The input matching circuit (360) may have a phase of about 90 degrees. That is, the input matching circuit (360) may provide a phase shift of about 90 degrees with respect to the input signal.

[0056] The network circuit (340) may include a power distribution circuit (350). The power distribution circuit (350) may function as a high-pass filter. The power distribution circuit (350) may include a first line (451), a second line (453), and an isolation resistor (455) (R iso ) may include. Each of the first line (451) and the second line (453) may include at least one lumped element to provide a phase difference of about 90 degrees. For example, the first line (451) may include an inductor (551a) (L) for an LCL structure. w1 ), capacitor (551b) (C w1 ), and inductor (551c)(L w2 ) may be included. The second line (453) may include an inductor (553a) (L) for the LCL structure. w3 ), capacitor (553b) (C w2 ), and inductor (553c)(L w4 ) may be included. The power distribution circuit (350) of the network circuit (340) may have a phase of about -90 degrees. That is, the power distribution circuit (350) may provide a phase shift of about -90 degrees with respect to the input signal. The network circuit (340) may have a phase of about 0 degrees through the output matching circuit (403), the power distribution circuit (350), and the input matching circuit (360).

[0057] The network circuit (340) includes an offset line (457) and a capacitor (559) (C dcb ) may be included. The input matching circuit (360) may include a first input matching circuit (461) for the carrier amplifier and a second input matching circuit (463) for the peaking amplifier. The offset line (457) may be configured to compensate for a phase difference between the two paths of the first input matching circuit (461) and the second input matching circuit (463). For example, the offset line (457) may include at least one lumped element for phase compensation. The offset line (457) may function as a 'P' type high-pass filter. The offset line (457) may include an inductor (557a) (L) for an LCL structure. off1 ), capacitor (557b) (C off ), and inductor (557c)(L off2 ) may be included. In addition, the network circuit (340) may include a capacitor (559) to block (or prevent) direct current between the power distribution circuit (350) and the input matching circuit (360).

[0058] Fig. 5b is a diagram for explaining the simplification of the circuit structure of Fig. 5a. Referring to Fig. 5b, at least one passive element may be synthesized or omitted. For example, the inductor (551a) and the inductor (553a) arranged in parallel may be combined into one inductor (554) (L m,w ) can be implemented. For example, the inductor (551c) and the inductor (557a) arranged in parallel are one inductor (555) (L m,o ) can be implemented as a single passive element (e.g., capacitor (558) (C)). For example, an inductor (557c) and a capacitor (561a) arranged in parallel can be implemented as a single passive element (e.g., capacitor (558) (C) m,c)) can be implemented. As another example, depending on the inductance of the inductor (557c) and the capacitance size of the capacitor (561a), it can be implemented with one inductor instead of the capacitor (558). For example, the inductor (553c) and the capacitor (563a) arranged in parallel can be implemented as one passive element (e.g., the capacitor (552) (C m,p )) can be implemented. As another example, depending on the inductance of the inductor (553c) and the capacitance size of the capacitor (563a), it can be implemented with one inductor instead of the capacitor (552). In the operating frequency range, it operates as a short circuit, so the capacitor (559) (C dcb ) may not affect the synthesis of the inductor (553c) and the capacitor (563a).

[0059] By combining elements in parallel, the number of elements required for implementing a network circuit (340) of a two-stage Doherty power amplifier (300) can be reduced. In particular, when multiple inductors are combined into a single inductor, the single inductor has a smaller inductance than individual parallel inductors, thereby reducing not only the size of the element but also the insertion loss of each element. Therefore, through the circuit design illustrated in Fig. 5b, not only can performance gains be improved due to loss reduction, but also miniaturization of the amplifier circuit can be achieved.

[0060] In Fig. 5c, an example of utilizing the structure illustrated in Fig. 5b for actual IC design is described. For example, the values ​​of the elements of the Doherty power amplifier (300) can be determined by considering the arrangement according to the impedance of the bonding wire and the supply voltage (e.g., drain voltage, gate-source voltage).

[0061] For example, a drive load (401) (Z) for a drive amplifier circuit (310) L,d ) is a resistor (501a) (R) placed in parallel L,d ) and capacitor (501b)(C out,d) may be included.

[0062] For example, the output matching circuit (403) for the drive amplifier circuit (310) is an inductor (503a) (L s,d ), inductor (503b) (L p,d ), capacitor (503c) (C s,d ) may be included. Considering the wire connection with the transistor of the drive amplifier circuit (310), the inductor (503a) (L s,d ) is an inductor (583a) (L) corresponding to the wires connected in series. b,d ) and inductor (583b)(L) for design layout s,d' ) can be understood to include. To provide the inductor (503a), the output matching circuit (403) may include an inductor (583b) having an inductance determined according to the inductance of the inductor (583a). Inductor (503b) (L p,d ), the drain voltage (597) (V) of the transistor of the drive amplifier circuit (310) dd,d ) may be provided.

[0063] For example, considering the wire connection to the transistor of the carrier amplifier, the inductor (561b) (L s,c ) is an inductor (591b) (L) corresponding to the wires connected in series. b,c ) and inductor (591a) (L) for design layout s,c' ) can be understood as. To provide the inductor (591b), the first input matching circuit (461) may include an inductor (591a) having an inductance determined according to the inductance of the inductor (591b). The gate-source voltage (598) (V) for the transistor of the carrier amplifier gs,c ) is connected to the input terminal (481) (Z) of the carrier amplifier through the inductor (561b). s,c *) can be applied. Considering the wire connection with the transistor of the peaking amplifier, the inductor (563b) (L s,p) is an inductor (593b) (L) corresponding to the wires connected in series. b,p ) and inductor (593a) (L) for design layout s,p' ) can be understood as. To provide the inductor (593b), the second input matching circuit (463) may include an inductor (591a) having an inductance determined according to the inductance of the inductor (591b). The gate-source voltage (599) (V) for the transistor of the peaking amplifier gs,p ) is connected to the input terminal (483) (Z) of the peaking amplifier through the inductor (563b). s,p ) may be authorized.

[0064] In the above FIGS. 5A to 5C, a circuit for matching the load impedance of the drive amplifier circuit (310) to the characteristic impedance is described, in which the power distribution circuit (350) operates as a high-pass network with a phase of about 90 degrees, and the input matching circuit (370) for the Doherty amplifier circuit (370) operates as a low-pass network with a phase of about -90 degrees. However, embodiments of the present disclosure are not limited thereto. For example, the power distribution circuit (350) may operate as a low-pass network with a phase of about -90 degrees, and the input matching circuit (370) for the Doherty amplifier circuit (370) may operate as a high-pass network with a phase of about 90 degrees. Hereinafter, an example of a network circuit (340) in which the power distribution circuit (350) operates as a low-pass network and the input matching circuit (370) operates as a high-pass network is described through FIG. 6.

[0065] FIG. 6 shows another example of a network circuit (e.g., network circuit (340)) of a two-stage Doherty power amplifier (e.g., two-stage Doherty power amplifier (300)).

[0066] Referring to FIG. 6, the network circuit (340) may include an output matching circuit (403) for the drive amplifier circuit (310). The output matching circuit (403) may function as a band pass filter. For example, the output matching circuit (403) may include an inductor (603a) (L s,d ), inductor (603b) (L p,d ), capacitor (603c) (C s,d ) may be included. The inductor (603a) and the capacitor (603c) may be arranged in series, and the inductor (603b) may be arranged in parallel. For example, the output matching circuit (403) may have a phase of about 0 degrees. The inductor (603b) (L p,d ), the drain voltage (697) (V) of the transistor of the drive amplifier circuit (310) dd,d ) may be provided.

[0067] The network circuit (340) may include an input matching circuit (360) for a Doherty amplifier circuit (370). The input matching circuit (360) may include a first input matching circuit (461) for the carrier amplifier and a second input matching circuit (463) for the peaking amplifier. The input matching circuit (360) may function as a high-pass filter. For example, the first input matching circuit (461) may include a capacitor (691a) (C) arranged in series. p,c ), inductors (691b) (L) arranged in series b,c ), and an inductor (691c) (L) arranged in parallel p,c ) may include an inductor (691b) (L b,c ) can correspond to a bonding wire with the transistor of the carrier amplifier. The gate-source voltage (698) (V) for the transistor of the carrier amplifier gs,c ) is connected to the input terminal (481) (Z) of the carrier amplifier through the inductor (693b) and the inductor (693c). s,c*) can be applied. The first input matching circuit (461) can have a phase of about -90 degrees. That is, the first input matching circuit (461) can provide a phase shift of about -90 degrees with respect to the input signal. The second input matching circuit (463) is a capacitor (693a) (C) arranged in series. p,p ), inductors (693b) (L) arranged in series b,p ), and an inductor (693c) (L) arranged in parallel p,p ) may include an inductor (693b) (L b,p ) can correspond to a bonding wire with the transistor of the peaking amplifier. The gate-source voltage (699) (V) for the transistor of the peaking amplifier gs,c ) is connected to the input terminal (481) (Z) of the carrier amplifier through the inductor (693b) and the inductor (693c). s,c *) can be applied. The second input matching circuit (463) can have a phase of about -90 degrees. That is, the second input matching circuit (463) can provide a phase shift of about -90 degrees with respect to the input signal.

[0068] The network circuit (340) may include a power distribution circuit (350) and an offset line (457). Since the input matching circuit (360) functions as a high-pass filter, the power distribution circuit (350) may function as a low-pass filter. The power distribution circuit (350) may include a first line (451), a second line (453), and an isolation resistor (455) (R iso ) may be included. Each of the first line (451) and the second line (453) may include at least one lumped element to provide a phase difference of about -90 degrees. For example, a circuit arrangement using a composite element as illustrated through FIG. 5b may be utilized. As an example, the power distribution circuit (350) and the offset line (457) may include an inductor (651b) (L w1 ), inductor (653b) (L w2 ), inductor (657b) (Lwff ), capacitor (654) (C m,w ), capacitor (656) (C m,o ), capacitor (658) (C off2 ), capacitor (659) (C w4 ) and an isolation resistor (655). The power distribution circuit (350) of the network circuit (340) may have a phase of about 90 degrees. That is, the power distribution circuit (350) may provide a phase shift of about 90 degrees with respect to the input signal. The network circuit (340) may have a phase of about 0 degrees through the output matching circuit (403), the power distribution circuit (350), and the input matching circuit (360).

[0069] FIG. 7 shows examples of Smith charts of a two-stage Doherty power amplifier (e.g., a two-stage Doherty power amplifier (300)).

[0070] Referring to Fig. 7, the Smith chart (700) represents the load impedance of the drive amplifier circuit (310) according to the output power of the two-stage Doherty power amplifier (300). At high output power, when the peaking amplifier is turned on, the capacitance (C) of the input capacitor (473) in,p ) is performed. For example, the drive amplifier circuit (310) may have a load impedance (701) of about 100 ohms. On the other hand, in a situation where the output power is low and the peaking amplifier is turned on (or turned off again), the capacitance (C) of the input capacitor (473) in,p) becomes small, and let's assume a situation where matching is not performed. For example, the drive amplifier circuit (310) may have a load impedance (703) of about 165 ohms. Since the input matching circuit (360) provides a phase shift (hereinafter, phase alignment) in the opposite direction as the phase of the power distribution circuit (350), the load impedance viewed from the drive amplifier circuit (310) may have a larger load at low output power. Due to the high load impedance, a relatively small current flows in, so that the power consumption of the two-stage Doherty power amplifier (300) may be reduced. The network circuit (340) may enable appropriate load modulation of the drive amplifier without an additional circuit (e.g., an offset line for the drive amplifier stage) through the phase shift, thereby improving the efficiency of the two-stage Doherty power amplifier (300).

[0071] Smith chart (750) represents the load impedance of the drive amplifier stage in a legacy two-stage Doherty power amplifier in which phase alignment is not performed in the network circuit (340). In the legacy two-stage Doherty power amplifier, the input of the carrier amplifier and the input of the peaking amplifier have a phase difference of about 90 degrees. Therefore, the network circuit between the drive amplifier stage and the Doherty amplifier stage of the legacy two-stage Doherty power amplifier can have a phase difference of about 90 degrees. At high output power, when the peaking amplifier is turned on, the capacitance (C) of the input capacitor (473) in,p ) is performed. For example, the drive amplifier stage may have a load impedance (751) of about 100 ohms. On the other hand, in a situation where the output power is low and the peaking amplifier is turned on (or turned off again), the capacitance (C) of the input capacitor (473) in,p) becomes small, and the matching is not performed. For example, the drive amplifier stage may have a load impedance (753) of about 63.8+j17.8 ohms. As an impedance of less than about 100 ohms is provided, the current consumption in the drive amplifier stage may increase. Due to the high current consumption, the overall power consumption of the legacy two-stage Doherty power amplifier may increase.

[0072] Figures 8a and 8b show examples of the performance of a two-stage Doherty power amplifier (e.g., a two-stage Doherty power amplifier (300)).

[0073] Referring to FIG. 8A, a graph (800) represents power-to-efficiency. The horizontal axis of the graph (800) represents power (unit: dBm (decibel milliwatt)), and the vertical axis of the graph (800) represents power added efficiency (PAE) (unit: percent (%)) of the power amplifier. A first line (801) represents the efficiency of a legacy two-stage Doherty power amplifier (e.g., a power amplifier in which phase alignment is not performed between the power divider (350) and the input matching circuit (360), and a second line (802) represents the efficiency of a two-stage Doherty power amplifier (300) described with reference to FIGS. 3 to 9. For example, assuming that the output power is about 50 dBm and the back-off power is about 8 dB, the input power may be about 42 dBm. In the above input power, the first line (801) represents about 42.3%, and the second line (802) represents about 46%. Referring to the first line (801) and the second line (802), an improved efficiency of about 8.7% can be confirmed.

[0074] Referring to FIG. 8B, a graph (850) represents the current of the drive amplifier circuit (310). The horizontal axis of the graph (850) represents power (unit: dBm (decibel milliwatt)), and the vertical axis of the graph (850) represents the current of the drive amplifier circuit (310) (unit: ampere (A)). A first line (851) represents the current intensity of a drive amplifier stage in a legacy two-stage Doherty power amplifier (e.g., a power amplifier in which phase alignment is not performed between the power divider (350) and the input matching circuit (360). A second line (852) represents the current intensity of the drive amplifier circuit (310) in a two-stage Doherty power amplifier (300) described with reference to FIGS. 3 to 9. For example, assuming that the output power is about 50 dBm and the back-off power is about 8 dB, the input power may be about 42 dBm. At the above input power, the first line (801) represents approximately 116 mA, and the second line (802) represents approximately 81 mA. Referring to the first line (851) and the second line (852), it can be confirmed that the consumption current has been reduced to approximately 70%. The reduction in the consumption current can indicate a reduction in the power consumption of the entire two-stage Doherty power amplifier (300).

[0075] Fig. 9 shows an example of components of a two-stage Doherty power amplifier (e.g., a two-stage Doherty power amplifier (300)).

[0076] Referring to FIG. 9, the two-stage Doherty power amplifier (300) may include a drive amplifier circuit (310). For example, the drive amplifier circuit (310) may include a drive amplifier (913) (e.g., a transistor) of the drive amplifier circuit (310). For example, the drive amplifier circuit (310) may include an input matching circuit (911) for impedance matching between a side to which an RF signal is input (e.g., a load (901)) and the drive amplifier (913).

[0077] The two-stage Doherty power amplifier (300) may include a network circuit (340). For a description of the network circuit (340), reference may be made to the structures illustrated in FIGS. 3 to 8B. The same reference numerals may be used for the same description.

[0078] The two-stage Doherty power amplifier (300) may include a Doherty amplifier circuit (370). The first RF signal and the second RF signal distributed through the power distribution circuit (350) may pass through the first input matching circuit (461) and the second input matching circuit (463) and be input to the input terminal (481) and the input terminal (483) of the Doherty amplifier circuit (370), respectively. The input terminal (481) may be connected to a carrier amplifier path of the Doherty amplifier circuit (370). The carrier amplifier path may include a carrier amplifier (970a) (e.g., a transistor, a FET), a first output matching network circuit (971a), a first offset line (980a), and a transmission line (990). The first offset line (980a) may be used to compensate for and optimize parasitic components inside the carrier amplifier (970a). The Doherty amplifier circuit (370) may include an impedance transformer for load modulation after the first output matching network circuit (971a). For example, the impedance transformer may include a transmission line (990). The transmission line (990) may have an impedance of about 50 ohms. It can have any length. can represent the wavelength of the frequency of the signal. The input terminal (483) can be connected to a peaking amplifier path of a Doherty amplifier circuit (370). The peaking amplifier path can include a peaking amplifier (970b), a second output matching network circuit (971b), and a second offset line (980b). The second offset line (980b) can be used to compensate for and optimize parasitic components inside the peaking amplifier (970b).

[0079] The first RF signal passing through the carrier amplifier path and the second RF signal passing through the peaking amplifier path can be combined. The two-stage Doherty power amplifier (300) can include an impedance transformer (950) for impedance matching of the combined signal. The coupling stage (393) can be connected to an impedance transformer to match an external reference impedance (999) (e.g., about 50 ohms, external antenna).

[0080] FIG. 10 illustrates examples of components of an electronic device. For example, the electronic device (1010) may be one of a base station (110) (or an RU (220)) and a terminal (120), and the electronic device (1020) may be the other one of the base station (110) (or an RU (220)) and the terminal (120). The electronic device (1010) may be an antenna device of an RFIC including one or more RF chains. In addition to the power amplifier itself (e.g., a two-stage Doherty power amplifier (300)) mentioned through FIGS. 3 to 9, an electronic device including the power amplifier is also included in embodiments of the present disclosure. The electronic device (1010) may include a network circuit (340) in which phase alignment (e.g., providing a phase difference of approximately 0 degrees through phase shifting between the power distribution circuit (350) and the input matching circuit (360)) is performed to increase the load impedance of the drive amplifier stage of the two-stage Doherty power amplifier (300) at low output.

[0081] Referring to FIG. 10, an exemplary functional configuration of an electronic device (1010) is illustrated. The electronic device (1010) may include an antenna unit (1011), a filter unit (1012), an RF (radio frequency) processing unit (1013), and a control unit (1014).

[0082] The antenna unit (1011) may include a plurality of antennas. The antenna performs functions for transmitting and receiving signals via a wireless channel. The antenna may include a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). The antenna may radiate an upconverted signal on a wireless channel or acquire a signal radiated by another device. Each antenna may be referred to as an antenna element or antenna element. According to one embodiment, the antenna unit (1011) may include an antenna array in which a plurality of antenna elements form an array. The antenna unit (1011) may be electrically connected to the filter unit (1012) via RF signal lines. The antenna unit (1011) may be mounted on a PCB including a plurality of antenna elements. The PCB may include a plurality of RF signal lines connecting each antenna element to a filter of the filter unit (1012). These RF signal lines may be referred to as a feeding network. The antenna unit (1011) can provide a received signal to the filter unit (1012) or radiate a signal provided from the filter unit (1012) into the air.

[0083] The filter unit (1012) can perform filtering to transmit a signal of a desired frequency. The filter unit (1012) can perform a function to selectively identify a frequency by forming a resonance. The filter unit (1012) can include at least one of a band pass filter, a low pass filter, a high pass filter, or a band reject filter. That is, the filter unit (1012) can include RF circuits for obtaining a signal of a frequency band for transmission or a frequency band for reception. The filter unit (1012) according to various embodiments can electrically connect the antenna unit (1011) and the RF processing unit (1013).

[0084] The RF processing unit (1013) may include a plurality of RF paths. An RF path may be a unit of a path through which a signal received through an antenna or a signal radiated through an antenna passes. At least one RF path may be referred to as an RF chain. The RF chain may include a plurality of RF components. The RF components may include amplifiers, mixers, oscillators, digital-to-analog converters (DACs), analog-to-digital converters (ADCs), etc. For example, the RF processing unit (1013) may include an up converter that up-converts a baseband digital transmission signal to a transmission frequency, and a DAC that converts the up-converted digital transmission signal to an analog RF transmission signal. The up converter and the DAC form part of a transmission path. The transmission path may further include a power amplifier (PA) or a coupler (or combiner). Also, for example, the RF processing unit (1013) may include an ADC that converts an analog RF reception signal into a digital reception signal and a down converter that converts the digital reception signal into a baseband digital reception signal. The ADC and the down converter form part of a reception path. The reception path may further include a low-noise amplifier (LNA) or a coupler (or divider). The RF components of the RF processing unit may be implemented on a PCB. For example, the base station (1010) may include a structure in which an antenna unit (1011) - a filter unit (1012) - an RF processing unit (1013) are stacked in that order. For example, the antennas and the RF components of the RF processing unit may be implemented on a PCB. For example, filters may be repeatedly connected between PCBs to form a plurality of layers.

[0085] The RF processing unit (1013) may include a plurality of RF processing chains for a plurality of signal paths transmitted to the antenna unit (111) and the filter unit (1012). For example, the RF processing unit (1013) may be an RFIC. The RFIC may include a plurality of RF processing chains. A signal applied from a baseband may be input to the RFIC. The signal input to the RFIC may be distributed to each antenna element. At this time, for beamforming, an independent phase shift may be applied to each antenna element. Accordingly, the RFIC may include RF processing chains for processing a signal to be transmitted to each antenna element. Each RF processing chain may include one or more RF components for RF signal processing. The RF processing unit (1013) may include a drive amplifier circuit (310), a network circuit (340), and a Doherty amplifier circuit (370). For example, the network circuit (340) may include a power distribution circuit (350) having a phase of about 90 degrees and an input matching circuit (360) having a phase of about -90 degrees. As another example, the network circuit (340) may include a power distribution circuit (350) having a phase of about 090 degrees and an input matching circuit (360) having a phase of about 90 degrees.

[0086] The control unit (1014) can control the overall operations of the electronic device (1010). The control unit (1014) can include various modules for performing communication. The control unit (1014) can include at least one processor, such as a modem. The control unit (1014) can include modules for digital signal processing. For example, the control unit (1014) can include a modem. When transmitting data, the control unit (1014) generates complex symbols by encoding and modulating a transmission bit stream. In addition, for example, when receiving data, the control unit (1014) restores a reception bit stream by demodulating and decoding a baseband signal. The control unit (1014) can perform functions of a protocol stack required by a communication standard.

[0087] In FIG. 10, the functional configuration of an electronic device (1010) is described as equipment in which the Doherty power amplifier of the present disclosure can be utilized. However, the example illustrated in FIG. 10 is merely an exemplary configuration for utilizing the Doherty power amplifier described through FIGS. 1 to 9, and embodiments of the present disclosure are not limited to the components illustrated in FIG. 10. An RF module, MMIC, PAM, RFIC, other configuration communication equipment including a Doherty power amplifier having the above-described resistor selection circuit, or a structure for a Doherty power amplifier can also be understood as an embodiment of the present disclosure.

[0088] A Doherty power amplifier according to embodiments of the present disclosure may include a two-stage Doherty power amplifier configured in two stages. In the two-stage Doherty power amplifier, by configuring the electrical length of the drive amplification stage to be approximately 0 degrees, the efficiency of the drive amplification stage can be increased at low output power (e.g., a second state in which the peaking amplifier of the Doherty amplifier circuit does not operate). Typically, impedance matching is performed at maximum output power (e.g., a first state in which the peaking amplifier of the Doherty amplifier circuit operates). A two-stage Doherty power amplifier according to embodiments of the present disclosure may utilize a topology design within a network circuit to reduce high consumption current that may occur due to impedance mismatch at low output power (e.g., a second state in which the peaking amplifier of the Doherty amplifier circuit does not operate). Rather than inserting a separate offset line in the drive amplifier circuit, the components of the network circuit (340) can be arranged so that the phase of the power distribution circuit (350) of the network circuit (e.g., the network circuit (340)) and the phase of the input matching circuit (360) are offset in opposite directions. Through the components of the network circuit (340), the efficiency of the power amplifier is increased without a separate additional circuit, and implementation in a form such as an IC is facilitated. Through the design of the power distribution circuit (350) and the matching network circuit (e.g., the input matching network circuit, the output matching network circuit) included in the network circuit (340), the load impedance can be appropriately modulated from low output to high output in the drive amplifier circuit, and the consumption current can be improved.

[0089] In embodiments, a two-stage Doherty power amplifier (300) is provided. The two-stage Doherty power amplifier (300) may include a drive amplifier circuit (310), a Doherty amplifier circuit (370) including a carrier amplifier and a peaking amplifier, and a network circuit (340) disposed between the drive amplifier circuit (310) and the Doherty amplifier circuit (370). The network circuit (340) may include an output matching circuit (403) for the drive amplifier circuit (310), a power distribution circuit (350) for distributing an output of the drive amplifier circuit (310) to each of the carrier amplifier and the peaking amplifier, a first input matching circuit (461) for the carrier amplifier, and a second input matching circuit (463) for the peaking amplifier. The power distribution circuit (350) may be configured to provide a phase difference of a specified magnitude in a first direction. Each of the first input matching circuit (461) and the second input matching circuit (463) may be configured to provide a phase difference of the specified size in a second direction opposite to the first direction.

[0090] According to one embodiment, the power distribution circuit (350) may include a first transmission line for the carrier amplifier, a second transmission line for the peaking amplifier, and a resistor connected to the first transmission line and the second transmission line.

[0091] In one embodiment, the first transmission line may be configured to provide a phase difference of a specified magnitude in the first direction. The second transmission line may be configured to provide a phase difference of a specified magnitude in the first direction.

[0092] In one embodiment, the power distribution circuit (350) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees. The first input matching circuit (461) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees. The second input matching circuit (463) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees.

[0093] According to one embodiment, the first input matching circuit (461) may include a first capacitor arranged in parallel and a first inductor arranged in series. The second input matching circuit (463) may include a second capacitor arranged in parallel and a second inductor arranged in series.

[0094] According to one embodiment, each transmission line of the power distribution circuit (350) includes a third inductor arranged in parallel in an LCL structure, a fourth inductor arranged in parallel, and a third capacitor connected in series between the third inductor and the fourth inductor.

[0095] In one embodiment, the power distribution circuit (350) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees. The first input matching circuit (461) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees. The second input matching circuit (463) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees.

[0096] According to one embodiment, the first input matching circuit (461) may include a first capacitor arranged in series and a first inductor arranged in parallel. The second input matching circuit (463) may include a second capacitor arranged in series and a second inductor arranged in parallel.

[0097] According to one embodiment, each transmission line of the power distribution circuit (350) includes a third capacitor arranged in parallel in a CLC structure, a fourth capacitor arranged in parallel, and a third inductor connected in series between the third capacitor and the fourth capacitor.

[0098] According to one embodiment, the network circuit (340) may include an offset line and a capacitor disposed between the power distribution circuit (350) and the input matching circuit. The offset line may be used for phase shifting of an input signal to at least one of the carrier amplifier and the peaking amplifier. The capacitor may be used to block direct current between the power distribution circuit (350) and the input matching circuit.

[0099] According to one embodiment, the gate-source voltage of the first transistor of the carrier amplifier may be provided through an inductor of the first input matching circuit (461). The gate-source voltage of the second transistor of the peaking amplifier may be provided through an inductor of the second input matching circuit (463).

[0100] According to one embodiment, the output matching circuit (403) may correspond to a bandpass circuit for providing a phase of about 0 degrees. The output matching circuit (403) may include a first inductor arranged in series, a capacitor arranged in series, and a second inductor arranged in parallel between the first inductor and the capacitor. The drain voltage of the transistor of the drive power amplification circuit may be provided through the first inductor and the second inductor.

[0101] According to one embodiment, the input impedance from the drive amplifier circuit (310) to the network circuit (340) may correspond to a first value in a first state in which only the carrier amplifier among the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370) operates. The input impedance from the drive amplifier circuit (310) to the network circuit (340) may correspond to a second value smaller than the first value in a second state in which both the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370) operate.

[0102] According to one embodiment, the output matching circuit (403), the network circuit (340), and the input matching circuit may be configured to provide impedance matching of the Doherty amplifier circuit (370) in a second state in which both the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370) operate.

[0103] In one embodiment, the first inductor of the first input matching circuit (461) may be associated with a bonding wire connected to a transistor of the carrier amplifier. The second inductor of the second input matching circuit (463) may be associated with a bonding wire connected to a transistor of the peaking amplifier.

[0104] In embodiments, an electronic device including a two-stage Doherty power amplifier (300) is provided. The electronic device may include a plurality of antennas, a plurality of filters for the plurality of antennas, a plurality of RF processing circuits for the plurality of antennas, and a processor. Each RF processing circuit of the plurality of RF processing circuits may include a two-stage Doherty power amplifier (300). The two-stage Doherty power amplifier (300) may include a drive amplifier circuit (310), a Doherty amplifier circuit (370) including a carrier amplifier and a peaking amplifier, and a network circuit (340) disposed between the drive amplifier circuit (310) and the Doherty amplifier circuit (370). The network circuit (340) may include an output matching circuit (403) for the drive amplifier circuit (310), a power distribution circuit (350) for distributing the output of the drive amplifier circuit (310) to each of the carrier amplifier and the peaking amplifier, a first input matching circuit (461) for the carrier amplifier, and a second input matching circuit (463) for the peaking amplifier. The power distribution circuit (350) may be configured to provide a phase difference of a specified size in a first direction. Each of the first input matching circuit (461) and the second input matching circuit (463) may be configured to provide a phase difference of the specified size in a second direction opposite to the first direction.

[0105] In one embodiment, the power distribution circuit (350) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees. The first input matching circuit (461) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees. The second input matching circuit (463) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees.

[0106] In one embodiment, the power distribution circuit (350) may correspond to a low-pass circuit for providing a phase difference of approximately 90 degrees. The first input matching circuit (461) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees. The second input matching circuit (463) may correspond to a high-pass circuit for providing a phase difference of approximately -90 degrees.

[0107] According to one embodiment, the input impedance from the drive amplifier circuit (310) to the network circuit (340) may correspond to a first value in a first state in which only the carrier amplifier among the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370) operates. The input impedance from the drive amplifier circuit (310) to the network circuit (340) may correspond to a second value smaller than the first value in a second state in which both the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit (370) operate.

[0108] According to one embodiment, the two-stage Doherty power amplifier (300)(300) may include each RF processing circuit in a power amplifier module (PAM).

[0109] Since RF power amplifiers consume the most power in wireless communication systems, they require significant heat dissipation systems and are therefore expensive and bulky. The interstage structure of a two-stage Doherty power amplifier has a problem in that the efficiency of load modulation of the drive amplifier decreases at low output (e.g., when the peaking amplifier of the Doherty amplifier is not in operation). The network circuit (340) of the two-stage Doherty power amplifier (300) according to embodiments of the present disclosure can provide improved efficiency through appropriate load modulation of the drive amplifier circuit (310) at the low output range. In addition, as illustrated in FIG. 5b, a circuit of a two-stage Doherty power amplifier (300) suitable for miniaturization and weight reduction can be designed by optimizing the internal circuit structure (e.g., minimizing the number of components, reducing the size of the inductor) through the synthesis of inductors and / or capacitors of the network circuit (340). By improving the overall efficiency of the two-stage Doherty power amplifier (300) without the burden of additional circuits (e.g., offset lines of the drive amplifier stage) of FIGS. 7, 8a, and 8b, power consumption can be reduced, and thereby the heat dissipation system of the electronic device can also be simplified.

[0110] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned can be clearly understood by a person having ordinary skill in the art to which the present disclosure belongs from the description below.

[0111] For one or more embodiments, at least one of the components described in one or more of the preceding drawings may be configured to perform one or more operations, techniques, processes, and / or methods as described herein. For example, a processor (e.g., a baseband processor) described herein with respect to one or more of the preceding drawings may be configured to operate according to one or more examples described herein. For another example, circuitry associated with a user equipment (UE), a base station, a network element, and the like, as described above with respect to one or more of the preceding drawings, may be configured to operate according to one or more examples described herein.

[0112] Any of the embodiments described above may be combined with any other embodiment (or combination of embodiments) unless explicitly stated otherwise. The foregoing description of one or more implementations provides examples and descriptions, but is not intended to be exhaustive or limit the scope of the embodiments to the precise forms disclosed. Modifications and variations are possible in light of the above teachings or may be learned from practicing various embodiments.

[0113] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0114] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0115] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured to be executed by one or more processors in an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specification of the present disclosure. The one or more programs may be provided as a computer program product. The computer program product may be traded between a seller and a buyer as a commodity. The computer program product may be distributed in the form of a machine-readable storage medium (e.g., compact disc read only memory (CD-ROM)), or may be distributed online (e.g., downloaded or uploaded) via an application store (e.g., Play Store™) or directly between two user devices (e.g., smart phones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created in a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0116] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc-ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in memories formed by a combination of some or all of these. In addition, each configuration memory may include multiple copies.

[0117] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network, such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device implementing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device implementing an embodiment of the present disclosure.

[0118] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.

[0119] According to embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0120] Meanwhile, although the detailed description of the present disclosure has described specific embodiments, it is obvious that various modifications are possible within the scope of the present disclosure.

Claims

1. In the Ethan Doherty power amplifier, Drive amplifier circuit; A Doherty amplifier circuit including a carrier amplifier and a peaking amplifier; and A network circuit is included between the drive amplifier circuit and the Doherty amplifier circuit. The above network circuit: Output matching circuit for the above drive amplifier circuit; A power distribution circuit for distributing the output of the above drive amplifier circuit to each of the carrier amplifier and the peaking amplifier; a first input matching circuit for the carrier amplifier; and A second input matching circuit for the above peaking amplifier is included, The above power distribution circuit is configured to provide a phase difference of a specified size in the first direction, Each of the first input matching circuit and the second input matching circuit is configured to provide a phase difference of the specified size in a second direction opposite to the first direction. Ethan Doherty power amplifier.

2. In claim 1, The power distribution circuit comprises a first transmission line for the carrier amplifier, a second transmission line for the peaking amplifier, and a resistor connected to the first transmission line and the second transmission line. Ethan Doherty power amplifier.

3. In claim 2, The first transmission line is configured to provide a phase difference of a specified size in the first direction, The second transmission line is configured to provide a phase difference of a specified size in the first direction. Ethan Doherty power amplifier.

4. In claim 1, The above power distribution circuit corresponds to a high-pass circuit to provide a phase difference of approximately -90 degrees, The above first input matching circuit corresponds to a low-pass circuit for providing a phase difference of about 90 degrees, The above second input matching circuit corresponds to a low-pass circuit for providing a phase difference of about 90 degrees. Ethan Doherty power amplifier.

5. In claim 4, The first input matching circuit includes a first capacitor arranged in parallel and a first inductor arranged in series, The second input matching circuit comprises a second capacitor arranged in parallel and a second inductor arranged in series. Ethan Doherty power amplifier.

6. In claim 5, Each transmission line of the above power distribution circuit includes a third inductor arranged in parallel in an LCL structure, a fourth inductor arranged in parallel, and a third capacitor connected in series between the third inductor and the fourth inductor. Ethan Doherty power amplifier.

7. In claim 1, The above power distribution circuit corresponds to a low-pass circuit to provide a phase difference of about 90 degrees, The above first input matching circuit corresponds to a high-pass circuit for providing a phase difference of approximately -90 degrees, The above second input matching circuit corresponds to a high-pass circuit for providing a phase difference of approximately -90 degrees. Ethan Doherty power amplifier.

8. In claim 7, The first input matching circuit comprises a first capacitor arranged in series and a first inductor arranged in parallel, The second input matching circuit comprises a second capacitor arranged in series and a second inductor arranged in parallel. Ethan Doherty power amplifier.

9. In claim 8, Each transmission line of the above power distribution circuit includes a third capacitor arranged in parallel in a CLC structure, a fourth capacitor arranged in parallel, and a third inductor connected in series between the third capacitor and the fourth capacitor. Ethan Doherty power amplifier.

10. In claim 1, The above network circuit is, Including an offset line and capacitor arranged between the power distribution circuit and the input matching circuit, The above offset line is used for phase shifting of an input signal to at least one of the carrier amplifier or the peaking amplifier, The above capacitor is used to block direct current between the power distribution circuit and the input matching circuit. Ethan Doherty power amplifier.

11. In claim 1, The gate-source voltage of the first transistor of the carrier amplifier is provided through the inductor of the first input matching circuit, The gate-source voltage of the second transistor of the above peaking amplifier is provided through the inductor of the second input matching circuit. Ethan Doherty power amplifier.

12. In claim 1, The above output matching circuit corresponds to a bandpass circuit for providing a phase of approximately 0 degrees, The above output matching circuit includes a first inductor arranged in series and a capacitor arranged in series, and a second inductor arranged in parallel between the first inductor and the capacitor. The drain voltage of the transistor of the above drive power amplification circuit is provided through the first inductor and the second inductor. Ethan Doherty power amplifier.

13. In claim 1, The input impedance from the above drive amplifier circuit to the above network circuit is, In the first state where only the carrier amplifier among the carrier amplifier and the peaking amplifier of the above Doherty amplifier circuit operates, corresponding to the first value, In a second state in which both the carrier amplifier and the peaking amplifier of the above Doherty amplifier circuit operate, corresponding to a second value smaller than the first value, Ethan Doherty power amplifier.

14. In claim 1, The above output matching circuit, the network circuit, and the input matching circuit are configured to provide impedance matching of the Doherty amplifier circuit in a second state in which both the carrier amplifier and the peaking amplifier of the Doherty amplifier circuit operate. Ethan Doherty power amplifier.

15. In an electronic device including an Ethan Doherty power amplifier, Multiple antennas; A plurality of filters for the plurality of antennas; a plurality of RF processing circuits for the plurality of antennas; and Contains a processor, Each RF processing circuit of the above plurality of RF processing circuits includes a two-stage Doherty power amplifier, The above two-stage Doherty power amplifier, Drive amplifier circuit, A Doherty amplifier circuit including a carrier amplifier and a peaking amplifier, and A network circuit is included between the drive amplifier circuit and the Doherty amplifier circuit. The above network circuit: Output matching circuit for the above drive amplifier circuit, A power distribution circuit for distributing the output of the above drive amplifier circuit to each of the carrier amplifier and the peaking amplifier; A first input matching circuit for the carrier amplifier, and A second input matching circuit for the above peaking amplifier is included, The above power distribution circuit is configured to provide a phase difference of a specified size in the first direction, Each of the first input matching circuit and the second input matching circuit is configured to provide a phase difference of the specified size in a second direction opposite to the first direction. Electronic devices.

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