Semiconductor substrate and epitaxial substrate

Abstract

This semiconductor substrate has a notch formed therein. The semiconductor substrate includes a first outer peripheral surface and a first main surface. The first main surface is continuous with the first outer peripheral surface. The maximum diameter of the first main surface is 150 mm or more. The first outer peripheral surface includes a first notch region forming a notch. The first main surface is provided with a first reference mark and a second reference mark serving as a reference for two-dimensional position coordinates. When viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the first reference mark and the first notch region is 10 mm or less.

Description

Semiconductor substrates and epitaxial substrates

[0001] The present disclosure relates to a semiconductor substrate and an epitaxial substrate. This application claims priority to Japanese Patent Application No. 2023-188849, filed November 2, 2023. The entire contents of the Japanese patent application are incorporated herein by reference.

[0002] Japanese Patent Laid-Open Publication No. 4-62858 (Patent Document 1) describes a method for observing and analyzing foreign matter, in which a coordinate system is set by providing a coordinate reference on a wafer.

[0003] Japanese Patent Laid-Open Publication No. 2000-269286 (Patent Document 2) describes a method for identifying the location of a defect in a semiconductor substrate, in which the location of the defect is identified based on affine transformation and coordinate values ​​in the coordinate system of a defect evaluation device.

[0004] Japanese Patent Application Laid-Open No. 4-62858 Japanese Patent Application Laid-Open No. 2000-269286

[0005] A semiconductor substrate according to the present disclosure has a notch formed therein. The semiconductor substrate includes a first outer peripheral surface and a first main surface. The first main surface is continuous with the first outer peripheral surface. The maximum diameter of the first main surface is 150 mm or more. The first outer peripheral surface includes a first notch region forming the notch. A first reference mark and a second reference mark serving as references for two-dimensional position coordinates are provided on the first main surface. When viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the first reference mark and the first notch region is 10 mm or less.

[0006] FIG. 1 is a schematic plan view showing the configuration of a semiconductor substrate according to the first embodiment. FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. 1. FIG. 3 is an enlarged plan view showing the configuration of a fiducial mark. FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3. FIG. 5 is an enlarged plan view showing the configuration of a fiducial mark on a semiconductor substrate according to the second embodiment. FIG. 6 is a schematic cross-sectional view taken along line VI-VI in FIG. 5. FIG. 7 is an enlarged plan view showing the configuration of a fiducial mark on a semiconductor substrate according to the third embodiment. FIG. 8 is a schematic cross-sectional view taken along line VIII-VIII in FIG. 7. FIG. 9 is a schematic plan view showing the configuration of a semiconductor substrate according to the fourth embodiment. FIG. 10 is a schematic cross-sectional view taken along line X-X in FIG. 9. FIG. 11 is a schematic plan view showing the configuration of a semiconductor substrate according to the fifth embodiment. FIG. 12 is a schematic plan view showing the configuration of a semiconductor substrate according to the sixth embodiment. FIG. 13 is a schematic plan view showing the configuration of an epitaxial substrate according to the seventh embodiment. FIG. 14 is a schematic cross-sectional view taken along line XIV-XIV in FIG. 13 . FIG. 15 is a flow diagram outlining a method for manufacturing a semiconductor device according to the eighth embodiment. FIG. 16 is a schematic cross-sectional view showing a step of forming a fiducial mark on a semiconductor substrate. FIG. 17 is a schematic plan view showing a step of identifying the position coordinates of a defect in a semiconductor substrate based on the fiducial mark. FIG. 18 is a schematic cross-sectional view showing a step of forming an epitaxial film on a semiconductor substrate. FIG. 19 is a schematic plan view showing a step of identifying the position coordinates of a defect in the epitaxial film based on the fiducial mark. FIG. 20 is a schematic cross-sectional view showing a step of forming an element active region on an epitaxial film. FIG. 21 is a schematic plan view showing a step of determining the quality of the element active region. FIG. 22 is a schematic cross-sectional view showing a step of forming a gate insulating film. FIG. 23 is a schematic cross-sectional view showing the configuration of a semiconductor device. FIG. 24 is a flow diagram outlining a method for manufacturing a semiconductor device according to the ninth embodiment. FIG. 25 is a schematic plan view showing a step of adjusting the formation position of an element active region based on the position coordinates of the defect. Fig. 26 is a flow diagram illustrating a semiconductor device manufacturing method according to the tenth embodiment. Fig. 27 is a cross-sectional view illustrating a step of preparing a semiconductor substrate. Fig. 28 is a cross-sectional view illustrating a step of forming an epitaxial film on a semiconductor substrate.29A and 29B are schematic cross-sectional views showing a step of forming a reference mark in the epitaxial film, and 30A and 30B are schematic cross-sectional views showing a step of forming an element active region in the epitaxial film.

[0007] [Problem to be Solved by the Present Disclosure] An object of the present disclosure is to provide a semiconductor substrate and an epitaxial substrate that can accurately determine whether an element active region is good or bad. [Advantages of the Present Disclosure] According to the present disclosure, it is possible to provide a semiconductor substrate and an epitaxial substrate that can accurately determine whether an element active region is good or bad.

[0008] [Outline of the embodiment of the present disclosure] First, an outline of the embodiment of the present disclosure will be described.

[0009] (1) A semiconductor substrate according to the present disclosure has a notch formed therein. The semiconductor substrate includes a first outer peripheral surface and a first main surface. The first main surface is continuous with the first outer peripheral surface. The maximum diameter of the first main surface is 150 mm or more. The first outer peripheral surface includes a first notch region forming a notch. The first main surface is provided with a first fiducial mark and a second fiducial mark serving as a reference for two-dimensional position coordinates. When viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the first fiducial mark and the first notch region is 10 mm or less. As a result, since the first fiducial mark is located near the notch, the position of the first fiducial mark can be easily identified. As a result, the time required to identify the first fiducial mark is reduced. Furthermore, a larger area can be secured for the region in which elements are formed compared to when the fiducial mark is provided in the central region of the semiconductor substrate.

[0010] (2) In the semiconductor substrate according to (1) above, when viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the first fiducial mark and the first notch region may be 3 mm or less. This allows the first fiducial mark to be located near the notch, making it easy to identify the position of the first fiducial mark. As a result, the time required to identify the first fiducial mark is reduced. Furthermore, compared to when the fiducial mark is located in a central region of the semiconductor substrate, a larger area can be secured for the region in which elements are formed.

[0011] (3) In the semiconductor substrate according to (1) or (2), when viewed in a direction perpendicular to the first main surface, the shortest distance between the center of the second reference mark and the first outer peripheral surface may be 3 mm or less. This allows a larger area to be secured for forming elements compared to when the reference mark is provided in a central region of the semiconductor substrate.

[0012] (4) In the semiconductor substrate according to any one of (1) to (3) above, when viewed along a direction perpendicular to the first main surface, a line connecting the center of the first fiducial mark and the center of the second fiducial mark may pass through the center of the first main surface. This makes it possible to easily identify the position of the second fiducial mark. Furthermore, a two-dimensional position coordinate system is determined based on the first fiducial mark and the second fiducial mark. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect.

[0013] (5) In the semiconductor substrate according to any one of (1) to (4) above, the first main surface may have a maximum diameter of 200 mm or more.

[0014] (6) An epitaxial substrate according to the present disclosure includes a semiconductor substrate according to any one of (1) to (5) above and an epitaxial film. The epitaxial film is provided on a first main surface. The epitaxial film has a second outer peripheral surface and a second main surface. The second main surface is opposite a surface tangent to the first main surface. The second outer peripheral surface includes a second notch region continuous with the first notch region. A third fiducial mark and a fourth fiducial mark serving as a reference for two-dimensional position coordinates are provided on the second main surface. The third fiducial mark is formed on the first fiducial mark. The fourth fiducial mark is formed on the second fiducial mark. When viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third fiducial mark and the second notch region is 10 mm or less. As a result, since the third fiducial mark is located near the notch, the position of the third fiducial mark can be easily identified. As a result, the time required to identify the third fiducial mark is reduced. Furthermore, compared to when the reference mark is provided in the central region of the epitaxial substrate, a larger area can be secured for the region in which the element is formed.

[0015] (7) In the epitaxial substrate according to (6) above, when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third fiducial mark and the second notch region may be 3 mm or less. This allows the third fiducial mark b to be located near the notch, making it easy to identify the position of the third fiducial mark. As a result, the time required to identify the third fiducial mark is reduced. Furthermore, compared to when the fiducial mark is located in the central region of the epitaxial substrate, a larger area can be secured for the region in which elements are formed.

[0016] (8) In the epitaxial substrate according to (6) or (7), the shortest distance between the center of the fourth reference mark and the second outer peripheral surface may be 3 mm or less when viewed along a direction perpendicular to the second main surface, thereby ensuring a larger area for forming elements compared to when the reference mark is provided in a central region of the epitaxial substrate.

[0017] (9) In the epitaxial substrate according to any one of (6) to (8) above, when viewed along a direction perpendicular to the second main surface, a line connecting the center of the third fiducial mark and the center of the fourth fiducial mark may pass through the center of the second main surface. This makes it possible to easily identify the position of the fourth fiducial mark. Furthermore, a two-dimensional position coordinate system is determined based on the third fiducial mark and the fourth fiducial mark. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect.

[0018] (10) An epitaxial substrate according to the present disclosure includes a semiconductor substrate and an epitaxial film. The epitaxial film is provided on the semiconductor substrate and has a notch formed therein. The epitaxial film has a second outer peripheral surface and a second main surface. The second main surface is continuous with the second outer peripheral surface. The maximum diameter of the second main surface is 150 mm or more. The second outer peripheral surface includes a second notch region forming a notch. The second main surface is provided with a third fiducial mark and a fourth fiducial mark serving as a reference for two-dimensional position coordinates. When viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third fiducial mark and the second notch region is 10 mm or less. As a result, since the third fiducial mark is located near the notch, the position of the third fiducial mark can be easily identified. As a result, the time required to identify the third fiducial mark is reduced. Furthermore, a larger area can be secured for forming elements compared to when the fiducial mark is provided in the central region of the epitaxial substrate.

[0019] (11) In the epitaxial substrate according to (10) above, when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third fiducial mark and the second notch region may be 3 mm or less. This allows the third fiducial mark to be located near the notch, making it easy to identify the position of the third fiducial mark. As a result, the time required to identify the third fiducial mark is reduced. Furthermore, compared to when the fiducial mark is located in the central region of the epitaxial substrate, a larger area can be secured for the region in which elements are formed.

[0020] (12) In the epitaxial substrate according to (10) or (11), the shortest distance between the center of the fourth reference mark and the second outer peripheral surface may be 3 mm or less when viewed along a direction perpendicular to the second main surface, thereby ensuring a larger area for forming elements compared to when the reference mark is provided in a central region of the epitaxial substrate.

[0021] (13) In the epitaxial substrate according to any one of (10) to (12), when viewed along a direction perpendicular to the second main surface, a line connecting the center of the third fiducial mark and the center of the fourth fiducial mark may pass through the center of the second main surface. This makes it possible to easily identify the position of the fourth fiducial mark. Furthermore, a two-dimensional position coordinate system is determined based on the third fiducial mark and the fourth fiducial mark. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect.

[0022] (14) In the epitaxial substrate according to any one of (10) to (13) above, the second main surface may have a maximum diameter of 200 mm or more.

[0023] [Details of the embodiment of the present disclosure] Hereinafter, the details of the embodiment of the present disclosure (hereinafter also referred to as the present embodiment) will be described with reference to the drawings. Note that the same or corresponding parts in the following drawings are designated by the same reference numerals, and description thereof will not be repeated.

[0024] First Embodiment First, the configuration of a semiconductor substrate 10a according to a first embodiment will be described.

[0025] 1 is a schematic plan view showing the configuration of a semiconductor substrate 10a according to the first embodiment. As shown in FIG. 1, the semiconductor substrate 10a mainly has a first main surface 11 and a first outer peripheral surface 13. The first main surface 11 is continuous with the first outer peripheral surface 13.

[0026] A first notch 14 is formed in the first outer peripheral surface 13 of the semiconductor substrate 10a. As shown in Fig. 1, the first notch 14 is a cutout formed to be concave from the first outer peripheral surface 13 toward the center p1 of the semiconductor substrate 10a.

[0027] The first outer peripheral surface 13 has, for example, an arc-shaped portion 13a and a first notch region 13b. The first notch region 13b forms a first notch 14. The first notch region 13b is arc-shaped when viewed in a direction perpendicular to the first main surface 11. The first notch region 13b is curved so as to convex inward when viewed from the center p1 of the first main surface 11. The first notch region 13b may be V-shaped when viewed in a direction perpendicular to the first main surface 11. The arc-shaped portion 13a is continuous with the first notch region 13b. The arc-shaped portion 13a is arc-shaped when viewed in a direction perpendicular to the first main surface 11. The arc-shaped portion 13a is curved so as to convex outward when viewed from the center p1 of the first main surface 11.

[0028] 1 , when viewed in a direction perpendicular to the first main surface 11, the first main surface 11 extends along each of a first direction X and a second direction Y. When viewed in a direction perpendicular to the first main surface 11, the second direction Y is a direction perpendicular to the first direction X.

[0029] The semiconductor substrate 10a is made of a semiconductor material. The semiconductor material is, for example, silicon carbide (SiC). The semiconductor material may be a semiconductor other than silicon carbide. The semiconductor material may be, for example, silicon (Si), gallium arsenide (GaAs), indium phosphide (InP), gallium nitride (GaN), gallium oxide (Ga ２ O ３ ) or diamond, etc.

[0030] When the semiconductor substrate 10a is made of silicon carbide, the semiconductor substrate 10a may be a conductive substrate or a semi-insulating substrate. When the semiconductor substrate 10a is a conductive substrate, the polytype of the silicon carbide may be 4H. When the semiconductor substrate 10a is a semi-insulating substrate, the polytype of the silicon carbide may be 4H or 6H. The thickness of the semiconductor substrate 10a is, for example, 350 μm or more and 500 μm or less. When the semiconductor substrate 10a is a conductive substrate, the semiconductor substrate 10a may contain an n-type impurity such as nitrogen (N). When the semiconductor substrate 10a is a semi-insulating substrate, the semiconductor substrate 10a may contain a transition metal such as vanadium (V). The conductivity type of the semiconductor substrate 10a is, for example, n-type.

[0031] When the semiconductor substrate 10a is made of hexagonal silicon carbide, the first direction X is, for example, the <11-20> direction. The first direction X may be, for example, the [11-20] direction. The first direction X may be, for example, a direction obtained by projecting the <11-20> direction onto the first main surface 11. From another perspective, the first direction X may be, for example, a direction including a <11-20> direction component.

[0032] The second direction Y is, for example, the <1-100> direction. The second direction Y may be, for example, the [1-100] direction. The second direction Y may be, for example, a direction obtained by projecting the <1-100> direction onto the first main surface 11. From another perspective, the second direction Y may be, for example, a direction including a <1-100> direction component.

[0033] First main surface 11 may be a {0001} plane or a plane inclined with respect to the {0001} plane. When first main surface 11 is inclined with respect to the {0001} plane, the inclination angle (off angle) with respect to the {0001} plane is, for example, 1° or more and 8° or less. When first main surface 11 is inclined with respect to the {0001} plane, the inclination direction (off direction) of first main surface 11 is, for example, the <11-20> direction.

[0034] The maximum diameter W1 of the first main surface 11 is, for example, 150 mm (6 inches) or more. The maximum diameter W1 of the first main surface 11 may be 200 mm (8 inches) or more. The upper limit of the maximum diameter W1 of the first main surface 11 may be, for example, 400 mm (16 inches) or less. The maximum diameter W1 of the first main surface 11 is the longest linear distance between two different points on the first outer peripheral surface 13.

[0035] In this specification, 6 inches refers to 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches refers to 200 mm or 203.2 mm (8 inches x 25.4 mm / inch). 16 inches refers to 400 mm or 406.4 mm (16 inches x 25.4 mm / inch).

[0036] As shown in Fig. 1, a plurality of reference marks 3 are provided on the first main surface 11. Each of the plurality of reference marks 3 serves as a reference for two-dimensional position coordinates. Each of the plurality of reference marks 3 may be located within a region of 10 mm from the first outer peripheral surface 13. The number of reference marks 3 is, for example, two. The plurality of reference marks 3 includes, for example, a first reference mark 31a and a second reference mark 32a.

[0037] The first fiducial mark 31a is located near the first notch region 13b. As shown in FIG. 1 , when viewed along a direction perpendicular to the first main surface 11, the shortest distance A1 between the center of the first fiducial mark 31a and the first notch region 13b is 10 mm or less. When viewed along a direction perpendicular to the first main surface 11, the shortest distance A1 between the center of the first fiducial mark 31a and the first notch region 13b may be, for example, 5 mm or less, or may be 3 mm or less. Since the first fiducial mark 31a is located near the notch 4, the position of the first fiducial mark 31a can be easily identified. As a result, the time required to identify the first fiducial mark 31a is reduced. Furthermore, compared to when the fiducial mark 3 is provided in the central region of the semiconductor substrate 10a, a larger area can be secured for forming elements.

[0038] As shown in FIG. 1 , when viewed along a direction perpendicular to the first main surface 11, the second reference mark 32a may be provided on the opposite side of the center p1 of the first main surface 11. When viewed along a direction perpendicular to the first main surface 11, a line L1 connecting the center of the first reference mark 31a and the center of the second reference mark 32a passes through the center p1 of the first main surface 11. This makes it easy to identify the position of the second reference mark 32a. Furthermore, a two-dimensional position coordinate system is determined based on the first reference mark 31a and the second reference mark 32a. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect 80.

[0039] 1 , when viewed in a direction perpendicular to the first main surface 11, the shortest distance B1 between the center of the second fiducial mark 32a and the first outer peripheral surface 13 is 10 mm or less. When viewed in a direction perpendicular to the first main surface 11, the shortest distance B1 between the center of the second fiducial mark 32a and the first outer peripheral surface 13 may be, for example, 5 mm or less, or 3 mm or less. This makes it easy to identify the position of the second fiducial mark 32a. Furthermore, compared to when the fiducial mark 32a is provided in the central region of the semiconductor substrate 10, a larger area can be secured for the region in which elements are formed.

[0040] As shown in FIG. 1 , when viewed in a direction perpendicular to the first main surface 11 , each of the multiple reference marks 3 may have a cross shape.

[0041] Fig. 2 is a schematic cross-sectional view taken along line II-II in Fig. 1. As shown in Fig. 2, the semiconductor substrate 10a has a first back surface 12 opposite to the first main surface 11. Each of the multiple reference marks 3 is, for example, a recess. In the direction perpendicular to the first main surface 11, the bottom surface of the recess is located between the first main surface 11 and the first back surface 12.

[0042] In a direction perpendicular to first main surface 11, the depth D of each of the plurality of reference marks 3 is, for example, greater than 0.5 μm and less than 100 μm. The lower limit of the depth D of each of the plurality of reference marks 3 may be, for example, 3 μm or more, or 5 μm or more. The upper limit of the depth D of each of the plurality of reference marks 3 may be, for example, 50 μm or less, or 30 μm or less.

[0043] FIG. 3 is an enlarged plan view showing the configuration of the reference mark 3. When viewed in a direction perpendicular to the first main surface 11, the shape of the reference mark 3 is, for example, axially symmetric. The shape of the reference mark 3 is, for example, a cross shape. For example, the reference mark 3 may be provided so that two rectangles intersect perpendicularly at the center. FIG. 4 is a schematic cross-sectional view taken along line IV-IV in FIG. 3. As shown in FIG. 4, the length of the short side of the rectangle (third length W3) may be greater than the depth D of the reference mark 3. The third length W3 is, for example, 10 μm.

[0044] The shape of the reference mark 3 is not limited to a cross shape. The shape of the reference mark 3 may be a polygon, an axisymmetric rectangle (rectangle, square), or a circle. The reference mark 3 has a shape that can be surrounded by, for example, a virtual circle. The smallest virtual circle that surrounds the reference mark 3 is, for example, the circumscribing circle of the reference mark 3. The center of the reference mark 3 is the center of the circumscribing circle.

[0045] When viewed in a direction perpendicular to the first main surface 11, the radius of the smallest imaginary circle (first imaginary circle R1) surrounding each of the multiple reference marks 3 is, for example, greater than 10 μm and less than 3 mm. The lower limit of the radius of the first imaginary circle R1 may be, for example, 50 μm or more, or 100 μm or more. The upper limit of the radius of the first imaginary circle R1 may be, for example, 1 mm or less, or 0.5 mm or less.

[0046] 3 , the largest imaginary circle (second imaginary circle R2) enclosed by the reference mark 3 is, for example, the inscribed circle of the reference mark 3. The center of the inscribed circle of the reference mark 3 may coincide with the center of the circumscribed circle of the reference mark 3. When viewed in a direction perpendicular to the first main surface 11, the radius of the second imaginary circle R2 is, for example, less than 5 μm.

[0047] As shown in FIG. 1 , the Y-axis is a line passing through the center of the first reference mark 31a and the center of the second reference mark 32a. The X-axis is a line parallel to the first main surface 11 and perpendicular to the Y-axis. The midpoint between the center of the first reference mark 31a and the center of the second reference mark 32a is set to be, for example, the origin of the two-dimensional position coordinates. The midpoint between the center of the first reference mark 31a and the center of the second reference mark 32a may be the same position as the center p1 of the first main surface 11. The direction from the origin toward the first reference mark 31a is set to be, for example, the negative direction of the Y-axis. The direction from the origin toward the second reference mark 32a is set to be, for example, the positive direction of the Y-axis. For example, as described above, a virtual two-dimensional position coordinate system is determined based on the first reference mark 31a and the second reference mark 32a.

[0048] The position coordinates of the defect 80 may be defined by a representative point such as the center of the defect, or a figure such as a rectangle, circle, or ellipse surrounding the defect, using the virtual two-dimensional position coordinate system.

[0049] Second Embodiment Next, the configuration of a semiconductor substrate 10b according to a second embodiment will be described. The semiconductor substrate 10b differs from the semiconductor substrate 10a mainly in that the reference marks 3 are configured by a plurality of recesses 30, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0050] 5 is an enlarged schematic plan view showing the configuration of the fiducial mark 3 on the semiconductor substrate 10b according to the second embodiment. As shown in FIG. 5, the fiducial mark 3 on the semiconductor substrate 10b is composed of a plurality of recesses 30. When viewed in a direction perpendicular to the first main surface 11, each of the plurality of recesses 30 has a circular shape, for example. The plurality of recesses 30 are arranged at equal intervals along each of the first direction X and the second direction Y, for example.

[0051] As shown in Fig. 5, for example, two rows and ten columns of recesses 30 and ten rows and two columns of recesses 30 may be provided so as to cross each other. Fig. 6 is a schematic cross-sectional view taken along line VI-VI in Fig. 5. As shown in Fig. 6, the width of the region between two adjacent recesses 30 (fifth width W5) may be larger than the diameter of each of the plurality of recesses 30 (fourth width W4).

[0052] Third Embodiment Next, the configuration of a semiconductor substrate 10c according to a third embodiment will be described. The semiconductor substrate 10c differs from the semiconductor substrate 10a mainly in that the fiducial marks 3 are convex, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0053] Fig. 7 is an enlarged schematic plan view showing the configuration of the fiducial mark 3 on the semiconductor substrate 10c according to the third embodiment. Fig. 8 is a schematic cross-sectional view taken along line VIII-VIII in Fig. 7. As shown in Figs. 7 and 8, the fiducial mark 3 may be convex. The shape of the convex fiducial mark 3 may be, for example, a cross shape.

[0054] 8 , a portion of the convex reference mark 3 is provided, for example, between two grooves 54. Each of the two grooves 54 has a bottom surface 53 and a side surface 52. A portion of the side surface 52 of the groove 54 forms the side surface of the convex reference mark 3. The depth D of the groove 54 corresponds to the height of the reference mark 3.

[0055] Fourth Embodiment Next, the configuration of a semiconductor substrate 10d according to a fourth embodiment will be described. The semiconductor substrate 10d differs from the semiconductor substrate 10a mainly in the location of the reference marks 3, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0056] Fig. 9 is a schematic plan view showing the configuration of a semiconductor substrate 10d according to the fourth embodiment. Fig. 10 is a schematic cross-sectional view taken along line X-X in Fig. 9. As shown in Fig. 9, the multiple reference marks 3 include, for example, a first reference mark 31a, a second reference mark 32a, a fifth reference mark 33a, and a sixth reference mark 34a.

[0057] When viewed along a direction perpendicular to the first main surface 11, the shortest distance between the center of the fifth reference mark 33a and the first outer peripheral surface 13 is 10 mm or less. When viewed along a direction perpendicular to the first main surface 11, the shortest distance between the center of the fifth reference mark 33a and the first outer peripheral surface 13 may be, for example, 5 mm or less, or 3 mm or less.

[0058] When viewed along a direction perpendicular to the first main surface 11, the shortest distance between the center of the sixth reference mark 34a and the first outer peripheral surface 13 is 10 mm or less. When viewed along a direction perpendicular to the first main surface 11, the shortest distance between the center of the sixth reference mark 34a and the first outer peripheral surface 13 may be, for example, 5 mm or less, or may be 3 mm or less.

[0059] A line L1 (first line) passing through the center of the first reference mark 31a and the center of the second reference mark 32a is, for example, parallel to the second direction Y. A line L2 (second line) passing through the center of the fifth reference mark 33a and the center of the sixth reference mark 34a is, for example, parallel to the first direction X. The first line L1 is used, for example, as the Y axis of a two-dimensional coordinate system. The second line L2 is used, for example, as the X axis of the two-dimensional coordinate system. The intersection of the first line L1 and the second line L2 is used, for example, as the origin of the two-dimensional coordinate system. The intersection of the first line L1 and the second line L2 may be located at the same position as the center p1 of the first main surface 11. For example, as described above, a virtual two-dimensional position coordinate system may be determined based on the first reference mark 31a, the second reference mark 32a, the fifth reference mark 33a, and the sixth reference mark 34a.

[0060] Fifth Embodiment Next, the configuration of a semiconductor substrate 10e according to a fifth embodiment will be described. The semiconductor substrate 10e differs from the semiconductor substrate 10a mainly in the location of the reference mark 3, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0061] 11 is a schematic plan view showing the configuration of a semiconductor substrate 10e according to the fifth embodiment. As shown in Fig. 11 , when viewed along a direction perpendicular to first main surface 11, first notch region 13b is connected to arc-shaped portion 13a at first boundary 13L on the left side of first main surface 11 as viewed from line L1. As shown in Fig. 11 , when viewed along a direction perpendicular to first main surface 11, first reference mark 31a is provided near first boundary 13L.

[0062] The distance between first boundary 13L and the center of first reference mark 31a may be the shortest distance A1 between the center of first reference mark 31a and first notch region 13b. As shown in Figure 11, when viewed along a direction perpendicular to first main surface 11, the shortest distance A1 between the center of first reference mark 31a and first boundary 13L is 10 mm or less.

[0063] As a result, the first reference mark 31a is located near the boundary between the first notch region 13b and the arc-shaped portion 13a, and therefore the position of the first reference mark 31a can be easily identified.

[0064] Sixth Embodiment Next, the configuration of a semiconductor substrate 10f according to a sixth embodiment will be described. The semiconductor substrate 10f differs from the semiconductor substrate 10a mainly in the location of the reference marks 3, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0065] 12 is a schematic plan view showing the configuration of a semiconductor substrate 10f according to the sixth embodiment. As shown in Fig. 12, when viewed along a direction perpendicular to first main surface 11, first notch region 13b is connected to arc-shaped portion 13a at second boundary 13R on the right side of first main surface 11 as viewed from line L1. As shown in Fig. 12, when viewed along a direction perpendicular to first main surface 11, first reference mark 31a is provided near second boundary 13R.

[0066] The distance between second boundary 13R and the center of first reference mark 31a may be the shortest distance A1 between the center of first reference mark 31a and first notch region 13b. As shown in Figure 12, when viewed along a direction perpendicular to first main surface 11, the shortest distance A1 between the center of first reference mark 31a and second boundary 13R is 10 mm or less.

[0067] As a result, the first reference mark 31a is located near the boundary between the first notch region 13b and the arc-shaped portion 13a, and therefore the position of the first reference mark 31a can be easily identified.

[0068] Seventh Embodiment Next, the configuration of an epitaxial substrate 1 according to a seventh embodiment will be described. The epitaxial substrate 1 differs from the semiconductor substrate 10a in that it includes a semiconductor substrate 10 and an epitaxial film 20, but is otherwise similar to the semiconductor substrate 10a. The following description will focus on the configuration that differs from the semiconductor substrate 10a.

[0069] FIG. 13 is a plan view schematically illustrating the configuration of an epitaxial substrate 1 according to the seventh embodiment. FIG. 14 is a cross-sectional view schematically illustrating the configuration along line XIV-XIV in FIG. 13. As shown in FIG. 14, the epitaxial substrate 1a includes a semiconductor substrate 10 and an epitaxial film 20. The epitaxial film 20 is provided on the first main surface 11 of the semiconductor substrate 10. The epitaxial film 20 includes a second main surface 21, a second back surface 22, and a second outer peripheral surface 23. The second back surface 22 is in contact with the first main surface 11 of the semiconductor substrate 10. The second main surface 21 is located on the opposite side of the second back surface 22. The second main surface 21 is continuous with the second outer peripheral surface 23.

[0070] A second notch 24 is formed in the second outer peripheral surface 23 of the epitaxial film 20. As shown in Fig. 13 , the second notch 24 is a recess formed so as to be concave from the second outer peripheral surface 23 toward the center p2 of the epitaxial substrate 1.

[0071] The second outer peripheral surface 23 has, for example, an arc-shaped portion 23a and a second notch region 23b. The second notch region 23b forms a second notch 24. The second notch region 23b is arc-shaped when viewed in a direction perpendicular to the second main surface 21. The second notch region 23b is curved so as to convex inward when viewed from the center p2 of the second main surface 21. The second notch region 23b may be V-shaped when viewed in a direction perpendicular to the second main surface 21. The arc-shaped portion 23a is continuous with the second notch region 23b. The arc-shaped portion 23a is arc-shaped when viewed in a direction perpendicular to the second main surface 21. The arc-shaped portion 23a is curved so as to convex outward when viewed from the center p2 of the second main surface 21.

[0072] Second notch region 23b is continuous with first notch region 13b. In this manner, notch 4 is formed on the outer peripheral surface (first outer peripheral surface 13 and second outer peripheral surface 23) of epitaxial substrate 1, with first notch 14 and second notch 24 continuing from each other.

[0073] 13, a plurality of reference marks 3 are provided on the second main surface 21. Each of the plurality of reference marks 3 serves as a reference for two-dimensional position coordinates. Each of the plurality of reference marks 3 may be located within 10 mm from the second outer peripheral surface 23. The number of reference marks 3 is, for example, two. The plurality of reference marks 3 includes, for example, a third reference mark 31b and a fourth reference mark 32b.

[0074] The third fiducial mark 31b is located near the second notch region 23b. As shown in FIG. 13 , when viewed along a direction perpendicular to the second main surface 21, the shortest distance A2 between the center of the third fiducial mark 31b and the second notch region 23b is 10 mm or less. When viewed along a direction perpendicular to the second main surface 21, the shortest distance A2 between the center of the third fiducial mark 31b and the second notch region 23b may be, for example, 5 mm or less, or may be 3 mm or less. Since the third fiducial mark 31b is located near the notch 4, the position of the third fiducial mark 31b can be easily identified. As a result, the time required to identify the third fiducial mark 31b is reduced. Furthermore, compared to when the fiducial mark 3 is provided in the central region of the epitaxial substrate 1, a larger area can be secured for forming elements.

[0075] 13 , when viewed in a direction perpendicular to the second main surface 21, the fourth fiducial mark 32b may be located on the opposite side of the center p2 of the second main surface 21. When viewed in a direction perpendicular to the second main surface 21, a line L2 connecting the center of the third fiducial mark 31b and the center of the fourth fiducial mark 32b passes through the center p2 of the second main surface 21. This makes it easy to identify the position of the fourth fiducial mark 32b. Furthermore, a two-dimensional position coordinate system is determined based on the third fiducial mark 31b and the fourth fiducial mark 32b. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect 80.

[0076] 13 , when viewed along a direction perpendicular to the second main surface 21, the shortest distance B2 between the center of the fourth reference mark 32b and the second outer peripheral surface 23 is 10 mm or less. When viewed along a direction perpendicular to the second main surface 21, the shortest distance B2 between the center of the fourth reference mark 32b and the second outer peripheral surface 23 may be, for example, 5 mm or less, or 3 mm or less.

[0077] As shown in FIG. 13, each of the plurality of reference marks 3 may have a cross shape when viewed in a direction perpendicular to the second main surface 21.

[0078] 14 , each of the plurality of reference marks 3 is, for example, a recess. In the direction perpendicular to the second main surface 21, the bottom surface of the recess is located between the second main surface 21 and the second back surface 22.

[0079] In a direction perpendicular to second main surface 21, the depth D of each of the plurality of reference marks 3 is, for example, greater than 0.5 μm and less than 100 μm. The lower limit of the depth D of each of the plurality of reference marks 3 may be, for example, 3 μm or more, or 5 μm or more. The upper limit of the depth D of each of the plurality of reference marks 3 may be, for example, 50 μm or less, or 30 μm or less.

[0080] The polytype of silicon carbide constituting each of semiconductor substrate 10 and epitaxial film 20 is, for example, 4H. The polytype of silicon carbide constituting each of semiconductor substrate 10 and epitaxial film 20 may be, for example, 6H. The thickness of semiconductor substrate 10 is, for example, not less than 350 μm and not more than 500 μm. The thickness of epitaxial film 20 is, for example, not less than 1 μm and not more than 100 μm.

[0081] The semiconductor substrate 10 and the epitaxial film 20 each contain an n-type impurity such as nitrogen (N). The conductivity type of the semiconductor substrate 10 and the epitaxial film 20 is, for example, n-type. The semiconductor substrate 10 may be a conductive substrate or a semi-insulating substrate. The epitaxial film 20 may be an epitaxial film with a homostructure. The epitaxial film 20 may be a semiconductor different from that of the semiconductor substrate 10. In other words, the epitaxial substrate 1 may have a heterostructure. The epitaxial film 20 may be a single layer or two or more layers. The epitaxial film 20 may be composed of different semiconductor layers. In other words, the epitaxial film 20 may be an epitaxial film with a heterostructure.

[0082] Eighth Embodiment Next, a method for manufacturing a semiconductor device 300 according to an eighth embodiment will be described.

[0083] 15 is a flow diagram schematically illustrating a manufacturing method of the semiconductor device 300 according to the eighth embodiment. As shown in FIG. 15 , the manufacturing method of the semiconductor device 300 according to the eighth embodiment mainly includes a step of forming a fiducial mark on a semiconductor substrate (S11), a step of polishing the semiconductor substrate (S12), a step of cleaning the semiconductor substrate (S13), a step of identifying position coordinates of defects in the semiconductor substrate based on the fiducial mark (S14), a step of forming an epitaxial film on the semiconductor substrate (S15), a step of identifying position coordinates of defects in the epitaxial film based on the fiducial mark (S16), a step of forming element active regions in the epitaxial film (S17), a step of identifying position coordinates of the element active regions based on the fiducial mark (S18), and a step of associating the position coordinates of the defects with the position coordinates of the element active regions to determine whether the element active regions are good or bad (S19).

[0084] The following describes a case where semiconductor substrate 10 is made of silicon carbide. First, a silicon carbide single crystal of polytype 4H is manufactured, for example, by sublimation deposition. Next, semiconductor substrate 10 is prepared by slicing the silicon carbide single crystal, for example, by a wire saw. Semiconductor substrate 10 has a first main surface 11 and a first back surface 12. First back surface 12 is located opposite first main surface 11.

[0085] Next, a step (S11) of forming a fiducial mark on the semiconductor substrate is performed. FIG. 16 is a schematic cross-sectional view showing the step of forming a fiducial mark on the semiconductor substrate. The fiducial mark 3 (first mark 3a) is provided near the first outer peripheral surface 13 so that the shortest distance A1 between the center of the fiducial mark 3 and the first outer peripheral surface 13 is 10 mm or less. In particular, the first fiducial mark 31a is located near the first notch region 13b, as shown in FIG. 16. As a result of the above, the fiducial mark 3 (first mark 3a) that serves as a reference for two-dimensional position coordinates is formed on the semiconductor substrate 10. The semiconductor substrate 10 on which the fiducial mark 3 is formed is, for example, the semiconductor substrates 10a, 10b, 10c, 10d, 10e, and 10f according to the first to sixth embodiments.

[0086] Next, a step (S12) of polishing the semiconductor substrate is performed. Specifically, the semiconductor substrate 10 is subjected to a mechanical polishing step and a chemical mechanical polishing step. In the mechanical polishing step, diamond, for example, is used as the abrasive. In the chemical mechanical polishing step, colloidal silica, for example, is used as the abrasive. Polishing may be performed only on the first main surface 11 of the semiconductor substrate 10 (single-sided polishing), or on both the first main surface 11 and the first back surface 12 (double-sided polishing). By performing the polishing step and cleaning step after the formation of the fiducial marks 3, irregularities and distortions near the fiducial marks 3 are removed, thereby preventing the shape of the fiducial marks 3 formed in the epitaxial film from being distorted. This allows the fiducial marks 3 to be accurately identified.

[0087] Next, a step (S13) of cleaning the semiconductor substrate is performed. This removes residues and the like that were generated when forming the fiducial marks 3 on the semiconductor substrate 10. After forming the fiducial marks 3 as described above, the fiducial mark-formed surface of the semiconductor substrate 10 is polished, and then the fiducial mark-formed surface is cleaned. The fiducial mark-formed surface corresponds to the first main surface 11. While the above description has been given of a case in which both the step (S12) of polishing the semiconductor substrate and the step (S13) of cleaning the semiconductor substrate are performed, this embodiment is not limited to this. In this embodiment, it is sufficient that at least one of the step (S12) of polishing the semiconductor substrate or the step (S13) of cleaning the semiconductor substrate is performed.

[0088] Next, a step (S14) of identifying the position coordinates of defects in the semiconductor substrate based on the fiducial marks is performed. In step (S14), defects in the semiconductor substrate 10 are measured based on the fiducial marks 3, and their position coordinates are identified. FIG. 17 is a schematic plan view showing the step of identifying the position coordinates of defects 80 in the semiconductor substrate 10 based on the fiducial marks 3. As shown in FIG. 17, a plurality of fiducial marks 3 (first marks 3a) are provided on the first main surface 11 near the first outer circumferential surface 13. Therefore, the plurality of fiducial marks 3 (first marks 3a) include a first fiducial mark 31a and a second fiducial mark 32a. Because the first fiducial mark 31a is located near the notch 4, the position of the first fiducial mark 31a can be easily identified. As a result, the time required to identify the first fiducial mark 31a is reduced.

[0089] For example, the Y-axis is a line passing through the center of the first fiducial mark 31a and the center of the second fiducial mark 32a. The X-axis is a line parallel to the first main surface 11 and perpendicular to the Y-axis. The midpoint between the center of the first fiducial mark 31a and the center of the second fiducial mark 32a is set to, for example, the origin of the two-dimensional position coordinates. The midpoint between the center of the first fiducial mark 31a and the center of the second fiducial mark 32a may be the same position as the center p1 of the first main surface 11. The direction from the origin toward the first fiducial mark 31a is set to, for example, the negative direction of the Y-axis. The direction from the origin toward the second fiducial mark 32a is set to, for example, the positive direction of the Y-axis. For example, as described above, a virtual two-dimensional position coordinate system is determined based on the first fiducial mark 31a and the second fiducial mark 32a. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect 80.

[0090] As shown in FIG. 17 , a defect 80 exists in the semiconductor substrate 10. The defect 80 has, for example, a first defect 81 and a second defect 82. The first defect 81 is, for example, a micropipe. The second defect 82 is, for example, a stacking fault. The defect 80 may be, for example, a threading screw dislocation, a threading edge dislocation, a carbon inclusion, or a surface deposit. The second defect 82 may be, for example, a scratch.

[0091] The two-dimensional position coordinates of the defect 80 are identified using a virtual two-dimensional position coordinate system determined based on the fiducial mark 3. Specifically, if the first defect 81 exists on a plurality of coordinates including, for example, a first coordinate (X1, Y1), the plurality of coordinates including the first coordinate (X1, Y1) are identified as the two-dimensional position coordinates of the first defect 81. Similarly, if the second defect 82 exists on a plurality of coordinates including, for example, a second coordinate (X2, Y2), the plurality of coordinates including the second coordinate (X2, Y2) are identified as the two-dimensional position coordinates of the second defect 82. The method for inspecting the defect 80 is non-destructive inspection using, for example, a photoluminescence method, an X-ray diffraction method, or a surface light scattering method.

[0092] Next, a step (S15) of forming an epitaxial film on the semiconductor substrate is performed. Specifically, the semiconductor substrate 10 is placed in a film-forming chamber of, for example, a CVD (Chemical Vapor Deposition) apparatus. Next, a source gas, a carrier gas, and a doping gas are introduced into the film-forming chamber. The source gas is, for example, silane (SiH ４ ) gas and propane (C ３ H ８ The carrier gas is, for example, hydrogen. The doping gas is, for example, ammonia gas or nitrogen gas.

[0093] 18 is a schematic cross-sectional view showing a process of forming an epitaxial film 20 on a semiconductor substrate 10. In a film formation chamber, silane gas and propane gas are thermally decomposed to form an epitaxial film 20 on the first main surface 11 of the semiconductor substrate 10. As shown in FIG. 18 , the epitaxial film 20 has a second main surface 21 and a second back surface 22. The second back surface 22 is in contact with the semiconductor substrate 10.

[0094] 18 , the epitaxial film 20 is formed so as to bury the reference marks 3 (first marks 3a) formed on the first main surface 11. As a result, the reference marks 3 (second marks 3b) are formed on the second main surface 21 of the epitaxial film 20 near the second outer peripheral surface 23. The reference marks 3 (second marks 3b) formed on the second main surface 21 are located directly above the reference marks 3 (first marks 3a) formed on the first main surface 11. The second marks 3b are formed in the epitaxial film 20, continuing from the first marks 3a. The shape of the second marks 3b is substantially the same as the shape of the first marks 3a.

[0095] The reference marks 3 (first mark 3a and second mark 3b) are formed by, for example, laser processing. In laser processing, for example, a UV (ultraviolet) laser or a fiber laser may be used. The wavelength of the laser is, for example, in the range of 100 nm to 1200 nm. The depth of the reference marks 3 is, for example, in the range of 1 μm to 120 μm. If the reference marks 3 are too shallow, they are difficult to see. If the reference marks 3 are too deep, if dust or dirt gets inside the reference marks 3, it is difficult to remove them. This increases the risk of contamination in subsequent processes.

[0096] The reference mark 3 may be formed by multiple laser irradiations rather than by a single laser irradiation. However, if the predetermined depth can be reached by a single laser irradiation, the reference mark 3 may be formed by a single laser irradiation. Furthermore, by focusing the laser processing on the processing surface, the reference mark 3 can be processed with high precision.

[0097] Only a partial region of the epitaxial film 20 provided on the reference mark 3 (first mark 3 a) may be removed by etching or the like until the semiconductor substrate 10 is exposed. By performing etching or the like to expose the reference mark 3 (first mark 3 a) provided on the semiconductor substrate 10, it becomes possible to more accurately identify the reference mark 3 (first mark 3 a). Etching of the epitaxial film 20 may be performed until the semiconductor substrate 10 is exposed, or may be stopped just before the semiconductor substrate 10 is exposed. If etching is stopped just before the semiconductor substrate 10 is exposed, the epitaxial film 20 may remain on the reference mark 3 (first mark 3 a).

[0098] The reference marks 3 (first mark 3a and second mark 3b) may be formed by etching, for example. The etching process may be performed by etching a SiO ２ A mask pattern may be formed using SF 6 as the etching gas, followed by plasma etching using SF 6 as the etching gas. ６ It is effective to use SF as the etching gas. ６ To O ２ gas or SiF ４ This allows for forming deep reference marks 3 (first mark 3a and second mark 3b).

[0099] Only a partial region of the epitaxial film 20 provided on the reference mark 3 (first mark 3 a) may be removed by etching or the like until the semiconductor substrate 10 is exposed. By performing etching or the like to expose the reference mark 3 (first mark 3 a) provided on the semiconductor substrate 10, it becomes possible to more accurately identify the reference mark 3 (first mark 3 a). Etching of the epitaxial film 20 may be performed until the semiconductor substrate 10 is exposed, or may be stopped just before the semiconductor substrate 10 is exposed. If etching is stopped just before the semiconductor substrate 10 is exposed, the epitaxial film 20 may remain on the reference mark 3 (first mark 3 a).

[0100] Next, a step (S16) of identifying the position coordinates of a defect in the epitaxial film based on the fiducial marks is performed. FIG. 19 is a schematic plan view showing the step of identifying the position coordinates of a defect 80 in the epitaxial film 20 based on the fiducial marks 3. As shown in FIG. 19, a plurality of fiducial marks 3 (second marks 3b) are provided on the second main surface 21 of the epitaxial film 20. The plurality of fiducial marks 3 (second marks 3b) include a third fiducial mark 31b and a fourth fiducial mark 32b. Because the third fiducial mark 31b is located near the notch 4, the position of the third fiducial mark 31b can be easily identified. As a result, the time required to identify the third fiducial mark 31b is reduced.

[0101] For example, the Y-axis is a line passing through the center of the third fiducial mark 31b and the center of the fourth fiducial mark 32b. The X-axis is a line parallel to the second main surface 21 and perpendicular to the Y-axis. The midpoint between the center of the third fiducial mark 31b and the center of the fourth fiducial mark 32b is set to, for example, the origin of the two-dimensional position coordinates. The midpoint between the center of the third fiducial mark 31b and the center of the fourth fiducial mark 32b may be the same position as the center p2 of the second main surface 21. The direction from the origin toward the third fiducial mark 31b is set to, for example, the negative direction of the Y-axis. The direction from the origin toward the fourth fiducial mark 32b is set to, for example, the positive direction of the Y-axis. For example, as described above, a virtual two-dimensional position coordinate system is determined based on the third fiducial mark 31b and the fourth fiducial mark 32b. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect 80.

[0102] 19 , defects 80 exist on the second main surface 21 of the epitaxial film 20. The defects 80 include, for example, a third defect 83 and a fourth defect 84. The third defect 83 is, for example, a triangular defect. The fourth defect 84 is, for example, a downfall. The defects 80 may be, for example, stacking faults, carrot defects, or surface deposits.

[0103] Next, the two-dimensional position coordinates of the defect 80 are identified using a virtual two-dimensional position coordinate system determined based on the reference mark 3 (second mark 3b). Specifically, if the third defect 83 exists on a plurality of coordinates including, for example, the third coordinate (X3, Y3), the plurality of coordinates including the third coordinate (X3, Y3) are identified as the two-dimensional position coordinates of the third defect 83. Similarly, if the fourth defect 84 exists on a plurality of coordinates including, for example, the fourth coordinate (X4, Y4), the plurality of coordinates including the fourth coordinate (X4, Y4) are identified as the two-dimensional position coordinates of the fourth defect 84.

[0104] Next, a step (S17) of forming an element active region in the epitaxial film is performed. FIG. 20 is a schematic cross-sectional view showing the step of forming element active region 90 in epitaxial film 20. As shown in FIG. 20 , p-type impurities such as aluminum (Al) are implanted into epitaxial film 20. This forms body region 132 having p-type conductivity. Next, n-type impurities such as phosphorus (P) are implanted into a portion of body region 132. This forms source region 133 having n-type conductivity. Next, p-type impurities such as aluminum are implanted into a portion of source region 133. This forms contact region 134 having p-type conductivity (see FIG. 20 ).

[0105] In the epitaxial film 20, the portions other than the body region 132, the source region 133, and the contact region 134 become the drift region 131. The source region 133 is separated from the drift region 131 by the body region 132. The ion implantation may be performed by heating the epitaxial substrate 1 to, for example, about 300°C or higher and 600°C or lower. After the ion implantation, activation annealing is performed on the epitaxial substrate 1. The activation annealing activates the impurities implanted in the epitaxial film 20, generating carriers in each region. The atmosphere for the activation annealing may be, for example, an argon (Ar) atmosphere. The temperature for the activation annealing may be, for example, about 1800°C. The time for the activation annealing may be, for example, about 30 minutes.

[0106] Element active region 90 includes, for example, body region 132, source region 133, and contact region 134. As described above, element active region 90 is formed in epitaxial substrate 1. Element active region 90 is provided in epitaxial film 20.

[0107] Next, a step (S18) of identifying the position coordinates of the element active region 90 based on the reference mark is performed. The two-dimensional position coordinates of the element active region 90 are identified using a virtual two-dimensional position coordinate system determined based on the reference mark 3 (second mark 3b). Specifically, if the element active region 90 exists on a plurality of coordinates including, for example, a fifth coordinate (X5, Y5), the plurality of coordinates including the fifth coordinate (X5, Y5) are identified as the two-dimensional position coordinates of the element active region 90. As described above, the position coordinates of the element active region 90 are identified based on the reference mark 3.

[0108] The reference mark 3 in the step (S18) of specifying the position coordinates of the element active region based on the reference mark may be the reference mark 3 (first mark 3a) formed in the step (S11) of forming a reference mark on a semiconductor substrate, or may be the reference mark 3 (second mark 3b) formed in the step (S15) of forming an epitaxial film on the semiconductor substrate. The second mark 3b is formed by continuing the first mark 3a in the epitaxial film 20. Therefore, the two-dimensional position coordinate system determined based on the first mark 3a is substantially the same as the two-dimensional position coordinate system determined based on the second mark 3b.

[0109] Next, a step (S19) is performed in which the position coordinates of the defects are associated with the position coordinates of the element active regions to determine whether the element active regions are good or bad. Fig. 21 is a schematic plan view showing the step of determining the quality of element active regions 90. In Fig. 21, element active regions 90 are multiple regions each represented by a substantially square. A dicing region 91 is located between two adjacent element active regions 90. As shown in Fig. 21, the position coordinates of first defect 81, second defect 82, third defect 83, fourth defect 84, and element active region 90 may be mapped within a two-dimensional plane.

[0110] Next, the position coordinates of the first defect 81 are compared with the position coordinates of the element active region 90. If the position coordinates of the first defect 81 and the position coordinates of the element active region 90 at least partially overlap, it is determined that the first defect 81 is present in the element active region 90. As shown in FIG. 21 , some of the element active regions 90 overlap with the first defect 81. A semiconductor element formed in an element active region 90 that overlaps with the first defect 81 is determined to be defective. Similarly, the position coordinates of the second defect 82, the third defect 83, and the fourth defect 84 are compared with the position coordinates of the element active region 90. A semiconductor element formed in an element active region 90 that overlaps with any of the second defect 82, the third defect 83, and the fourth defect 84 is determined to be defective.

[0111] If the position coordinates of the element active region 90 do not overlap with any of the position coordinates of the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84, the element active region 90 is determined to be free of the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84. As shown in FIG. 21 , some of the element active regions 90 do not overlap with any of the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84. A semiconductor element formed in an element active region 90 that does not overlap with any of the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84 is determined to be a non-defective product. As described above, the position coordinates of the defects 80 and the position coordinates of the element active region 90 are associated with each other to determine whether the element active region 90 is good or bad.

[0112] 22 is a cross-sectional view showing a process for forming a gate insulating film. As shown in FIG. 22, the epitaxial substrate 1 is heated in an atmosphere containing oxygen, thereby forming a gate insulating film 136 on the epitaxial film 20. The gate insulating film 136 is made of, for example, silicon dioxide (SiO2). The temperature of the thermal oxidation treatment is, for example, about 1300°C. The time for the thermal oxidation treatment is, for example, about 30 minutes.

[0113] After the gate insulating film 136 is formed, a heat treatment may be further performed in a nitrogen atmosphere. For example, the heat treatment may be performed at about 1100° C. for about one hour in an atmosphere of nitric oxide (NO), nitrous oxide (NO), or the like. Thereafter, a heat treatment may be further performed in an argon atmosphere. For example, the heat treatment may be performed in an argon atmosphere at a temperature of about 1100° C. or higher and 1500° C. or lower for about one hour.

[0114] Next, a first electrode 141 is formed on the gate insulating film 136. The first electrode 141 functions as a gate electrode. The first electrode 141 is formed, for example, by a CVD method. The first electrode 141 is made of, for example, polysilicon containing impurities and having conductivity. The first electrode 141 is formed in a position facing the source region 133 and the body region 132.

[0115] Next, an interlayer insulating film 137 is formed. The interlayer insulating film 137 is formed so as to cover the first electrode 141. The interlayer insulating film 137 is formed, for example, by a CVD method. The interlayer insulating film 137 is made of, for example, silicon dioxide or the like. The interlayer insulating film 137 is formed so as to be in contact with the first electrode 141 and the gate insulating film 136. Next, a part of the gate insulating film 136 and a part of the interlayer insulating film 137 are removed by etching. As a result, the source region 133 and the contact region 134 are exposed from the gate insulating film 136.

[0116] Next, a second electrode 142 is formed. The second electrode 142 functions as a source electrode. The second electrode 142 is made of, for example, titanium, aluminum, silicon, or the like. After the second electrode 142 is formed, the second electrode 142 and the epitaxial substrate 1 are heated, for example, at a temperature of about 900° C. or higher and 1100° C. or lower. This brings the second electrode 142 and the epitaxial substrate 1 into ohmic contact. Next, a wiring layer 138 is formed so as to be in contact with the second electrode 142. The wiring layer 138 is made of, for example, a material containing aluminum.

[0117] Next, the third electrode 143 is formed. The third electrode 143 functions as a drain electrode. The third electrode 143 is made of, for example, an alloy containing nickel and silicon (for example, NiSi).

[0118] Next, a dicing step is performed. For example, epitaxial substrate 1 is diced along dicing regions 91, thereby dividing epitaxial substrate 1 into a plurality of semiconductor chips. In this manner, semiconductor device 300 is manufactured.

[0119] 23 is a cross-sectional view showing a configuration of a semiconductor device 300. As shown in FIG. 23, the semiconductor device 300 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The semiconductor device 300 includes an epitaxial substrate 1, a first electrode 141, a second electrode 142, a third electrode 143, a gate insulating film 136, an interlayer insulating film 137, and a wiring layer 138. The epitaxial substrate 1 includes a semiconductor substrate 10 and an epitaxial film 20. The epitaxial film 20 includes a drift region 131, a source region 133, a body region 132, and a contact region 134.

[0120] Although the manufacturing method of the semiconductor device 300 according to the present disclosure has been described above using a MOSFET as an example, the manufacturing method according to the present disclosure is not limited to this. The manufacturing method according to the present disclosure can be applied to semiconductor devices 300 such as an insulated gate bipolar transistor (IGBT), a Schottky barrier diode (SBD), a thyristor, a gate turn off thyristor (GTO), and a PiN diode.

[0121] Ninth Embodiment Next, a method for manufacturing a semiconductor device 300 according to a ninth embodiment will be described. The method for manufacturing a semiconductor device 300 according to the ninth embodiment differs from the method for manufacturing a semiconductor device 300 according to the eighth embodiment mainly in that it includes a step of adjusting the formation position of an element active region 90 based on the position coordinates of a defect 80, but the other steps are the same as those in the method for manufacturing a semiconductor device 300 according to the eighth embodiment. The following description will focus on the steps that differ from those in the method for manufacturing a semiconductor device 300 according to the eighth embodiment.

[0122] 24 is a flow diagram schematically illustrating a manufacturing method of the semiconductor device 300 according to the ninth embodiment. As shown in FIG. 24 , the manufacturing method of the semiconductor device 300 according to the ninth embodiment mainly includes a step of forming a fiducial mark on a semiconductor substrate (S21), a step of polishing the semiconductor substrate (S22), a step of cleaning the semiconductor substrate (S23), a step of identifying position coordinates of defects in the semiconductor substrate based on the fiducial mark (S24), a step of forming an epitaxial film on the semiconductor substrate (S25), a step of identifying position coordinates of defects in the epitaxial film based on the fiducial mark (S26), a step of adjusting the formation position of an element active region based on the position coordinates of the defect (S27), and a step of associating the position coordinates of the defect with the position coordinates of the element active region to determine whether the element active region is good or bad (S28).

[0123] First, the process includes a step (S21) of forming a reference mark on a semiconductor substrate and a step (S26) of identifying the position coordinates of defects in the epitaxial film based on the reference mark. Steps (S21) to (S26) are similar to steps (S11) to (S16), respectively.

[0124] Next, a step (S27) of adjusting the formation position of an element active region based on the position coordinates of the defect is performed. FIG. 25 is a schematic plan view showing the step of adjusting the formation position of element active region 90 based on the position coordinates of defect 80. In FIG. 25, a substantially square region 92 indicated by a dashed line is the region where element active region 90 was planned to be formed. In the step (S24) of specifying the position coordinates of defects in the semiconductor substrate based on the fiducial marks, the two-dimensional position coordinates of each of first defect 81 and second defect 82 in semiconductor substrate 10 have already been specified. In the step (S26) of specifying the position coordinates of defects in the epitaxial film based on fiducial marks 3, the two-dimensional position coordinates of each of third defect 83 and fourth defect 84 in epitaxial film 20 have already been specified.

[0125] In the step (S27) of adjusting the formation positions of the element active regions 90 based on the position coordinates of the defects, the formation positions of the element active regions 90 are adjusted so that the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84 do not overlap with the element active regions 90 as much as possible. From another perspective, the formation positions of the element active regions 90 are adjusted so that the number of element active regions 90 that overlap with the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84 is minimized. For example, the formation positions of the element active regions 90 are adjusted so that the first defect 81, the second defect 82, the third defect 83, and the fourth defect 84 are each formed in a dicing region 91 between two adjacent element active regions 90. As described above, the formation positions of the element active regions 90 are adjusted based on the position coordinates of the defects 80. From another perspective, the formation positions of the element active regions 90 are optimally designed.

[0126] Next, a step (S28) is performed in which the position coordinates of the defect and the position coordinates of the element active region are associated with each other to determine whether the element active region is good or bad. The step (S28) in accordance with the ninth embodiment in which the position coordinates of the defect and the position coordinates of the element active region are associated with each other to determine whether the element active region is good or bad is similar to the step (S19) in accordance with the eighth embodiment in which the position coordinates of the defect and the position coordinates of the element active region are associated with each other to determine whether the element active region is good or bad.

[0127] Next, a gate insulating film 136 is formed using a method similar to that of the semiconductor device 300 according to the eighth embodiment (see FIG. 22). Next, a first electrode 141, a second electrode 142, an interlayer insulating film 137, a wiring layer 138, and a third electrode 143 are formed using a method similar to that of the semiconductor device 300 according to the eighth embodiment. Next, the epitaxial substrate 1 is cut along the dicing region 91. This completes the manufacturing of the semiconductor device 300 (see FIG. 23).

[0128] Tenth Embodiment Next, a method for manufacturing a semiconductor device 300 according to a tenth embodiment will be described. The method for manufacturing a semiconductor device 300 according to the tenth embodiment differs from the method for manufacturing a semiconductor device 300 according to the eighth embodiment mainly in that it does not include a step of forming a fiducial mark 3 on the semiconductor substrate 10, but the other steps are the same as those in the method for manufacturing a semiconductor device 300 according to the eighth embodiment. The following description will focus on the steps that differ from those in the method for manufacturing a semiconductor device 300 according to the eighth embodiment.

[0129] 26 is a flow diagram schematically illustrating a manufacturing method of the semiconductor device 300 according to the tenth embodiment. As shown in FIG. 26 , the manufacturing method of the semiconductor device 300 according to the tenth embodiment includes the steps of forming an epitaxial film on a semiconductor substrate (S31), forming reference marks on the epitaxial film (S32), specifying position coordinates of defects in the epitaxial film based on the reference marks (S33), forming element active regions in the epitaxial film (S34), specifying position coordinates of the element active regions based on the reference marks (S35), and associating the position coordinates of the defects with the position coordinates of the element active regions to determine whether the element active regions are good or bad (S36).

[0130] 27 is a schematic cross-sectional view showing a step of preparing a semiconductor substrate 10. As shown in Fig. 27, the semiconductor substrate 10 has a first main surface 11. No fiducial mark 3 is formed on the first main surface 11.

[0131] 28 is a schematic cross-sectional view showing a step of forming an epitaxial film 20 on a semiconductor substrate 10. As shown in FIG. 28, the epitaxial film 20 is formed on the semiconductor substrate 10 by epitaxial growth. The epitaxial film 20 has a second main surface 21 and a second back surface 22. The second back surface 22 is in contact with the first main surface 11 of the semiconductor substrate 10. The second main surface 21 is on the opposite side of the second back surface 22.

[0132] 29 is a schematic cross-sectional view showing a step of forming the fiducial mark 3 on the epitaxial film 20. As shown in FIG. 29, the fiducial mark 3 is formed on the second main surface 21 of the epitaxial film 20.

[0133] After the fiducial marks 3 are formed, at least one of polishing and cleaning is performed on the fiducial mark formation surface of the epitaxial film 20 provided on the semiconductor substrate 10. The fiducial mark formation surface corresponds to the second main surface 21.

[0134] Next, a step (S33) of identifying the position coordinates of defects in the epitaxial film based on the reference marks is performed. The step (S33) is similar to the step (S16).

[0135] 30 is a schematic cross-sectional view showing a step of forming an element active region 90 in the epitaxial film 20. As shown in FIG. 30 , the element active region 90 is formed in the epitaxial film 20. The element active region 90 has, for example, a body region 132, a source region 133, and a contact region 134. As described above, the reference mark 3 and the element active region 90 are each provided in the epitaxial film 20.

[0136] Next, a step (S35) of identifying the position coordinates of the element active region based on the reference mark and a step (S36) of correlating the position coordinates of the defect with the position coordinates of the element active region to determine whether the element active region is good or bad are performed. Steps (S35) and (S36) are similar to steps (S18) and (S19), respectively.

[0137] Next, a gate insulating film 136 is formed using a method similar to that of the semiconductor device 300 according to the eighth embodiment (see FIG. 22). Next, a first electrode 141, a second electrode 142, an interlayer insulating film 137, a wiring layer 138, and a third electrode 143 are formed using a method similar to that of the semiconductor device 300 according to the eighth embodiment. Next, the epitaxial substrate 1 is cut along the dicing region 91. This completes the manufacturing of the semiconductor device 300 (see FIG. 23).

[0138] In the manufacturing methods for the semiconductor device 300 according to the eighth to tenth embodiments, all of the multiple reference marks 3 are formed so that the distance between the center of the reference mark 3 and the outer peripheral surface (first outer peripheral surface 13 and second outer peripheral surface 23) is within 10 mm. However, it is sufficient that at least one of the multiple reference marks 3 is provided near the notch 4, and the other reference marks 3 may be provided at any position on the first main surface 11 or the second main surface. When the reference mark 3 is provided in the central region of the second main surface 21, the reference mark 3 is provided in, for example, the dicing region 91. Furthermore, the reference mark 3 may be formed on the front surface (first main surface 11) or the back surface (first back surface 12) of the semiconductor substrate 10.

[0139] Next, the effects of the semiconductor substrate 10 and epitaxial substrate 1 according to the above embodiment will be described.

[0140] In each manufacturing process of the semiconductor device 300, a process is performed in which the position coordinates of defects 80 in the semiconductor substrate 10 and the epitaxial substrate 1 are identified using each defect inspection device. The defect inspection device is, for example, a photoluminescence (PL) inspection device and a surface defect inspection device. Therefore, for each defect inspection device, it is necessary to identify the reference mark 3 on the semiconductor substrate 10 and the epitaxial substrate 1 and determine a two-dimensional position coordinate system. In addition, a process is performed for a large number of semiconductor substrates 10 and epitaxial substrates 1, in which the position coordinates of the defects 80 are associated with the position coordinates of the element active regions, and the quality of the element active regions is determined. Therefore, it is necessary to identify the reference mark 3 for each semiconductor substrate 10 and epitaxial substrate 1 and determine a two-dimensional position coordinate system.

[0141] The semiconductor substrate 10 according to one aspect of the above embodiment has a notch 4 formed therein. The semiconductor substrate 110 includes a first outer peripheral surface 13 and a first main surface 11. The first main surface 11 is continuous with the first outer peripheral surface 13. The maximum diameter W1 of the first main surface 11 is 150 mm or more. The first outer peripheral surface 13 includes a first notch region 13b in which the notch 4 is formed. A first reference mark 31a and a second reference mark 32a are provided on the first main surface 11, and serve as the basis for two-dimensional position coordinates. When viewed along a direction perpendicular to the first main surface 11, the shortest distance A1 between the center of the first reference mark 31a and the first notch region 13b is 10 mm or less. As a result, the first reference mark 31a is located near the notch 4, making it easy to identify the position of the first reference mark 31a. As a result, the time required to identify the first reference mark 31a is reduced. Furthermore, compared to when the reference mark 3 is provided in the central region of the semiconductor substrate 10, a larger area can be secured for the region in which the elements are formed.

[0142] According to the semiconductor substrate 10 according to one aspect of the above embodiment, when viewed along a direction perpendicular to the first main surface 11, the shortest distance A1 between the center of the first fiducial mark 31a and the first notch region 13b may be 3 mm or less. This allows the first fiducial mark 31a to be located near the notch 4, making it easy to identify the position of the first fiducial mark 31a. As a result, the time required to identify the first fiducial mark 31a is reduced. Furthermore, compared to when the fiducial mark 31a is provided in the central region of the semiconductor substrate 10, a larger area can be secured for the region in which elements are formed.

[0143] According to the semiconductor substrate 10 according to one aspect of the above embodiment, the shortest distance B1 between the center of the second reference mark 32a and the first outer peripheral surface 13 may be 3 mm or less when viewed along a direction perpendicular to the first main surface 11. This allows a larger area to be secured for the region where elements are formed, compared to when the reference mark 32a is provided in the central region of the semiconductor substrate 10.

[0144] According to the semiconductor substrate 10 according to one aspect of the above embodiment, when viewed along a direction perpendicular to the first main surface 11, the straight line L1 connecting the center of the first fiducial mark 31a and the center of the second fiducial mark 32a may pass through the center p1 of the first main surface 11. This makes it possible to easily identify the position of the second fiducial mark 32a. Furthermore, a two-dimensional position coordinate system is determined based on the first fiducial mark 31a and the second fiducial mark 32a. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect.

[0145] According to the semiconductor substrate 10 according to one aspect of the above embodiment, the maximum diameter W1 of the first main surface 11 may be 200 mm or more.

[0146] An epitaxial substrate 1 according to one aspect of the embodiment includes a semiconductor substrate 10 according to one aspect of the embodiment and an epitaxial film 20. The epitaxial film 20 is provided on a first main surface 11. The epitaxial film 20 has a second outer peripheral surface 23 and a second main surface 21. The second main surface 21 is opposite the surface that contacts the first main surface 11. The second outer peripheral surface 23 includes a second notch region 23b that is continuous with the first notch region 13b. A third fiducial mark 31b and a fourth fiducial mark 32b that serve as references for two-dimensional position coordinates are provided on the second main surface 21. The third fiducial mark 31b is formed on the first fiducial mark 31a. The fourth fiducial mark 32b is formed on the second fiducial mark 32a. When viewed along a direction perpendicular to the second main surface 21, the shortest distance A2 between the center of the third fiducial mark 31b and the second notch region 23b is 10 mm or less. As a result, the position of third fiducial mark 31b can be easily identified because third fiducial mark 31b is located near notch 4. As a result, the time required to identify third fiducial mark 31b is reduced. Furthermore, compared to when fiducial mark 3 is provided in the central region of epitaxial substrate 1, a larger area can be secured for the region in which elements are formed.

[0147] In the epitaxial substrate 1 according to one aspect of the above embodiment, when viewed along a direction perpendicular to the second main surface 21, the shortest distance A2 between the center of the third fiducial mark 31b and the second notch region 23b may be 3 mm or less. This allows the third fiducial mark 31b to be located near the notch 4, making it easy to identify the position of the third fiducial mark 31b. As a result, the time required to identify the third fiducial mark 31b is reduced. Furthermore, compared to when the fiducial mark 31b is provided in the central region of the epitaxial substrate 1, a larger area can be secured for the region in which elements are formed.

[0148] In the epitaxial substrate 1 according to one aspect of the above embodiment, the shortest distance B2 between the center of the fourth reference mark 32b and the second outer peripheral surface 23 may be 3 mm or less when viewed along a direction perpendicular to the second main surface 21. This allows a larger area to be secured for the region in which elements are formed, compared to when the reference mark 32b is provided in the central region of the epitaxial substrate 1.

[0149] In the epitaxial substrate 1 according to one aspect of the above embodiment, when viewed along a direction perpendicular to the second main surface 21, the straight line L2 connecting the center of the third fiducial mark 31b and the center of the fourth fiducial mark 32b may pass through the center p2 of the second main surface 21. This makes it possible to easily identify the position of the fourth fiducial mark 32b. Furthermore, a two-dimensional position coordinate system is determined based on the third fiducial mark 31b and the fourth fiducial mark 32b. As a result, the two-dimensional position coordinate system can be accurately associated with the position coordinates of the defect.

[0150] According to the epitaxial substrate 1 according to one aspect of the above embodiment, the maximum diameter W2 of the second main surface 21 may be 200 mm or more.

[0151] The embodiments disclosed herein are to be considered as illustrative in all respects and not restrictive. The scope of the present disclosure is defined by the claims, not by the above description, and is intended to include meanings equivalent to the claims and all modifications within the scope thereof.

[0152] 1 epitaxial substrate, 3 reference mark, 3a first mark, 3b second mark, 4 notch, 10, 10a, 10b, 10c, 10d, 10e, 10f semiconductor substrate, 11 first main surface, 12 first back surface, 13 first outer peripheral surface, 13a, 23a arc-shaped portion, 13b first notch region, 13L first boundary portion, 13R second boundary portion, 14 first notch, 20 epitaxial film, 21 second main surface, 22 second back surface, 23 second outer peripheral surface, 23b second notch region, 24 second notch, 30 recess, 31a first reference mark, 32a second reference mark, 31b third reference mark, 32b fourth reference mark, 33a fifth reference mark, 34a sixth reference mark, 52 side, 53 bottom surface, 54 groove portion, 80 defect, 81 first defect, 82 second defect, 83 third defect, 84 fourth defect, 90 element active region, 91 dicing region, 92 region, 131 drift region, 132 body region, 133 source region, 134 contact region, 136 gate insulating film, 137 interlayer insulating film, 138 wiring layer, 141 first electrode, 142 second electrode, 143 third electrode, 300 semiconductor device, A1, A2, B1, B2 shortest distance, L1 first straight line (straight line), L2 second straight line (straight line), p1, p2 center, R1 first virtual circle, R2 second virtual circle, W1, W2 maximum diameter, W3 third length, W4 fourth width, W5 fifth width, X first direction, Y second direction.

Claims

1. A semiconductor substrate having a notch formed therein, the semiconductor substrate comprising a first outer peripheral surface and a first main surface continuous with the first outer peripheral surface, the maximum diameter of the first main surface being 150 mm or more, the first outer peripheral surface including a first notch region forming the notch, the first main surface being provided with a first reference mark and a second reference mark serving as a reference for two-dimensional position coordinates, and when viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the first reference mark and the first notch region is 10 mm or less.

2. The semiconductor substrate according to claim 1, wherein, when viewed along a direction perpendicular to said first main surface, the shortest distance between the center of said first reference mark and said first notch region is 3 mm or less.

3. A semiconductor substrate as described in claim 1 or claim 2, wherein when viewed along a direction perpendicular to the first main surface, the shortest distance between the center of the second reference mark and the first outer peripheral surface is 3 mm or less.

4. A semiconductor substrate as described in any one of claims 1 to 3, wherein, when viewed along a direction perpendicular to the first main surface, a straight line connecting the center of the first reference mark and the center of the second reference mark passes through the center of the first main surface.

5. A semiconductor substrate according to any one of claims 1 to 4, wherein the maximum diameter of the first main surface is 200 mm or more.

6. An epitaxial substrate comprising: a semiconductor substrate according to any one of claims 1 to 5; and an epitaxial film provided on the first main surface, wherein the epitaxial film has a second outer peripheral surface and a second main surface opposite a surface in contact with the first main surface, the second outer peripheral surface includes a second notch region continuous with the first notch region, the second main surface is provided with a third reference mark and a fourth reference mark serving as references for two-dimensional position coordinates, the third reference mark is formed on the first reference mark, and the fourth reference mark is formed on the second reference mark, and when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third reference mark and the second notch region is 10 mm or less.

7. An epitaxial substrate comprising: a semiconductor substrate according to claim 2; and an epitaxial film provided on said first main surface, said epitaxial film having a second outer peripheral surface and a second main surface opposite a surface in contact with said first main surface, said second outer peripheral surface including a second notch region continuous with said first notch region, said second main surface being provided with a third reference mark and a fourth reference mark serving as references for two-dimensional position coordinates, said third reference mark being formed on said first reference mark, and said fourth reference mark being formed on said second reference mark, and when viewed along a direction perpendicular to said second main surface, the shortest distance between the center of said third reference mark and said second notch region is 3 mm or less.

8. An epitaxial substrate comprising: a semiconductor substrate according to claim 3; and an epitaxial film provided on the first main surface, wherein the epitaxial film has a second outer peripheral surface and a second main surface opposite a surface in contact with the first main surface, wherein the second outer peripheral surface includes a second notch region continuous with the first notch region, wherein a third reference mark and a fourth reference mark serving as references for two-dimensional position coordinates are provided on the second main surface, wherein the third reference mark is formed on the first reference mark, and the fourth reference mark is formed on the second reference mark, wherein when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third reference mark and the second notch region is 10 mm or less, and when viewed along a direction perpendicular to the second main surface, the distance between the center of the fourth reference mark and the second outer peripheral surface is 3 mm or less.

9. An epitaxial substrate as described in any one of claims 6 to 8, wherein, when viewed along a direction perpendicular to the second main surface, a straight line connecting the center of the third reference mark and the center of the fourth reference mark passes through the center of the second main surface.

10. An epitaxial substrate comprising: a semiconductor substrate; and an epitaxial film provided on the semiconductor substrate, the epitaxial film having a notch formed therein, the epitaxial film having a second outer peripheral surface and a second main surface continuous with the second outer peripheral surface, the maximum diameter of the second main surface being 150 mm or more, the second outer peripheral surface including a second notch region forming the notch, the second main surface being provided with a third reference mark and a fourth reference mark serving as a basis for two-dimensional position coordinates, and when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the third reference mark and the second notch region is 10 mm or less.

11. The epitaxial substrate according to claim 10, wherein, when viewed along a direction perpendicular to said second main surface, the shortest distance between a center of said third reference mark and said second notch region is 3 mm or less.

12. An epitaxial substrate as described in claim 10 or 11, wherein when viewed along a direction perpendicular to the second main surface, the shortest distance between the center of the fourth reference mark and the second outer peripheral surface is 3 mm or less.

13. An epitaxial substrate as described in any one of claims 10 to 12, wherein, when viewed along a direction perpendicular to the second main surface, a straight line connecting the center of the third reference mark and the center of the fourth reference mark passes through the center of the second main surface.

14. The epitaxial substrate according to any one of claims 10 to 13, wherein the maximum diameter of the second main surface is 200 mm or more.

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