Photonic structure including oxide trenches with matched depths and method of making thereof
The method of forming oxide trenches with matched depths in photonic structures addresses the issue of uneven waveguide core thicknesses by ensuring equal trench depths, enhancing the performance and reliability of integrated photonic devices.
Patent Information
- Application Number
- PCT/US2024/053344
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-11-03
- Filing Date
- 2024-10-29
- Publication Date
- 2025-05-08
AI Technical Summary
Existing photonic structure fabrication methods often result in trenches with different depths due to varying etching rates, which can lead to uneven waveguide core thicknesses and performance degradation in integrated optical systems.
A method involving the formation of oxide trenches with matched depths by etching an oxide layer on a support, followed by an oxide growth process that maintains equal depths for trenches of different widths, eliminating the need for an additional etch-stop layer.
This approach allows for the creation of photonic structures with trenches of different widths and uniform depths, enhancing the uniformity of waveguide cores and reducing optical scattering, thereby improving the performance and reliability of integrated photonic devices.
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Figure US2024053344_08052025_PF_FP_ABST
Abstract
Description
PHOTONIC STRUCTURE INCLUDING OXIDE TRENCHES WITH MATCHED DEPTHS AND METHOD OF MAKING THEREOFPHOTONIC STRUCTURE INCLUDING OXIDE TRENCHES WITH MATCHED DEPTHS AND METHOD OF MAKING THEREOFTECHNICAL FIELD
[0001] An embodiment of the present disclosure is directed to a photonic structure and more particularly, to a photonic structure including oxide trenches with matched depths, and a method of making thereof.BACKGROUND
[0002] In many optical and electro-optical systems, it may be desirable to integrate a number of different photonic structures on a single substrate or “chip.” For example, a single chip may include a number of different types of waveguides, including waveguides composed of different materials. However, the processing steps used to form one type of waveguide may result in damage or performance degradation in one or more other components on the chip.SUMMARY
[0003] According to an aspect of the present disclosure, a method includes forming an oxide layer having a thickness on a support, etching the oxide layer to form a first trench having a first width and a first depth, and a second trench having a second width different from the first width and a second depth equal to the first depth, and performing an oxide growth process to increase the thickness of the oxide layer while maintaining the first depth of the first trench to be equal to the second depth of the second trench.
[0004] According to another aspect of the present disclosure a structure includes a support, an oxide layer located on the support, a first trench located the oxide layer having a firstwidth and a first depth, and a second trench located in the oxide layer having a second width that is different from the first width, and a second depth that is equal to the first depth. The oxide layer comprises a bottom first convex portion located below the first trench and a bottom second convex portion located below the second trench.
[0005] This Summary is intended to provide a brief overview of some of the subject matter described in this document. Accordingly, it will be appreciated that the above-described features are merely examples and should not be construed to narrow the scope or spirit of the subject matter described herein in any way. Other features, aspects, and advantages of the subject matter described herein will become apparent from the following Detailed Description, Figures, and Claims.BRIEF DESCRIPTION OF THE DRAWINGS
[0006] For a better understanding of the various described embodiments, reference should be made to the Detailed Description below, in conjunction with the following drawings in which like reference numerals refer to corresponding parts throughout the Figures.
[0007] FIG. l is a side cross-sectional view a photonic structure according to a comparative embodiment.
[0008] FIG. 2 is a vertical cross-sectional view of an intermediate structure that may be used to form the photonic structure according to the comparative embodiment.
[0009] FIG. 3 is a vertical cross-sectional view of another intermediate structure that may be used to form a photonic structure according to another comparative embodiment.
[0010] FIG. 4A is a vertical cross-sectional view of an intermediate structure that may be used to form a photonic structure according to an embodiment of the present disclosure.[Oil] FIG. 4B is a vertical cross-sectional view of a further intermediate structure that may be used to form the photonic structure according to the embodiment of the present disclosure.
[0012] FIG. 4C is a vertical cross-sectional view of the photonic structure according to the embodiment of the present disclosure.
[0013] FIG. 5 is a flowchart illustrating a method according to an embodiment of the present disclosure.
[0014] While the features described herein may be susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and are herein described in detail. It should be understood, however, that the drawings and detailed description thereto are not intended to be limiting to the particular form disclosed, but on the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the spirit and scope of the subject matter as defined by the appended claims.DETAILED DESCRIPTION
[0015] Various embodiments of the present disclosure include photonic structures having trenches in a dielectric material, such as a silicon oxide material. The dielectric material may serve as cladding of optical waveguides, while the trenches may be filled with waveguide cores of a core material (e.g., silicon nitride and / or polysilicon) having a higher refractive index than the dielectric cladding material to form the optical waveguides. In one embodiment, the optical waveguides may be heterogeneous, meaning that the waveguide cores may be composed of different materials. For example, a first waveguide core of the first waveguide may be composed of a semiconductor material (e.g., silicon), and a second waveguide core of the second waveguide may be composed of silicon nitride. In anotherembodiment, the optical waveguides may be homogeneous, meaning that the waveguide cores may be composed of the same materials.
[0016] FIG. 1 is a side cross-sectional view of a comparative photonic structure 100 according to a comparative embodiment of the present disclosure. The photonic structure 100 may include a substrate 102. The substrate 102 may include any suitable substrate, such as a semiconductor substrate (e.g., silicon wafer), a silicon on insulator (“SOI”) substrate, an insulating substrate, or a conductive substrate. A first cladding material layer 104a may be located over an upper surface of the substrate 102. The first cladding material layer 104a may form a portion of a cladding 14 of a first waveguide 10 and a second waveguide 110 to be subsequently formed.
[0017] In some embodiments, the first cladding material layer 104a may include silicon oxide. Other suitable oxide cladding materials, such as aluminum oxide, titanium oxide, silicon oxynitride, or the like, are within the contemplated scope of disclosure. In one embodiment, a silicon-on-insulator (SOI) process may be used to form the first cladding material layer 104a by oxidizing a top surface of a silicon substrate 102 using a thermal or plasma oxidation process in an oxygen containing ambient, such as air, O2, N2O, H2O, etc. containing ambient.
[0018] First and second waveguide cores 12, 112 may be embedded in the first cladding material layer 104a. The first and second waveguide cores 12, 112 may be composed of a suitable core material. The first and second waveguide cores 12, 112 may be composed of the same core material or different core materials. The core materials include silicon nitride, silicon oxynitride, silicon (e.g., single crystal silicon or polysilicon) and / or silicongermanium compound semiconductor material.
[0019] A second cladding material layer 104b is located over the first and second waveguide cores 12, 112 and over the first cladding material layer 104a. The second cladding material layer 104b may comprise the same material as the first cladding material layer 104a, such as silicon oxide.
[0020] The first and second waveguide cores 12, 112 may be fabricated by forming trenches in the first cladding material layer 104a, depositing the first and second waveguide core material(s) (e.g., by chemical vapor deposition, atomic layer deposition or sputtering) into the trenches and over the top surface of the first cladding material layer 104a, and planarizing the core material(s) (e.g., by chemical mechanical polishing) with the top surface of the first cladding material layer 104a to form the first and second waveguide cores 12, 112. The second cladding material layer 104b is then deposited (e.g., by chemical vapor deposition, atomic layer deposition or sputtering) over the first and second waveguide cores 12, 112 and the first cladding material layer 104a to complete the waveguide cladding 14. The cladding 14 comprises the first and second cladding material layers 104a, 104b. The cladding 14 surrounds the first and second waveguide cores 12, 112 to complete the first and second waveguides 10, 110.
[0021] FIG. 2 is a vertical cross-sectional view of an intermediate structure 200 that may be used in the formation of the comparative the photonic structure 100 of FIG. 1. The intermediate structure 200 may include the above described substrate 102 and first cladding material layer 104a. The intermediate structure 200 may include a first trench 202a and a second trench 202b that may be formed by patterning the first cladding material layer 104a. In this regard, a patterned photoresist (not shown) may be formed over the first cladding material layer 104a. The patterned photoresist may then be used as an etch mask during an anisotropic etch process of the exposed portions to the first cladding material layer 104a toform the first trench 202a and the second trench 202b in the first cladding material layer 104a. The patterned photoresist may then be removed by ashing or by dissolution with a solvent.
[0022] The openings in the patterned photoresist may be configured to generate the first trench 202a to have a first width 204a and the second trench 202b to have a second width 204b which is narrower than the first width 204a. The rate at which the first trench 202a is etched, however, may differ from the rate at which the second trench 202b is etched, due to the width difference between the trenches. Thus, the wider first trench 202a may have a first depth 206a that is greater than the second depth 206b of the narrower second trench 202b. In this regard, the etching rate may be greater for wider trenches (e.g., for the first trench 202a) than for relatively narrower trenches (e.g., the second trench 202b). As such, the abovedescribed method of forming the first trench 202a and the second trench 202b may be unsuitable for applications requiring the first trench 202a and the second trench 202b to have a common depth, because it results in first and second waveguide cores 12, 112 which undesirably have a different thickness from each other.
[0023] FIG. 3 is a vertical cross-sectional view of another comparative intermediate structure 300 that may be used in the formation of another comparative photonic structure. The intermediate structure 300 may include the substrate 102, the first cladding material layer 104a, and the second cladding material layer 104b. The first cladding material layer 104a may be separated from the second cladding material layer 104b by an etch-stop layer 302. In this regard, the etch-stop layer 302 may include an etch stop material such as silicon nitride, silicon carbide, silicon carbonitride, or a dielectric metal oxide (such as aluminum oxide, titanium oxide, tantalum oxide, etc.). The etch stop layer 302 may be formed chemical vapor deposition, atomic layer deposition, or physical vapor deposition on the first claddingmaterial layer 104a. The second cladding material layer 104b may then be formed by depositing an oxide or by bonding a layer of separately formed oxide material to a surface of the etch-stop layer 302.
[0024] An anisotropic etch process may then be performed to generate the first trench 202a and the second trench 202b. In this regard, the etch process may be performed such that the second cladding material layer 104b is etched down to the etch stop layer 302 to generate each of the first trench 202a and the second trench 202b. As such, the first trench 202a and the second trench 202b may have equal depths (206a, 206b) despite having different widths (204a, 204b). However, the above process requires a deposition of an additional etch-stop layer 302, which complicates the process.
[0025] In embodiments of the present disclosure, the process of forming the first trench 202a and the second trench 202b with different width but the same depth in a single etching step may be simplified by omitting the etch-stop layer 302, as described with reference to FIGS.4 A - 4C, below. FIGS. 4 A and 4B are vertical cross-sectional views of sequential intermediate structures 400a and 400b that may be used in a process to form a photonic structure 400 shown in FIG. 4C.
[0026] As shown in FIG. 4A, the intermediate structure 400a may include the substrate 102 and the patterned first cladding material layer 104a. In this regard, a blanket layer (not shown) of the first cladding material layer 104a may be formed over the substrate 102 by deposition (e.g., by chemical vapor deposition, atomic layer deposition or sputtering) or by oxidation (e.g., thermal or plasma oxidation) of the top surface of the substrate 102. For example, if the substrate 102 comprises a silicon substrate, then the blanket layer of the first cladding material layer 104a may comprise a thermal silicon oxide layer formed by thermally oxidizing the top surface of the substrate 102.
[0027] The blanket layer of the first cladding material layer 104a may then be patterned to form a first trench 202a and a second trench 202b having different widths 204a, 204b but the same depths 206a, 206b. For example, a patterned photoresist maybe formed over the blanket layer of the first cladding material layer 104a and an anisotropic etch process may be performed to etch the first cladding material layer 104a using the patterned photoresist as a mask to form the first trench 202a and the second trench 202b having equal depths 206a, 206b. The etch process etches the blanket layer of the first cladding material layer 104a until a surface of the substrate 102 is exposed, as shown in FIG. 4A. As such, the top surface of the silicon substrate 102 may act as an etch stop.
[0028] As shown in FIG. 4B, an oxidation process (e.g., thermal or plasma oxidation process in an oxygen containing ambient, such as air, O2, N2O, H2O, etc. containing ambient) may then be performed to increase a thickness 402 of the patterned oxide first cladding material layer 104a layer while maintaining the first depth 206a of the first trench 202a to be the same as the second depth 206b of the second trench 202b. The oxidation process oxidizes the upper part of the substrate 102. The patterned oxide first cladding material layer 104a may comprise a silicon oxide layer. The oxidation process may form bottom first and second convex portions 404a, 404b of the first cladding material layer 104a which protrude below the planar the top surface portion 406 of the substrate 102 below the first trench 202a and the second trench 202b, respectively. Specifically, the bottom first and second convex portions 404a, 404b have curved convex bottom surfaces. Thus, the substrate 102 may have the planar top surface portion 406 and first and second concave portions 408a, 408b recessed below the planar top surface portion 406. The first and second concave portions 408a, 408b are located below and contact the bottom first and second convex portions 404a, 404b of the first cladding material layer 104a.
[0029] The process of forming the first trench 202a and the second trench 202b, described with reference to FIGS. 4A and 4B, solves the problem of forming trenches (202a, 202b) having different widths (204a, 204b) and a common depth (206a, 206b) without depositing a separate etch-stop layer 302. This represents a simplification over the process described with reference to FIG. 3 in that the etch-stop layer 302 of FIG. 3 has been eliminated. Further, the use of a thermal oxidation process to generate the initial layer of the first cladding material layer 104a, as well as to enlarge the thickness 402 of the first cladding material layer 104a, provides an etched first cladding material layer 104a that has uniform material properties. In this regard, the etched first cladding material layer 104a of FIG. 4B does not have any discontinuities (e.g., the etch stop layer 302) that may otherwise cause optical scattering (and optical mode mixing) in a subsequently formed photonic device. The resulting intermediate structure 400b may therefore be used in low-loss photonic applications that utilize a continuous thermal oxide and in other devices that include thermal oxide layers with different width and same depth trenches.
[0030] Referring to FIG. 4C, the embodiment photonic device 400 is completed by forming the first and second waveguide cores 12, 112 in the respective trenches 202a, 202b in the first cladding material layer 104a, and forming the second cladding material layer 104b over the first and second waveguide cores 12, 112 to complete the common cladding 14 of the first and second waveguides 10, 110. The first and second waveguide cores 12, 112 have a different width (in the horizontal direction parallel to the planar top surface portion 406 of the substrate 102) and the same depth (in the vertical direction perpendicular to the planar top surface portion 406 of the substrate 102).
[0031] The first and second waveguide cores 12, 112 may be formed by depositing the first and second waveguide core material(s) (e.g., by chemical vapor deposition, atomic layerdeposition or sputtering) into the respective trenches 202a, 202b and over the top surface of the first cladding material layer 104a, and planarizing the core material(s) (e.g., by chemical mechanical polishing) with the top surface of the first cladding material layer 104a to form the first and second waveguide cores 12, 112. The second cladding material layer 104b is then deposited (e.g., by chemical vapor deposition, atomic layer deposition or sputtering) over the first and second waveguide cores 12, 112 and the first cladding material layer 104a to complete the waveguide cladding 14. The cladding 14 comprises the first and second cladding material layers 104a, 104b. The cladding 14 surrounds the first and second waveguide cores 12, 112 to complete the first and second waveguides 10, 110.
[0032] FIG. 5 is a flowchart illustrating a method 500 of forming trenches (202a, 202b) in an oxide layer, according to various embodiments. In step 502, the method 500 may include forming an oxide layer 104a on a support, such as a silicon substrate 102. In step 504, the method 500 may include etching the oxide layer 104a to form a first trench 202a having a first width 204a and a first depth 206a, and a second trench 202b having a second width 204b different from the first width 204a and a second depth 206b which is the same as the first depth 206a in the oxide layer 104a. In step 506, the method 500 may include performing an oxide growth process to increase a thickness 402 of the oxide layer 104 while maintaining the first depth 206a of the first trench 202a to be equal to the second depth 206b of the second trench 202b.
[0033] While the support below the oxide layer 104a is described as a silicon substrate 102 in the above embodiment, other supports may be used instead. For example, the support may comprise a silicon layer located above a substrate, or another substrate or layer which can be oxidized to form an oxide layer.
[0034] The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the scope of the claims to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The embodiments were chosen to best explain the principles underlying the claims and their practical applications, to thereby enable others skilled in the art to best use the embodiments with various modifications as are suited to the particular uses contemplated.
[0035] It is also understood that the examples and embodiments described herein are for illustrative purposes only and that various modifications or changes in light thereof will be suggested to persons skilled in the art and are to be included within the spirit and purview of this application and scope of the appended claims.
[0036] It will be understood that, although the terms first, second, etc., are, in some instances, used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. The terminology used in the description of the various described embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various described embodiments and the appended claims, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and / or” as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms “includes,” “including,” “comprises,” and / or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components,and / or groups thereof. As used herein, the term “if’ is, optionally, construed to mean “when” or “upon” or “in response to determining” or “in response to detecting” or “in accordance with a determination that,” depending on the context.
Claims
WHAT IS CLAIMED IS:
1. A method, compri sing : forming an oxide layer having a thickness on a support; etching the oxide layer to form a first trench having a first width and a first depth, and a second trench having a second width different from the first width and a second depth equal to the first depth; and performing an oxide growth process to increase the thickness of the oxide layer while maintaining the first depth of the first trench to be equal to the second depth of the second trench.
2. The method of claim 1, wherein the step of performing the oxide growth process comprises oxidizing the oxide layer and the support.
3. The method of claim 2, wherein the thickness equals the first depth and the second depth.
4. The method of claim 3, wherein the step of etching the oxide layer comprises etching the oxide layer using the support as an etch-stop layer to expose a top surface of the support in the first trench and in the second trench.
5. The method of claim 4, wherein the support comprises a silicon support and the oxide layer comprises a silicon oxide layer.
6. The method of claim 5, wherein: the silicon support comprises a silicon substrate; and the step of forming the oxide layer comprises oxidizing a top surface of the silicon substrate.
7. The method of claim 6, wherein the step of oxidizing the top surface of the silicon substrate comprises a plasma oxidation step or a thermal oxidation step.
8. The method of claim 2, wherein the step of oxidizing the oxide layer and the support comprises thermally oxidizing the oxide layer and an upper part the support to increase a distance between bottom surfaces of the first trench and the second trench and a top surface of the support.
9. The method of claim 8, wherein the step of thermally oxidizing the oxide layer and the upper part the support forms bottom first and second convex portions of the oxide layer.
10. The method of claim 9, wherein the top surface of the support comprises a planar top surface portion and first and second concave portions recessed below the planar top surface portion.
11. The method of claim 10, wherein the first and second concave portions are located below and contact the bottom first and second convex portions of the oxide layer, respectively.
12. The method of claim 11, wherein: the bottom first convex portion of the oxide layer is located below the first trench; and the bottom second convex portion of the oxide layer is located below the second trench.
13. The method of claim 1, further comprising forming a first waveguide core in the first trench and forming a second waveguide core in the second trench, wherein the first waveguide core is wider then the second waveguide core, and the first waveguide core has a same thickness as the second waveguide core.
14. The method of claim 13, further comprising forming an additional oxide layer over the first waveguide core and the second waveguide core, wherein the oxide layer and the additional oxide layer form a common cladding of a first waveguide containing the first waveguide core and a second waveguide containing the second waveguide core.
15. A structure, compri sing : a support; an oxide layer located on the support; a first trench located the oxide layer having a first width and a first depth; and a second trench located in the oxide layer having a second width that is different from the first width, and a second depth that is equal to the first depth, wherein the oxide layer comprises a bottom first convex portion located below the first trench and a bottom second convex portion located below the second trench.
16. The structure of claim 15, further comprising: a first waveguide core located in the first trench; a second waveguide core located in the second trench and having a different width and a same thickness as the first waveguide core; and an additional oxide layer located over the first waveguide core and the second waveguide core.
17. The structure of claim 16, wherein the oxide layer and the additional oxide layer form a common cladding of a first waveguide containing the first waveguide core and a second waveguide containing the second waveguide core.
18. The structure of claim 15, wherein the support comprises a silicon support and the oxide layer comprises a silicon oxide layer.
19. The structure of claim 15, wherein a top surface of the support comprises a planar top surface portion and first and second concave portions recessed below the planar top surface portion.
20. The structure claim 19, wherein the first and second concave portions are located below and contact the bottom first and second convex portions of the oxide layer, respectively.
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