Insulated gate bipolar transistor protection circuit and module, and air conditioner

Abstract

Disclosed in the present application is an insulated gate bipolar transistor protection circuit, comprising: a first metal-oxide semiconductor field-effect transistor, an input signal processing module, a first load resistor and an insulated gate bipolar transistor, wherein an input end of the input signal processing module is used for receiving an input signal, and an output end of the input signal processing module is connected to a gate of the first metal-oxide semiconductor field-effect transistor, and is used for turning on the first metal-oxide semiconductor field-effect transistor when the input signal is at a low level; a source of the first metal-oxide semiconductor field-effect transistor is connected to a first end of the first load resistor, and a drain of the first metal-oxide semiconductor field-effect transistor is connected to a grounding end; and a gate of the insulated gate bipolar transistor is connected to the other end of the first load resistor, such that a gate voltage can be directly released by means of the grounding end, thereby avoiding the formation of a circulating current in a circuit when the gate voltage of the insulated gate bipolar transistor is released, and increasing the reduction speed of the gate voltage.

Description

Insulated gate bipolar transistor protection circuit, module and air conditioner

[0001] This application claims priority to the patent application filed with the State Intellectual Property Office of China on November 28, 2023, with application number 202311613357.2 and application name “An Insulated Gate Bipolar Transistor Protection Circuit, Module and Air Conditioner”. Technical Field

[0002] The present application belongs to the field of power electronics technology, and specifically relates to an insulated gate bipolar transistor protection circuit, module and air conditioner. Background Art

[0003] The insulated gate bipolar transistor (IGBT) is a three-terminal semiconductor switching device used for high-efficiency, fast switching in a variety of electronic devices. It is widely used in AC motors, inverters, switching power supplies, lighting circuits, traction drives, and other fields. In IGBT application circuits, gate surges or other inductive components can cause dv / dt variations on the IGBT collector to couple to the gate, increasing the IGBT gate voltage. When this voltage exceeds the gate threshold, the IGBT can be mistakenly turned on, resulting in unexpected user behavior.

[0004] In related technologies, a reverse diode and a load resistor can be connected in parallel to the load resistor on the gate of the IGBT to form a discharge circuit. When the gate voltage increases, discharge can be performed through the loop formed by the reverse diode and the two load resistors, thereby reducing the gate voltage of the IGBT and preventing the IGBT from being turned on by mistake.

[0005] However, the discharge efficiency of this method is low. When a surge occurs, the gate voltage of the IGBT rises quickly and cannot effectively reduce the gate voltage of the IGBT. The possibility of the IGBT being mistakenly turned on is still high.

[0006] Summary of the Invention

[0007] The purpose of the embodiments of the present application is to provide an insulated gate bipolar transistor protection circuit, module and air conditioner, which can solve the problem in the related art that the insulated gate bipolar transistor has a high possibility of being mistakenly turned on.

[0008] In a first aspect, an embodiment of the present application provides an insulated gate bipolar transistor protection circuit, the circuit comprising:

[0009] a first metal-oxide semiconductor field-effect transistor, an input signal processing module, a first load resistor, and an insulated gate bipolar transistor;

[0010] The input end of the input signal processing module is used to receive an input signal, and the output end of the input signal processing module is connected to the gate of the first metal-oxide semiconductor field-effect transistor, and is used to turn on the first metal-oxide semiconductor field-effect transistor when the input signal is at a low level;

[0011] The source of the first metal-oxide semiconductor field effect transistor is connected to the first end of the first load resistor, and the drain of the first metal-oxide semiconductor field effect transistor is connected to the ground end;

[0012] The gate of the insulated gate bipolar transistor is connected to the other end of the first load resistor.

[0013] Optionally, the circuit further includes:

[0014] a first N-channel metal-oxide semiconductor field effect transistor;

[0015] The gate of the first N-channel metal-oxide semiconductor field-effect transistor is connected to the output end of the NOT gate; the source of the first N-channel metal-oxide semiconductor field-effect transistor is connected to the gate of the insulated gate bipolar transistor; and the drain of the first N-channel metal-oxide semiconductor field-effect transistor is connected to the ground end.

[0016] Optionally, the connection between the gate of the first N-channel metal-oxide semiconductor field-effect transistor and the output terminal of the NOT gate is disconnected, and the circuit further includes:

[0017] a second load resistor, a third load resistor, an operational amplifier, and an AND gate;

[0018] The first end of the second load resistor is used to connect to a regulated power supply, and the second end of the second load resistor is connected to the first end of the third load resistor; the second end of the third load resistor is connected to the ground terminal; the second end of the second load resistor and the first end of the third load resistor are connected to the non-inverting input terminal of the operational amplifier; the inverting input terminal of the operational amplifier is connected to the gate of the insulated gate bipolar transistor; the first input terminal of the AND gate is connected to the output terminal of the operational amplifier; the second input terminal of the AND gate is connected to the output terminal of the NOT gate; and the output terminal of the AND gate is connected to the gate of the first N-channel metal-oxide semiconductor field-effect transistor.

[0019] Optionally, the circuit further includes:

[0020] diode;

[0021] The cathode of the diode is connected to the first end of the first load; the anode of the diode is connected to the gate of the insulated gate bipolar transistor.

[0022] Optionally, the connection between the anode of the diode and the gate of the insulated gate bipolar transistor is disconnected, and the circuit further comprises:

[0023] a fourth load resistor;

[0024] One end of the fourth load resistor is connected to the anode of the diode, and the other end of the fourth load resistor is connected to the gate of the insulated gate bipolar transistor.

[0025] Optionally, the circuit further includes:

[0026] a second metal-oxide semiconductor field-effect transistor;

[0027] The source of the second metal-oxide semiconductor field-effect transistor is used to connect to a regulated power supply, and the gate of the second metal-oxide semiconductor field-effect transistor is connected to the output end of the input signal processing module; the drain of the second metal-oxide semiconductor field-effect transistor is connected to the source of the first metal-oxide semiconductor field-effect transistor; the input signal processing module is further used to turn on the second metal-oxide semiconductor field-effect transistor when the input signal is at a high level.

[0028] Optionally, the first metal-oxide semiconductor field effect transistor and the second metal-oxide semiconductor field effect transistor are turned on in different ways.

[0029] Optionally, the first metal-oxide semiconductor field effect transistor is an N-channel metal-oxide semiconductor field effect transistor, and the input signal processing module is a NOT gate.

[0030] In a second aspect, an embodiment of the present application provides an insulated gate bipolar transistor protection module, comprising an insulated gate bipolar transistor protection circuit as described in any one of the above.

[0031] In a third aspect, an embodiment of the present application provides an air conditioner, comprising the insulated gate bipolar transistor protection module as described above.

[0032] In an embodiment of the present application, an insulated gate bipolar transistor protection circuit is provided, comprising: a first metal-oxide semiconductor field effect transistor, an input signal processing module, a first load resistor, and an insulated gate bipolar transistor; the input end of the input signal processing module is used to receive an input signal, the output end of the input signal processing module is connected to the gate of the metal-oxide semiconductor field effect transistor, and is used to turn on the metal-oxide semiconductor field effect transistor when the input signal is low; the source of the metal-oxide semiconductor field effect transistor is connected to the first end of the first load, and the drain of the metal-oxide semiconductor field effect transistor is grounded; and the gate of the insulated gate bipolar transistor is connected to the other end of the first load resistor. Through this circuit, the first N-channel metal-oxide semiconductor field effect transistor can be turned on when the input signal is low, and when a surge occurs, the gate voltage of the insulated gate bipolar transistor can be directly released to the ground end through the first load resistor and the first N-channel metal-oxide semiconductor field effect transistor, thereby avoiding current circulation in the load and increasing the gate voltage drop speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] FIG1 is a schematic diagram of a circuit structure of an insulated gate bipolar transistor protection circuit provided in an embodiment of the present application;

[0034] FIG2 is a schematic diagram of the circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application;

[0035] FIG3 is a schematic diagram of a circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application;

[0036] FIG4 is a circuit diagram of an insulated gate bipolar transistor protection circuit provided in an embodiment of the present application;

[0037] FIG5 is a schematic diagram of the circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application.

[0038] Among them, the above-mentioned drawings include the following figure marks: 201, input signal processing module; 202, first metal-oxide semiconductor field-effect transistor; 203, first load resistor; 204, insulated gate bipolar transistor; 205, first N-channel metal-oxide semiconductor field-effect transistor; 206, second load resistor; 207, third load resistor; 208, operational amplifier; 209, AND gate; 210, second metal-oxide semiconductor field-effect transistor; 211, diode; 212, regulated power supply; 213, ground terminal; 214, NOT gate; 215, fourth load resistor; 216, fifth load resistor; 217, N-channel metal-oxide semiconductor field-effect transistor; 218, P-channel metal-oxide semiconductor field-effect transistor. DETAILED DESCRIPTION

[0039] The following will be combined with the accompanying drawings in the embodiments of the present application to clearly describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this application.

[0040] The terms "first," "second," and the like in the specification and claims of this application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects; for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims refers to at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0041] The insulated gate bipolar transistor protection circuit provided by the embodiment of the present application is described in detail below through specific embodiments and application scenarios in conjunction with the accompanying drawings.

[0042] As shown in FIG1 , FIG1 is a schematic diagram of a circuit structure of an insulated gate bipolar transistor protection circuit provided in an embodiment of the present application. The protection circuit may include:

[0043] Input signal processing module 201, first metal-oxide semiconductor field effect transistor 202, first load resistor 203, insulated gate bipolar transistor 204;

[0044] The input end of the input signal processing module 201 is used to receive an input signal, and the output end of the input signal processing module is connected to the gate of the first metal-oxide semiconductor field-effect transistor 202, so as to turn on the first metal-oxide semiconductor field-effect transistor 202 when the input signal is at a low level; the source of the first metal-oxide semiconductor field-effect transistor 202 is connected to the first end of the first load resistor 203, and the drain of the first metal-oxide semiconductor field-effect transistor 202 is connected to the ground end; the gate of the insulated gate bipolar transistor 204 is connected to the other end of the first load resistor 203.

[0045] In an embodiment of the present application, an insulated gate bipolar transistor (IGBT) 204 has three terminals: a collector, an emitter, and a gate. All three terminals are covered with a metal layer. Furthermore, the metal material on the gate terminal also includes a silicon dioxide layer. The IGBT 204 is a four-layer semiconductor device. The four-layer structure is achieved by combining PNP and NPN transistors, forming a PNPN arrangement. In an IGBT, when the collector is at a positive potential relative to the emitter, the N-channel IGBT turns on. Furthermore, when the gate is at a sufficiently positive potential relative to the emitter, an inversion layer forms directly beneath the gate, forming a channel and allowing current to flow from the collector to the emitter. Simply put, when the gate voltage of the IGBT 204 exceeds the threshold voltage, the N-channel IGBT turns on. The IGBT 204 is a voltage-controlled device that acts as a switch in a circuit.

[0046] In the embodiments of the present application, a metal-oxide semiconductor field-effect transistor (MOSFET), also known as a field-effect transistor or MOS field-effect transistor, has three terminals: a source, a drain, and a gate. There are two types of MOSFETs: an N-channel MOSFET 217 and a P-channel MOSFET 218, corresponding to different conduction modes. For the N-channel MOSFET 217, when the gate input voltage is high, the N-channel MOSFET 217 can be turned on; for the P-channel MOSFET 218, when the gate input voltage is low, the P-channel MOSFET 218 can be turned on. MOSFETs are voltage-controlled devices that act as switches in circuits.

[0047] In an embodiment of the present application, the drain of the first metal-oxide semiconductor field-effect transistor 202 can be grounded. When the first metal-oxide semiconductor field-effect transistor 202 is turned on, the source voltage of the first metal-oxide semiconductor field-effect transistor 202 can be released to the ground terminal 213. The gate of the first metal-oxide semiconductor field-effect transistor 202 can be connected to the output terminal of the input signal processing module 201. Generally, when the input signal is at a high level, the insulated gate bipolar transistor 204 is in a turned-on state, and the first metal-oxide semiconductor field-effect transistor 202 can be in a turned-off state. When the input signal is at a low level, the insulated gate bipolar transistor 204 is in a turned-off state, and the first metal-oxide semiconductor field-effect transistor 202 can be in a turned-on state. When the first MOSFET 202 is an N-channel MOSFET 217, the output terminal of the input signal processing module 201 can output a high level to turn on the N-channel MOSFET 217. When the first MOSFET 202 is a P-channel MOSFET 218, the output terminal of the input signal processing module 201 can output a low level to turn on the P-channel MOSFET 218. The first load resistor 203 can prevent excessive current in the circuit, thereby protecting the first MOSFET 202. The first end of the first load resistor 203 can be connected to the source of the first MOSFET 202, and the second end of the first load resistor 203 can be connected to the gate of the IGBT 204.

[0048] For example, when the first MOSFET 202 is an N-channel MOSFET 217, if the input signal is high, the input signal processing module 201 may output a low level, in which case the first MOSFET 202 is in an off state; if the input signal is low, the input signal processing module 201 may output a high level, in which case the first MOSFET 202 is in an on state. Furthermore, when the first MOSFET 202 is a P-channel MOSFET 218, if the input signal is high, the input signal processing module 201 may output a high level, in which case the first MOSFET 202 is in an off state; if the input signal is low, the input signal processing module 201 may output a low level, in which case the first MOSFET 202 is in an on state.

[0049] In the embodiment of the present application, since the gate of the insulated gate bipolar transistor 204 is connected to the ground terminal 213 through the first load resistor 203 and the first metal-oxide semiconductor field-effect transistor 202, the gate voltage can be released directly through the ground terminal 213, avoiding the formation of a loop current inside the circuit when the gate voltage of the insulated gate bipolar transistor 204 is released, thereby improving the falling speed of the gate voltage.

[0050] As shown in FIG2 , FIG2 is a schematic diagram of the circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application. The circuit may include:

[0051] Input signal processing module 201, first metal-oxide semiconductor field-effect transistor 202, first load resistor 203, insulated gate bipolar transistor 204, first N-channel metal-oxide semiconductor field-effect transistor 205, second load resistor 206, third load resistor 207, operational amplifier 208, AND gate 209, second metal-oxide semiconductor field-effect transistor 210, diode 211, regulated power supply 212 and ground terminal 213.

[0052] In the embodiment of the present application, except for the input signal processing module 201 , the first metal-oxide semiconductor field effect transistor 202 , the first load resistor 203 , and the insulated gate bipolar transistor 204 , the remaining components may not be connected to the circuit at the same time.

[0053] In an embodiment of the present application, the source of the first N-channel metal-oxide semiconductor field effect transistor 205 can be short-circuited with the gate of the insulated gate bipolar transistor 204, and the drain of the first N-channel metal-oxide semiconductor field effect transistor 205 can be grounded. The first N-channel metal-oxide semiconductor field effect transistor 205 can be in an on state when the gate voltage is at a high level. The input signal processing module 201 includes a NOT gate 214. If the input signal processing module 201 and the gate of the first N-channel metal-oxide semiconductor field effect transistor 205 are short-circuited, then when the input signal is at a low level and the output signal of the input signal processing module 201 is at a high level, the first N-channel metal-oxide semiconductor field effect transistor 205 can be turned on, thereby short-circuiting the ground terminal 213 and the gate of the insulated gate bipolar transistor 204, and quickly reducing the gate voltage of the insulated gate bipolar transistor 204.

[0054] In one possible embodiment (not shown), the first N-channel MOSFET 205 can be replaced with a P-channel MOSFET 218. The source of the P-channel MOSFET 218 can be shorted to the gate of the IGBT, and the drain of the P-channel MOSFET 218 can be connected to the ground terminal 213. When the input signal is at a low level, the input signal processing module 201 can also output a low level. At this time, the P-channel MOSFET 218 is turned on, thereby shorting the gate of the IGBT 204 to the ground terminal 213, rapidly reducing the gate voltage of the IGBT 204.

[0055] Optionally, in an embodiment of the present application, a second metal-oxide semiconductor field-effect transistor 210 may be present, the source of the second metal-oxide semiconductor field-effect transistor 210 may be connected to the stabilized power supply 212, the gate of the second metal-oxide semiconductor field-effect transistor 210 may be connected to the output end of the input signal processing module 201, and the drain of the second metal-oxide semiconductor field-effect transistor 210 may be connected to the first end of the first load resistor 203. In this way, when the input signal is at a high level, the input signal processing module 201 can output a low level. At this time, the second metal-oxide semiconductor field effect transistor 210 is turned on, the first metal-oxide semiconductor field effect transistor 202 is turned off, and the voltage regulator 212 can provide a voltage to the insulated gate bipolar transistor 204 through the first load resistor 203, thereby turning on the insulated gate bipolar transistor 204; when the input signal is at a low level, the input signal processing module 201 can output a high level. At this time, the second metal-oxide semiconductor field effect transistor 210 is turned off, and the first metal-oxide semiconductor field effect transistor 202 is turned on, thereby connecting the gate of the insulated gate bipolar transistor 204 to the first metal-oxide semiconductor field effect transistor 202 via the first load resistor 203, releasing the electrical energy stored in the gate of the insulated gate bipolar transistor 204, and reducing the gate voltage of the insulated gate bipolar transistor 204.

[0056] It should be noted that, in the embodiments of the present application, the conduction modes of the first metal-oxide semiconductor field effect transistor 202 and the second metal-oxide semiconductor field effect transistor 210 are different, that is, when the first metal-oxide semiconductor field effect transistor 202 is a P-channel metal-oxide semiconductor field effect transistor 218, the second metal-oxide semiconductor field effect transistor 210 is an N-channel metal-oxide semiconductor field effect transistor 217; when the first metal-oxide semiconductor field effect transistor 202 is an N-channel metal-oxide semiconductor field effect transistor 217, the second metal-oxide semiconductor field effect transistor 210 is a P-channel metal-oxide semiconductor field effect transistor 218.

[0057] For example, referring to Figure 3, which is a schematic diagram of the circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application, in Figure 3, the insulated gate bipolar transistor 204 is an N-channel insulated gate bipolar transistor, and the circuit contains one N-channel metal-oxide semiconductor field effect transistor 217 and two P-channel metal-oxide semiconductor field effect transistors 218. The input signal can be directly short-circuited with the gates of the first N-channel metal-oxide semiconductor field effect transistor 217, the first P-channel metal-oxide semiconductor field effect transistor 218, and the second P-channel metal-oxide semiconductor field effect transistor 218. Among them, when the input signal is at a high level, the first N-channel metal-oxide semiconductor field effect transistor 217 is in the on state, which can drive the N-channel insulated gate bipolar transistor 204 to be turned on; when the input signal is at a low level, the first P-channel metal-oxide semiconductor field effect transistor 218 and the second P-channel metal-oxide semiconductor field effect transistor 218 are in the on state, which can release the electrical energy stored in the gate of the insulated gate bipolar transistor 204 and reduce the gate voltage of the insulated gate bipolar transistor 204.

[0058] Optionally, when the first MOSFET 202 is an N-channel MOSFET 217 , the input signal processing module 201 may be an inverter such as a NOT gate, for inverting the input signal.

[0059] Optionally, as shown in Figures 2 and 4, in an embodiment of the present application, an AND gate 209 may be present between the input signal processing module 201 and the gate of the first N-channel metal-oxide semiconductor field-effect transistor 205, that is, the output end of the input signal processing module 201 is short-circuited with one input end of the AND gate 209, and the output end of the AND gate 209 is short-circuited with the gate of the first N-channel metal-oxide semiconductor field-effect transistor 205; the other input end of the AND gate 209 may be short-circuited with the output end of the operational amplifier 208; in addition, a voltage divider circuit may be formed by a second load resistor 206 and a third load resistor 207, wherein a first end of the second load resistor 206 may be connected to a regulated power supply 212, a second end of the second load resistor 206 may be short-circuited with a first end of the third load resistor 207, and may be connected to the first input end of the operational amplifier 208; and a second end of the third load resistor 207 may be connected to a ground end 213. In an embodiment of the present application, the second load resistor 206 can be a fixed-resistance resistor, and the third load resistor 207 can be a variable resistor, such as a potentiometer. The input voltage at the first input terminal of the operational amplifier 208 can be adjusted by adjusting the resistance of the third load resistor 207. The second input terminal of the operational amplifier 208 can be short-circuited with the gate of the insulated gate bipolar transistor 204. The first input terminal of the operational amplifier 208 can be a non-inverting input terminal, and the second input terminal can be an inverting input terminal. Thus, when the gate voltage of the insulated gate bipolar transistor 204 drops to a first threshold, the output voltage of the operational amplifier 208 can be a high level, and the other input terminal of the AND gate 209 can also input a high level after passing through the input signal processing module 201. Therefore, the AND gate 209 can also output a high level, thereby turning on the first N-channel metal-oxide semiconductor field-effect transistor 205 and reducing the gate voltage of the insulated gate bipolar transistor 204.

[0060] Optionally, in the embodiment of the present application, a diode 211 may be provided. The diode 211 may be a discharge diode of various types, such as a light-emitting diode, a rectifier diode, etc. The reverse breakdown voltage of the diode 211 may be greater than the output voltage of the voltage-stabilized power supply 212. The anode of the diode 211 is connected to the gate of the insulated gate bipolar transistor 204, and the cathode of the diode 211 is connected to the first end of the first load resistor 203. When the insulated gate bipolar transistor 204 is turned on, the cathode voltage of the diode 211 is greater than the anode voltage, and the diode 211 will not be turned on. When the insulated gate bipolar transistor 204 is turned off, the anode voltage of the diode 211 will be greater than the cathode voltage due to the gate voltage of the insulated gate bipolar transistor 204. At this time, the diode 211 will be turned on, forming a loop with the first load resistor 203, thereby releasing the electrical energy stored in the gate of the insulated gate bipolar transistor 204 and reducing the gate voltage of the insulated gate bipolar transistor 204.

[0061] Optionally, as shown in FIG4 , in an embodiment of the present application, a fourth load resistor 215 may be added to the branch of the diode 211 to control the branch current of the diode 211 and protect the diode 211 from breakdown and damage.

[0062] Optionally, in an embodiment of the present application, the emitter of the insulated gate bipolar transistor 204 can be grounded, and the electrical energy stored in the parasitic capacitance inside the insulated gate bipolar transistor 204 can be released after the insulated gate bipolar transistor 204 is turned off, thereby reducing the voltage of the parasitic capacitance and effectively protecting the insulated gate bipolar transistor 204 from damage.

[0063] Referring to Figure 4, Figure 4 is a circuit diagram of an insulated gate bipolar transistor protection circuit provided in an embodiment of the present application. In the figure, R1, R2, R3, and R4 are respectively the first load resistor 203, the second load resistor 206, the third load resistor 207, and the fourth load resistor 215; R5 is the fifth load resistor 216 (specifically, a potentiometer); VB is the output voltage of the voltage regulator 212, which is used to drive Q2 (i.e., the insulated gate bipolar transistor 204) to turn on when Q1 is turned on; Q1 is a PMOSFET (i.e., a P-channel metal-oxide semiconductor field-effect transistor 218); Q3 is an NMOSFET (i.e., an N-channel metal-oxide semiconductor field-effect transistor 217); and the NOT gate 214 is used to invert the input signal. When the input signal is high, the NOT gate 214 outputs a low output, turning on Q1 and turning off Q3. At this time, VB can drive Q2 to turn on. When the input signal is low, the NOT gate 214 outputs a high output, turning off Q1 and turning on Q3. At this time, Q2 is closed, and the electric energy stored in the gate of Q2 can be released through R1 and the HOUT branch, reducing the gate voltage of Q2. R2, R3 and R5 form a voltage divider circuit. A branch can be set between R2 and R3 to connect to the non-inverting input terminal of the operational amplifier 208. R5 can be adjusted to adjust the input voltage of the non-inverting input terminal of the operational amplifier 208. The gate of Q2 can be connected to the inverting input terminal of the operational amplifier 208 and the source of Q4 through the HOUT1 branch, where Q4 is (i.e., the first N-channel metal-oxide semiconductor field-effect transistor 205). When the voltage of Q2 is lower than the voltage of the non-inverting input of operational amplifier 208, operational amplifier 208 can output a positive voltage signal. When the voltage signal output by operational amplifier 208 is consistent with the high-level signal output by NOT gate 214, the AND gate can output a high level, turning on Q4. Since Q4's drain is directly grounded, the energy stored in Q2's gate can be released directly to ground terminal 213 via the HOUT1 branch and Q4, thereby rapidly reducing Q2's gate voltage. In addition, when Q2 is in the off state, if there is a gate voltage on Q2, diode D1 is turned on, and the energy stored in Q2's gate can be released through diodes R4 and D1, further increasing the speed at which Q2's gate voltage decreases.

[0064] Referring to Figure 5 , which is a schematic diagram of the circuit structure of another insulated gate bipolar transistor protection circuit provided in an embodiment of the present application, VB is the output voltage of the voltage regulator 212, R1, R2, and R3 are the first load resistor 203, the second load resistor 206, and the third load resistor 207, respectively. N-channel metal-oxide semiconductor field-effect transistor 217 is represented by NMOSFET-1, the first N-channel metal-oxide semiconductor field-effect transistor 205 is represented by NMOSFET-2, and the P-channel metal-oxide semiconductor field-effect transistor 218 is represented by PMOSFET-1. Vi is a voltage input signal that can be connected to the gates of NMOSFET-1 and PMOSFET-1. When Vi is high, NOT gate 214 outputs a low level, NMOSFET-1 turns off, PMOSFET-1 turns on, and NMOSFET-2 turns off. At this time, VB can provide a gate voltage to the IGBT through R1, thereby turning on the IGBT. When Vi is low, NOT gate 214 outputs a high level, PMOSFET-1 turns off, and NMOSFET-1 turns on. At this time, the IGBT (i.e., insulated gate bipolar transistor 204) turns off. When a surge occurs, the IGBT will have a gate voltage. At this time, the electrical energy stored in the IGBT's gate can be released to ground through R1 and PMOSFET-1. R2 and R3 are connected in series to form a voltage divider circuit. A branch can be set between R2 and R3 to connect to the non-inverting input of the operational amplifier 208. When the gate voltage of the IGBT is lower than the voltage of the non-inverting input terminal of the operational amplifier 208, the operational amplifier 208 can output a positive voltage signal. When the voltage signal output by the operational amplifier 208 is consistent with the high-level signal output by the NOT gate 214, the AND gate 209 can output a high level. At this time, NMOSFET-2 is turned on. Since the drain of NMOSFET-2 is directly connected to the ground terminal 213, the electrical energy stored in the gate of the IGBT can be directly released to the ground terminal 213 through NMOSFET-2, thereby quickly reducing the gate voltage of the IGBT.

[0065] An embodiment of the present application also provides an insulated gate bipolar transistor protection module, including the insulated gate bipolar transistor protection circuit as described above, which is used to implement the various processes of the above-mentioned insulated gate bipolar transistor protection circuit embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0066] An embodiment of the present application also provides an air conditioner, including the insulated gate bipolar transistor protection module as described above, which is used to implement the various processes of the above-mentioned insulated gate bipolar transistor protection circuit embodiment and can achieve the same technical effect. To avoid repetition, it will not be repeated here.

[0067] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device comprising the element. In addition, it should be noted that the scope of the methods and devices in the embodiments of the present application is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in the opposite order according to the functions involved. For example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0068] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above embodiment methods can be implemented by means of software plus the necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method.

[0069] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this application, ordinary technicians in this field can also make many forms without departing from the purpose of this application and the scope of protection of the claims, all of which are within the protection of this application.

Claims

1. An insulated gate bipolar transistor protection circuit, characterized in that: The circuit comprises: A first metal-oxide semiconductor field effect transistor, an input signal processing module, a first load resistor, and an insulated gate bipolar transistor; The input end of the input signal processing module is used to receive an input signal, and the output end of the input signal processing module is connected to the gate of the first metal-oxide semiconductor field effect transistor, and is used to turn on the first metal-oxide semiconductor field effect transistor when the input signal is at a low level; The source of the first metal-oxide semiconductor field effect transistor is connected to the first end of the first load resistor, and the drain of the first metal-oxide semiconductor field effect transistor is connected to the ground end; A gate of the insulated gate bipolar transistor is connected to the other end of the first load resistor.

2. The circuit according to claim 1, characterized in that The first metal-oxide semiconductor field effect transistor is an N-channel metal-oxide semiconductor field effect transistor or a P-channel metal-oxide semiconductor field effect transistor.

3. The circuit according to claim 1, characterized in that The circuit further comprises: a first N-channel metal-oxide semiconductor field effect transistor; The gate of the first N-channel metal-oxide semiconductor field effect transistor is connected to the output end of the NOT gate; the source of the first N-channel metal-oxide semiconductor field effect transistor is connected to the gate of the insulated gate bipolar transistor; and the drain of the first N-channel metal-oxide semiconductor field effect transistor is connected to the ground end.

4. The circuit according to claim 3, characterized in that The connection between the gate of the first N-channel metal-oxide semiconductor field effect transistor and the output terminal of the NOT gate is disconnected, and the circuit further includes: A second load resistor, a third load resistor, an operational amplifier, and an AND gate; The first end of the second load resistor is used to connect to the voltage-stabilized power supply, the second end of the second load resistor is connected to the first end of the third load resistor; the second end of the third load resistor is connected to the ground terminal; the second end of the second load resistor and the first end of the third load resistor are connected to the non-inverting input terminal of the operational amplifier; the inverting input terminal of the operational amplifier is connected to the inverting input terminal of the operational amplifier. The gate of the AND gate is connected to the gate of the edge-gate bipolar transistor; the first input end of the AND gate is connected to the output end of the operational amplifier; the second input end of the AND gate is connected to the output end of the NOT gate; and the output end of the AND gate is connected to the gate of the first N-channel metal-oxide semiconductor field effect transistor.

5. The circuit according to claim 4, characterized in that The first metal-oxide semiconductor field effect transistor is an N-channel metal-oxide semiconductor field effect transistor, and the second metal-oxide semiconductor field effect transistor is a P-channel metal-oxide semiconductor field effect transistor; or The first metal-oxide semiconductor field effect transistor is a P-channel metal-oxide semiconductor field effect transistor, and the second metal-oxide semiconductor field effect transistor is an N-channel metal-oxide semiconductor field effect transistor.

6. The circuit according to claim 4, characterized in that The third load resistor 207 is a variable resistor.

7. The circuit according to any one of claims 1 to 6, characterized in that The circuit further comprises: diode; The cathode of the diode is connected to the first end of the first load resistor; the anode of the diode is connected to the gate of the insulated gate bipolar transistor.

8. The circuit according to claim 7, characterized in that disconnecting the anode of the diode from the gate of the insulated gate bipolar transistor, the circuit further comprising: a fourth load resistor; One end of the fourth load resistor is connected to the anode of the diode, and the other end of the fourth load resistor is connected to the gate of the insulated gate bipolar transistor.

9. The circuit according to claim 4, characterized in that The circuit includes a fifth load resistor, a first end of the fifth load resistor is located at the second end of the second load resistor and the first end of the third load resistor and is connected to the non-inverting input terminal of the operational amplifier, and a second end of the fifth load resistor is connected to the ground terminal.

10. The circuit according to claim 9, characterized in that The fifth load resistor is a potentiometer.

11. The circuit according to claim 1, characterized in that The circuit further comprises: a second metal-oxide semiconductor field effect transistor; The source of the second metal-oxide semiconductor field effect transistor is used to connect to a regulated power supply, and the gate of the second metal-oxide semiconductor field effect transistor is connected to the output end of the input signal processing module; the drain of the second metal-oxide semiconductor field effect transistor is connected to the source of the first metal-oxide semiconductor field effect transistor; the input signal processing module is also used to turn on the second metal-oxide semiconductor field effect transistor when the input signal is at a high level.

12. The circuit according to claim 9, characterized in that The first metal-oxide semiconductor field effect transistor and the second metal-oxide semiconductor field effect transistor are turned on in different ways.

13. The circuit according to claim 1, characterized in that The first metal-oxide semiconductor field effect transistor is an N-channel metal-oxide semiconductor field effect transistor, and the input signal processing module is a NOT gate.

14. An insulated gate bipolar transistor protection module, characterized in that: The invention comprises an insulated gate bipolar transistor protection circuit as claimed in any one of claims 1 to 13.

15. An air conditioner, characterized in that: It comprises the insulated gate bipolar transistor protection module as claimed in claim 14.

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