Multilayer ceramic capacitor

Abstract

This invention provides a multilayer ceramic capacitor with which a sufficient strength can be obtained. A multilayer ceramic capacitor (1) is provided with: a stack (2) including six surfaces from a first surface (11) to a sixth surface (16); a first external electrode (21); and a second external electrode (22). The stack (2) is provided with an inner layer part (53) and two outer layer parts (50) arranged so as to sandwich the inner layer part (53) in the stacking direction (100). The outer layer part (50) is provided with an outer layer dielectric layer (41), and contains fibers (60) in the outer layer dielectric layer (41).

Description

Multilayer ceramic capacitors

[0001] The present invention relates to a multilayer ceramic capacitor.

[0002] In recent years, electronic devices such as mobile phones and portable music players have become increasingly smaller and thinner. Electronic devices incorporate numerous multilayer ceramic electronic components. As electronic devices become smaller, the multilayer ceramic electronic components that are incorporated into substrates or mounted on the surfaces of substrates have also become smaller and thinner. For example, the multilayer ceramic capacitor described in Patent Document 1 and elsewhere has a multilayer ceramic capacitor with a T≦100 μm outer dimension, where T is the outer dimension perpendicular to the normal direction of the first end face and perpendicular to the first internal electrodes. As multilayer ceramic capacitors become smaller and thinner, ensuring the strength of the multilayer ceramic capacitors has become an issue.

[0003] JP 2022-166463 A

[0004] Therefore, an object of the present invention is to provide a multilayer ceramic capacitor that can ensure sufficient strength.

[0005] The multilayer ceramic capacitor of the present invention comprises a laminate having a first surface and a second surface that face each other in a stacking direction, a third surface and a fourth surface that face each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface that face each other in a second direction perpendicular to the stacking direction and the first direction, a first external electrode disposed on the third surface of the laminate, and a second external electrode disposed on the fourth surface of the laminate, wherein the laminate comprises an inner layer portion and two outer layer portions that are disposed so as to sandwich the inner layer portion in the stacking direction, and the outer layer portions comprise outer dielectric layers that contain fibers.

[0006] According to the present invention, it is possible to provide a multilayer ceramic capacitor that can ensure sufficient strength.

[0007] 1. A perspective view of a multilayer ceramic capacitor of the present embodiment. 2. A cross-sectional view taken along line 201-201 in FIG. 1. 3. A cross-sectional view taken along line 202-202 in FIG. 1. 4. A view corresponding to the cross-sectional view taken along line 201-201 in FIG. 1. 5. A cross-sectional view corresponding to the cross-sectional view taken along line 201-201 in FIG. 1. 6. A perspective view of another multilayer ceramic capacitor of the present embodiment. 7. A perspective view of a multilayer ceramic capacitor of the present embodiment. 8. A perspective view of a multilayer ceramic capacitor of the present embodiment. 9. A perspective view of a multilayer ceramic capacitor of the present embodiment.

[0008] (Multilayer Ceramic Capacitor) An overview of a multilayer ceramic capacitor 1 will be described with reference to Fig. 1. Fig. 1 is a perspective view of the multilayer ceramic capacitor 1 of this embodiment. The multilayer ceramic capacitor 1 includes a laminate 2 and external electrodes 20. The external electrodes 20 include a first external electrode 21 and a second external electrode 22.

[0009] (Laminate) The internal structure of the laminate 2 will be described with reference to Fig. 2. Fig. 2 is a cross-sectional view taken along line 201-201 in Fig. 1. The laminate 2 includes a plurality of stacked internal electrodes 30 and a plurality of stacked dielectric layers 40. The direction in which the internal electrodes 30 and the dielectric layers 40 are stacked is called the stacking direction 100.

[0010] (Surfaces of the laminate) As shown in Fig. 1 , the shape of the laminate 2 is approximately a rectangular parallelepiped. The surfaces of the laminate 2 are called as follows. The two surfaces facing the stacking direction 100 are called the first surface 11 and the second surface 12. The two surfaces facing the first direction 101 perpendicular to the stacking direction 100 are called the third surface 13 and the fourth surface 14. The two surfaces facing the second direction 102 perpendicular to the stacking direction 100 and the first direction 101 are called the fifth surface 15 and the sixth surface 16.

[0011] The preferred surface state of the first surface 11 and the second surface 12, or the preferred surface state of one of the first surface 11 and the second surface 12, is flat.

[0012] When the multilayer ceramic capacitor 1 is picked up, it is subjected to stress from the pick-up nozzle. The flat surface of the laminate 2 disperses this stress. The surface of the laminate 2 may be roughened.

[0013] (Ridge and Corner Portions) A ridge is a portion where two surfaces intersect among the first surface 11, the second surface 12, the third surface 13, the fourth surface 14, the fifth surface 15, and the sixth surface 16. A corner is a portion where three surfaces intersect among the first surface 11, the second surface 12, the third surface 13, the fourth surface 14, the fifth surface 15, and the sixth surface 16.

[0014] The edges and corners are preferably rounded, as rounded edges and corners prevent the laminate 2 from chipping and cracking.

[0015] When the ridges and corners are rounded, the surfaces of the laminate 2 excluding the corners and ridges may be flat.

[0016] 2, the laminate 2 has an inner layer portion 53 and an outer layer portion 50. The inner layer portion 53 is a portion where the internal electrodes 30 and the dielectric layers 40 are laminated. The outer layer portion 50 is a portion where the dielectric layers 40 are laminated.

[0017] The outer layer portion 50 includes a first surface side outer layer portion 51 and a second surface side outer layer portion 52. The first surface side outer layer portion 51 is an outer layer portion 50 located between the inner layer portion 53 and the first surface 11. The second surface side outer layer portion 52 is an outer layer portion 50 located between the inner layer portion 53 and the second surface 12. The outer layer portion 50 sandwiches the inner layer portion 53 between the first surface side outer layer portion 51 and the second surface side outer layer portion 52 in the stacking direction 100.

[0018] The layer configuration of the inner layer portion 53 and the outer layer portion 50 will be described. The inner electrode 30 includes a first inner electrode 31 and a second inner electrode 32. The dielectric layer 40 includes an outer dielectric layer 41 and an inner dielectric layer 43.

[0019] (Inner Layer Portion) The inner layer portion 53 includes a first inner electrode 31, a second inner electrode 32, and an inner dielectric layer 43. The first inner electrode 31 is an inner electrode 30 having one end exposed on the third surface 13. The second inner electrode 32 is an inner electrode 30 having one end exposed on the fourth surface 14. The inner dielectric layer 43 is a dielectric layer 40 that is alternately stacked with the first inner electrodes 31 and the second inner electrodes 32.

[0020] (First Region and Second Region) The inner dielectric layer 43 includes a first region 45 and a second region 46. An end of the internal electrode 30 in the first direction 101 that is not exposed on the third surface or the fourth surface is called the internal electrode end 34. The first region 45 is a region of the inner dielectric layer 43 that covers the internal electrode end 34.

[0021] The surface of the internal electrode 30 in the lamination direction 100 is called the lamination direction surface 35. The second region 46 is a region of the inner dielectric layer 43 that covers the lamination direction surface 35.

[0022] It is preferable that the dielectric component contained most abundantly in the first region 45 and the dielectric component contained most abundantly in the second region 46 are the same type. However, the dielectric component is not limited.

[0023] When the dielectric component contains a large amount of calcium titanate or calcium zirconate, the following effects can be obtained: the occurrence of dielectric breakdown between the internal electrode end 34 of the first internal electrode 31 and the second external electrode 22, the occurrence of dielectric breakdown between the internal electrode end 34 of the second internal electrode 32 and the first external electrode 21, and the occurrence of dielectric breakdown between the first internal electrode 31 and the second internal electrode 32 can be suppressed.

[0024] The dielectric component is not limited to calcium titanate or calcium zirconate, and the main component of the dielectric component may be strontium titanate.

[0025] The main component of the dielectric component may be barium titanate. Barium titanate has a high dielectric constant. When the main component of the dielectric component is barium titanate, the capacitance of the multilayer ceramic capacitor 1 becomes high.

[0026] (Facing Region and Lead-Out Region) The internal electrode 30 includes a facing region 37 and a lead-out region 38. The facing region 37 is a region where the first internal electrode 31 and the second internal electrode 32 face each other. The lead-out region 38 is a region that is led out from the facing region 37 onto the third surface 13, and a region that is led out from the facing region 37 onto the fourth surface 14.

[0027] The width of the internal electrode 30 in the second direction 102 may vary toward one end exposed on the third surface 13 or the fourth surface 14 .

[0028] (Internal Electrode) Examples of components of the internal electrode 30 include metals such as nickel, copper, silver, palladium, and gold, as well as alloys containing at least one of the above metals, such as a silver-palladium alloy. The components of the internal electrode 30 are not particularly limited as long as they are conductive materials.

[0029] (Tin Content) The internal electrodes 30 may contain tin. When the internal electrodes 30 contain tin, electric field concentration at the interfaces between the internal electrodes 30 and the dielectric layers 40 is alleviated. As a result, the high-temperature load reliability of the multilayer ceramic capacitor 1 is improved.

[0030] Tin may be contained in either the first internal electrode 31 or the second internal electrode 32. When either the first internal electrode 31 or the second internal electrode 32 contains tin, electric field concentration is alleviated and high-temperature load reliability is improved.

[0031] (First Width Direction Region and Second Width Direction Region) The configuration of the laminate 2 in the second direction 102 will be described with reference to Fig. 3. Fig. 3 is a cross-sectional view taken along line 202-202 in Fig. 1. The region between the first internal electrode 31 and the fifth surface 15, and the region between the second internal electrode 32 and the fifth surface 15, are referred to as a first width direction region 55. The region between the first internal electrode 31 and the sixth surface 16, and the region between the second internal electrode 32 and the sixth surface 16 are referred to as a second width direction region 56.

[0032] (Silicon Segregation) Silicon may be segregated between the internal electrode 30 and the first widthwise region 55, or between the internal electrode 30 and the second widthwise region 56. The segregated silicon improves the flexural strength of the multilayer ceramic capacitor 1.

[0033] (First surface side outer layer portion and second surface side outer layer portion) The first surface side outer layer portion 51 and the second surface side outer layer portion 52 are formed of an insulating material. When the first surface side outer layer portion 51 and the second surface side outer layer portion 52 are formed of the same type of dielectric material as the inner dielectric layer 43, the first surface side outer layer portion 51 and the second surface side outer layer portion 52 may be composed of multiple outer dielectric layers 41 or may be composed of a single outer dielectric layer 41.

[0034] It is also possible to form the inner dielectric layer 43 and the outer dielectric layer 41 with different components. For example, the component of the inner dielectric layer 43 may be a component with a higher dielectric constant than the component of the outer dielectric layer 41.

[0035] The outer dielectric layer 41 may be made of a material having good moisture resistance, weather resistance or strength resistance.

[0036] (External Electrode) The external electrode 20 will be described. As shown in Fig. 2 , the external electrode 20 has a first external electrode 21 and a second external electrode 22. The first external electrode 21 is the external electrode 20 disposed on the third surface 13. The second external electrode 22 is the external electrode 20 disposed on the fourth surface 14.

[0037] The external electrode 20 is preferably disposed so as to extend around the first surface 11 , the second surface 12 , the fifth surface 15 and the sixth surface 16 .

[0038] (Base Electrode Layer and Plating Layer) The external electrode 20 includes a base electrode layer 24 and a plating layer 26. The base electrode layer 24 and the plating layer 26 are disposed in this order from the laminate 2 side.

[0039] (Base electrode layer) The base electrode layer 24 is preferably made of a metal such as copper or nickel. In addition to a metal component, the base electrode layer 24 may contain the same dielectric component as the main component of the inner dielectric layer 43. When the base electrode layer 24 contains the same dielectric component as the main component of the inner dielectric layer 43, the difference in thermal expansion coefficient between the laminate 2 and the base electrode layer 24 is reduced. As a result, the stress applied to the base electrode layer 24 is alleviated.

[0040] The base electrode layer 24 may contain metals other than copper and nickel as the metal component, such as magnesium, chromium, strontium, aluminum, sodium, and iron.

[0041] The base electrode layer 24 may contain a glass component in addition to the dielectric component. Examples of the glass component include oxides of barium, strontium, silicon, calcium, zinc, aluminum, boron, or the like.

[0042] (Metal Film) A metal layer may be disposed instead of the base electrode layer 24. The metal layer may be disposed on both the first surface 11 and the second surface 12, or on either the first surface 11 or the second surface 12.

[0043] When a metal film is disposed, a plating electrode may be formed so as to be connected to the internal electrode 30 and the metal film.

[0044] When the metal film is formed by sputtering or vapor deposition, the thickness of the metal film can be reduced to 1 μm or less, which allows the size of the multilayer ceramic capacitor 1 in the lamination direction 100 to be reduced.

[0045] (Plating Layer) The plating layer 26 will now be described. The plating layer 26 is disposed on the base electrode layer 24. The plating layer 26 preferably has at least a two-layer structure. An example of the two layers is a nickel plating layer 27 and a tin plating layer 28. FIGS. 2 and 3 show a configuration in which the plating layer 26 includes the nickel plating layer 27 and the tin plating layer 28. The nickel plating layer 27 and the tin plating layer 28 are disposed in this order from the base electrode layer 24 side.

[0046] The nickel plating layer 27 prevents the solder from corroding the base electrode layer 24. The tin plating layer 28 improves the mountability of the multilayer ceramic capacitor 1 on a substrate or the like.

[0047] The plating layer 26 may include three or more layers. When the plating layer 26 has a three-layer structure, the layers may be arranged in the following order from the base electrode layer 24 side: a tin plating layer, a nickel plating layer, and a tin plating layer.

[0048] The plating layer 26 preferably contains at least one metal selected from the group consisting of copper, nickel, tin, lead, gold, silver, palladium, bismuth, and zinc, or an alloy containing any of these metals. The plating layer preferably does not contain glass. The metal content per unit volume of the plating layer is preferably 99% by volume or more.

[0049] (Fibers) The fibers 60 will be described with reference to Fig. 4. Fig. 4 is a view corresponding to the cross-sectional view taken along line 201-201 in Fig. 1. The multilayer ceramic capacitor 1 has fibers 60 in the laminate 2. Examples of the fibers 60 include carbon or silicon carbide fibers, alumina fibers, and boron fibers.

[0050] Having fibers 60 in the laminate 2 means having fibers 60 in any one of the internal electrode 30, the inner dielectric layer 43, and the outer dielectric layer 41, or having fibers 60 in only one of them.

[0051] 4 , the first surface side outer layer portion 51 and the second surface side outer layer portion 52 include the fibers 60. However, at least one of the first surface side outer layer portion 51 and the second surface side outer layer portion 52 may include the fibers 60.

[0052] By including fibers 60 in the first surface side outer layer portion 51 and the second surface side outer layer portion 52, the influence on the dielectric constant and electrical resistance of the multilayer ceramic capacitor 1 is small, and the mechanical strength of the multilayer ceramic capacitor 1 can be improved.

[0053] The fibers 60 may be formed by entangling a plurality of fibers 60. By entangling a plurality of fibers 60, the mechanical strength of the multilayer ceramic capacitor 1 is further improved.

[0054] When the first surface side outer layer portion 51 and the second surface side outer layer portion 52 are made up of a plurality of outer dielectric layers 41, each of the outer dielectric layers 41 may contain the fibers 60, or each layer may be laminated with a layer having the fibers 60 and a layer not having the fibers 60. In other words, an outer dielectric layer 41 having the fibers 60 and an outer dielectric layer 41 not having the fibers 60 may be prepared and laminated.

[0055] Here, by arranging the outer dielectric layer 41 so that the outer dielectric layer 41 without the fibers 60 is located on the first surface 11 and the second surface 12, the fibers 60 can be prevented from being exposed on the surface of the laminate 2.

[0056] Fig. 5 is a view corresponding to the cross-sectional view taken along line 201-201 in Fig. 1. In the multilayer ceramic capacitor 1 shown in Fig. 4, the first surface side outer layer portion 51 and the second surface side outer layer portion 52 each include one outer dielectric layer 41. In contrast, in the multilayer ceramic capacitor 1 shown in Fig. 5, the first surface side outer layer portion 51 and the second surface side outer layer portion 52 each include two outer dielectric layers 41.

[0057] 5 , the two outer dielectric layers 41 included in the first surface side outer layer portion 51 are shown as outer dielectric layer 411 and outer dielectric layer 412. The two outer dielectric layers 41 included in the second surface side outer layer portion 52 are shown as outer dielectric layer 413 and outer dielectric layer 414.

[0058] 5 , the outer dielectric layer 411, the outer dielectric layer 412, the outer dielectric layer 413, and the outer dielectric layer 414 each have the fibers 60. Therefore, the first surface side outer layer portion 51 and the second surface side outer layer portion 52 each have multiple layers of entangled fibers 60. As a result, the mechanical strength of the multilayer ceramic capacitor 1 is further improved.

[0059] If each fiber 60 is too thick or too large, the fibers 60 will not entangle with each other and will be scattered. In this case, the mechanical strength of the multilayer ceramic capacitor 1 will not be improved. Furthermore, there is a risk of cracks occurring inside the laminate 2 due to the difference in shrinkage between the fibers 60 and the dielectric component during firing, which will be described later.

[0060] Furthermore, if the aspect ratio of the fibers 60 (length of the fibers 60 / thickness of the fibers 60) is small, the fibers 60 will not entangle with each other, and the mechanical strength of the multilayer ceramic capacitor 1 will not be improved.

[0061] Therefore, the length of each fiber 60 is preferably 1 μm or more and 100 μm or less. If each fiber 60 is too long, the fibers 60 themselves tend to become tangled and aggregate. Furthermore, the thickness of each fiber 60 is preferably 1 nm or more and 1000 nm or less. The number of intersections between the fibers 60 is preferably 5 or more within an area of ​​2.5 μm × 2.5 μm. This causes the fibers 60 to become entangled, improving the mechanical strength of the multilayer ceramic capacitor 1.

[0062] In order to increase the number of intersecting fibers 60 to 5 or more in an area of ​​2.5 μm × 2.5 μm, it is conceivable to include a desired amount of relatively long fibers 60. The relatively long fibers 60 are, for example, fibers 60 having a length of 1 μm or more and 100 μm or less. The desired amount is, for example, an amount such that "5 or more fibers 60 are found in an area of ​​2.5 μm × 2.5 μm" in the multilayer ceramic capacitor 1 after sintering.

[0063] The thickness of the fibers 60 and how to observe the thickness will be described below. The thickness of each fiber 60 is polished to, for example, half the dimension of the multilayer ceramic capacitor 1 in the second direction 102, and a cross section parallel to the stacking direction 100 and the first direction 101 of the multilayer ceramic capacitor 1 is exposed.

[0064] Thereafter, using a scanning probe microscope, the thickness and width of each fiber 60 are observed within a range in which at least 10 fibers can be observed in an observation field of 2.5 μm × 2.5 μm, more specifically, within a range in which an observation field of 250 nm × 250 nm or 2.5 μm × 2.5 μm can be observed.

[0065] Furthermore, the number of intersections between the fibers 60 can be determined by counting the number of intersections between the fibers 60 in an observation field of 2.5 μm × 2.5 μm. Specifically, when the fibers 60 are regarded as lines, the number of intersections is the number of points where the fibers 60 as one line intersect with the fibers 60 as another line.

[0066] (Fiber Content) The fiber 60 content will be described. The fiber 60 content is preferably 1.0 wt % or more and 30.0 wt % or less. However, if the fiber 60 content is too high, for example, when carbon fiber is used as the fiber 60, the carbon fiber is conductive, which may result in electrical conduction between the first external electrode 21 and the second external electrode 22, making the multilayer ceramic capacitor 1 more likely to fail to function as a capacitor. Furthermore, if the fiber 60 content is too high, it becomes difficult to ensure adhesion with other dielectric layers, making structural defects more likely to occur. Therefore, it is more preferable that the fiber 60 content be 1.0 wt % or more and 30.0 wt % or less. On the other hand, if the fiber 60 content is too low, the total amount of fiber 60 is reduced, making it difficult to improve mechanical strength.

[0067] The content of the fibers 60 can be determined by the amount of the fibers 60 added when the multilayer ceramic capacitor 1 is manufactured.

[0068] The content of fibers 60 is defined and confirmed as follows. For example, the multilayer ceramic capacitor 1 is polished to half its dimension in the second direction 102, exposing a cross section parallel to the stacking direction 100 and the first direction 101 of the multilayer ceramic capacitor 1. The obtained cross section is divided into five equal parts in the first direction 101, and five central regions of each region are observed using a scanning probe microscope with an observation field of 2.5 μm × 2.5 μm. Each observed image is binarized, and the content is defined as the average of the values ​​in the five regions.

[0069] (Dimensions of Multilayer Ceramic Capacitor) The dimensions of the multilayer ceramic capacitor 1 will be described. The dimensions of the multilayer ceramic capacitor 1 including the external electrodes 20 are not particularly limited. When the dimension of the multilayer ceramic capacitor 1 in the stacking direction 100 becomes small, the mechanical strength of the multilayer ceramic capacitor 1 in the stacking direction 100 decreases. Therefore, when the dimension of the multilayer ceramic capacitor 1 in the stacking direction 100 is, for example, 110 μm or less, applying the configuration of this embodiment to the multilayer ceramic capacitor 1 particularly improves the mechanical strength of the multilayer ceramic capacitor 1 in the stacking direction 100.

[0070] The dimension of the multilayer ceramic capacitor 1 in the stacking direction 100 is preferably 80 μm or less, more preferably 60 μm or less, and even more preferably 40 μm or less. If the dimension is 80 μm or less, the mechanical strength in the stacking direction 100 becomes significantly weaker, and therefore the configuration of the present invention can be more effectively exhibited.

[0071] (Method for Manufacturing Multilayer Ceramic Capacitor) A method for manufacturing the multilayer ceramic capacitor 1 will now be described.

[0072] (Step 1) In step 1, a dielectric sheet for the inner dielectric layer 43 and a conductive paste for the internal electrode 30 are prepared. The dielectric sheet, the conductive paste for the internal electrode 30, and the dielectric sheet contain a binder and an organic solvent. Known materials can be used for the binder and the organic solvent.

[0073] At this time, a dielectric paste for the first region 45 of the inner dielectric layer 43 may be prepared separately. For example, the dielectric material for the first region 45 and the second region can be changed to calcium zirconate, barium titanate, or the like. However, the dielectric material is not limited to these and can be any desired material.

[0074] For materials to which the fibers 60 are to be added, the fibers 60 are added separately. At this time, the content of the fibers 60 can be changed by changing the amount of the fibers 60 added. Furthermore, if the dispersion of each material is insufficient, the fibers 60 may aggregate. Therefore, it is preferable to sufficiently disperse each material, including the fibers 60. When the outer dielectric layer 41 has a layered structure, for example, if the fibers 60 are added near the center in the stacking direction, the dispersion of the fibers 60 may result in the fibers 60 being distributed in layers.

[0075] When the fibers 60 are located on the first surface 11 or the second surface 12 of the outer dielectric layer 41, which has a layered structure, it is possible to prevent cracks from occurring in the multilayer ceramic capacitor 1 due to impact from the mounter during mounting.

[0076] On the other hand, if the fibers 60 are located on the internal electrode 30 side of the outer dielectric layer 41, which has a layered structure, even if a crack occurs on the first surface 11 or the second surface 12, the crack can be prevented from spreading to the layer of the internal electrode 30.

[0077] (Step 2) In step 2, a conductive paste for the internal electrodes 30 is printed in a predetermined pattern on the dielectric sheet. This forms a dielectric sheet on which the internal electrode pattern of the inner layer portion 53 is printed. The printing of the conductive paste for the internal electrodes 30 on the dielectric sheet is performed by, for example, screen printing or gravure printing.

[0078] (Step 3) In step 3, the dielectric sheet and the dielectric sheet on which the internal electrode pattern is printed are laminated. The laminated dielectric sheets are pressed in the lamination direction 100 by, for example, an isostatic press. As a result, a laminated block is formed.

[0079] (Step 4) In step 4, the laminated block is cut to a predetermined size. This cuts out laminated chips. Thereafter, corners and ridges of the laminated chips may be rounded by barrel polishing or the like.

[0080] (Step 5) In step 5, the laminated chip is fired to form the laminated body 2 according to this embodiment.

[0081] (Step 6) In step 6, a conductive paste containing a glass component and a metal component is applied to the third surface 13 and the fourth surface 14 by, for example, a dipping method, thereby forming the base electrode layer 24.

[0082] As another method for manufacturing the base electrode layer 24, a conductive paste may be applied to the fifth surface 15 and the sixth surface 16 by extruding it from a slit plate, and then the conductive paste may be applied to the third surface 13 and the fourth surface 14 by, for example, a dipping method. The base electrode layer 24 can also be formed in this manner.

[0083] (Step 7) In step 7, a plating layer 26 is formed so as to be connected to the base electrode layer 24. Electrolytic plating is preferably used as the plating process. Barrel plating is preferably used as the plating method.

[0084] (Another Configuration of Multilayer Ceramic Capacitor) The multilayer ceramic capacitor 1 has been described with a configuration in which the length in the stacking direction 100 is equal to the length in the second direction 102, as shown in FIGS. 1 and 3 . As described above, the multilayer ceramic capacitor 1 of this embodiment exhibits a significant effect of improving strength in so-called thin products. FIG. 6 is a diagram showing an outline of a thin multilayer ceramic capacitor 1. The length 110 in the stacking direction 100 of the multilayer ceramic capacitor 1 shown in FIG. 6 is shorter than the length 112 in the second direction 102 of the multilayer ceramic capacitor 1. A multilayer ceramic capacitor 1 in which the length 110 is shorter than the length 112 is called a thin product. A thin product is likely to have insufficient strength compared to the multilayer ceramic capacitor 1 shown in FIG. 1 in which the length 110 and the length 112 are approximately equal. Here, in the multilayer ceramic capacitor 1 of this embodiment, the laminate 2 includes fibers 60. This allows the strength of a thin multilayer ceramic capacitor 1 to be increased.

[0085] In this embodiment, the positions of the external electrodes 20 can be changed as appropriate. The two-terminal multilayer ceramic capacitor 1 has been described with the external electrodes 20 arranged on both longitudinal ends as shown in FIG. 1 . The arrangement of the external electrodes 20 is not limited to this. FIG. 7 is a diagram illustrating an outline of a multilayer ceramic capacitor 1 in which the external electrodes 20 are arranged in the lateral direction of the multilayer ceramic capacitor 1. In the multilayer ceramic capacitor 1 shown in FIG. 7 , the external electrodes 20 are arranged not on the longitudinal end faces, i.e., the third face 13 and the fourth face 14, but on the lateral end faces, i.e., the fifth face 15 and the sixth face 16. Specifically, an external electrode 72 is arranged on the fifth face 15, and an external electrode 71 is arranged on the sixth face 16. As shown in FIG. 7 , in the multilayer ceramic capacitor 1 of this embodiment, the external electrodes 20 may be arranged in the lateral direction.

[0086] Furthermore, the multilayer ceramic capacitor 1 of this embodiment is not limited to having two terminals. Fig. 8 is a diagram showing a three-terminal multilayer ceramic capacitor 1. As shown in Fig. 8, the multilayer ceramic capacitor 1 of this embodiment may include external electrodes 74 and 75 as third terminals in addition to the first external electrode 21 and the second external electrode 22.

[0087] Furthermore, the multilayer ceramic capacitor 1 of this embodiment may have a length in the first direction 101 that is equal to a length in the second direction 102. FIG. 9 is a diagram showing a so-called square-type multilayer ceramic capacitor 1. As shown in FIG. 9, the multilayer ceramic capacitor 1 may have a length 114 in the first direction 101 that is equal to a length 116 in the second direction 102. A multilayer ceramic capacitor 1 in which the length 114 in the first direction 101 and the length 116 in the second direction 102 are equal is called a square-type multilayer ceramic capacitor 1.

[0088] In the square-type multilayer ceramic capacitor 1, the external electrodes 20 may be arranged at the four corners of a plane parallel to the first direction 101 and the second direction 102. In the example shown in Figure 9, external electrodes 77, 78, 79, and 80 are arranged as the external electrodes 20.

[0089] Although the present invention has been described above as an embodiment, it is not limited to the above-described embodiment, and various changes, modifications, and combinations are possible.

[0090] <1> A multilayer ceramic capacitor comprising: a laminate having a first surface and a second surface opposed to each other in a stacking direction, a third surface and a fourth surface opposed to each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface opposed to each other in a second direction perpendicular to the stacking direction and the first direction; a first external electrode arranged on the third surface of the laminate; and a second external electrode arranged on the fourth surface of the laminate; wherein the laminate comprises: an inner layer portion; and two outer layer portions arranged to sandwich the inner layer portion in the stacking direction; wherein the outer layer portions comprise outer dielectric layers, and the outer dielectric layers contain fibers.

[0091] <2> The multilayer ceramic capacitor according to <1>, wherein the fibers are not exposed on a surface of the laminate.

[0092] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the fibers have a thickness of 1 nm or more and 1000 nm or less.

[0093] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the content of the fibers is 1.0 wt % or more and 30.0 wt % or less.

[0094] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the number of intersections between the fibers is 5 or more in a 2.5 μm×2.5 μm area in a cross section parallel to the stacking direction and the first direction.

[0095] <6> The multilayer ceramic capacitor according to any one of <1> to <5>, wherein the dimension in the lamination direction is 80 μm or less.

[0096] REFERENCE SIGNS LIST 1 Multilayer ceramic capacitor 2 Laminate 11 First surface 12 Second surface 13 Third surface 14 Fourth surface 15 Fifth surface 16 Sixth surface 20 External electrode 21 First external electrode 22 Second external electrode 24 Base electrode layer 26 Plating layer 27 Nickel plating layer 28 Tin plating layer 30 Internal electrode 31 First internal electrode 32 Second internal electrode 34 Internal electrode end 35 Stacking direction surface 37 Facing region 38 Lead-out region 40 Dielectric layer 41 Outer layer dielectric layer 43 Inner layer dielectric layer 45 First region 46 Second region 50 Outer layer portion 51 First surface side outer layer portion 52 Second surface side outer layer portion 53 Inner layer portion 55 First width direction region 56 Second width direction region 60 Fiber 100 Stacking direction 101 First direction 102 Second direction

Claims

1. A multilayer ceramic capacitor comprising: a laminate having a first surface and a second surface opposed to each other in a lamination direction, a third surface and a fourth surface opposed to each other in a first direction perpendicular to the lamination direction, and a fifth surface and a sixth surface opposed to each other in a second direction perpendicular to the lamination direction and the first direction; a first external electrode arranged on the third surface of the laminate; and a second external electrode arranged on the fourth surface of the laminate, wherein the laminate comprises: an inner layer portion; and two outer layer portions arranged so as to sandwich the inner layer portion in the lamination direction, wherein the outer layer portions comprise outer dielectric layers, and the outer dielectric layers contain fibers.

2. The multilayer ceramic capacitor according to claim 1, wherein the fibers are not exposed on the surface of the laminate.

3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the fiber has a thickness of 1 nm or more and 1000 nm or less.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the fiber content is 1.0 wt % or more and 30.0 wt % or less.

5. A multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the number of intersections between the fibers is 5 or more in a 2.5 μm × 2.5 μm area in a cross section parallel to the stacking direction and the first direction.

6. The multilayer ceramic capacitor according to claim 1, wherein the dimension in the lamination direction is 80 μm or less.

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