Laminate and method for producing laminate

Abstract

Disclosed are a laminate and a method for producing a laminate, the method including: a step A in which a first substrate and a second substrate that is disposed on one surface of the first substrate in a thickness direction are bonded to each other, with an adhesive layer being interposed therebetween, so as to obtain a first laminate; a step B in which a third substrate is disposed on the other surface of the first substrate in the thickness direction, the other surface not having the second substrate thereon, so as to obtain a second laminate; and a step C in which the second substrate is removed from the second laminate so as to obtain a third laminate. The thickness of the adhesive layer is 10 μm or less, and the bonding strength between the first substrate and the second substrate in the first laminate that is obtained in the step A is 0.01 J / m2 or more.

Description

Method for manufacturing laminate and laminate

[0001] The present invention relates to a method for manufacturing a laminate and a laminate.

[0002] As electronic devices become smaller, lighter, and more powerful, there is a demand for higher integration of semiconductor chips and the like. However, it is difficult to fully meet this demand through circuit miniaturization alone. Therefore, in recent years, a method has been proposed for achieving higher integration by vertically stacking multiple semiconductor substrates (wafers), semiconductor chips, and the like to form a multilayer, three-dimensional structure. Proposed methods for stacking semiconductor substrates (wafers), semiconductor chips, and the like (hereinafter sometimes referred to as "semiconductor substrates, etc.") include methods for directly bonding substrates together and methods using adhesives (see, for example, Patent Documents 1 to 3 and Non-Patent Documents 1 to 4).

[0003] Patent Document 1: Japanese Patent Application Laid-Open No. 4-132258 Patent Document 2: Japanese Patent Application Laid-Open No. 2010-226060 Patent Document 3: Japanese Patent Application Laid-Open No. 2016-47895

[0004] Non-patent document 1: A. Bayrashev, B. Ziaie, Sensors and Actuators A 103 (2003) 16-22. Non-patent document 2: Q. Y. Tong, U. M. Gosele, Advanced Material 11, No. 17 (1999) 1409-1425. Non-patent document 3: Z. Song, Z. Tan, L. Liu, Z. Wang, Microsystem Technology, 21 (2015) 1633-1641. Non-patent document 4: J. J. McMahon, E. Chan, S. H. Lee, R. J. Gutmann, and J. -Q. Lu, Proceedings - Electronic Components and Technology Conference ・ June 2008 871-878

[0005] Direct bonding of substrates has the problem that voids are likely to occur due to minute irregularities caused by wiring and the like on the surfaces of the substrates, particles, and the like.

[0006] On the other hand, when bonding substrates using an adhesive, the adhesive is applied to the surfaces of the substrates, and then dried to a semi-cured state before the substrates are bonded together, which can easily cause misalignment of the substrates.

[0007] An object of one embodiment of the present disclosure is to provide a method for manufacturing a laminate that can manufacture a laminate in which misalignment is suppressed, and a laminate.

[0008] The present disclosure includes the following embodiments.

[0009] <1> A method for manufacturing a laminate comprising: a step A of bonding a first substrate and a second substrate disposed on one surface of the first substrate in a thickness direction via an adhesive layer; a step B of arranging a third substrate on the other surface of the first substrate in the thickness direction, the other surface not including the second substrate, to obtain a second laminate; and a step C of removing the second substrate from the second laminate to obtain a third laminate, wherein the thickness of the adhesive layer is 10 μm or less, and the bonding strength between the first substrate and the second substrate in the first laminate obtained in the step A is 0.01 J / m ２ This is the method for producing a laminate.

[0010] <2> The method for producing a laminate according to <1>, wherein a silanol group is present on the surface of the adhesive layer. <3> The method for producing a laminate according to <1> or <2>, wherein the adhesive layer contains at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure.

[0011] <4> The method for producing a laminate according to any one of <1> to <3>, wherein in step A, the first substrate and the second substrate are bonded together under conditions where the cure rate of the adhesive layer is 70% or less and the temperature is 150° C. or less. <5> The method for producing a laminate according to any one of <1> to <4>, wherein in step A, the first substrate and the second substrate are bonded together via the adhesive layer at a pressure of 0.5 MPa or less.

[0012] <6> The method for producing a laminate according to any one of <1> to <5>, further comprising a step D of performing plasma treatment on a surface of the adhesive layer facing the first substrate or a surface of the adhesive layer facing the second substrate prior to the step A. <7 ... ２ <6> A method for producing a laminate according to any one of <1> to <6>,

[0013] <8> The method for producing a laminate according to any one of <1> to <7>, wherein the first substrate is a semiconductor chip. <9> The method for producing a laminate according to any one of <1> to <7>, wherein the third substrate is a semiconductor substrate. <10> The method for producing a laminate according to <9>, wherein the step B further comprises a step of performing a heat treatment at 400°C or less after disposing the third substrate. <11> The method for producing a laminate according to any one of <1> to <7>, wherein the third substrate is a redistribution layer. <12> The method for producing a laminate according to <11>, wherein the step B further comprises a step of performing a heat treatment at a temperature above 150°C and 300°C or less after disposing the third substrate. <13> The method for producing a laminate according to any one of <1> to <12>, wherein the first substrate and the third substrate are electrically connected. <14> The method for producing a laminate according to any one of <1> to <7>, wherein the third substrate is a resin substrate. <15> The method for producing a laminate according to <14>, wherein a silicon chip is disposed in the resin substrate. <16> The method for producing a laminate according to any one of <1> to <8>, wherein two or more of the first substrates are bonded to one of the second substrates in the step A. <17> The method for producing a laminate according to any one of <1> to <16>, wherein in the second laminate formed in the step B, the occurrence of voids relative to the area of ​​the first substrate is 30% or less.

[0014] <18> A laminate comprising a first substrate, a second substrate disposed on one surface of the first substrate in the thickness direction, a third substrate disposed on the other surface of the first substrate that does not have the second substrate, and an adhesive layer interposed between the first substrate and the second substrate, wherein the thickness of the adhesive layer is 10 μm or less, and the second substrate is removed and used. <19> The laminate according to <18>, wherein a silanol group is present on the surface of the adhesive layer. <20> The laminate according to <18> or <19>, wherein the adhesive layer contains at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure.

[0015] According to an embodiment of the present disclosure, it is possible to provide a method for manufacturing a laminate capable of manufacturing a laminate with suppressed alignment deviation, and a laminate.

[0016] It is a schematic diagram showing an example of step A of the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing an example of the subsequent stage of step A of the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing an example of step B of the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing an example of a third laminate obtained by the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing another example of step A of the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing an example of filling an organic resin into the voids of the first substrate of the laminate shown in FIG. 4B. It is a schematic diagram showing an example of a state in which the organic resin of the laminate shown in FIG. 4C is polished and the first substrate is exposed. It is a schematic diagram showing another example of a second laminate obtained by the method for manufacturing a laminate of the present disclosure. It is a schematic diagram showing another example of a third laminate obtained by removing the second substrate and the adhesive layer from the second laminate shown in FIG. 5. It is a schematic diagram showing an example of a second laminate having a release layer between the second substrate and the adhesive layer. It is a schematic diagram showing an example of a second laminate for obtaining a third laminate in a state where an electrode is disposed in a concave portion of a thin first substrate.

[0017] In the present disclosure, a numerical range expressed using "to" means a range that includes the numerical values ​​written before and after "to" as the upper and lower limits. In numerical ranges described in stages in the present disclosure, the upper or lower limit value described in one numerical range may be replaced with the upper or lower limit value of another numerical range described in stages. Furthermore, in numerical ranges described in the present disclosure, the upper or lower limit value of that numerical range may be replaced with a value shown in the examples. In the present disclosure, a "substrate laminate" refers to a laminate having a structure in which two substrates are bonded via a bonding layer formed by the method for manufacturing a substrate laminate of the present disclosure. Note that the substrate laminate may have three or more substrates, and may have a structure in which two of the three or more substrates are bonded via a bonding layer formed by the method for manufacturing a substrate laminate of the present disclosure.

[0018] In the drawings, components designated by the same reference numerals are the same components. The drawings are schematic views, and the dimensional ratios in the drawings do not necessarily represent the actual dimensional ratios.

[0019] [Method of Manufacturing Substrate Laminate] A method of manufacturing a laminate according to the present disclosure (hereinafter also referred to as the manufacturing method according to the present disclosure) includes a step A of bonding a first substrate and a second substrate disposed on one surface of the first substrate in the thickness direction via an adhesive layer, a step B of arranging a third substrate on the other surface of the first substrate in the thickness direction, the other side not having the second substrate, to obtain a second laminate, and a step C of removing the second substrate from the second laminate to obtain a third laminate, wherein the thickness of the adhesive layer is 10 μm or less, and the bonding strength between the first substrate and the second substrate in the first laminate obtained in the step A is 0.01 J / m ２ The method for measuring the bonding strength will be described later.

[0020] In the method for producing a laminate according to the present disclosure, when laminating a first substrate and a second substrate serving as a temporary fixing substrate via an adhesive layer, by setting the thickness of the adhesive layer to 10 μm or less, even when laminating at a temperature condition of, for example, about room temperature, displacement when laminating the first substrate on the second substrate serving as a temporary fixing substrate is suppressed, and a bonding strength sufficient for temporary fixing is 0.01 J / m２ The above is the result. Thereafter, in step B, a third substrate is disposed on the other surface of the first substrate in the thickness direction, on the side not having the second substrate, to obtain a second laminate. For example, even when the third substrate is pressure-bonded, displacement of the first substrate fixed by the adhesive layer is suppressed. Thereafter, in step C, the second substrate, which is a temporary fixing substrate, is peeled off, thereby obtaining a third laminate in which the first substrate and the third substrate are formed in a state in which displacement of the first substrate is suppressed.

[0021] <Step A> Step A in the method for producing a laminate according to the present disclosure is a step of bonding a first substrate and a second substrate disposed on one surface of the first substrate in the thickness direction via an adhesive layer.

[0022] (First Substrate and Second Substrate) The materials of the first substrate and the second substrate are not particularly limited and may be any commonly used material. The materials of the first substrate and the second substrate may be the same or different.

[0023] (Second Substrate) In the manufacturing method of the present disclosure, the second substrate is used as a temporary fixing substrate, and is peeled off after the formation of the third laminate. Therefore, there are no particular limitations on the second substrate as long as it has a smooth surface that can stably hold the first substrate. For example, a Si substrate, borosilicate glass (Pyrex (registered trademark)), quartz glass (SiO ２ Examples of the substrate include glass substrates such as aluminum (Al), titanium (Ti), iron (Fe), copper (Cu), and silver (Ag), and resin substrates such as polydimethylsiloxane (PDMS), epoxy resin, phenol resin, polyimide, benzocyclobutene resin, and polybenzoxazole.

[0024] The second substrate may be made of, for example, semiconductors such as Si, InP, GaN, GaAs, InGaAs, InGaAlAs, and SiC; oxides, carbides, and nitrides such as boron silicate glass (Pyrex (registered trademark)) and quartz glass (SiO ２ ) or other glass substrates, ZrO ２ , Si ３ N ４and metal substrates such as Al, Ti, Fe, Cu, Ag, Au, Pt, Pd, Ta, and Nb. From the viewpoints of smoothness, dimensional stability, and the like, glass substrates, resin substrates, metal substrates, and the like are preferred.

[0025] The second substrate may also be made of resin such as polydimethylsiloxane (PDMS), epoxy resin, phenol resin, polyimide, benzocyclobutene resin, or polybenzoxazole.

[0026] (First Substrate) On the other hand, since the first substrate is a substrate that constitutes the substrate laminate, the first substrate preferably contains at least one element selected from the group consisting of Si, Al, Ti, Zr, Hf, Fe, Ni, Cu, Ag, Au, Ga, Ge, Sn, Pd, As, Pt, Mg, In, Ta, and Nb. Examples of materials for the first substrate include semiconductors: Si, InP, GaN, GaAs, InGaAs, InGaAlAs, SiC, oxides, carbides, and nitrides: borosilicate glass (Pyrex (registered trademark)), quartz glass (SiO ２ ), sapphire, ZrO ２ , Si ３ N ４ , AlN, piezoelectric material, dielectric material: BaTiO ３ , LiNbO ３ , SrTiO ３ , diamond, metals: Al, Ti, Fe, Cu, Ag, Au, Pt, Pd, Ta, Nb, etc.

[0027] The first substrate may be made of a resin such as polydimethylsiloxane (PDMS), epoxy resin, phenol resin, polyimide, benzocyclobutene resin, or polybenzoxazole.

[0028] The first substrate may have a multilayer structure, for example, a structure in which an inorganic layer such as silicon oxide, silicon nitride, or SiCN (silicon carbonitride) is formed on the surface of a silicon substrate, a structure in which an organic layer such as polyimide resin, polybenzoxazole resin, epoxy resin, or cyclotene (Dow, Chem) is formed on the surface of a silicon substrate, or a structure in which a composite of an inorganic material and an organic material is formed on a silicon substrate.

[0029] The main applications of each material are as follows: Si: semiconductor memory, LSI stacking, CMOS image sensors, MEMS encapsulation, optical devices, LEDs, etc.; SiO ２ are used in semiconductor memories, LSI stacks, MEMS sealing, microchannels, CMOS image sensors, optical devices, LEDs, etc.; PDMS is used in microchannels; InGaAlAs, InGaAs, and InP are used in optical devices; and InGaAlAs, GaAs, and GaN are used in LEDs, etc.

[0030] (Adhesive Layer) In step A, the first substrate and the second substrate disposed on one surface of the first substrate in the thickness direction are bonded via an adhesive layer. The adhesive layer has a thickness of 10 μm or less, which can prevent misalignment when the second substrate is disposed. There are no particular limitations on the material used for the adhesive layer; however, from the viewpoint of a thin coating film and stable adhesion between the first substrate and the second substrate, it is preferable that silanol groups be present on the surface of the adhesive layer. From the viewpoint of bonding stability, it is preferable that the adhesive layer contains at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure. That is, the adhesive layer is preferably formed from a material containing at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure, and preferably contains a resin material containing at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure.

[0031] Examples of resin materials include polyimide, polyamide, polyamideimide, maleimide resin, parylene, polyarylene ether, polybenzoxazole, benzocyclobutene resin, epoxy resin, and resin containing a siloxane bond.

[0032] Examples of resins containing siloxane bonds include polybenzoxazole, divinylsiloxane benzocyclobutene polymer, siloxane imide polymer, and epoxy-modified siloxane polymer. Divinylsiloxane benzocyclobutene polymer, siloxane imide polymer, and epoxy-modified siloxane polymer having a silanol group are preferred, and siloxane imide polymer is more preferred.

[0033] The resin containing a siloxane bond may contain a structure represented by the following formulas (1) to (3).

[0034]

[0035] In a structure having an Si—O bond (siloxane bond), the group bonded to Si may be substituted with an alkylene group, a phenylene group, etc. The structure of the substituent such as an alkylene group or a phenylene group bonded to Si is, for example, (—O—) ｘ (R １ ) ｙ Si-(R ２ )-Si(R １ ) ｙ (-O-) ｘ and the like (R １ represents a methyl group, etc., and R ２ represents an alkylene group, a phenylene group, or the like; x and y each independently represent an integer of 0 or more, and x+y is 3.

[0036] Examples of materials for forming Si—O bonds include compounds represented by the following formulas (4) and (5). The structures represented by formulas (1) and (2) can be produced by, for example, heating and reacting the compounds represented by formulas (4) and (5).

[0037]

[0038] The adhesive layer can be formed, for example, by applying an adhesive layer-forming composition containing a resin and a solvent to the second substrate and drying it. Alternatively, an adhesive layer formed on a temporary support may be applied to the second substrate by transfer. When forming the adhesive layer-forming composition on the second substrate, the adhesive layer-forming composition can be applied to the second substrate by, for example, spin coating, slit coating, spray coating, screen printing, squeegeeing, inkjet printing, or the like.

[0039] The thickness of the adhesive layer after formation is 10 μm or less, preferably 8 μm or less, more preferably 5 μm or less, and even more preferably 3 μm or less. The lower limit of the thickness of the adhesive layer is not particularly limited as long as it can stably temporarily fix the first substrate, and can be, for example, 0.1 μm or more. From the viewpoint of stable temporary fixation, it is preferably 0.3 μm or more, more preferably 0.5 μm or more. For example, the thickness of the adhesive layer may be 0.1 μm or more and 10 μm or less, 0.3 μm or more and 8 μm or less, 0.5 μm or more and 5 μm or less, or 0.5 μm or more and 3 μm or less.

[0040] Step A of the present disclosure will be described with reference to the drawings. FIG. 1A is a schematic diagram showing an example of forming an adhesive layer on a second substrate in step A of laminating a first substrate and a second substrate to obtain a first laminate. First, an adhesive layer 14 is formed on one surface of a second substrate 12. The thickness of the adhesive layer 14 is 10 μm or less. As shown in FIG. 1A, the surface of the adhesive layer opposite the side having the second substrate 12 may be subjected to a plasma treatment as shown in FIG. 1A (the drawing shows the plasma treatment schematically) or a surface activation treatment such as a chemical treatment in order to improve adhesion to the first substrate 16.

[0041] 1B is a schematic diagram showing an example of an embodiment in which a first substrate 16 is formed on a second substrate having an adhesive layer 14 formed thereon, via the adhesive layer 14. FIG. 1B shows an embodiment in which a first substrate 16 is bonded to the surface of the adhesive layer 14, which has been subjected to a surface activation treatment as desired, opposite the side on which the second substrate is formed, to obtain a first laminate 10. FIG. 1B shows an embodiment in which the first substrate 16 is a semiconductor chip having a smaller area than the second substrate 12, but the first substrate is not limited to a semiconductor chip. Bonding of the first substrate can be performed at room temperature.

[0042] As shown in FIG. 1B, in step A, two or more first substrates may be bonded to one second substrate.

[0043] If the adhesive layer is thick, problems such as unevenness on the adhesive layer surface or the first substrate 16 sinking or tilting into the thick adhesive layer are likely to occur when adhering the first substrate 16. However, in process A, by making the thickness of the adhesive layer 10 μm or less, misalignment of the first substrate is suppressed, and the first laminate 10 can be obtained with high efficiency.

[0044] In step A, the bonding of the first substrate and the second substrate is preferably performed under conditions where the curing rate of the adhesive layer is 70% or more and 100% or less and the temperature is 150°C or less. That is, since the adhesive layer is in an uncured state, adhesion is improved when the first substrate is placed, and even if the bonding of the first substrate and the second substrate is performed at a low temperature, misalignment of the first substrate is more effectively suppressed. Therefore, the temperature during bonding can be 0°C or more and 150°C or less, or may be 0°C or more and 100°C or less, or 0°C or more and 50°C or less, or bonding can also be performed at room temperature (e.g., 25°C).

[0045] In step A, the first substrate and the second substrate are preferably bonded via an adhesive layer at a pressure of 0.5 MPa or less. When the adhesive layer is 10 μm or less, there is no concern about sinking in the adhesive layer when placing the first substrate on the adhesive layer on the second substrate, and misalignment is unlikely to occur. Therefore, the bonding can be performed at a low pressure, specifically, a low pressure of 0 MPa or more and 0.5 MPa or less, and may be 0 MPa or more and 0.3 MPa or less.

[0046] By setting the thickness of the adhesive layer within the above range, the adhesion between the adhesive layer and the first substrate is improved in step A, and even if the bonding between the first substrate and the second substrate is performed at a low temperature or a low pressure, the bonding strength between the first substrate and the second substrate in the first laminate obtained in step A is 0.01 J / m ２ I believe that the above will be achieved.

[0047] 1A, the method may further include a step of performing plasma treatment on the surface of the adhesive layer facing the first substrate or the surface of the adhesive layer facing the second substrate prior to step A. By performing plasma treatment, the surface of the adhesive layer is activated, and the adhesion between the adhesive layer and the first substrate or the second substrate is further improved even under low temperature and low pressure conditions, enabling more stable adhesion between the first substrate and the second substrate in the first laminate. As described above, the activation treatment of the surface of the adhesive layer may be performed by chemical treatment.

[0048] <Step B> Step B is a step of obtaining a second laminate by placing a third substrate on the other side of the first substrate obtained in step A in the thickness direction, the side not including the second substrate. FIG. 2 is a schematic diagram showing an example of a second laminate 20 after step B, in which a third substrate 18 is placed on the first substrate 16 of the first laminate 10. In the manufacturing method of the present disclosure, from the viewpoint of stable adhesion of the first substrate, it is preferable that the occurrence of voids relative to the area of ​​the first substrate in the second laminate obtained through step B is 30% or less. Note that the occurrence of voids can be calculated by placing the second laminate on an infrared lamp, observing the infrared light transmitted through the substrate laminate from above the laminate with an infrared camera, and measuring the total area of ​​voids relative to the size of the substrate laminate.

[0049] <Step C> Step C is a step of removing the second substrate from the second laminate to obtain a third laminate. Figure 3 is a schematic diagram showing an example of a third laminate 22 having a first substrate 16 and a third substrate 18 obtained by removing the second substrate 12 and the adhesive layer 14 from the second laminate 20.

[0050] The second substrate is a temporary fixing substrate, and is peeled off to form the target third laminate. Since the second substrate is a temporary fixing substrate that is removed in step C, the bonding strength between the first substrate and the second substrate in the first laminate is 20 J / m ２ It is preferable that:

[0051] There are no particular limitations on the method for removing the second substrate in step C. Examples of the second substrate include a method in which the entire substrate itself is removed by grinding to obtain a third substrate, and a method in which, as described below, a release layer is provided on the surface of the second substrate facing the adjacent adhesive layer, and the second substrate is removed at the interface between the release layer and the adhesive layer using the release layer to expose the first substrate and obtain a third substrate.

[0052] The first substrate may be a semiconductor chip 16. As shown in Figures 2 and 3, the semiconductor chip 16 as the first substrate is fixed to the second substrate 12 via an adhesive layer 14, and then the adhesive layer 14 is removed from the second substrate 12 to obtain the desired third laminate 22, i.e., the multi-layer substrate laminate.

[0053] Next, an example of a modification of step B will be described. As shown in FIG. 4A, a first laminate is manufactured in the same manner as in step A. The laminate shown in FIG. 4A has the same configuration as the laminate shown in FIG. 1B. As shown in FIGS. 4B and 4C, the semiconductor chips 16, which are the first substrates, may have gaps between the semiconductor chips 16 filled with a gap fill material 24 made of an organic resin or an inorganic material. When the gap fill material is an organic resin, the resin preferably includes at least one selected from the group consisting of polyimide, polyamide, polyamideimide, maleimide resin, parylene, polyarylene ether polyimide, polybenzoxazole, benzocyclobutene resin, epoxy resin, and resins having a siloxane bond.

[0054] By forming organic resin 24 on the side of the second substrate 12 where multiple first substrates 16, which are arranged on the second substrate 12 via an adhesive layer 14, are temporarily fixed, a portion of the organic resin 24 is filled between the multiple first substrates 16, and the upper surfaces of the multiple first substrates 16 are covered with a portion of the remaining organic resin 24.

[0055] Next, as shown in Figure 4C, the organic resin 24 on the upper surfaces of the plurality of first substrates 16 is removed, exposing the upper surfaces of the plurality of first substrates 16. This leaves the organic resin 24 that filled between the plurality of first substrates 16. The remaining organic resin 24 becomes the organic gap fill material 24 in Figure 4C, and a second laminate 26 is obtained. The organic resin 24, which serves as a filler, can be removed by a conventional method, such as polishing by mechanical polishing, chemical polishing, chemical mechanical polishing, or the like, removal by laser peeling or the like, chemical removal, thermal sliding, or mechanical peeling, as described above.

[0056] When the gap fill material is an inorganic material, it can be filled by a vapor deposition method (i.e., a dry process) such as CVD (Chemical Vapor Deposition).

[0057] The third substrate laminated in step B may be a semiconductor substrate. In the embodiment shown in Fig. 5, a semiconductor substrate 28 is laminated as the third substrate on the second laminate 26 shown in Fig. 4C. Thereafter, the second substrate 12, which is a temporary fixing substrate, and the adhesive layer 14 are removed, and a third laminate 30 is obtained as a laminate of the first substrate 16, which is a semiconductor chip filled with an organic material, and the semiconductor substrate 28, as shown in Fig. 6.

[0058] Step B preferably further includes a step of performing heat treatment at 150° C. or less after disposing the third substrate. In particular, it preferably further includes a step of performing heat treatment at a temperature exceeding 150° C. and 250° C. or less. Heating under these conditions makes the bond between the first substrate and the third substrate stronger and more stable.

[0059] The third substrate is not particularly limited, and in addition to the above, the third substrate may be a substrate made of a redistribution layer or a resin substrate. Furthermore, the third substrate may be a substrate in which a silicon chip is disposed within the resin substrate. The substrate made of the redistribution layer includes at least an insulating layer and wiring formed in the insulating layer. In step B, when a substrate made of a redistribution layer is used as the third substrate, the wiring in the redistribution layer of the third substrate and the first substrate may be electrically connected. For specific examples of redistribution layers, see the description of element 310 chip-level back-end of life described in U.S. Patent Publication No. 2022 / 0013504.

[0060] The second substrate 12, which serves as a temporary fixing substrate, is removed (i.e., peeled) in step C. Therefore, the surface of the second substrate facing the adhesive layer 14 may have a surface treatment layer, a release layer 32, to facilitate peeling from the first substrate 16. Examples of the release layer include a metal layer such as Cu or Ti, and an easily removable sacrificial material layer. Figure 7 is a schematic diagram showing an example of a second laminate obtained using a first laminate having a release layer 32 between the second substrate 12 and the adhesive layer 14. A third laminate can be obtained in the same manner as in Figures 4B and 4C, except that the first laminate 34 shown in Figure 7 is used instead of the second laminate shown in Figure 4A obtained in step A. 7, organic resin 24 is formed on the first substrate 16, and for a second laminate 34 having a plurality of first substrates 16, the first substrates are coated with organic resin, and the organic resin on the upper surfaces of the plurality of first substrates 16 is removed to expose the upper surfaces of the plurality of first substrates 16, as shown in FIG. 4B. Thereafter, in step B, a semiconductor substrate 28 is laminated as a third substrate to form a third laminate.

[0061] In step C, when peeling the second substrate 12 from the third laminate, the second laminate 34 shown in Figure 7 has a peeling layer 32, which makes it easy to peel the second substrate 12, and is preferable in terms of work efficiency.

[0062] Another example of forming the third substrate is shown in FIG. 8 . FIG. 8 is a schematic diagram illustrating an example of a second laminate in which a semiconductor substrate (first substrate) is formed on a laminate of a second substrate 12 and an adhesive layer 14, and then the surface of the semiconductor substrate opposite the second substrate 12 is thinned to form a thinned first substrate 16A. A recess is then formed on the surface of the substrate 16A by laser irradiation or the like, and an electrode 36 is formed in the recess. In this way, a laminate having a fine electrode (corresponding to the third substrate) 36 on the thinned first substrate 16A is obtained. Then, the second substrate 12 and the adhesive layer 14 are peeled off to obtain a multilayer substrate laminate corresponding to an extremely thin third laminate 38. Examples of materials for the electrode include copper, solder, tin, gold, silver, and aluminum. Methods for forming the electrode include electrolytic plating, electroless plating, sputtering, and inkjet printing.

[0063] Since the thinning of the first substrate, the formation of recesses, and the formation of fine electrodes are carried out while the first substrate is fixed to the second substrate 12, which is a temporary fixing substrate, via the adhesive layer 14, a stable third laminate can be obtained.

[0064] The thickness of the first and third semiconductor substrates is preferably 0.5 μm to 1 mm, more preferably 1 μm to 900 μm, and even more preferably 2 μm to 900 μm.

[0065] The shapes of the first substrate and the third substrate are not particularly limited. For example, when the first substrate and the second substrate are silicon substrates, they may be silicon substrates on which an interlayer insulating layer (low-k film) is formed, and the silicon substrates may have fine grooves (recesses), fine through-holes, etc. formed therein.

[0066] The surface roughness (Ra) of the first substrate and the third substrate is preferably 1.2 nm or less, independently. When the first substrate and the second substrate are bonded, the surface roughness (Ra) of the substrate to which the bonding material is not applied is preferably 1.2 nm or less, because this facilitates the temporary fixation described below at low temperatures. When a bonding material is applied to only one of the substrates and not the other, the surface roughness of the substrate to which the bonding material is not applied is more preferably 1.2 nm or less. The surface roughness of the substrate can be evaluated by morphological observation using a scanning probe microscope (SPM). Specifically, the surface roughness can be determined by measuring a 3 μm × 3 μm square area using an SPM SPA400 (manufactured by Hitachi High-Technologies Corporation) in dynamic force microscope mode.

[0067] Furthermore, the water droplet contact angles of the surfaces of the first substrate and the third substrate are preferably each independently 90° or less, and when a bonding material is applied to only one of the substrates and no bonding material is applied to the other, the water droplet contact angle of the surface of the substrate to which the bonding material is not applied is more preferably 90° or less, since this facilitates temporary fixation at low temperatures when bonding the first substrate and the second substrate together. Specifically, the water droplet contact angle is measured by measuring the static contact angle of water using a solid-liquid interface analysis system (DropMaster 500 image processing type, manufactured by Kyowa Interface Science Co., Ltd.) under conditions of 23°C and 50% humidity.

[0068] <Removal of Adhesive Layer on Electrode> In the manufacturing method of the laminate of the present disclosure, methods for removing the adhesive layer include fly-cutting, chemical mechanical polishing (CMP), plasma dry etching, and the like. As the removal method, one method may be used alone, or two or more methods may be used in combination. For example, in the fly-cutting method, a surface planer (DFS8910 (manufactured by Disco Corporation)) or the like may be used. When CMP is used, the slurry may be, for example, a slurry containing silica or alumina, which is generally used for polishing resins, or a slurry containing hydrogen peroxide and silica, which is used for polishing metals. When plasma dry etching is used, fluorocarbon plasma, oxygen plasma, or the like may be used.

[0069] <Formation of Adhesive Layer> The adhesive layer in the present disclosure can be formed by curing an adhesive layer-forming material applied to the surface of the second substrate. For example, the adhesive layer is formed by curing the adhesive layer-forming material applied to the surface of the second substrate by heating or the like. In this case, if the adhesive layer-forming material contains a thermosetting compound, the bonding material is cured by heating the bonding material at a temperature equal to or higher than the curing temperature.

[0070] The adhesive layer preferably has a cure rate of 70% or more, from the viewpoints of being removed after the third laminate is formed and being able to stably hold the first substrate at room temperature.

[0071] The curing rate of the adhesive layer may be determined by, for example, applying the adhesive layer-forming material before application to the substrate to a second substrate, measuring the peak intensity of specific bonds and structures (the sum of the peak intensities when there are multiple peaks such as imide, amide, etc.) in the cured adhesive layer using FT-IR (Fourier transform infrared spectroscopy), and determining the rate of increase or decrease in the peak intensity. Note that when there are band-like peaks that are difficult to separate, such as siloxane bonds, the maximum peak intensity may be used.

[0072] Specifically, when specific bonds and structures are generated by the curing reaction, the increase rate of the peak intensity may be calculated using the following formula, and the calculated value may be used as the curing rate of the bonding layer. Peak intensity increase rate (curing rate of bonding layer) = [(peak intensity of specific bonds and structures of the bonding layer before the third step) / (peak intensity of specific bonds and structures of the bonding layer after heating at 300°C for 1 hour in the third step)] × 100. Note that background signals may be removed by a conventional method. Furthermore, FT-IR measurement may be performed by a transmission method or a reflection method, as necessary.

[0073] In the above-mentioned rate of increase in peak intensity, when there are multiple bonds and structures that cause an increase in peak intensity, the peak intensity may be interpreted as the total intensity of the multiple peak intensities.

[0074] In order to more effectively suppress misalignment, the curing rate of the adhesive layer is preferably 70% or more, more preferably 80% or more, even more preferably 85% or more, particularly preferably 90% or more, and even more preferably 93% or more. The curing rate of the bonding layer may be 100%, 99% or less, 95% or less, or 90% or less. The curing rate of the adhesive layer here refers to the curing rate of the adhesive layer after the step of forming the adhesive layer and before the step of bonding the first substrate.

[0075] In step B, during this bonding, it is preferable to heat the laminate at 100°C to 500°C to harden it. The aforementioned temperature refers to the surface temperature of the bonding material applied to the surface. In particular, when the third substrate is a semiconductor substrate, the heating temperature is preferably 100°C to 400°C, more preferably 150°C to 250°C. Furthermore, when the third substrate is a redistribution layer, the heating temperature is preferably greater than 150°C and less than 300°C, more preferably 180°C or more and less than 270°C. By heating the bonding material, the solvent in the solution containing the bonding material is removed. Furthermore, the components in the bonding material react to obtain a cured product, and a bonding layer containing the cured product is formed.

[0076] The pressure under which the heating is carried out is not particularly limited, and is preferably an absolute pressure above atmospheric pressure of 17 Pa or less. The absolute pressure is more preferably 1,000 Pa or more but not more than atmospheric pressure, even more preferably 5,000 Pa or more but not more than atmospheric pressure, and particularly preferably 10,000 Pa or more but not more than atmospheric pressure.

[0077] Heating in this bonding can be performed by a conventional method using a furnace or a hot plate. Examples of furnaces that can be used include SPX-1120 manufactured by APEX Corporation and VF-1000LP manufactured by Koyo Thermo Systems Co., Ltd. The heating may be performed in air or in an inert gas atmosphere (nitrogen gas, argon gas, helium gas, etc.).

[0078] The heating time is not particularly limited, and is, for example, 3 hours or less, preferably 1 hour or less. There is no particular lower limit to the heating time, and it can be, for example, 5 minutes.

[0079] In the laminate obtained by the laminate manufacturing method of the present disclosure, the first substrate and the third substrate may be electrically connected. There are no particular limitations on the method for electrically connecting the first substrate and the third substrate. Examples include a method for electrically connecting the first substrate and the third substrate using a conductive material such as a solder bump, a method for directly bonding the flat surfaces of the electrodes and insulating films of the first substrate 16 and the third substrate 28 to electrically connect them (i.e., a hybrid bonding method), and a method for bonding the first substrate and the third substrate and then forming a through-substrate via in at least one of the first substrate and the third substrate to electrically connect them. The through-substrate via has a copper-plated through-hole inside, and the first substrate and the third substrate can be electrically connected through the via. The first substrate and the third substrate can each have a through-substrate via already present.

[0080] Furthermore, the semiconductor chip, semiconductor substrate, rewiring layer, and resin substrate serving as the third substrate may have an "electrode penetrating the insulating layer" for electrical connection. An "electrode penetrating the insulating layer" refers to an electrode disposed in an insulating substrate, such as a resin substrate, and exposed from both sides of the substrate. The electrode may penetrate the third substrate, such as a resin substrate, linearly or in a curved (e.g., serpentine) manner. The electrode may be a single component, such as a metal component, or a composite component consisting of multiple components. The first substrate and the third substrate can also be electrically connected by having a penetrating electrode in at least one of the first substrate and the third substrate.

[0081] (Examples of Layer Structure of Substrate Laminate) Examples of layer structures of substrate laminates for various applications are shown below. For MEMS packaging: Si / bonding layer / Si, SiO ２ / Joining layer / Si, SiO ２ / Joining layer / SiO ２, Cu / bonding layer / Cu, for microchannel; PDMS / bonding layer / PDMS, PDMS / bonding layer / SiO ２ , for CMOS image sensors; SiO ２ / Joining layer / SiO ２ , Si / bonding layer / Si, SiO ２ / Bonding layer / Si, for through silicon via (TSV); SiO ２ (with Cu electrode) / bonding layer / SiO ２ (with Cu electrode), Si (with Cu electrode) / bonding layer / Si (with Cu electrode), for optical devices: (InGaAlAs, InGaAs, InP, GaAs) / bonding layer / Si, for LEDs: (InGaAlAs, GaAs, GaN) / bonding layer / Si, (InGaAlAs, GaAs, GaN) / bonding layer / SiO ２ , (InGaAlAs, GaAs, GaN) / bonding layer / (Au, Ag, Al), (InGaAlAs, GaAs, GaN) / bonding layer / sapphire.

[0082] [Laminate] The laminate of the present disclosure comprises a first substrate, a second substrate arranged on one side of the first substrate in the thickness direction, a third substrate arranged on the other side of the first substrate that does not have the second substrate, and an adhesive layer interposed between the first substrate and the second substrate, wherein the thickness of the adhesive layer is 10 μm or less, and the laminate is used by removing the second substrate. The removal of the second substrate is performed as a post-process after forming the second substrate, the adhesive layer, the first substrate, and the third substrate. The laminate of the present disclosure can be used by removing the second substrate as a temporary fixing substrate.

[0083] In one embodiment of the laminate of the present disclosure, the presence of silanol groups on the surface of the adhesive layer is preferred from the viewpoint of achieving more stable adhesion between the first substrate and the second substrate even with a thin adhesive layer. Furthermore, in one embodiment of the present disclosure, the adhesive layer preferably contains at least one selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure as a partial structure from the viewpoint of bonding stability. Preferred embodiments of the adhesive layer are as described above in the method for producing the laminate of the present disclosure.

[0084] The preferred configurations of the substrate applied to the laminate of the present disclosure and the aforementioned other substrate are similar to those of the first substrate, second substrate, adhesive layer, and third substrate in the manufacturing method of the laminate of the present disclosure described above, and therefore will not be described here.

[0085] The present invention will be described in more detail below with reference to examples, but is not limited to these examples. In the following, ultrapure water (Milli-Q water manufactured by Millipore, resistivity 18 MΩ cm (25°C) or less) was used as "water."

[0086] Example 1 (1) Preparation of Adhesive 50% by mass of 3-aminopropyldiethoxymethylsilane (3APDES: structure shown below) and 50% by mass of water were mixed to obtain a solution A containing a hydrolysate of 3APDES.

[0087]

[0088] Solution B containing 70% by mass of ethyl oxydiphthalate half ester (eheODPA) and 30% by mass of ethanol was obtained. eheODPA was produced by adding oxydiphthalic anhydride (ODPA: structure shown below) to ethanol and refluxing the mixture in an oil bath heated to 90°C for 5 hours to completely dissolve the raw material powder. Proton NMR confirmed that ester groups were formed in the produced eheODPA.

[0089]

[0090] The obtained solution A (24 g), solution B (15.6 g), 1-propanol (20 g) and water (40.4 g) were mixed together to prepare a solution containing an adhesive.

[0091] The adhesive solution obtained above was spin-coated on a 4-inch Si wafer (corresponding to the second substrate) and cured by heating at 200°C for 1 hour, forming an adhesive layer with a thickness of 1 µm after drying. (Step A) Subsequently, a native oxide film (SiO ２1) A 4-inch Si substrate (corresponding to the first substrate) with a thickness of 2 nm was cut into 10 mm chips using a blade dicing machine, and four chips were arranged at a 50 μm pitch on the adhesive layer surface at room temperature (25°C) using a chip bonder, and temporarily fixed. (Step B) Before bonding the first substrate, the native oxide film was subjected to UV ozone treatment to activate the surface. Next, for permanent bonding (main bonding), the substrates were heated at 200°C for 1 hour without pressure, resulting in a substrate laminate.

[0092] <Evaluation of misalignment amount> The distance between the vertices of the four chips was measured before and after heating at 200°C to determine the misalignment amount, and the average misalignment amount was measured and evaluated according to the following criteria, with A being acceptable: A: The average misalignment amount was less than 5 μm; B: The average misalignment amount was 5 μm or more.

[0093] <Evaluation of the Presence of Silanol Groups on the Surface of the Bonding Layer> Time-of-flight secondary ion mass spectrometry (TOF-SIMS) PHI nanoTOFII (ULVAC-PHI, Inc.) was used to evaluate whether the surface of the bonding layer had Si—OH groups based on the presence or absence of a peak at a mass-to-charge ratio (m / Z) of 45.

[0094] <Evaluation of Void Amount> The substrate laminate was placed on an infrared lamp, and infrared light transmitted through the substrate laminate was observed from above with an infrared camera. The void area (total area) relative to the size of the substrate laminate was calculated and evaluated according to the following criteria, with A being considered acceptable. A: Void area less than 30% B: Void area 30% or more

[0095] <Measurement of Surface Energy> The surface energy (bonding strength) of the bonding interface of the temporarily fixed substrate laminate or the obtained substrate laminate was measured by a blade insertion test according to the method described in non-patent document M. P. Maszara, G. Goetz, A. Cavigila, and J. B. Mckitterick, Journal of Applied Physics, 64 (1988) 4943-4950. A blade with a thickness of 0.1 mm to 0.3 mm was inserted into the bonding interface of the temporarily fixed substrate laminate or the substrate laminate, and the distance from the blade edge to the laminate or substrate laminate was measured using an infrared light source and an infrared camera. Thereafter, the surface energy was measured based on the following formula: γ=3×10９ ×t ｂ ２ ×E ２ ×t ６ / (32 x L ４ ×E×t ３ ) where γ is the surface energy (J / m ２ ), t ｂ represents the blade thickness (m), E represents the Young's modulus (GPa) of the silicon substrate included in the first substrate and the second substrate, t represents the thickness (m) of the first substrate and the second substrate, and L represents the peeling distance (m) of the laminate or substrate laminate from the blade tip.

[0096] The results of the above evaluations are shown in Table 1 below.

[0097] Example 2: Native oxide film (SiO ２ A laminate was formed and evaluated in the same manner as in Example 1, except that a 4-inch Si substrate (corresponding to the first substrate) having a 150 nm SiCN film on its surface and having been subjected to UV ozone treatment was used instead of the 4-inch Si substrate having a 2 nm thick SiCN film formed thereon.

[0098] [Example 3] The surface of the first adhesive layer was subjected to oxygen plasma treatment and rinsed with water to remove a native oxide film (SiO ２ A 4-inch Si substrate with a 2 nm thick native oxide film (SiO ２ ) A laminate was formed and evaluated in the same manner as in Example 1, except that the surface of a 4-inch Si substrate on which a 2 nm thick film had been formed was subjected to oxygen plasma treatment and rinsed with water.

[0099] Comparative Example 1 A laminate was formed and evaluated in the same manner as in Example 1, except that a second substrate was used in which an adhesive layer was formed on a 4-inch Si substrate using a polyimide resin (PMDA+TFDB) to form the adhesive layer. The evaluation results are shown in Table 1.

[0100]

[0101] The above results show that the laminate obtained by the manufacturing method of the present disclosure has appropriate adhesive strength, and suppresses the occurrence of voids and chip misalignment.

[0102] Example 4 The 4-inch Si wafer (second substrate) obtained in Example 1, an adhesive layer having a thickness of 1 μm after drying, and a native oxide film (SiO ２ ) A 4-inch Si substrate with a thickness of 2 nm was blade diced into 10 mm chips, and the resulting first substrate was then bonded to the first laminate (the substrate laminate of Example 1). A silicon substrate was then bonded to the side of the first substrate that was not in contact with the adhesive layer, to obtain a second laminate. The second substrate and adhesive layer were then removed by grinding. (Step C) After Step C, a substrate laminate was obtained as a third laminate having an individual semiconductor chip (first substrate) on the third substrate, which was a silicon substrate.

[0103] [Explanation of symbols] 10 First laminate, 12 Second substrate, 14 Adhesive layer, 16 First substrate (semiconductor chip), 18 Third substrate (semiconductor substrate), 20 Second laminate, 22 Third laminate, 24 Organic resin (gap fill material), 26 Second laminate, 28 Third substrate (semiconductor substrate), 30 Third laminate, 32 Release layer, 34 Second laminate, 16A Third substrate (thinned semiconductor substrate), 36 Electrode, 38 Third laminate

[0104] The disclosure of Japanese Patent Application No. 2023-200120, filed on November 27, 2023, is incorporated herein by reference. All documents, patent applications, and technical standards mentioned in this disclosure are incorporated herein by reference to the same extent as if each individual document, patent application, and technical standard was specifically and individually indicated to be incorporated by reference.

Claims

1. A method for manufacturing a laminate comprising: a step A of bonding a first substrate and a second substrate disposed on one surface of the first substrate in the thickness direction via an adhesive layer to obtain a first laminate; a step B of disposing a third substrate on the other surface of the first substrate in the thickness direction, the other surface not including the second substrate, to obtain a second laminate; and a step C of removing the second substrate from the second laminate to obtain a third laminate, wherein the thickness of the adhesive layer is 10 μm or less, and the bonding strength between the first substrate and the second substrate in the first laminate obtained in the step A is 0.01 J / m or less. ２ This is the method for producing a laminate.

2. The method for producing a laminate according to claim 1, wherein silanol groups are present on the surface of the adhesive layer.

3. The method for producing a laminate according to claim 1 or 2, wherein the adhesive layer contains at least one partial structure selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure.

4. A method for producing a laminate as described in claim 1 or claim 2, wherein in step A, the first substrate and the second substrate are bonded under temperature conditions in which the curing rate of the adhesive layer is 70% or more and the temperature is 150°C or less.

5. A method for producing a laminate according to claim 1 or 2, wherein in step A, the first substrate and the second substrate are bonded via the adhesive layer at a pressure of 0.5 MPa or less.

6. A method for producing a laminate described in claim 1 or claim 2, further comprising, prior to step A, step D of performing plasma treatment on the surface of the adhesive layer facing the first substrate or the surface of the adhesive layer facing the second substrate.

7. The bonding strength between the first substrate and the second substrate in the first laminate is 20 J / m ２ The method for producing a laminate according to claim 1 or 2, wherein:

8. The method for manufacturing a laminate according to claim 1, wherein the first substrate is a semiconductor chip.

9. The method for producing a stack according to claim 1, wherein the third substrate is a semiconductor substrate.

10. The method for producing a laminate according to claim 9, wherein step B further comprises a step of performing a heat treatment at 400° C. or less after disposing the third substrate.

11. The method for manufacturing a laminate according to claim 1, wherein the third substrate comprises a redistribution layer.

12. The method for producing a laminate according to claim 10, wherein step B further comprises a step of performing a heat treatment at a temperature exceeding 150° C. and not exceeding 300° C. after disposing the third substrate.

13. A method for manufacturing a laminate according to claim 1 or 2, wherein the first substrate and the third substrate are electrically connected.

14. The method for producing a laminate according to claim 1, wherein the third substrate is a resin substrate.

15. The method for producing a laminate according to claim 14, wherein a silicon chip is disposed in the resin substrate.

16. The method for producing a laminate according to claim 1, wherein in step A, two or more of the first substrates are bonded to one of the second substrates.

17. A method for producing a laminate according to claim 1 or 2, wherein in the second laminate formed by step B, the occurrence of voids relative to the area of ​​the first substrate is 30% or less.

18. A laminate comprising: a first substrate; a second substrate arranged on one surface of the first substrate in a thickness direction; a third substrate arranged on the other surface of the first substrate not having the second substrate; and an adhesive layer interposed between the first substrate and the second substrate, wherein the adhesive layer has a thickness of 10 μm or less, and the laminate is used after removing the second substrate.

19. The laminate according to claim 18, wherein silanol groups are present on the surface of the adhesive layer.

20. The laminate according to claim 18 or 19, wherein the adhesive layer contains at least one partial structure selected from the group consisting of an imide bond, a siloxane bond, an epoxy group, and a benzocyclobutene structure.

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