Microled micro-display chip and prepartion method therefor

By designing a multi-layer structure LED unit and a driving panel in the MicroLED microdisplay chip, the problems of low luminescence efficiency and difficult preparation caused by the overlap of RGB three primary color LED pixel units in the prior art are solved, and an efficient and stable full-color display effect is achieved.

WO2025118912A1PCT designated stage expired Publication Date: 2025-06-12RAYSOLVE OPTOELECTRONICS (SUZHOU) CO LTD

Patent Information

Application Number
PCT/CN2024/130740
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-04
Filing Date
2024-11-08
Publication Date
2025-06-12

AI Technical Summary

Technical Problem

There is a large area overlap in the RGB three primary color LED pixel units in the existing full-color MicroLED display chip, resulting in low luminous efficiency and high production difficulty.

Method used

A MicroLED microdisplay chip is designed, including a driving panel and at least two light emitting layers, each light emitting layer contains LED units of different colors, and full color display is realized through time-sharing driving. The chip protects the reflective layer by providing a barrier layer and reduces contact resistivity.

Benefits of technology

It realizes a full-color display with high resolution and brightness, improves luminous brightness and stability, simplifies the preparation process, and reduces power consumption.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed in the present application are a MicroLED micro-display chip and a preparation method therefor. The MicroLED micro-display chip comprises: a driving panel, which comprises a plurality of first contacts; a first light-emitting layer, which is arranged on the driving panel, and comprises a plurality of first LED units; and a second light-emitting layer, which is arranged above the first light-emitting layer, and comprises a plurality of second LED units arranged in an array, wherein orthographic projections of the first LED units on the driving panel do not overlap orthographic projections of the second LED units on the driving panel, each first LED unit and at least one adjacent second LED unit are both connected to a corresponding first contact, and the first LED units and the second LED units can be individually driven by the driving panel by means of time division. In the present application, light of different colors is emitted by different LED units, thereby realizing full-color display; different LED units are located at different layers and can share first contacts, such that the contact resistance is reduced, the degree of integration of a structure is higher and the power consumption is reduced, thereby improving the stability of full-color light emission; and different LED units do not overlap each other, thereby increasing the light-emission brightness.
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Description

MicroLED micro display chip and preparation method

[0001] This application claims priority to the Chinese patent application filed with the China Patent Office on December 4, 2023, with application number 2023116437559 and application name “MicroLED micro display chip and preparation method”, the entire contents of which are incorporated by reference into the application. Technical Field

[0002] The present application belongs to the field of micro-display technology, and specifically relates to a MicroLED micro-display chip and a preparation method thereof. Background Art

[0003] MicroLEDs, also known as micro-light-emitting diodes, refer to high-density integrated LED arrays achieved through miniaturization and matrixing of LEDs. Compared to traditional LED displays, MicroLEDs differ in terms of die, packaging, integration process, backplane, and driver technology. In MicroLEDs, each LED pixel is self-luminous. Because a higher number of integrations can be achieved on a chip of the same size, MicroLEDs significantly improve their photoelectric conversion efficiency, enabling the design of high-resolution and high-brightness displays.

[0004] Full-color microdisplays have a wide range of important applications, especially near-eye displays, including AR and VR. However, the technology to achieve full-color microdisplays still has significant room for improvement. In particular, when stacking the LED pixel units used to emit different colors of light in current full-color MicroLED display chips, there is a large overlap of the three primary colors of RGB, resulting in low luminous efficiency. Furthermore, the LED pixel units must be manufactured in a specific order, which is quite difficult to manufacture.

[0005] Application Contents

[0006] Purpose of application: The purpose of this application is to provide a micro light-emitting diode, which protects the reflective layer and reduces the contact resistivity by setting a barrier layer; another purpose of this application is to provide a method for preparing the above-mentioned micro light-emitting diode.

[0007] Technical Solution: To achieve the above application objectives, this application provides a MicroLED micro-display chip, comprising:

[0008] a driving panel, wherein the driving panel includes a plurality of first contacts;

[0009] At least two light-emitting layers, the at least two light-emitting layers comprising a first light-emitting layer and a second light-emitting layer;

[0010] The first light-emitting layer is provided on the driving panel; the first light-emitting layer includes a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are used to emit a first color light;

[0011] The second light-emitting layer is provided above the first light-emitting layer, and the second light-emitting layer includes a plurality of second LED units arranged in an array, and the second LED units are used to emit a second color light;

[0012] The orthographic projections of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected to the corresponding first contact; and the first LED unit and the second LED unit can be driven individually by the driving panel through time-sharing.

[0013] In some embodiments, it further includes:

[0014] The at least two light-emitting layers further include a third light-emitting layer, which is disposed above the second light-emitting layer; the third light-emitting layer includes a plurality of third LED units arranged in an array, and the third LED units are configured to emit light of a third color;

[0015] The orthographic projections of the third LED unit and any one of the first and second LED units on the driving panel do not overlap; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit, and the second doped semiconductor layer of at least one adjacent second LED unit are all electrically connected to the corresponding first contacts; and the third LED unit can be driven individually by the driving panel through time-sharing.

[0016] In some embodiments, it further includes:

[0017] a first planarization layer, located between the first light-emitting layer and the second light-emitting layer; the first planarization layer allows the first color light to pass through;

[0018] a second planarization layer located between the second light-emitting layer and the third light-emitting layer; the second planarization layer allows both the first color light and the second color light to pass through; a plurality of the third LED units are arranged on the second planarization layer;

[0019] The third planarization layer is disposed on the third light-emitting layer; the third planarization layer allows the first color light, the second color light, and the third color light to pass through.

[0020] In some embodiments, further comprising:

[0021] a first bonding layer located between the driving panel and the first LED unit; the driving panel further comprising a first common contact, the first doped semiconductor layer of the first LED unit being connected to the corresponding first common contact;

[0022] A second bonding layer is located between the first planarization layer and the second LED unit; the driving panel further comprises a second common contact, and the first doped semiconductor layer (201) of the second LED unit is connected to the corresponding second common contact;

[0023] The third bonding layer is located between the second planarization layer and the third LED unit; the driving panel further includes a third common contact, and the first doped semiconductor layer of the third LED unit is connected to the corresponding third common contact.

[0024] In some embodiments, wherein

[0025] The second bonding layer has a first opening at a position corresponding to the first LED unit, exposing the first LED unit, and a portion of the second light-emitting layer fills the first opening;

[0026] The third bonding layer has a second opening exposing the first LED unit at a position corresponding to the first LED unit; the third bonding layer has a third opening exposing the second LED unit at a position corresponding to the second LED unit; and the third light-emitting layer partially fills the second opening and the third opening.

[0027] In some embodiments,

[0028] The first planarization layer has a plurality of first through holes, the plurality of first through holes are respectively arranged around the first LED unit, and the first color light is emitted through the first through holes;

[0029] The second planarization layer has a plurality of second through holes, the plurality of second through holes are respectively arranged around the second LED unit, and the second color light is emitted through the second through holes;

[0030] The third planarization layer has a plurality of third through holes, the plurality of third through holes are respectively arranged around the third LED unit, and the third color light is emitted through the third through holes;

[0031] The second planarization layer further has a plurality of fourth through holes, the fourth through holes being arranged relative to the first through holes; the third planarization layer further has a plurality of fifth through holes, the fifth through holes being arranged relative to the fourth through holes; the first through holes, the fourth through holes, and the fifth through holes are sequentially connected, and form a first recessed area with the first LED unit;

[0032] The third planarization layer further has a plurality of sixth through holes, the sixth through holes being arranged relative to the second through holes; the sixth through holes being connected to the second through holes and forming a second recessed area between the sixth through holes and the second LED unit;

[0033] A third recessed area is formed between the third through hole and the third LED unit.

[0034] In some embodiments, the apertures of the first through hole, the fourth through hole, and the fifth through hole are smaller than the aperture of at least one of the first opening and the second opening; the apertures of the second through hole and the sixth through hole are smaller than the aperture of the third opening.

[0035] In some embodiments, it further includes:

[0036] The filling layer includes a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first concave area, the second filling unit fills the second concave area, and the third filling unit fills the third concave area.

[0037] In some embodiments, it further includes:

[0038] a reflective layer, the reflective layer being provided on a sidewall of any one of the first recessed area, the second recessed area, and the third recessed area; or

[0039] The reflective layer is disposed on a sidewall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole, and the sixth through hole.

[0040] In some embodiments, it further includes:

[0041] The microlens array includes a plurality of microlens units, and the microlens units are arranged above at least one of the first LED unit and the second LED unit.

[0042] In some embodiments, further, the microlens unit is disposed on the third planarization layer and covers at least one of the first recessed area, the second recessed area, and the third recessed area.

[0043] In some embodiments, the first light-emitting layer further includes a first passivation layer and a first electrode layer; the first passivation layer covers the first LED unit, and the first passivation layer has a first opening exposing the second doped semiconductor layer of the first LED unit; the first electrode layer electrically connects the second doped semiconductor layer of the corresponding first LED unit to the corresponding first contact through the first opening;

[0044] The second light-emitting layer further includes a second passivation layer and a second electrode layer, the second passivation layer covers the second LED unit, and the second passivation layer has a second opening exposing the second doped semiconductor layer of the second LED unit; the second electrode layer electrically connects the second doped semiconductor layer of the corresponding second LED unit to the corresponding first contact through the second opening;

[0045] The third light-emitting layer also includes a third passivation layer and a third electrode layer. The third passivation layer covers the third LED unit, and the third passivation layer has a third opening exposing the second doped semiconductor layer of the third LED unit; the third electrode layer electrically connects the corresponding second doped semiconductor layer of the third LED unit to the corresponding first contact through the three openings.

[0046] In some embodiments, the first light-emitting layer further includes a first protective layer, and the first protective layer covers the first passivation layer and the first electrode layer;

[0047] The second light-emitting layer further includes a second protective layer, and the second protective layer covers the second passivation layer and the second electrode layer;

[0048] The third light emitting layer further includes a third protective layer, and the third protective layer covers the third passivation layer and the third electrode layer.

[0049] In some embodiments, it further includes:

[0050] a plurality of conductive posts, each of the conductive posts being disposed on and connected to the corresponding first contacts;

[0051] The conductive pillars are connected to the corresponding first electrode layer, the corresponding second electrode layer and the corresponding third electrode layer.

[0052] In some embodiments, the conductive column passes through the first passivation layer, the first protective layer, the first planarization layer, the second passivation layer, the second protective layer, the second planarization layer, and the third passivation layer in sequence along a direction away from the driving panel to simultaneously connect the first electrode layer, the second electrode layer, and the third electrode layer.

[0053] In some embodiments, at least one of the first LED units, at least one of the second LED units, and at least one of the third LED units form a full-color pixel unit of the MicroLED micro display chip.

[0054] In some embodiments, the sizes of the first LED unit, the second LED unit, and the third LED unit are 0.1 to 10 micrometers; and the spacing between adjacent first LED units, second LED units, and third LED units is 1 to 10 micrometers.

[0055] In some embodiments, the present application further provides a method for preparing a MicroLED microdisplay chip, comprising:

[0056] providing a driving panel, the driving panel comprising a plurality of first contacts;

[0057] forming a first light-emitting layer on the driving panel, wherein the first light-emitting layer includes a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are configured to emit light of a first color;

[0058] forming a second light-emitting layer above the first light-emitting layer, wherein the second light-emitting layer comprises a plurality of second LED units arranged in an array, and the second LED units are configured to emit light of a second color;

[0059] The orthographic projections of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected to the driving panel through the first contact; and the first LED unit and the second LED unit can be driven individually by the driving panel through time-sharing.

[0060] In some embodiments, the method further comprises:

[0061] forming a third light-emitting layer above the second light-emitting layer, wherein the third light-emitting layer comprises a plurality of third LED units arranged in an array, and the third LED units are configured to emit light of a third color;

[0062] The orthographic projections of the third LED unit and any one of the first and second LED units on the driving panel do not overlap; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit, and the second doped semiconductor layer of at least one adjacent second LED unit are all electrically connected to the corresponding first contacts; and the third LED unit can be driven individually by the driving panel through time-sharing.

[0063] In some embodiments,

[0064] Before forming the second light-emitting layer above the first light-emitting layer, forming a first planarization layer on the first light-emitting layer, wherein the first planarization layer allows the first color light to pass through;

[0065] Before forming the third light-emitting layer on the second light-emitting layer, forming a second planarization layer on the second light-emitting layer, wherein the second planarization layer transmits both the first color light and the second color light;

[0066] After forming a third light-emitting layer above the second light-emitting layer, a third planarization layer is formed on the third light-emitting layer, wherein the third planarization layer transmits the first color light, the second color light, and the third color light.

[0067] In some embodiments, it further includes:

[0068] The driving panel and the first LED unit are bonded together via a first bonding layer; the driving panel further comprises a first common contact, and the first doped semiconductor layer of the first LED unit is connected to the corresponding first common contact;

[0069] The first planarization layer and the second LED unit are bonded together via a second bonding layer; the driving panel further includes a second common contact, and the first doped semiconductor layer of the second LED unit is connected to the corresponding second common contact;

[0070] The second planarization layer and the third LED unit are bonded via a third bonding layer; the driving panel further includes a third common contact, and the first doped semiconductor layer of the third LED unit is connected to the corresponding third common contact.

[0071] In some embodiments, a plurality of first through holes are formed on the first planarization layer, the plurality of first through holes are respectively arranged around the first LED unit, and the first color light is emitted through the first through holes;

[0072] forming a plurality of second through holes and a plurality of fourth through holes on the second planarization layer, wherein the plurality of second through holes are respectively arranged around the second LED unit, and the second color light is emitted through the second through holes, and the fourth through holes are arranged opposite to the first through holes;

[0073] forming a plurality of third through holes, a plurality of fifth through holes, and a plurality of sixth through holes on the third planarization layer, wherein the plurality of third through holes are respectively arranged around the third LED unit, and the third color light is emitted through the third through holes, the fifth through hole is arranged relative to the fourth through hole, and the sixth through hole is arranged relative to the second through hole;

[0074] The first through hole, the fourth through hole and the fifth through hole are connected in sequence, and form a first recessed area with the first LED unit;

[0075] The sixth through hole is connected to the second through hole, and forms a second recessed area between the sixth through hole and the second LED unit;

[0076] A third recessed area is formed between the third through hole and the third LED unit;

[0077] The method also includes: forming a filling layer; the filling layer includes a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first recessed area, the second filling unit fills the second recessed area, and the third filling unit fills the third recessed area.

[0078] In some embodiments, before forming the filling layer, the method further includes:

[0079] forming a reflective layer on a sidewall of any one of the first recessed region, the second recessed region, and the third recessed region; or

[0080] A reflective layer is formed on a sidewall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole, and the sixth through hole.

[0081] In some embodiments, after forming the leveling layer, the method further includes:

[0082] A microlens array is formed, wherein the microlens array includes a plurality of microlens units, and the microlens units are disposed above at least one of the first LED unit, the second LED unit, and the third LED unit.

[0083] In some embodiments,

[0084] The step of forming a first light-emitting layer on the driving panel further includes: forming a plurality of the first LED units, a first passivation layer, and a first electrode layer, wherein the first passivation layer covers the first LED units and the first bonding layer, the first passivation layer has a first opening exposing the second doped semiconductor layer of the first LED unit, and the first electrode layer electrically connects the second doped semiconductor layer of the first LED unit to the corresponding first contact through the first opening;

[0085] The step of forming a second light-emitting layer on the first planarization layer further includes: forming a plurality of second LED units, first and second passivation layers, and a second electrode layer, wherein the second passivation layer covers the second LED units and the second bonding layer, the second passivation layer has a second opening exposing the second doped semiconductor layer of the second LED unit, and the second electrode layer electrically connects the second doped semiconductor layer of the second LED unit to the corresponding first contact through the second opening;

[0086] The step of forming a third light-emitting layer on the second planarization layer further includes: forming a plurality of the third LED units, a third passivation layer, and a third electrode layer, wherein the third passivation layer covers the third LED unit and the third bonding layer, the third passivation layer has a third opening exposing the second doped semiconductor layer of the third LED unit, and the third electrode layer electrically connects the second doped semiconductor layer of the third LED unit to the corresponding first contact through the three openings.

[0087] In some embodiments, the step of forming a plurality of the first LED units includes:

[0088] Providing a first substrate, on which a first LED epitaxial layer is disposed, wherein the first LED epitaxial layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer that are stacked;

[0089] Bonding the driving panel to the first LED epitaxial layer via a first bonding layer;

[0090] removing the first substrate and exposing the second doped semiconductor layer of the first LED epitaxial layer;

[0091] Etching the first LED epitaxial layer according to the MESA pattern designed by the patterned mask to form a plurality of the first LED units;

[0092] The step of forming a plurality of the second LED units comprises:

[0093] Providing a second substrate, on which a second LED epitaxial layer is disposed, wherein the second LED epitaxial layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer that are stacked;

[0094] Bonding the first planarization layer to the second LED epitaxial layer via the second bonding layer;

[0095] removing the second substrate and exposing the second doped semiconductor layer of the second LED epitaxial layer;

[0096] Etching the second LED epitaxial layer according to the MESA pattern designed by the patterned mask to form a plurality of second LED units;

[0097] The step of forming a plurality of the third LED units comprises:

[0098] Providing a third substrate, on which a third LED epitaxial layer is disposed, wherein the third LED epitaxial layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer that are stacked;

[0099] Bonding the second planarization layer to the third LED epitaxial layer through the third bonding layer;

[0100] removing the third substrate and exposing the second doped semiconductor layer of the third LED epitaxial layer;

[0101] The third LED epitaxial layer is etched according to the MESA pattern designed by the patterned mask to form a plurality of the third LED units.

[0102] In some embodiments, the first and second doped semiconductor layers may include one or more layers based on IIVI materials such as ZnSe or ZnO or IIIV nitride materials such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof.

[0103] In some embodiments, the first doped semiconductor layer is a p-type semiconductor layer, and the second doped semiconductor layer is an n-type semiconductor layer.

[0104] In some embodiments, an active layer is further provided between the first doped semiconductor layer and the second doped semiconductor layer. The active layer may specifically be a multi-quantum well structure, which is used to confine electron and hole carriers to the quantum well region. When electrons and holes recombine, the carriers undergo radiative recombination and emit photons, thereby converting electrical energy into light energy.

[0105] Beneficial effects: Compared with the prior art, the MicroLED micro display chip of the present application includes: a driving panel, the driving panel includes multiple first contacts; at least two light-emitting layers, the at least two light-emitting layers include a first light-emitting layer and a second light-emitting layer; the first light-emitting layer is arranged on the driving panel; the first light-emitting layer includes multiple first LED units, the first LED units are arranged on the driving panel, and the first LED units are used to emit a first color light; the second light-emitting layer is arranged above the first light-emitting layer, the second light-emitting layer includes multiple second LED units arranged in an array, and the second LED units are used to emit a second color light; wherein the orthographic projections of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are both electrically connected to the corresponding first contacts; the first LED unit and the second LED unit can be driven separately by the driving panel through time sharing. The MicroLED micro-display chip of the present application emits light of different colors through different LED units to achieve full-color display. Different LED units are located in different layers and can share the first contact, which reduces contact resistance. The structure has higher integration and reduces power consumption, thereby improving the stability of full-color luminescence. In addition, different LED units do not overlap, which improves the luminous brightness. In addition, the through holes on the planarization layer surround any LED units of different layers, which can prevent light leakage from the side walls of any LED unit and improve light extraction efficiency.

[0106] The present invention discloses a method for fabricating a microLED microdisplay chip, comprising: providing a driving panel, the driving panel comprising a plurality of first contacts; forming a first light-emitting layer on the driving panel, the first light-emitting layer comprising a plurality of first LED units arranged on the driving panel, the first LED units configured to emit light of a first color; forming a second light-emitting layer above the first light-emitting layer, the second light-emitting layer comprising a plurality of second LED units arranged in an array, the second LED units configured to emit light of a second color; wherein the orthographic projections of the first and second LED units on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected to the driving panel via the first contacts; and the first and second LED units can be independently driven by the driving panel in a time-sharing manner. This method eliminates the need for distinguishing the manufacturing order when fabricating multiple layers of LED units configured to emit light of different colors, allowing for free arrangement and simplifying the fabrication process. Furthermore, each layer of LED units emits light independently, and through-holes in the planarization layer surround the LED units, forming an independent, through-going reflective structure on the planarization layer, thereby improving the light extraction efficiency of the different LED units. BRIEF DESCRIPTION OF THE DRAWINGS

[0107] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0108] FIG1 shows a top view of the MicroLED microdisplay chip of the present application;

[0109] FIG2 shows a schematic cross-sectional view taken along line DD′ in FIG1 ;

[0110] FIG3 shows a top view of the full-color pixel unit of the present application;

[0111] FIG4 shows a schematic cross-sectional view taken along line AA′ in FIG3 ;

[0112] FIG5 shows a schematic cross-sectional view taken along line BB′ in FIG3 ;

[0113] FIG6 shows a schematic cross-sectional view taken along line CC' in FIG3 ;

[0114] FIG7 shows a schematic structural diagram of forming a first LED epitaxial layer on a driving panel in the present application;

[0115] FIG8 shows a schematic structural diagram of a first LED unit formed in the present application;

[0116] FIG9 is a schematic structural diagram of forming a first passivation layer, a first electrode layer and a first protective layer in the present application;

[0117] FIG10 shows a schematic structural diagram of forming a first planarization layer in the present application;

[0118] FIG11 is a schematic diagram showing a structure in which a reflective layer is formed on the sidewall of the first through hole in the present application;

[0119] FIG12 shows a schematic structural diagram of a first filling unit formed in the present application;

[0120] FIG13 shows a schematic structural diagram of forming a second LED epitaxial layer in the present application;

[0121] FIG14 shows a schematic structural diagram of a second LED unit formed in the present application;

[0122] FIG15 shows a schematic structural diagram of forming a second passivation layer, a second electrode layer and a second protective layer in the present application;

[0123] FIG16 shows a schematic structural diagram of forming a second planarization layer in the present application;

[0124] FIG17 shows a schematic structural diagram of a second filling unit formed in the present application;

[0125] FIG18 shows a schematic structural diagram of forming a third LED unit and a third planarization layer in the present application;

[0126] FIG19 shows a cross-sectional schematic diagram of a MicroLED microdisplay chip of another structure;

[0127] FIG20 shows a schematic structural diagram of forming a first LED epitaxial layer on a driving panel in a method for preparing a MicroLED micro display chip of another structure;

[0128] FIG21 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure, wherein a first LED unit is formed;

[0129] FIG22 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure to form a first light-emitting layer;

[0130] FIG23 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure and forming a first planarization layer;

[0131] FIG24 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure to form a second light-emitting layer;

[0132] FIG25 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure and forming a second planarization layer;

[0133] FIG26 is a schematic diagram showing a method for preparing a MicroLED microdisplay chip of another structure to form a third light-emitting layer;

[0134] FIG27 is a schematic diagram showing the formation of a third planarization layer in a method for preparing a MicroLED microdisplay chip of another structure;

[0135] Figure 1: 1-first opening, 2-first light-emitting layer, 3-second opening, 4-second light-emitting layer, 5-third opening, 6-third light-emitting layer, 10-driving panel, 11-first LED epitaxial layer, 12-second LED epitaxial layer, 13-third LED epitaxial layer, 20-first LED unit, 30-second LED unit, 40-second LED unit, 50-second planarization layer, 60-third LED unit, 70-third planarization layer, 80-planarization layer, 90-reflective layer, 101-first contact, 21-first passivation layer, 22-first electrode layer, 23-first protective layer, 41-second passivation layer, 42-second electrode layer, 43-second protective layer, 61-third passivation layer, 62-third electrode Layer, 63-third protective layer, 100-first bonding layer, 200-second bonding layer, 300-third bonding layer, 400-first recessed area, 500-second recessed area, 600-third recessed area, 700-microlens array, 800-microlens unit, 900-conductive column, 201-first doped semiconductor layer, 202-second doped semiconductor layer, 203-active layer, 210-first opening, 301-first through hole, 410-second opening, 501-second through hole, 502-fourth through hole, 610-third opening, 701-third through hole, 702-fifth through hole, 703-sixth through hole, 801-first leveling unit, 802-second leveling unit, 803-third leveling unit. DETAILED DESCRIPTION

[0136] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0137] The disclosure of the present application provides many different embodiments or examples for realizing the different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described in the present application. Of course, they are merely examples, and the purpose is not to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides various specific process and material examples, but those of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.

[0138] Typically, terms can be understood at least in part based on the usage of the above application. For example, the term "one or more" used in this application depends at least in part on the above application and can be used to describe any component, structure or feature in the singular, or can be used to describe a combination of components, structures or features in the plural. Similarly, terms such as "one", "an" or "the" can also be understood as conveying singular usage or conveying plural usage depending at least in part on the above application. In addition, the term "based on..." can be understood as not necessarily intended to convey a set of exclusive factors, but rather can be understood as allowing for the presence of additional factors that do not necessarily have to be explicitly described, depending at least in part on the above application.

[0139] It should be readily understood that the meanings of “on,” “over,” and “over” in this application should be interpreted in the broadest sense, such that “on” means not only “directly on something,” but also includes “on something” with the presence of intermediate components or layers therebetween, and “on something” or “over something” means not only “on something” or “over something,” but also includes “on something” or “over something” with no intermediate components or layers therebetween.

[0140] Furthermore, for ease of description, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein to describe the relationship of one element or component to another element or component illustrated in the drawings. Spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the drawings. The device may be otherwise oriented, rotated 90 degrees or at other orientations, and the spatially relative descriptors used herein should be interpreted accordingly.

[0141] The term "layer" as used in this application refers to a portion of a material that includes an area with a certain thickness. A layer may extend over the entire underlying or superstructure, or may have an extent that is less than the extent of the underlying or superstructure. In addition, a layer may be an area of ​​a homogeneous or inhomogeneous continuous structure, the thickness of which is less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any pair of horizontal planes therebetween. A layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, may include one or more layers therein, and / or may have one or more layers thereon, above and / or below. A layer may include multiple layers. For example, a semiconductor layer may include one or more doped or undoped semiconductor layers, and may have the same or different materials.

[0142] MicroLED displays have many advantages, including self-luminescence, high efficiency, low power consumption, high integration, and high stability. They are also small in size, highly flexible, and easy to disassemble and merge. They can be applied to any existing display application from small to large sizes. MicroLED, also known as micro light-emitting diodes, are generally several hundred microns in size. With the emergence of MicroLED micro-display technology, miniaturization and high resolution of display devices such as augmented reality (AR) display devices, virtual reality (VR) display devices, near-eye displays (NED), and head-up displays (HUD) devices have become possible. In these application scenarios, the size of MicroLED is usually 0.1-10 microns.

[0143] In some embodiments, the term drive panel 10 as used herein refers to the material on which subsequent material layers are added. The drive panel 10 itself can be patterned. The material added to the top of the drive panel 10 can be patterned or can remain unpatterned. The drive panel 10 can be, for example, but not limited to, a display substrate including a silicon-based CMOS drive panel or a thin film field effect transistor drive panel, such as a CMOS (Complementary Metal Oxide Semiconductor) backplane or a TFT glass substrate.

[0144] The present disclosure describes a full-color MicroLED microdisplay chip and a method for manufacturing the same. To create a full-color MicroLED microdisplay chip, multiple sub-pixels with different luminous colors (e.g., red, green, and blue) are integrated to form a full-color pixel. The sub-pixel micro-LEDs are individually driven by one or more driver circuits to emit the primary colors of their corresponding color scales, and the human eye can see the full color gamut of the full-color pixel composed of multiple sub-pixels.

[0145] To integrally form multiple sub-pixel LEDs or micro-LEDs emitting different colors (e.g., three primary colors) on the same driver panel, a stacked structure of LED units is disclosed. The LED units include a substantially flat top surface to achieve the stacked structure. Each layer of the microLED micro-display chip can independently emit a different color.

[0146] 1 and 19 , a MicroLED microdisplay chip is provided, comprising: a driving panel 10, the driving panel 10 including a plurality of first contacts 101; at least two light-emitting layers, the at least two light-emitting layers including a first light-emitting layer 2 and a second light-emitting layer 4; the first light-emitting layer 2 being disposed on the driving panel 10; the first light-emitting layer 2 including a plurality of first LED units 20, the first LED units 20 being arranged on the driving panel 10, the first LED units 20 being configured to emit a first color light; a second light-emitting layer 4 being disposed above the first light-emitting layer 2, the second light-emitting layer 4 including a plurality of second LED units 40 arranged in an array, the second LED units 40 being configured to emit a second color light; wherein the orthographic projections of the first LED units 20 and the second LED units 40 on the driving panel 10 do not overlap; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are both electrically connected to the corresponding first contacts 101; and the first LED units 20 and the second LED units 40 can be individually driven by the driving panel 10 through time-sharing.

[0147] In some embodiments, further referring to Figure 19, at least two light-emitting layers also include a third light-emitting layer 6, which is arranged above the second light-emitting layer 4; the third light-emitting layer 6 includes a plurality of third LED units 60 arranged in an array, and the third LED unit 60 is used to emit a third color light; wherein, the third LED unit 60 does not overlap with the orthographic projection of any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10; the second doped semiconductor layer 202 of the third LED unit 60, the second doped semiconductor layer 202 of at least one adjacent first LED unit 20, and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are all electrically connected to the corresponding first contacts 101; the third LED unit 60 can be driven individually by the driving panel 10 through time-sharing.

[0148] It can be understood that the first light-emitting layer 2 , the second light-emitting layer 4 , and the third light-emitting layer 6 are stacked.

[0149] In some embodiments, further referring to Figure 19, the MicroLED micro display chip also includes: a first planarization layer 30, located between the first light-emitting layer 2 and the second light-emitting layer 4; the first planarization layer 30 allows the first color light to pass through; a second planarization layer 50, located between the second light-emitting layer 2 and the third light-emitting layer 6; the second planarization layer 50 allows both the first color light and the second color light to pass through; a plurality of third LED units 60 are arranged on the second planarization layer 50; a third planarization layer 70, provided on the third light-emitting layer 6; the third planarization layer 70 allows all the first color light, the second color light, and the third color light to pass through.

[0150] In some embodiments, in the MicroLED micro-display chip provided in FIG19 , different LED units emit light of different colors to achieve full-color display. Different LED units are located in different layer structures and can share the first contact 101, thereby reducing the contact resistance of LED units between different layer structures and improving the stability of full-color light emission. The planarization layer can directly transmit the light emitted by the LED, thereby achieving large-area light output.

[0151] In some embodiments, the first planarization layer 30 , the second planarization layer 50 , and the third planarization layer 70 may be made of transparent materials to allow the first color light, the second color light, and the third color light to pass through.

[0152] In some embodiments, further referring to FIG. 1 and FIG. 2 , another MicroLED micro display chip is provided, comprising: a driving panel 10, a plurality of first LED units 20, a first planarization layer 30, a plurality of second LED units 40, and a second planarization layer 50; the driving panel 10 includes a plurality of first contacts 101; the plurality of first LED units 20 are arranged on the driving panel 10, and the first LED units 20 are used to emit a first color light; the first planarization layer 30 has a plurality of first through holes 301, and the plurality of first through holes 301 are respectively arranged around the first LED units 20, and the first color light is emitted through the first through holes 301; the plurality of second LED units 40 are arranged on the first planarization layer 30, the second LED unit 40 is used to emit a second color light; the second planarization layer 50 has a plurality of second through holes 501, and the plurality of second through holes 501 are respectively arranged around the second LED unit 40, and the second color light is emitted through the second through holes 501; wherein, the orthographic projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not overlap; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are both electrically connected to the corresponding first contact 101; the first LED unit 20 and the second LED unit 40 can be driven separately by the driving panel 10 through time sharing. It can be understood that the MicroLED micro display chip of this embodiment emits light of different colors through different LED units to achieve full-color display. Different LED units are located in different layers and can share the first contact 101, which reduces the contact resistance of LED units in different layers and improves the stability of full-color light emission. The first through hole 301 and the second through hole 302 surround any LED unit of the corresponding different layers, which can prevent light leakage from the side wall of any LED unit and improve light extraction efficiency.

[0153] In some embodiments, further referring to Figures 1 and 2, the MicroLED micro display chip also includes: a plurality of third LED units 60 and a third planarization layer 70; the third LED units 60 are arranged on the second planarization layer 50, and the third LED units 60 are used to emit a third color light; the third planarization layer 70 has a plurality of third through holes 701, and the plurality of third through holes 701 are respectively arranged around the third LED units 60, and the third color light is emitted through the third through holes 701; wherein, the orthographic projection of the third LED unit 60 and any one of the first LED unit 20 and the second LED unit 40 on the driving panel 10 does not overlap; the third LED unit 60 and any one of the adjacent first LED unit 20 and the second LED unit 40 are electrically connected to the driving panel 10 through the first contact 101; the third LED unit 60 can be driven separately by the driving panel 10.

[0154] In some embodiments, the color of light emitted by the third LED unit 60, the color of light emitted by the first LED unit 20, and the color of light emitted by the second LED unit 40 are all different; the first LED unit 20, the second LED unit 40, and the third LED unit 60 achieve full-color display, and the above three share the first contact 101, and the light emitted by the three does not overlap on the driving panel 10, so that the LED units are highly integrated, thereby achieving high-resolution and high-brightness display effects.

[0155] In some embodiments, the first, second, and third LED units 20, 40, and 60 can have a trapezoidal structure. Specifically, the sidewalls of the first, second, and third LED units 20, 40, and 60 can be inclined, and the angle between the sidewalls and the top surface can be obtuse, thereby enhancing the focusing effect of the LED units. It should be understood that the first, second, and third LED units 20, 40, and 60 can also have a columnar structure, in which case the angle between the sidewalls and the top surface of the LED table is a right angle.

[0156] In some embodiments, the first LED unit 20, the second LED unit 40, and the third LED unit 60 have a stepped structure, which includes a first doped semiconductor layer 201, a second doped semiconductor layer 202, and an active layer 203 located therebetween. It will be appreciated that the stepped structure can prevent current interference between adjacent LED units, thereby improving the independence and stability of the LED units.

[0157] In some embodiments, the first doped semiconductor layer 201 and the second doped semiconductor layer 202 may include one or more layers based on IIVI materials (such as ZnSe or ZnO) or IIIV nitride materials (such as GaN, AlN, InN, InGaN, GaP, AlInGaP, AlGaAs and alloys thereof).

[0158] In some embodiments, the first doped semiconductor layer 201 may be p-type GaN. In some embodiments, the first doped semiconductor layer 201 may be p-type InGaN. In some embodiments, the first doped semiconductor layer 201 may be p-type AlInGaP.

[0159] In some embodiments, the second doped semiconductor layer 202 may be n-type GaN, n-type InGaN, or n-type AlInGaP.

[0160] In some embodiments, the active layer 203 is the active region of the LED unit. The active layer 203 is arranged between the first doped semiconductor layer 201 and the second doped semiconductor layer 202 and provides light. The active layer 203 is a layer that recombines holes and electrons provided from the first doped semiconductor layer 201 and the second doped semiconductor layer 202, respectively, and outputs light of a specific wavelength. The active layer can have a single quantum well structure or a multiple quantum well (MQW) structure with well layers and barrier layers alternately stacked.

[0161] In some embodiments, further referring to Figures 3, 4, 5, 6, and 19, Figure 3 shows a schematic diagram of a pixel unit consisting of a first LED unit 20, a second LED unit 40, and a third LED unit 60. The MicroLED micro display chip further comprises: a first bonding layer 100, a second bonding layer 200, and a third bonding layer 300. The first bonding layer 100 is located between the driving panel 10 and the first LED unit 20, the second bonding layer 200 is located between the first planarization layer 30 and the second LED unit 40, and the third bonding layer 300 is located between the second planarization layer 50 and the third LED unit 60. The first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 can be made of either non-conductive or conductive materials, as long as they are sufficient to bond the LED units.

[0162] In some embodiments, the driving panel 10 also includes a first common contact, and the first doped semiconductor layer 201 of the first LED unit 20 is connected to the corresponding first common contact; the driving panel 10 also includes a second common contact, and the first doped semiconductor layer 201 of the second LED unit 40 is connected to the corresponding second common contact; the driving panel 10 also includes a third common contact, and the first doped semiconductor layer 201 of the third LED unit 20 is connected to the corresponding third common contact. It should be noted that the first LED unit 20, the second LED unit 40, and the third LED unit 60 can be driven individually by the driving panel 10 through time-sharing. The time-sharing drive can be understood as: at the first moment, the first doped semiconductor layer 201 of the first LED unit 20 is connected to the corresponding first common contact, and the second doped semiconductor layer 202 of the first LED unit 20 is connected to the first contact, so that the first LED unit 20 can be lit at the first moment, and the first LED unit 20 can be driven individually by one or more driving circuits and emit light of the corresponding color; of course, the time-sharing drive of the second LED unit 40 and the third LED unit 60 is similar to the above principle, and at the second moment and the third moment, respectively, with the cooperation of the corresponding common contact and the first contact, the second LED unit 40 and the third LED unit 60 are lit and emit light of the corresponding color.

[0163] In some embodiments, the first contact 101 can be a cathode metal contact, and the first common contact, the second common contact, and the third common contact can be anode metal contacts. There can be multiple first common contacts, second common contacts, and third common contacts distributed on the driver panel 10. The first contact 101 can be a contact shared by LED units of different colors. The first common contact, the second common contact, and the third common contact are common electrode contacts for LED units of the same color in the same layer. The first common contact, the second common contact, and the third common contact are independently connected to each LED unit, applying an anode voltage and providing a separate drive signal, thereby achieving the purpose of individually controlling the light emission of each LED unit.

[0164] In some embodiments, the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 are adhesive material layers, and they also need to be electrically connected to the first doped semiconductor layer 201 to play an electrically conductive role. In some embodiments, the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 can be, for example, a metal or a metal alloy. In some embodiments, the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 can include Au, Ag, Cu, Al, etc., and are not limited thereto. It should be understood that the description of the materials of the bonding layer is only exemplary and not restrictive, and those skilled in the art can make changes as required, and all such changes are within the scope of this application.

[0165] In some embodiments, further referring to Figures 18 and 19, the second bonding layer 200 has a first opening 1 exposing the first LED unit 20 at a position corresponding to the first LED unit 20, and the second light-emitting layer 4 partially fills the first opening 1; the third bonding layer 300 has a second opening 3 exposing the first LED unit 20 at a position corresponding to the first LED unit 20; the third bonding layer 300 has a third opening 5 exposing the second LED unit 40 at a position corresponding to the second LED unit 40; and the third light-emitting layer 6 partially fills the second opening 3 and the third opening 5.

[0166] In some embodiments, further referring to FIG. 4 , the second planarizing layer 50 further comprises a plurality of fourth through holes 502, which are disposed opposite the first through holes 301. The third planarizing layer 70 further comprises a plurality of fifth through holes 702, which are disposed opposite the fourth through holes 502. The first through holes 301, the fourth through holes 502, and the fifth through holes 702 are sequentially connected, forming a first recessed region 400 with the first LED unit 20. It will be appreciated that the first recessed region 400 is a continuous, through-region formed by the first through holes 301, the fourth through holes 502, and the fifth through holes 702 facing each other. The first recessed region 400 may be cylindrical, bowl-shaped, or trumpet-shaped. To improve the uniformity of light emitted by the first LED unit 20, the first LED unit 20 may be disposed at the center of the first recessed region 400, thereby allowing the first color light to evenly pass through the first through holes 301, the fourth through holes 502, and the fifth through holes 702.

[0167] In some embodiments, further referring to FIG. 5 , the third planarization layer 70 further comprises a plurality of sixth through holes 703, which are arranged relative to the second through holes 501. The sixth through holes 703 communicate with the second through holes 501 and form a second recessed region 500 with the second LED unit 40. It will be appreciated that the second recessed region 500 is a continuous, through-going region formed by the sixth through holes 703 communicating with the second through holes 501 and facing each other. The second recessed region 500 may be cylindrical, bowl-shaped, or trumpet-shaped. To improve the uniformity of light emission from the second LED unit 40, the second LED unit 40 may be positioned at the center of the second recessed region 500, thereby allowing the second color light to pass evenly through the second through holes 501 and the sixth through holes 703.

[0168] In some embodiments, further referring to Figure 6, a third recessed area 600 is formed between the third through hole 701 and the third LED unit 60; it can be understood that the third recessed area 600 can be columnar, bowl-shaped or trumpet-shaped. In order to improve the uniformity of the light emission of the third LED unit 60, the third LED unit 60 can be set at the center position of the third recessed area 600, so that the third color light can pass through the third through hole 701 evenly.

[0169] In some embodiments, referring to FIG18 , the apertures of the first through hole 301, the fourth through hole 502, and the fifth through hole 702 are smaller than the aperture of at least one of the first opening 1 and the second opening 3; and the apertures of the second through hole 501 and the sixth through hole 703 are smaller than the aperture of the third opening 5. It is understood that the size of the aperture is determined by the shape of the hole. Generally speaking, the shape of the first through hole 301, the fourth through hole 502, the fifth through hole 702, the second through hole 501, the sixth through hole 703, and the first opening 1, the second opening 3, and the third opening 5 are circular, that is, the aperture is the inner diameter of the circular hole. Of course, the shape of the hole is not limited to the above shapes, and can also be other regular polygons such as triangles, squares, regular pentagons, regular hexagons, etc. The aperture size can be determined according to a unified standard under each shape. For example, the aperture of a square can be the distance from the center to the edge, where the center refers to the center of the inscribed circle or circumscribed circle of the regular polygon. By setting the above-mentioned aperture size relationship, it is possible to avoid a short circuit between the reflective layer and the bonding layer caused by an excessively large aperture of the through hole.

[0170] In some embodiments, each of the above through holes can be formed by dry etching. For example, the sidewall of the through hole can be etched into a vertical surface, and the angle between the sidewall of the through hole and the top surface of the planarization layer is a right angle. The structure of the through hole can also be a bowl-shaped structure or a trumpet-shaped structure, so that the emission light of the LED can be collimated. The embodiment of the present application does not specifically limit the material of the planarization layer having multiple through holes. The materials of the first planarization layer 30, the second planarization layer 50, and the third planarization layer 70 can include, for example, organic resins, organic black matrix photoresists, color filter photoresists, and polyimides.

[0171] In some embodiments, referring to FIG. 2 , the MicroLED microdisplay chip further includes a filler layer 80, comprising a first filler unit 801, a second filler unit 802, and a third filler unit 803. The first filler unit 801 fills the first recessed area 400, the second filler unit 802 fills the second recessed area 500, and the third filler unit 803 fills the third recessed area 600. It is understood that the filler layer 80 is made of a transparent material to ensure that light emitted by the corresponding LED units is not blocked. The first filler unit 801 can completely cover the first LED unit 20, the second filler unit 802 can completely cover the second LED unit 40, and the third filler unit 803 can completely cover the third LED unit 60. It should be noted that the filler layer 80 protects the first, second, and third LED units 20, 40, and 60, and effectively utilizes light from both the light-emitting surface and the side surfaces of the LED units, thereby improving light extraction efficiency.

[0172] In some embodiments, referring to FIG. 2 , the MicroLED microdisplay chip further includes a reflective layer 90 disposed on a sidewall of any one of the first recessed region 400, the second recessed region 500, and the third recessed region 600. Furthermore, the reflective layer 90 is disposed on a sidewall of at least one of the first through-hole 301, the second through-hole 501, the third through-hole 701, the fourth through-hole 502, the fifth grid 702, and the sixth through-hole 703.

[0173] It can be understood that the reflective layer 90 can not only effectively block light leakage from the side walls of the LED unit, but also reflect the light emitted by the LED unit. The grille holes provided with the reflective layer 90 can also gather and collimate the reflected light of the reflective layer 90 and the light emitted by the LED unit, which can further improve the light output efficiency.

[0174] In some embodiments, the reflective layer 90 can be formed based on the first recessed area 400, the second recessed area 500, and the third recessed area 600, which can avoid processing in the tiny gaps between the LED units of the MicroLED micro display chip, thereby greatly reducing the processing difficulty, widening the process window, and improving the processing yield. It can be applied to products with high resolution and high pixel density.

[0175] In some embodiments, the reflective layer 90 can be made of an organic material, including but not limited to highly reflective organic coatings. The reflective layer 90 can also be made of an inorganic material, including but not limited to metals such as Al, Cu, and Ag. The reflective layer 90 can be deposited onto the sidewalls of the corresponding region by atomic layer deposition (ALD), chemical vapor deposition (CVD), evaporation, sputtering, or the like.

[0176] In some embodiments, the first LED unit 20 can emit a first color light, which includes but is not limited to any one of red light, green light, blue light, yellow light or ultraviolet light; the second LED unit 40 can emit a second color light, which includes but is not limited to any one of red light, green light, blue light, yellow light or ultraviolet light; the third LED unit 60 can emit a third color light, which includes but is not limited to any one of red light, green light, blue light, yellow light or ultraviolet light.

[0177] In some embodiments, the first color light, the second color light, and the third color light are each selected from one of red light, green light, and blue light, wherein the first color light, the second color light, and the third color light are all different.

[0178] In some embodiments, further referring to Figures 4, 5 and 6, the MicroLED micro display chip further includes: a first passivation layer 21, a first electrode layer 22, a first protective layer 23, a second passivation layer 41, a second electrode layer 42, a second protective layer 43, a third passivation layer 61, a third electrode layer 62 and a third protective layer 63; the first passivation layer 21 covers the first LED unit 20 and the first bonding layer 100, and the first passivation layer 21 has a first opening 210 exposing the second doped semiconductor layer 202 of the first LED unit 20; the first electrode layer 22 electrically connects the second doped semiconductor layer 202 of the first LED unit 20 to the corresponding first contact 101 through the first opening 210; the first protective layer 23 covers the first passivation layer 21 and the first electrode layer 22; the second passivation layer 41 covers the second LED unit 40 and The second bonding layer 200, the second passivation layer 41 has a second opening 410 exposing the second doped semiconductor layer 202 of the second LED unit 40; the second electrode layer 42 electrically connects the second doped semiconductor layer 202 of the second LED unit 40 to the corresponding first contact 101 through the second opening 410; the second protective layer 43 covers the second passivation layer 41 and the second electrode layer 42; the third passivation layer 61 covers the third LED unit 60 and the third bonding layer 300, the third passivation layer 61 has a third opening 610 exposing the second doped semiconductor layer 202 of the third LED unit 60; the third electrode layer 62 electrically connects the second doped semiconductor layer 202 of the third LED unit 60 to the corresponding first contact 101 through the three openings 610; the third protective layer 63 covers the third passivation layer 61 and the third electrode layer 62.

[0179] In some embodiments, the materials of the first passivation layer 21, the second passivation layer 41, and the third passivation layer 61 include inorganic materials or organic materials to isolate and protect the LED units. The inorganic materials include any one or a combination of SiO2, Al2O3, ZrO2, TiO2, Si3N4, and HfO2; the organic materials include any one or a combination of black matrix photoresist, color filter photoresist, polyimide, barrier glue (BANK), overcoat glue, near-ultraviolet negative photoresist, and styrene-propylcyclobutene.

[0180] In some embodiments, the first electrode layer 22 , the second electrode layer 42 , and the third electrode layer 62 are N-pole metal layers, and the materials may be indium tin oxide, Cr, Ti, Pt, Au, Al, Cu, Ge, or Ni.

[0181] In some embodiments, the first protective layer 23, the second protective layer 43, and the third protective layer 63 can cover multiple LED units to prevent etching from damaging the light-emitting surface of the LED or at least one of the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62. The first protective layer 23, the second protective layer 43, and the third protective layer 63 can all transmit light emitted by the LED units, so the first protective layer 23, the second protective layer 43, and the third protective layer 63 should have sufficient transparency. Generally, materials such as silicon dioxide, silicon nitride, and aluminum oxide can be used. It should be noted that the first protective layer 23, the second protective layer 43, and the third protective layer 63 are all continuous film structures, located below the grid layer and above the LED units. The thickness of the first protective layer 23, the second protective layer 43, and the third protective layer 63 can be, for example, 300 to 800 nm. Of course, the thickness can also be selected according to specific circumstances.

[0182] In some embodiments, the MicroLED microdisplay chip further includes: a plurality of conductive pillars 900, the conductive pillars 900 being disposed on and connected to corresponding first contacts 101; the conductive pillars 900 sequentially extending through the first passivation layer 21, the first protective layer 23, the first planarization layer 30, the second passivation layer 41, the second protective layer 43, the second planarization layer 50, and the third passivation layer 61 in a direction away from the driving panel 10, and the conductive pillars 900 also connecting the corresponding first electrode layer 22, the corresponding second electrode layer 42, and the corresponding third electrode layer 62. It will be appreciated that the conductive pillars 900 connect the first electrode layer 22, the second electrode layer 42, and the third electrode layer 62, enabling them to jointly participate in the transmission and distribution of current, ensuring that current can flow through each electrode layer, thereby achieving normal light emission of the LED unit. 4-6 , when the conductive pillar 900 penetrates the first passivation layer 21, the second passivation layer 41, and the third passivation layer 61, it is also necessary to ensure electrical isolation between the conductive pillar 900 and the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300. This is to prevent short circuits between the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300, which may occur when the first bonding layer 100, the second bonding layer 200, and the third bonding layer 300 are made of conductive materials. Furthermore, the conductive pillar 900 is made of metal.

[0183] In some embodiments, taking FIG. 3 as an example, at least one first LED unit 20 , at least one second LED unit 40 , and at least one third LED unit 60 form a full-color pixel unit of a MicroLED microdisplay chip.

[0184] In some embodiments, the top surfaces of the first leveling unit 801, the second leveling unit 802, and the third leveling unit 803 are flush with the top surface of the third planarization layer 70; alternatively, the top surfaces of the first leveling unit 801, the second leveling unit 802, and the third leveling unit 803 are lower than the top surface of the third planarization layer 70. It is understood that this flush structure not only effectively prevents optical crosstalk between adjacent LED units, but also ensures the flatness and stability of the Micro LED microdisplay chip structure, facilitating subsequent production processes.

[0185] In some embodiments, the size of the first LED unit 20 , the second LED unit 40 , and the third LED unit 60 is 0.1 to 5 microns; the spacing between adjacent first LED units 20 , second LED units 40 , and third LED units 60 is 1 to 10 microns.

[0186] In some embodiments, the driving panel 10 may include semiconductor materials such as silicon, silicon carbide, nitride, germanium, arsenide, or indium phosphide. The driving panel 10 may have a driving circuit formed therein and may be a CMOS backplane or a TFT glass substrate.

[0187] In some embodiments, referring to FIG2 , the MicroLED micro-display chip further includes: a micro-lens array 700, the micro-lens array 700 including a plurality of micro-lens units 80, the micro-lens unit 800 being disposed above at least one of the first LED unit 20, the second LED unit 40, and the third LED unit 60. Specifically, the micro-lens unit 800 is disposed on the third planarization layer 70 and covers at least one of the first recessed area 400, the second recessed area 500, and the third recessed area 600. The micro-lens unit 800 can be used to focus and / or collimate the light emitted by the LED unit, thereby improving the luminous efficiency of the MicroLED micro-display chip. The light-emitting curved surface of the micro-lens unit 800 can be an irregular curved surface or a regular curved surface, for example, the light-emitting curved surface can be an arc-shaped curved surface or a hemispherical curved surface. The ratio of the curvature radius of the light-emitting curved surface of the micro-lens unit 800 to the size of the LED unit is set to 0.5-3.

[0188] In some embodiments, taking the MicroLED micro display chip of FIG. 19 as an example, a method for preparing a MicroLED micro display chip is provided, including:

[0189] A driving panel 10 is provided, wherein the driving panel 10 includes a plurality of first contacts 101;

[0190] A first light-emitting layer 2 is formed on the driving panel 10. The first light-emitting layer 2 includes a plurality of first LED units 20. The first LED units 20 are arranged on the driving panel 10 and are used to emit a first color light.

[0191] A second light-emitting layer 4 is formed above the first light-emitting layer 2. The second light-emitting layer 4 includes a plurality of second LED units 40 arranged in an array. The second LED units 40 are configured to emit light of a second color.

[0192] Among them, the orthographic projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not overlap; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are electrically connected to the driving panel 10 through the first contact 101; the first LED unit 20 and the second LED unit 40 can be driven separately by the driving panel 10 through time sharing.

[0193] Further reference is made to Figures 20-27 , which illustrate cross-sectional views of different stages in the preparation process of the MicroLED microdisplay chip shown in Figure 19 .

[0194] Referring to Figure 20, a driving panel 10 is first provided. The driving panel 10 may include a circuit layer composed of complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. These CMOS devices or TFT devices may form a driving circuit in the driving panel 10. The driving panel 10 may also include a plurality of contacts connected to the driving circuit, the plurality of contacts including a first contact 101 and a first common contact, a second common contact, and a third common contact. The first contact 101 may be electrically connected to the second doped semiconductor layer 202 of each LED unit respectively, and the first common contact, the second common contact, and the third common contact may be electrically connected to the first doped semiconductor layer 201 of the plurality of LED units respectively, so as to individually drive any one of the plurality of LED units to emit light. Then, a first bonding layer 100 may be formed on the driving panel 10. Then, a substrate formed with the first LED epitaxial layer 11 is bonded to the driving panel 10 through the first bonding layer 100, so that the first LED epitaxial layer 11 is formed on the driving panel 10.

[0195] Specifically, the first LED epitaxial layer 11 on the substrate can be flipped over, and the bonding layer can be fused to form the first bonding layer 100. This allows the first LED epitaxial layer 11 to be bonded to the driver panel 10, and then the substrate can be peeled off. Peeling methods include, but are not limited to, laser lift-off, dry etching, wet etching, mechanical polishing, etc. The flipped first LED epitaxial layer 11 can also be thinned. The thinning operation includes dry etching, wet etching, or mechanical polishing.

[0196] 21 , a MESA pattern can be designed based on a patterned mask, and the first LED epitaxial layer 11 can be etched to form a plurality of first LED units 20. The first LED units 20 are functionalized step structures and include a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202. It should be understood that etching can be performed using either a dry or wet method.

[0197] Referring to Figure 22, a first passivation layer 21 is first deposited on the first LED unit 20 and the first bonding layer 100, and then a first opening 210 is set at a position of the first passivation layer 21 corresponding to the second doped semiconductor layer 202 of the first LED unit 20. Then, a first electrode layer 22 is set, which is located on the upper part of the driving panel and outside the passivation layer. The first electrode layer 22 electrically connects the second doped semiconductor layer 202 of the first LED unit 20 to the corresponding first contact 101 through the first opening 210.

[0198] 23 , a first planarization layer 30 may be formed on top of the plurality of first LED units 20 . The material of the first planarization layer 30 may include organic resin, organic black matrix photoresist, color filter photoresist, polyimide, and the like.

[0199] Referring to Figure 24, a second LED unit 40 is first formed on the first planarization layer 30 in the same manner as the first LED unit 20; wherein, a first opening 1 is required to be formed at a position of the second bonding layer 200 corresponding to the first LED unit 20 to expose the first LED unit 20, so that the second passivation layer 41 of the second light-emitting layer 4 partially fills the first opening 1.

[0200] 25 , a second planarization layer 50 may be formed on top of the plurality of second LED units 40 . The material of the second planarization layer 50 may include organic resin, organic black matrix photoresist, color filter photoresist, polyimide, and the like.

[0201] Referring to Figure 26, a third LED unit 60 is first formed on the second planarization layer 50, and the formation method is the same as that of the first LED unit 20 and the second LED unit 40; wherein, it is necessary to form a second opening 3 exposing the first LED unit 20 at the position of the third bonding layer 300 corresponding to the first LED unit 20; and form a third opening 5 exposing the second LED unit 40 at the position of the third bonding layer 300 corresponding to the second LED unit 40; the third passivation layer 61 of the third light-emitting layer 6 is partially filled in the second opening 3 and the third opening 5.

[0202] 27 and 19 , a third planarization layer 70 is first formed on top of the plurality of third LED units 60. The material of the second planarization layer 70 may include, for example, organic resin, organic black matrix photoresist, color filter photoresist, and polyimide. A microlens array 700 is then provided on the third planarization layer 70. The lens array 700 includes a plurality of microlens units 800. The microlens units 800 cover at least one of the first LED unit 20, the second LED unit 40, and the third LED unit 60, thereby obtaining a MicroLED micro display chip.

[0203] In some embodiments, taking the preparation of the MicroLED microdisplay chip of FIG. 2 as an example, the preparation method includes the following steps:

[0204] A driving panel 10 is provided, wherein the driving panel 10 includes a plurality of first contacts 101;

[0205] A first light-emitting layer 2 is formed on the driving panel 10. The first light-emitting layer 2 includes a plurality of first LED units 20. The first LED units 20 are configured to emit light of a first color.

[0206] forming a first planarization layer 30 having a plurality of first through holes 301 , the plurality of first through holes 301 being respectively arranged around the first LED unit 20 , and the first color light being emitted through the first through holes 301 ;

[0207] A second light-emitting layer 4 is formed on the first planarization layer 30 , wherein the second light-emitting layer 4 includes a plurality of second LED units 40 arranged in an array, and the second LED units 40 are configured to emit light of a second color;

[0208] forming a second planarization layer 50 having a plurality of second through holes 501 , the plurality of second through holes 501 being respectively arranged around the second LED units 40 , and the second color light being emitted through the second through holes 501 ;

[0209] Among them, the orthographic projections of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not overlap; the second doped semiconductor layer 202 of the first LED unit 20 and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are electrically connected to the driving panel 10 through the first contact 101; the first LED unit 20 and the second LED unit 40 can be driven separately by the driving panel 10 through time sharing.

[0210] It can be understood that this preparation method does not need to distinguish the production order when preparing multiple layers of LED units for emitting light of different colors, and can be freely sorted, which simplifies the difficulty of preparation; and each layer of LED units emits light independently, and the grid holes surround the LED units to form an independent and penetrating reflective structure on the grid layer, thereby improving the light output efficiency of different LED units.

[0211] In some embodiments, the preparation method further comprises:

[0212] A third light-emitting layer 6 is formed on the second planarization layer 50 , wherein the third light-emitting layer 6 includes a plurality of third LED units 60 arranged in an array, and the third LED units 60 are configured to emit light of a third color;

[0213] forming a third planarization layer 70 having a plurality of third through holes 701 , the plurality of third through holes 701 being respectively arranged around the third LED unit 60 , and the third color light being emitted through the third through holes 701 ;

[0214] Among them, the orthographic projections of the third LED unit 60 and any of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not overlap; the second doped semiconductor layer 202 of the third LED unit 60, the second doped semiconductor layer 202 of at least one adjacent first LED unit 20, and the second doped semiconductor layer 202 of at least one adjacent second LED unit 40 are all electrically connected to the corresponding first contacts 101; the third LED unit 60 can be driven individually by the driving panel 10 through time sharing.

[0215] In some embodiments, before forming a plurality of first LED units 20 on the driving panel 10, the method further includes: forming a first bonding layer 100 on the driving panel 10, wherein the first bonding layer 100 is located between the driving panel 10 and the first LED units 20; the driving panel 10 further includes a first common contact, and the first doped semiconductor layer 201 of the first LED unit 20 is connected to the corresponding first common contact;

[0216] Before forming the plurality of second LED units 40 on the first planarization layer 30, the method further includes: forming a second bonding layer 200 on the first planarization layer 30, wherein the second bonding layer 200 is located between the first planarization layer 30 and the second LED units 40; the driving panel 10 further includes a second common contact, wherein the first doped semiconductor layer 201 of the second LED unit 40 is connected to the corresponding second common contact;

[0217] Before forming multiple third LED units 60 on the second planarization layer 50, the method also includes: forming a third bonding layer 300 on the second planarization layer 50, and the third bonding layer 300 is located between the second planarization layer 50 and the third LED units 60; the driving panel 10 also includes a third common contact, and the first doped semiconductor layer 201 of the third LED unit 20 is connected to the corresponding third common contact.

[0218] In some embodiments, the preparation method also includes: forming a filling layer 80; the filling layer 80 includes a first filling unit 801, a second filling unit 802 and a third filling unit 803; the first filling unit 801 fills the first recessed area 400, the second filling unit 802 fills the second recessed area 500, and the third filling unit 803 fills the third recessed area 600.

[0219] In some embodiments, before forming the leveling layer 80, the preparation method further includes:

[0220] forming a reflective layer 90 on the sidewall of any one of the first recessed region 400 , the second recessed region 500 , and the third recessed region 600 ; or,

[0221] A reflective layer 90 is formed on a sidewall of at least one of the first through hole 301 , the second through hole 501 , the third through hole 701 , the fourth through hole 502 , the fifth grid 702 , and the sixth through hole 703 .

[0222] In some embodiments, after forming the leveling layer 80, the preparation method further includes:

[0223] A microlens array 700 is formed on the third planarization layer 70 . The microlens array 700 includes a plurality of microlens units 800 . The microlens units 800 cover at least one of the first recessed area 400 , the second recessed area 500 , and the third recessed area 600 .

[0224] In some embodiments, the step of forming the first light-emitting layer 2 on the driving panel 10 further includes: forming a plurality of first LED units 20, a first passivation layer 21, a first electrode layer 22, and a first protective layer 23, wherein the first passivation layer 21 covers the first LED units 20 and the first bonding layer 100, the first passivation layer 21 has a first opening 210 exposing the second doped semiconductor layer 202 of the first LED unit 20, the first electrode layer 22 electrically connects the second doped semiconductor layer 202 of the first LED unit 20 to the corresponding first contact 101 through the first opening 210, and the first protective layer 23 covers the first passivation layer 21 and the first electrode layer 22;

[0225] The step of forming the second light-emitting layer 4 further includes: forming a plurality of second LED units 40, a second passivation layer 41, a second electrode layer 42, and a second protective layer 43, wherein the second passivation layer 41 covers the second LED units 40 and the second bonding layer 200, the second passivation layer 41 has a second opening 410 exposing the second doped semiconductor layer 202 of the second LED unit 40, the second electrode layer 42 electrically connects the second doped semiconductor layer 202 of the second LED unit 40 to the corresponding first contact 101 through the second opening 410, and the second protective layer 43 covers the second passivation layer 41 and the second electrode layer 42;

[0226] The step of forming the third light-emitting layer 6 further includes: forming a plurality of third LED units 60, a third passivation layer 61, a third electrode layer 62 and a third protective layer 63, the third passivation layer 61 covers the third LED unit 60 and the third bonding layer 300, the third passivation layer 61 has a third opening 610 exposing the second doped semiconductor layer 202 of the third LED unit 60, the third electrode layer 62 electrically connects the second doped semiconductor layer 202 of the third LED unit 60 to the corresponding first contact 101 through the three openings 610, and the third protective layer 63 covers the third passivation layer 61 and the third electrode layer 62.

[0227] In some embodiments, the steps of forming the plurality of first LED units 20 include:

[0228] Providing a first substrate, on which a first LED epitaxial layer 11 is disposed, wherein the first LED epitaxial layer 11 includes a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202 that are stacked;

[0229] Bonding the driving panel 10 to the first LED epitaxial layer 11 via the first bonding layer 100;

[0230] removing the first substrate and exposing the second doped semiconductor layer 202 of the first LED epitaxial layer 11;

[0231] The first LED epitaxial layer 11 is etched according to the MESA pattern designed by the patterned mask to form a plurality of first LED units 20 .

[0232] In some embodiments, the step of forming a plurality of second LED units 40 includes:

[0233] Providing a second substrate, on which a second LED epitaxial layer 12 is disposed, wherein the second LED epitaxial layer 12 includes a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202 that are stacked;

[0234] Bonding the first planarization layer 30 to the second LED epitaxial layer 12 via the second bonding layer 200;

[0235] removing the second substrate and exposing the second doped semiconductor layer 202 of the second LED epitaxial layer 12;

[0236] The second LED epitaxial layer 12 is etched according to the MESA pattern designed by the patterned mask to form a plurality of second LED units 40 .

[0237] In some embodiments, the step of forming a plurality of third LED units 60 includes:

[0238] Providing a third substrate, on which a third LED epitaxial layer 13 is disposed, wherein the third LED epitaxial layer 13 includes a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202 that are stacked;

[0239] Bonding the second planarization layer 50 to the third LED epitaxial layer 13 via the third bonding layer 300;

[0240] removing the third substrate and exposing the second doped semiconductor layer 202 of the third LED epitaxial layer 13;

[0241] The third LED epitaxial layer 13 is etched according to the MESA pattern designed by the patterned mask to form a plurality of third LED units 60 .

[0242] In some embodiments, the first LED epitaxial layer 11 is an epitaxial layer emitting red light, the second LED epitaxial layer 12 is an epitaxial layer emitting green light, and the third LED epitaxial layer 13 is an epitaxial layer emitting blue light.

[0243] In some embodiments, the first substrate, the second substrate, and the third substrate may be made of glass, sapphire, silicon carbide, or the like.

[0244] In some embodiments, before forming the first electrode layer 22 , the second electrode layer 42 , and the third electrode layer 62 , the method further includes:

[0245] A conductive column 900 is formed, which is arranged on the first contact 101 and connected to the corresponding first contact 101; the conductive column 900 sequentially penetrates the first passivation layer 21, the first protective layer 23, the first planarization layer 30, the second passivation layer 41, the second protective layer 43, the second planarization layer 50, and the third passivation layer 61 in a direction away from the driving panel 10 to simultaneously connect the first electrode layer 22, the second electrode layer 42 and the third electrode layer 62.

[0246] 7 to 18 show cross-sectional views of different stages in the preparation process of a MicroLED microdisplay chip.

[0247] Referring to Figure 7, a driving panel 10 is first provided. The driving panel 10 may include a circuit layer composed of complementary metal oxide semiconductor (CMOS) devices or TFT devices, etc. These CMOS devices or TFT devices may form a driving circuit in the driving panel 10. The driving panel 10 may also include a plurality of contacts connected to the driving circuit, the plurality of contacts including a first contact 101 and a first common contact, a second common contact, and a third common contact. The first contact 101 may be electrically connected to the second doped semiconductor layer 202 of each LED unit respectively, and the first common contact, the second common contact, and the third common contact may be electrically connected to the first doped semiconductor layer 201 of the plurality of LED units respectively, so as to individually drive any one of the plurality of LED units to emit light. Then, a first bonding layer 100 may be formed on the driving panel 10. Then, a substrate formed with the first LED epitaxial layer 11 is bonded to the driving panel 10 through the first bonding layer 100, so that the first LED epitaxial layer 11 is formed on the driving panel 10.

[0248] Specifically, the first LED epitaxial layer 11 on the substrate can be flipped over, and the bonding layer can be fused to form the first bonding layer 100. This allows the first LED epitaxial layer 11 to be bonded to the driver panel 10, and then the substrate can be peeled off. Peeling methods include, but are not limited to, laser lift-off, dry etching, wet etching, mechanical polishing, etc. The flipped first LED epitaxial layer 11 can also be thinned. The thinning operation includes dry etching, wet etching, or mechanical polishing.

[0249] 8 , a MESA pattern can be designed based on a patterned mask, and the first LED epitaxial layer 11 can be etched to form a plurality of first LED units 20. The first LED units 20 are functionalized step structures and include a first doped semiconductor layer 201, an active layer 203, and a second doped semiconductor layer 202. It should be understood that etching can be performed using either a dry or wet method.

[0250] Referring to Figure 9, a first passivation layer 21 is first deposited on the first LED unit 20 and the first bonding layer 100, and then a first opening 210 is set in the first passivation layer 21 at a position corresponding to the second doped semiconductor layer 202 of the first LED unit 20, and then a first electrode layer 22 is set, which is located on the upper part of the driving panel and outside the passivation layer. The first electrode layer 22 electrically connects the second doped semiconductor layer 202 of the first LED unit 20 to the corresponding first contact 101 through the first opening 210; then a first protective layer 23 is formed on the surface of the first passivation layer 21 and the first electrode layer 22, and the etch barrier layer 407 may include an etch barrier layer on the upper part of the first passivation layer 21 and an etch barrier layer on the upper part of the first electrode layer 22.

[0251] Referring to Figure 10 , a first planarization layer 30 can be formed on top of the plurality of first LED units 20. The material of the first planarization layer 30 may include, for example, organic resin, organic black matrix photoresist, color filter photoresist, and polyimide. The first planarization layer 30 is then photolithographically or etched to form a plurality of first through-holes 301. The plurality of first through-holes 301 can be positioned around the plurality of first LED units 20, forming recessed areas between the first LED units 20 and the corresponding grid holes. It should be understood that the plurality of first through-holes are positioned in a one-to-one correspondence with the plurality of first LED units, allowing emitted light to be emitted through the grid holes. The first through-holes 301 can be formed using dry etching, with the first through-holes 301 exposing the first protective layer 23. Because the first protective layer 23 covers the upper portions of the LEDs and the upper portion of the first electrode layer 22, it prevents damage to the first LED units during the etching of the grid holes.

[0252] Referring to Figure 11, in order to enhance the reflection effect of the light emitted by the first LED unit 20, a reflective layer 90 can be formed on the side wall of the first through hole 301. The reflective layer 90 can be deposited on the side wall of the first through hole 301 by atomic layer deposition ALD, chemical vapor deposition CVD, evaporation, sputtering, etc.

[0253] Referring to FIG. 12 , a fill layer 80 is formed on the first planarization layer. It is understood that a portion of the first fill unit 801 is filled within the first through-hole 301, for example, by shielding the remaining area with a mask layer. The mask layer is removed, and the fill layer 80 is then developed using a developer. Since only the first fill unit 801 is photocured, the remaining portion is removed by the developer, thereby forming multiple first fill units 801. The first fill unit 801 fills at least a portion or all of the first through-hole 301.

[0254] 13-17 , the second LED unit 40 is further prepared on the first planarizing layer 30. The specific preparation method is the same as that of the first LED unit 20 and will not be repeated here. However, it should be noted that after the second planarizing layer 50 is formed, a fourth through hole 502 needs to be formed at a position corresponding to the first through hole 301. The fourth through hole 502 separates the second bonding layer 200, the second passivation layer 41 and the second protective layer 43 and is connected to the first through hole 301, thereby avoiding a short circuit caused by contact between the reflective layer 90 and the second bonding layer 200. A second through hole 501 is formed at a position corresponding to the second LED unit 40, and a first filling unit 801 is filled in the four grid holes 502, and a second filling unit 802 is filled in the second through hole 501. The orthographic projections of any of the first LED unit 20 and the second LED unit 40 on the driving panel 10 do not overlap.

[0255] 18 , the third LED unit 60 is further prepared on the second planarization layer 50. The specific preparation method is the same as that of the first LED unit 20 and will not be repeated here. However, it should be noted that after the third planarization layer 70 is formed, a fifth through hole 702 is formed at a position corresponding to the fourth through hole 502, and a sixth through hole 703 is formed at a position corresponding to the second through hole 501. In addition, the third through hole 701, the fifth through hole 702, and the sixth through hole 703 are formed at a position corresponding to the third LED unit 60. The third bonding layer 300, the third passivation layer 61 and the third protective layer 63 need to be separated to avoid a short circuit of the reflective layer 90. The first filling unit 801 is filled in the fifth through hole 702, the second filling unit 802 is filled in the sixth through hole 703, and the third filling unit 803 is filled in the third through hole 701. The orthographic projections of any of the first LED unit 20, the second LED unit 40, and the third LED unit 60 on the driving panel 10 do not overlap.

[0256] Referring to FIG. 2 , a microlens array 700 is finally disposed on the third planarization layer 70 . The lens array 700 includes a plurality of microlens units 800 . The microlens units 800 cover at least one of the first recessed area 400 , the second recessed area 500 , and the third recessed area 600 , thereby obtaining a MicroLED microdisplay chip.

[0257] It should be noted that the embodiment of the present application does not specifically limit the sequence of steps in the method for manufacturing the MicroLED micro display chip described above.

[0258] In the embodiments of the manufacturing method in this application, only the manufacturing process or steps are described. The device structure, shape, and materials not described can refer to the above-mentioned embodiments of the MicroLED micro display chip and will not be repeated here.

[0259] The resulting MicroLED microdisplay chip can be used to manufacture a display device, which can be, for example, a component or device including the MicroLED microdisplay chip, such as a MicroLED microdisplay chip device including an encapsulation layer. The resulting MicroLED microdisplay chip can be further used in electronic devices, including but not limited to: display devices such as augmented reality (AR) displays, virtual reality (VR) displays, near-eye displays (NEDs), and heads-up displays (HUDs).

[0260] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0261] The above is a detailed introduction to the present application. Specific examples are used in the present application to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. MicroLED micro display chip, including: include: A driving panel, wherein the driving panel comprises a plurality of first contacts; At least two light-emitting layers, the at least two light-emitting layers comprising a first light-emitting layer and a second light-emitting layer; The first light-emitting layer is disposed on the driving panel; the first light-emitting layer includes a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are used to emit first color light; The second light-emitting layer is disposed above the first light-emitting layer, and the second light-emitting layer includes a plurality of second LED units arranged in an array, and the second LED units are used to emit a second color light; Among them, the orthographic projections of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected to the corresponding first contact; the first LED unit and the second LED unit can be driven separately by the driving panel through time sharing.

2. The MicroLED micro display chip according to claim 1, wherein: Also includes: The at least two light-emitting layers further include a third light-emitting layer, which is disposed above the second light-emitting layer; the third light-emitting layer includes a plurality of third LED units arranged in an array, and the third LED units are used to emit a third color light; The orthographic projections of the third LED unit and any one of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit, and the second doped semiconductor layer of at least one adjacent second LED unit are all electrically connected to the corresponding first contact; the third LED unit can be driven separately by the driving panel through time division; At least one of the first LED units, at least one of the second LED units and at least one of the third LED units form a full-color pixel unit of the MicroLED micro display chip.

3. The MicroLED micro display chip according to claim 2, wherein: Also includes: A first planarization layer is located between the first light-emitting layer and the second light-emitting layer; the first planarization layer allows the first color light to pass through; A second planarization layer is located between the second light-emitting layer and the third light-emitting layer; the second planarization layer allows both the first color light and the second color light to pass through; a plurality of the third LED units are arranged on the second planarization layer; The third planarization layer is disposed on the third light emitting layer; the third planarization layer allows the first color light, the second color light, and the third color light to pass through.

4. The MicroLED micro display chip according to claim 3, wherein: Also includes: a first bonding layer, located between the driving panel and the first LED unit; the driving panel further comprises a first common contact, and the first doped semiconductor layer of the first LED unit is connected to the corresponding first common contact; a second bonding layer, located between the first planarization layer and the second LED unit; the driving panel further comprises a second common contact, and the first doped semiconductor layer of the second LED unit is connected to the corresponding second common contact; The third bonding layer is located between the second planarization layer and the third LED unit; the driving panel also includes a third common contact, and the first doped semiconductor layer of the third LED unit is connected to the corresponding third common contact.

5. The MicroLED micro display chip according to claim 4, wherein: The second bonding layer has a first opening at a position corresponding to the first LED unit; The third bonding layer has a second opening at a position corresponding to the first LED unit; the third bonding layer has a third opening at a position corresponding to the second LED unit.

6. The MicroLED micro display chip according to claim 5, wherein: The first planarization layer has a plurality of first through holes, the plurality of first through holes are respectively arranged around the first LED unit, and the first color light is emitted through the first through holes; The second planarization layer has a plurality of second through holes, the plurality of second through holes are respectively arranged around the second LED unit, and the second color light is emitted through the second through holes; The third planarization layer has a plurality of third through holes, the plurality of third through holes are respectively arranged around the third LED unit, and the third color light is emitted through the third through holes; The second planarization layer further has a plurality of fourth through holes, and the fourth through holes are arranged relative to the first through holes; the third planarization layer further has a plurality of fifth through holes, and the fifth through holes are arranged relative to the fourth through holes; the first through holes, the fourth through holes and the fifth through holes are connected in sequence, and form a first recessed area with the first LED unit; The third planarization layer further has a plurality of sixth through holes, and the sixth through holes are arranged relative to the second through holes; the sixth through holes are connected to the second through holes, and form a second recessed area between the sixth through holes and the second LED unit; A third recessed area is formed between the third through hole and the third LED unit.

7. The MicroLED micro display chip according to claim 6, wherein: Also includes: A filling layer, wherein the filling layer comprises a first filling unit, a second filling unit and a third filling unit; The first filling unit fills the first concave area, the second filling unit fills the second concave area, and the third filling unit fills the third concave area.

8. The MicroLED micro display chip according to claim 6, wherein: Also includes: a reflective layer, wherein the reflective layer is disposed on a side wall of any one of the first recessed area, the second recessed area, and the third recessed area; or The reflective layer is disposed on a side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole, and the sixth through hole.

9. The MicroLED micro display chip according to claim 1, wherein: Also includes: The microlens array includes a plurality of microlens units, and the microlens units are arranged above at least one of the first LED unit and the second LED unit.

10. The MicroLED micro display chip according to claim 3, wherein: The first light-emitting layer further includes a first passivation layer and a first electrode layer; the first passivation layer covers the first LED unit, and the first passivation layer has a first opening exposing the second doped semiconductor layer of the first LED unit; The first electrode layer electrically connects the second doped semiconductor layer of the corresponding first LED unit to the corresponding first contact through the first opening; The second light emitting layer further includes a second passivation layer and a second electrode layer, the second passivation layer covers the second LED unit, and the second passivation layer has a second opening exposing the second doped semiconductor layer of the second LED unit; The second electrode layer electrically connects the second doped semiconductor layer of the corresponding second LED unit to the corresponding first contact through the second opening; The third light-emitting layer also includes a third passivation layer and a third electrode layer, the third passivation layer covers the third LED unit, and the third passivation layer has a third opening exposing the second doped semiconductor layer of the third LED unit; the third electrode layer electrically connects the second doped semiconductor layer of the third LED unit to the corresponding first contact through the three openings.

11. The MicroLED micro display chip according to claim 10, wherein: The first light emitting layer further includes a first protective layer, and the first protective layer covers the first passivation layer and the first electrode layer; The second light emitting layer further comprises a second protective layer, and the second protective layer covers the second passivation layer and the second electrode layer; The third light emitting layer further includes a third protective layer, and the third protective layer covers the third passivation layer and the third electrode layer.

12. The MicroLED micro display chip according to claim 10, wherein: Also includes: a plurality of conductive posts, each of which is disposed on and connected to the corresponding first contact points; The conductive pillars are connected to the corresponding first electrode layer, the corresponding second electrode layer and the corresponding third electrode layer.

13. A method for preparing a MicroLED micro display chip, wherein: include: Providing a driving panel, the driving panel comprising a plurality of first contacts; forming a first light-emitting layer on the driving panel, wherein the first light-emitting layer comprises a plurality of first LED units, the first LED units are arranged on the driving panel, and the first LED units are used to emit first color light; forming a second light-emitting layer above the first light-emitting layer, wherein the second light-emitting layer comprises a plurality of second LED units arranged in an array, and the second LED units are used to emit light of a second color; Among them, the orthographic projections of the first LED unit and the second LED unit on the driving panel do not overlap; the second doped semiconductor layer of the first LED unit and the second doped semiconductor layer of at least one adjacent second LED unit are electrically connected to the driving panel through the first contact; the first LED unit and the second LED unit can be driven separately by the driving panel through time sharing.

14. The method for preparing a MicroLED micro display chip according to claim 13, wherein: The method further comprises: forming a third light-emitting layer above the second light-emitting layer, wherein the third light-emitting layer comprises a plurality of third LED units arranged in an array, and the third LED units are used to emit a third color light; Among them, the orthographic projection of the third LED unit does not overlap with that of the first LED unit and the second LED unit on the driving panel; the second doped semiconductor layer of the third LED unit, the second doped semiconductor layer of at least one adjacent first LED unit, and the second doped semiconductor layer of at least one adjacent second LED unit are all electrically connected to the corresponding first contacts; and the third LED unit can be driven individually by the driving panel through time sharing.

15. The method for preparing a MicroLED micro display chip according to claim 14, wherein: Before forming the second light-emitting layer on the first light-emitting layer, forming a first planarization layer on the first light-emitting layer, wherein the first planarization layer allows the first color light to pass through; Before forming the third light-emitting layer on the second light-emitting layer, forming a second planarization layer on the second light-emitting layer, wherein the second planarization layer allows both the first color light and the second color light to pass through; After forming a third light-emitting layer on the second light-emitting layer, a third planarization layer is formed on the third light-emitting layer, wherein the third planarization layer allows the first color light, the second color light, and the third color light to pass through.

16. The method for preparing a MicroLED micro display chip according to claim 15, further comprising: Bonding the driving panel and the first LED unit via a first bonding layer; The driving panel further includes a first common contact, and the first doped semiconductor layer of the first LED unit is connected to the corresponding first common contact; The first planarization layer and the second LED unit are bonded via a second bonding layer; the driving panel further comprises a second common contact, and the first doped semiconductor layer of the second LED unit is connected to the corresponding second common contact; The second planarization layer and the third LED unit are bonded via a third bonding layer; the driving panel further comprises a third common contact, and the first doped semiconductor layer of the third LED unit is connected to the corresponding third common contact.

17. The method for preparing a MicroLED micro display chip according to claim 16, further comprising: Forming a first opening exposing the first LED unit at a position of the second bonding layer corresponding to the first LED unit; A second opening exposing the first LED unit is formed at a position of the third bonding layer corresponding to the first LED unit, and a third opening exposing the second LED unit is formed at a position of the third bonding layer corresponding to the second LED unit.

18. The method for preparing a MicroLED micro display chip according to claim 17, wherein: forming a plurality of first through holes on the first planarization layer, wherein the plurality of first through holes are respectively arranged around the first LED unit, and the first color light is emitted through the first through holes; forming a plurality of second through holes and a plurality of fourth through holes on the second planarization layer, wherein the plurality of second through holes are respectively arranged around the second LED unit, and the second color light is emitted through the second through holes, and the fourth through holes are arranged relative to the first through holes; A plurality of third through holes, a plurality of fifth through holes, and a plurality of sixth through holes are formed on the third planarization layer, wherein the plurality of third through holes are respectively arranged around the third LED unit, and the third color light is emitted through the third through holes, the fifth through hole is arranged relative to the fourth through hole, and the sixth through hole is arranged relative to the second through hole; The first through hole, the fourth through hole and the fifth through hole are connected in sequence, and form a first recessed area with the first LED unit; The sixth through hole is connected to the second through hole, and forms a second recessed area between the sixth through hole and the second LED unit; A third recessed area is formed between the third through hole and the third LED unit; The method also includes: forming a filling layer; the filling layer includes a first filling unit, a second filling unit and a third filling unit; the first filling unit fills the first recessed area, the second filling unit fills the second recessed area, and the third filling unit fills the third recessed area.

19. The method for preparing a MicroLED micro display chip according to claim 18, wherein: Before forming the filling layer, the method further comprises: forming a reflective layer on a side wall of any one of the first recessed region, the second recessed region, and the third recessed region; or A reflective layer is formed on a side wall of at least one of the first through hole, the second through hole, the third through hole, the fourth through hole, the fifth through hole, and the sixth through hole.

20. The method for preparing a MicroLED micro display chip according to claim 18, wherein: After forming the filling layer, the method further comprises: A microlens array is formed, wherein the microlens array includes a plurality of microlens units, and the microlens unit is disposed above at least one of the first LED unit, the second LED unit, and the third LED unit.

21. The method for preparing a MicroLED micro display chip according to claim 17, wherein: The step of forming a first light-emitting layer on the driving panel further includes: forming a plurality of the first LED units, a first passivation layer, and a first electrode layer, wherein the first passivation layer covers the first LED unit and the first bonding layer, the first passivation layer has a first opening exposing the second doped semiconductor layer of the first LED unit, and the first electrode layer electrically connects the second doped semiconductor layer of the first LED unit to the corresponding first contact through the first opening; The step of forming a second light-emitting layer on the first planarization layer further includes: forming a plurality of the second LED units, a first second passivation layer, and a second electrode layer, wherein the second passivation layer covers the second LED unit and the second bonding layer, the second passivation layer has a second opening exposing the second doped semiconductor layer of the second LED unit, and the second electrode layer electrically connects the second doped semiconductor layer of the second LED unit to the corresponding first contact through the second opening; The step of forming a third light-emitting layer on the second planarization layer further includes: forming a plurality of the third LED units, a third passivation layer, and a third electrode layer, wherein the third passivation layer covers the third LED unit and the third bonding layer, the third passivation layer has a third opening exposing the second doped semiconductor layer of the third LED unit, and the third electrode layer electrically connects the second doped semiconductor layer of the third LED unit to the corresponding first contact through the three openings.

22. The method for preparing a MicroLED micro display chip according to claim 21, wherein: The step of forming a plurality of the first LED units comprises: Providing a first substrate, on which a first LED epitaxial layer is disposed, wherein the first LED epitaxial layer comprises a first doped semiconductor layer, an active layer, and a second doped semiconductor layer which are stacked; Bonding the driving panel to the first LED epitaxial layer via a first bonding layer; removing the first substrate and exposing the second doped semiconductor layer of the first LED epitaxial layer; Etching the first LED epitaxial layer to form a plurality of the first LED units; The step of forming a plurality of the second LED units comprises: Providing a second substrate, on which a second LED epitaxial layer is disposed, wherein the second LED epitaxial layer includes a first doped semiconductor layer, an active layer, and a second doped semiconductor layer that are stacked; Bonding the first planarization layer to the second LED epitaxial layer through the second bonding layer; removing the second substrate and exposing the second doped semiconductor layer of the second LED epitaxial layer; Etching the second LED epitaxial layer to form a plurality of second LED units; The step of forming a plurality of the third LED units comprises: Providing a third substrate, on which a third LED epitaxial layer is disposed, wherein the third LED epitaxial layer comprises a first doped semiconductor layer, an active layer, and a second doped semiconductor layer which are stacked; Bonding the second planarization layer to the third LED epitaxial layer through the third bonding layer; removing the third substrate and exposing the second doped semiconductor layer of the third LED epitaxial layer; The third LED epitaxial layer is etched to form a plurality of the third LED units.

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