Wireless module and electronic device comprising same

The wireless module design addresses warping issues in antenna boards by using a grid array with selective solder placement and copper portions on lower layers, ensuring stable connections and improved signal transmission in multi-antenna systems.

WO2025143642A1PCT designated stage expired Publication Date: 2025-07-03SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/KR2024/020109
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-29
Filing Date
2024-12-09
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

The challenge of reducing propagation path loss and increasing transmission distance of radio waves in wireless communication systems, particularly in devices with multiple antennas, is exacerbated by the warping and bending of antenna boards due to high-temperature processes, which can lead to cracks and poor solder connections.

Method used

A wireless module design that includes a grid array with solder elements arranged only in specific areas, excluding corners, and incorporates copper portions on lower layers to reduce warping, ensuring stable connections and improved signal transmission.

Benefits of technology

The design effectively minimizes warping and maintains solder integrity, enhancing communication performance by reducing the impact of high-temperature processes on antenna boards, thereby improving signal transmission and reducing noise interference.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a wireless module of an electronic device for performing communication with a terminal. The wireless module may include: a first substrate; a radio frequency (RF) processing circuit electrically connected to the first substrate; a second substrate including a plurality of layers; a plurality of radiators which are arranged in at least one layer among the layers of the second substrate; and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate. The first surface of the second substrate may include a connection region to which the plurality of solder elements are coupled and at least one corner region to which no solder element is coupled. The second substrate may include a copper portion arranged on a layer which differs from the at least one layer among the layers of the second substrate and corresponds to the first surface. The copper portion may include a portion partially formed in the at least one corner region.
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Description

Wireless module and electronic device including same

[0001] The present disclosure relates to a wireless module and an electronic device including the same.

[0002] Beamforming is one of the technologies used to mitigate propagation loss and increase radio transmission distance. Typically, beamforming utilizes multiple antennas to focus radio wave coverage or enhance the directivity of reception in a specific direction. Products equipped with multiple antennas are being developed to enhance communication performance, and it is expected that equipment with an ever-increasing number of antennas will be used.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art related to the present disclosure.

[0004] In embodiments, a wireless module of an electronic device for performing communication with a terminal is provided. The wireless module may include a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a second substrate including a plurality of layers, a plurality of radiators disposed on at least one first layer among the layers of the second substrate, and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate. The first surface of the second substrate may include a connection area where the plurality of solder elements are coupled and at least one corner area where no solder elements are coupled. The second substrate may include a copper portion disposed on at least one second layer different from the at least one first layer among the layers of the second substrate. The copper portion may include a portion partially formed within the at least one corner area.

[0005] In embodiments, an electronic device for performing communication with a terminal is provided. The electronic device may include a grid array including a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a plurality of second substrates, a plurality of radiators disposed on at least one first layer among layers of each of the second substrates, and a plurality of solder elements coupled to a first surface of the first substrate and a first surface of each of the plurality of second substrates. The first surface of each of the plurality of second substrates may include a connection region to which the plurality of solder elements are coupled and at least one corner region to which no solder elements are coupled. Each of the plurality of second substrates may include a copper portion disposed on at least one second layer different from the at least one first layer among the layers. The copper portion may include a portion partially formed within the at least one corner region.

[0006] In embodiments, a wireless module of an electronic device for performing communication with a terminal is provided. The wireless module may include a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a second substrate including a plurality of layers, a plurality of radiators disposed on at least one layer among the layers of the second substrate, and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate. The first surface of the second substrate may include a connection area where the plurality of solder elements are coupled and at least one corner area where no solder elements are coupled. The second substrate may include a copper portion disposed on a layer that is different from the at least one layer among the layers of the second substrate and corresponds to the first surface. The copper portion may include a portion partially formed within the at least one corner area.

[0007] In embodiments, an electronic device for performing communication with a terminal is provided. The electronic device may include a first substrate; a plurality of radio frequency (RF) processing circuits electrically connected to the first substrate; a plurality of second substrates; a plurality of radiators disposed on at least one layer among layers of each of the second substrates; and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of each of the plurality of second substrates. The first surface of each of the plurality of second substrates may include a connection region to which the plurality of solder elements are coupled and at least one corner region to which no solder element is coupled. Each of the plurality of second substrates may include a copper portion disposed on a layer that is different from at least one layer among the layers and corresponds to the first surface. The copper portion may include a portion partially formed within the at least one corner region.

[0008] Figure 1 illustrates an example of a wireless communication system.

[0009] Figures 2a and 2b illustrate examples of components of an electronic device.

[0010] Figures 3a and 3b show examples of functional configurations of electronic devices.

[0011] Figure 4 shows an example of a wireless module of an electronic device.

[0012] Figure 5 shows an example of a wireless module including an SMD (surface mounted device) type antenna.

[0013] Figure 6 shows an example of a second substrate on which an antenna is placed.

[0014] Fig. 7 shows an example of a first surface of a second substrate on which a ball grid array is arranged.

[0015] Figures 8a and 8b show examples of arrangement of balls in a ball grid array.

[0016] Figures 9a and 9b show other examples of arrangement of balls in a ball grid array.

[0017] Figures 10a, 10b, and 10c illustrate examples of signal lines and ground lines of a ball grid array.

[0018] Figures 11a and 11b show examples of copper portions of the second substrate.

[0019] Figures 12a and 12b show other examples of copper portions of the second substrate.

[0020] Figures 13a and 13b show examples of wireless modules including SMD type antennas.

[0021] Figure 14 illustrates an example of components of an electronic device including a wireless module.

[0022] In connection with the description of the drawings, the same or similar reference numerals may be used for identical or similar components.

[0023] The terms used in this disclosure are used only to describe specific embodiments and may not be intended to limit the scope of other embodiments. The singular expression may include plural expressions unless the context clearly indicates otherwise. Terms used herein, including technical or scientific terms, may have the same meaning as commonly understood by those of ordinary skill in the art described in this disclosure. Terms defined in general dictionaries among the terms used in this disclosure may be interpreted as having the same or similar meaning in the context of the relevant technology, and shall not be interpreted in an idealized or overly formal sense unless explicitly defined in this disclosure. In some cases, even if a term is defined in this disclosure, it cannot be interpreted to exclude embodiments of the present disclosure.

[0024] The various embodiments of the present disclosure described below illustrate a hardware-based approach as an example. However, since the various embodiments of the present disclosure include techniques utilizing both hardware and software, the various embodiments of the present disclosure do not exclude a software-based approach.

[0025] In the following description, terms referring to parts of electronic devices (e.g., substrate, board, PCB (printed circuit board), FPCB (flexible PCB), module, antenna, antenna element, circuit, processor, chip, component, device), terms referring to the shape of parts (e.g., structure, structure, support, contact, protrusion), terms referring to connections between structures (e.g., connection, contact, support, contact structure, conductive member, assembly), terms referring to circuits (e.g., PCB, FPCB, signal line, feeding line, data line, RF signal line, antenna line, RF path, RF module, RF circuit, RF processing circuit, splitter, divider, coupler, combiner), etc. are examples for convenience of description. Therefore, the present disclosure is not limited to the terms described below, and other terms having equivalent technical meanings may be used. In addition, the terms '...bu', '...gi', '...mul', '...che', etc. used below may mean at least one shape structure or a unit that processes a function.

[0026] In addition, in the present disclosure, expressions such as "more than" or "less than" may be used to determine whether a specific condition is satisfied or fulfilled, but this is merely a description for expressing an example and does not exclude descriptions such as "more than" or "less than." A condition described as "more than" may be replaced with "more than," a condition described as "less than" may be replaced with "less than," and a condition described as "more than and less than" may be replaced with "more than and less than." In addition, hereinafter, "A" to "B" mean at least one of elements from A (including A) to B (including B). hereinafter, "C" and / or "D" mean at least one of "C" or "D," that is, including {"C", "D", "C" and "D"}.

[0027] Although the present disclosure describes various embodiments using terms used in some communication standards (e.g., 3rd Generation Partnership Project (3GPP), European Telecommunications Standards Institute (ETSI), extensible radio access network (xRAN), open-radio access network (O-RAN), etc.), these are merely examples for explanation. The various embodiments of the present disclosure can be easily modified and applied to other communication systems.

[0028] The present disclosure relates to a technique for attaching a board (hereinafter, “antenna board”) on which an antenna is arranged to a main board of a wireless module (e.g., an RU module, a radio module) including an SMD (surface mounted device) type antenna. The antenna board may be connected to the main board via a solder array (e.g., a ball grid array (BGA), a land grid array (LGA), a pin grid array (PGA)). For example, a ball grid array may be arranged between the antenna board and the main board. Due to a high temperature process, bending or warping of the antenna board may occur. The wireless module according to embodiments of the present disclosure can reduce the influence due to warping or twisting of the antenna board through solder elements (e.g., balls) that are placed only in areas other than at least one corner area (e.g., an area including a corner of a rectangle) in a specified shape (e.g., a rectangular shape, a square shape, a polygonal shape). In addition, the antenna board according to embodiments of the present disclosure can reduce the influence due to warping or twisting of the antenna board through a copper portion (e.g., a copper portion that is formed partially, not over the entire layer) that is formed across upper layers where the antenna is positioned and other lower layers based on the ground layer.

[0029] Figure 1 illustrates an example of a wireless communication system.

[0030] Figure 1 illustrates a base station (110) and a terminal (120) as some of the nodes utilizing a wireless channel in a wireless communication system. Figure 1 illustrates only one base station, but other base stations identical to or similar to the base station (110) may be included.

[0031] A base station (110) is a network infrastructure that provides wireless access to terminals (120). The base station (110) has coverage defined as a certain geographic area based on the distance at which it can transmit signals. The base station (110) may be referred to as an 'access point (AP)', 'eNodeB (eNB)', '5th generation node', '5G NodeB (NB)', 'wireless point', 'transmission / reception point (TRP)', 'access unit', 'distributed unit (DU)', 'transmission / reception point (TRP)', 'radio unit (RU), remote radio head (RRH), communication equipment, communication device, wireless communication equipment, wireless communication device, electronic device, or other terms having equivalent technical meanings thereto, in addition to a base station. The base station (110) may transmit a downlink signal or receive an uplink signal.

[0032] The terminal (120) is a device used by a user and performs communication with the base station (110) via a wireless channel. In some cases, the terminal (120) may be operated without the involvement of the user. That is, the terminal (120) is a device that performs machine type communication (MTC) and may not be carried by the user. The terminal (120) may be referred to as a 'user equipment (UE)', a 'mobile station', a 'subscriber station', a 'customer premises equipment (CPE)', a 'remote terminal', a 'wireless terminal', an 'electronic device', a 'vehicle terminal', a 'user device', communication equipment, communication device, wireless communication equipment, wireless communication device, or other terms having equivalent technical meanings thereto.

[0033] Beamforming technology is being used as one of the technologies to mitigate propagation path loss and increase the transmission distance of radio waves. Instead of forming a signal in an isotropic pattern using a single antenna, communication equipment may be equipped with multiple antennas to form beamforming coverage. Hereinafter, an antenna array (or may be referred to as an array antenna) including multiple antennas is described. A base station (110) or a terminal (120) may include an antenna array. Each antenna included in the antenna array may be referred to as an array element or an antenna element. Hereinafter, the antenna array in the present disclosure is illustrated as a two-dimensional planar array, but this is only one example and does not limit other embodiments of the present disclosure. The antenna array may be configured in various forms, such as a linear array or a multi-layer array. The antenna array may be referred to as a massive antenna array.

[0034] Figures 2a and 2b illustrate examples of components of an electronic device.

[0035] FIG. 2A may illustrate internal components constituting an electronic device (200). FIG. 2B illustrates six sides (e.g., top, bottom, left, right, and front) of the electronic device (200). The electronic device (200) exemplifies the base station (110) of FIG. 1, but the descriptions of the electronic device (200) described below may be applied to a terminal (120).

[0036] Referring to FIG. 2A, the electronic device (200) may include a radome cover (201), a radio unit (RU) housing (203), a digital unit (DU) cover (205), and an RU module (210). The RU module (210) may include an antenna module (213) and an RU board (215). RF components for the antenna module (213) may be arranged on the RU board (215). The RF components may include at least one of a connector for providing power, a DC / DC converter, a field programmable gate array (FPGA), a low dropout regulator (LDO regulator), or a local oscillator (LO).

[0037] The substrate on which the antenna module (213) is placed may be referred to as an antenna board, an antenna substrate, a radiation substrate, a radiation board, an RF board, or an RF substrate. For example, the substrate on which the antenna module (213) is placed may be a printed circuit board (PCB). Also, for example, the substrate on which the antenna module (213) is placed may be a flexible PCB (FPCB). The RU board (215) may be referred to as a main board, a main substrate, a power board, a mother board, a mother board, a package board, or a filter board. The RU module (210) may be referred to as a baseband unit (BBU) or baseband equipment. To refer to an integrated base station equipped with an RU module (210), terms such as access unit (AU), compact macro, or link cell may be used instead for the operation and function of the RU module (210).

[0038] The electronic device (200) may include a DU module (220). The DU module (220) may include an interface board (221), a modem board (223), and a CPU board (225). The electronic device (200) may include a power module (230), a GPS (240), and a DU housing (250). The DU module (220) may be referred to as a radio unit (RU) or a remote radio head (RRH).

[0039] Referring to FIG. 2b, drawing (260) represents a drawing of the electronic device (200) viewed from above. Drawings (261), (263), (265), and (267) represent drawings of the electronic device (200) viewed from the left, front, right, and rear, respectively. Drawing (270) represents a drawing of the electronic device (200) viewed from below.

[0040] FIGS. 3A and 3B illustrate examples of functional configurations of electronic devices (e.g., base station (110) or terminal (120) of FIG. 1, electronic device (200) of FIG. 2A). The electronic device may include an access unit (AU) (300). The access unit (300) may include an RU (310), a DU (320), and a DC (direct current) / DC module. For example, the RU (310) may refer to an assembly in which antennas and RF components are mounted. For example, the DU (320) may be configured to process a digital wireless signal, and may be configured to encrypt a digital wireless signal to be transmitted to the RU (310), or decrypt a digital wireless signal received from the RU (310). DU (320) can be configured to communicate with an upper node (e.g., CU (centralized unit)) or a core network (e.g., 5GC, EPC) by processing packet data.

[0041] Referring to FIG. 3A, the RU (310) may include a plurality of antenna elements. The RU (310) may include one or more array antennas. For example, the array antenna may be configured as a planar antenna array. The array antenna may correspond to one stream. The array antenna may include a plurality of antenna elements corresponding to one transmit path (or receive path). For example, the array antenna may include 256 antenna elements configured in a 16 x 16 configuration. However, the embodiments of the present disclosure are not limited thereto, and the array antenna may include a plurality of antenna elements. For example, the array antenna may include 384 antenna elements configured in a 16 x 24 configuration.

[0042] The RU (310) may include RF chains for processing signals from each array antenna. The RF chains may be referred to as 'RFA'. The RFA may include RF components for beamforming (e.g., a phase shifter, a power amplifier) ​​and a mixer. The mixer of the RFA may be configured to downconvert an RF signal at an RF frequency to an intermediate frequency (IF) or upconvert an IF signal to a signal at an RF frequency. According to an embodiment, one set of RF chains may correspond to one array antenna. For example, the RU (310) may include four sets of RF chains for four array antennas. The multiple RF chains may be connected to a transmit path or a receive path via a divider (e.g., 1:16). Although not shown in FIG. 3A, according to an embodiment, the RF chains may be implemented as a radio frequency integrated circuit (RFIC). The RFIC may process and generate RF signals supplied to the multiple antenna elements. In terms of processing the above RF signals, the RF chains may be referred to as RF processing circuits.

[0043] The RU (310) may include a digital analog front end (DAFE) and an RFB. The DAFE may be configured to mutually convert a digital signal and an analog signal. For example, the RU (310) may include two DAFEs (DAFE #0, DAFE #1). The DAFE may be configured to upconvert a digital signal (i.e., digital up converting (DUC)) and convert the upconverted signal to an analog signal (i.e., digital to analog converting (DAC)) in a transmit path. The DAFE may be configured to convert an analog signal to a digital signal (i.e., analog to digital converting (ADC)) and downconvert the digital signal (i.e., digital down converting (DDC)) in a receive path. For example, the RFB may include a mixer and a switch corresponding to the transmit path and the receive path. The mixer of the RFB may be configured to upconvert a baseband frequency to an intermediate frequency or downconvert an intermediate frequency signal to a baseband frequency signal. The switch of the RFB may be configured to select one of a transmit path and a receive path. For example, the RU (310) may include two RFBs (e.g., RFB #0, RFB #1).

[0044] The RU (310) may include an FPGA (field programmable gate array) that operates as a controller. The FPGA refers to a semiconductor device that includes designable logic elements and programmable internal circuits. Communication with the DU (320) can be performed via SPI (Serial Peripheral Interface) communication.

[0045] The RU (310) may include an RF local oscillator (LO). The RF LO may be configured to provide a reference frequency for upconversion or downconversion. In one embodiment, the RF LO may be configured to provide a frequency for upconversion or downconversion of the RFB. For example, the RF LO may provide a reference frequency to RFB #0 and RFB #1 through a 2-way divider. For example, the RF LO may be configured to provide a frequency for upconversion or downconversion of the RFA. For example, the RF LO may provide a reference frequency to each of the RFAs (8 for each RF chain, per polarization group) through a 32-way divider.

[0046] Referring to FIG. 3B, the RU (310) may include a DAFE block (311), an IF up / down converter (313), a beamformer (315), an array antenna (317), and a control block (319). The DAFE block (311) may convert a digital signal into an analog signal or an analog signal into a digital signal. The IF up / down converter (313) may correspond to an RFB (e.g., RFB of FIG. 3A). The IF up / down converter (313) may convert a signal of a baseband frequency into a signal of an IF frequency based on a reference frequency supplied from an RF LO, or may convert a signal of an IF frequency into a signal of a baseband frequency. The beamformer (315) may correspond to an RFA (e.g., RFA of FIG. 3A). The beamformer (315) may convert a signal of an RF frequency into a signal of an IF frequency based on a reference frequency supplied from the RF LO, or may convert a signal of an IF frequency into a signal of an RF frequency. The array antenna (317) may include a plurality of antenna elements. Each antenna element of the array antenna (317) may be configured to radiate a signal processed through the RFA. The array antenna (317) may be configured to perform beamforming according to a phase applied by the RFA. The control block (319) may control each block of the RU (310) to perform a command from the DU (320) and the signal processing described above.

[0047] Although a base station (110) is illustrated as an example of an electronic device (200) in FIGS. 2A, 2B, 3A, and 3B, the embodiments of the present disclosure are not limited to the base station (110). The embodiments of the present disclosure can be applied to any electronic device for radiating a wireless signal, as well as a base station composed of a DU and an RU.

[0048] Fig. 4 illustrates an example of a wireless module of an electronic device. For example, the wireless module may include the RU module (210) of Fig. 2a. For example, an electronic device including the wireless module may include a base station (110), a terminal (120), an electronic device (200), an AU (300), or an RU (310).

[0049] Referring to FIG. 4, a RU module (400) is illustrated as a wireless module. The RU module (400) may include a substrate (hereinafter, a first substrate) (e.g., a PCB) on which antenna modules and components for signal processing (e.g., an RF processing circuit (e.g., an RFIC), a connector, a DC (direct current) / DC converter, a DFE) are mounted. The RU module (400) may include a substrate (hereinafter, a second substrate) (e.g., a PCB, an FPCB) on which antennas of the antenna module are mounted. The first substrate may be referred to as an RU board, a main board, a main substrate, a power board, a motherboard, a motherboard, a package board, or a filter board. The second substrate may be referred to as an antenna board, an antenna substrate, a radiation substrate, a radiation board, or an RF board. Hereinafter, the first substrate will be referred to as an RU board and the second substrate will be referred to as an antenna substrate, but terms having equivalent technical meanings may be used interchangeably.

[0050] The RU board (410) may include components for transmitting signals to a radiator (e.g., an antenna). According to one embodiment, one or more second substrates may be arranged on the RU board (410). The one or more second substrates may include an antenna board (420) for a first frequency band (e.g., a frequency band including about 26 GHz, a frequency band including about 28 GHz) and at least an antenna board (430) for a second frequency band (e.g., a frequency band including about 39 GHz). As an example, the first frequency band may include an n258 band (a TDD (timed division duplex) band, which is 24.25 GHz or more and less than 27.5 GHz) or an n257 band (a TDD band, which is 26.5 GHz or more and less than 29.5 GHz) defined in 3GPP. For example, the second frequency band may include the n260 band (a TDD band, 37 GHz or more and less than 40 GHz) defined in 3GPP. The antenna board (420) may include at least one substrate (e.g., six substrates arranged in a 3x2 array) arranged on one plane (e.g., one surface of the RU board (410)). The antenna board (430) may include at least one substrate (e.g., six substrates arranged in a 3x2 array) arranged on one plane (e.g., one surface of the RU board (410)). One or more array antennas may be mounted on the RU board (410). For example, two array antennas may be mounted on the RU board (410). The array antenna for the first frequency band may be arranged on one area of ​​the RU board (410). Additionally, an array antenna for the second frequency band may be placed in another area of ​​the RU board (410).

[0051] Although two antenna modules and array antennas supporting two frequency bands are exemplified in FIG. 4, embodiments of the present disclosure are not limited thereto. To support dual bands, two array antennas may be arranged for each band, and the array antennas mounted on the RU board (410) may be configured to support 2T2R (2-transmit 2-receive).

[0052] The RU board (410) may include components for supplying an RF signal to the antenna. For example, the RU board (410) may include one or more radio frequency programmable gain amplifiers (FPGAs) (451). In addition, for example, the RU board (410) may include one or more local oscillators (LOs) (453). The LOs (453) may be used to supply a reference frequency for upconversion or downconversion in an RF system. In addition, for example, the RU board (410) may include one or more DC / DC converters (455). The DC / DC converters (455) may be used to convert direct current to direct current. In addition, for example, the RU board (410) may include one or more connectors (460). The connectors (460) may be used to transmit electrical signals. The RU board (410) may further include various components for signal processing. For example, the RU board (410) may include one or more dividers. The dividers may be used to distribute and multi-path the input signal. In addition, for example, the RU board (410) may include one or more low dropout regulators (LDOs). The LDOs may be used to suppress external noise and supply power. In addition, for example, the RU board (410) may include one or more voltage regulator modules (VRMs). A VRM may refer to a module for ensuring that an appropriate voltage is maintained. In addition, for example, the RU board (410) may include one or more digital front ends (DFEs). In addition, for example, the RU board (410) may include one or more intermediate frequency (IF) processing units.Additionally, for example, the RU board (410) may include an RF filter for filtering signals.

[0053] FIG. 4 illustrates an exemplary arrangement and configuration for an RU board (410), but for other examples, some of the components illustrated in FIG. 4 may be omitted or a greater number of components may be mounted.

[0054] FIG. 5 illustrates an example of a wireless module (e.g., RU module (400)) including an SMD (surface mounted device) type antenna. To improve communication technology development, productivity, and / or design freedom, an SMD type antenna may be used. An SMD type antenna may be manufactured through a SMT (surface mounted technology) process. The SMD type antenna may include a substrate (e.g., antenna board (420), antenna board (430)) including a plurality of layers, and radiators disposed on at least some of the layers. The SMD type antenna may be disposed on one surface of a substrate (e.g., main board, RU board (410)). The SMD type antenna may be coupled to the substrate through a reflow process. For example, the SMD type antenna may be coupled to the main board through soldering. In a high-temperature reflow process, solder elements are melted, so that the SMD type antenna may be coupled to the main board.

[0055] Referring to FIG. 5, a wireless module (e.g., RU module (400)) may include a first substrate (510), a second substrate (520), and a grid array (530). Example (501) shows a laminated structure including a path through which an RF signal provided from an RF processing circuit (540) is transmitted to a radiator (550) of an antenna. In one direction (e.g., (+) z-axis direction), the first substrate (510), the grid array (530), and the second substrate (520) may be laminated in that order.

[0056] The first substrate (510) may be electrically connected to components for processing and supplying RF signals. For example, components for processing and supplying RF signals may be arranged on one surface of the first substrate (510). For example, one surface of the first substrate (510) may be coupled to an RF processing circuit (540). The first substrate (510) may include a plurality of layers (e.g., 16 layers). The first substrate (510) may include a feed line (515) formed across the plurality of layers. The feed line (515) represents a signal line. The first substrate (510) may include a structure for grounding. An RF signal processed by the RF processing circuit (540) may be transmitted across the layers to the grid array (530) via the feed line (515). To explain the function and arrangement of the first substrate (510), reference may be made to the description of the RU board (410) and the RU board (410) of FIG. 4.

[0057] The second substrate (520) may include a radiator (550). The second substrate (520) may include a plurality of layers (e.g., six layers). The radiator (550) may be positioned on at least one layer among the plurality of layers. The second substrate (520) may be a component for an SMD type antenna and may include wiring for transmitting an RF signal to the radiator (550). Although FIG. 5 illustrates an example in which the radiator (550) is positioned within the second substrate (520), the embodiments of the present disclosure are not limited thereto. For example, at least one radiator among the radiators of the RU module (400) may be positioned on one surface of the second substrate (520). As a non-limiting example, in order to improve the performance of radiation using the second substrate (520), a resonator (555) may be positioned on the second substrate (520) in addition to the radiator (550). To explain the function and arrangement of the second substrate (520), reference may be made to the antenna board (420), antenna board (430) and descriptions thereof in FIG. 4.

[0058] The grid array (530) can be used to attach a substrate of an SMD type antenna (e.g., a second substrate (520)) to a main board (e.g., a first substrate (510)). For example, the grid array (530) can be placed between the first substrate (510) and the second substrate (520). For example, the grid array (530) can be coupled to a first surface of the first substrate (510) and a first surface of the second substrate (520). When the first substrate (510), the grid array (530), and the second substrate (520) are sequentially stacked in one direction (e.g., the (+) z-axis direction), the first surface of the first substrate (510) can face the one direction, and the second surface of the second substrate (520) can face a direction opposite to the one direction (e.g., the (-) z-axis direction). The grid array (530) may be used to mount the second substrate (520) on the surface of the first substrate (510) (e.g., the first surface of the first substrate (510)) through a reflow process. The grid array (530) may include a plurality of solder elements. For example, the grid array (530) may include a ball grid array (BGA). Each solder element may be a solder ball. For example, the grid array (530) may include a land grid array (LGA). Each solder element may be a land.

[0059] A second substrate (520) may be placed on a first substrate (510) in the manner illustrated in example (501). Meanwhile, example (501) is merely an example for explaining a laminated structure, and example (501) is not used to limit other features of the wireless module. For example, the size of the first surface of the first substrate (510) may be larger than the size of the first surface of the second substrate (520). A plurality of second substrates may be placed on the first surface of the first substrate (510). For example, as in example (503), a second substrate-a (520a) and a second substrate-b (520b) may be placed on the first substrate (510). The second substrate-a (520a) may be understood as an example of the second substrate (520). The second substrate-b (520b) may be understood as an example of the second substrate (520). A first surface of a first substrate (510) and a first surface of a second substrate-a (520a) may be coupled through a first grid array (530a). A first surface of a first substrate (510) and a first surface of a second substrate-b (520b) may be coupled through a second grid array (530b). In one embodiment, the wireless module (e.g., the RU module (400)) may include a plurality of second substrates (e.g., the second substrates (520)) for a first frequency band (e.g., a frequency band including about 26 GHz). For example, the wireless module may include 384 antenna elements. Each second substrate may include 64 antenna elements. The wireless module may include six second substrates. For example, one antenna element may include a plurality of radiators (e.g., the radiators (550)). For example, the antenna board (420) may include six second substrates. For example, the antenna board (430) may include six second substrates.

[0060] An RF signal supplied through an RF processing circuit (540) may be provided to a second substrate (520) via a feed line (515). The second substrate (520) may transmit the RF signal to a radiator (550) through a feed line formed on one layer. At least one layer of the first substrate (510) and the second substrate (520) may be understood as a feed unit (561). The radiator (550), the resonator (555), and at least one other layer for the radiator (550) in the second substrate (520) may be understood as a radiation unit (563). The second substrate (520) may include a ground layer (570). At least one layer disposed lower than the ground layer (570) in one direction (e.g., the (+) z-axis direction) may be included in the feed unit (561). The at least one layer may be referred to as a lower layer of the second substrate (520). Layers positioned above the ground layer (570) in one direction (e.g., the (+) z-axis direction) may be included in the radiating portion (563). The at least one layer may be referred to as an upper layer of the second substrate (520). A detailed description of the second substrate (520) is described with reference to FIG. 6.

[0061] A first substrate (510) and a second substrate (520) may be bonded through a grid array (530). When bonding using the grid array (530), PCB warpage may occur. For example, the first substrate (510), the grid array (530), and the second substrate (520) may be bonded through a reflow process at a high temperature. For example, in the reflow process, the solder elements of the grid array (530) begin to melt at about 217°C, but the warpage of the second substrate (520) may begin to warp at about 150°C. When the temperature decreases after the high-temperature treatment, the solder elements that harden first may hinder the restoration of the warpage of the second substrate (520). More specifically, for example, the shape of the second substrate (520) may be rectangular. It is confirmed that the degree of warpage increases in the corner regions of the rectangle (e.g., regions adjacent to each vertex of the rectangle). This may cause cracks in other solder elements, or at least one solder element may not be bonded to both the first surface of the first substrate (510) and the first surface of the second substrate (520). In addition, the upper layers of the second substrate (520) require a fill-cut of an area (525) for the placement of the radiator (550). Due to the fill-cut, the remaining copper ratio of the upper layers of the second substrate (520) may be greater than a certain level or more than the remaining copper ratio of the lower layers of the second substrate (520). As the difference between the remaining copper ratios of the upper layers and the lower layers increases, the degree of warping of the second substrate (520) may increase during the process. Embodiments of the present disclosure provide a technique for reducing the warpage characteristics of a substrate (e.g., a first substrate (510)) in bonding a first substrate (510) and a second substrate (520) through a grid array (530) therebetween.

[0062] FIG. 6 shows an example of a second substrate (e.g., first substrate (520)) on which an antenna (e.g., radiator (550)) is placed.

[0063] Referring to FIG. 6, the first substrate (520) may include a plurality of layers. For example, the first substrate (520) may include a first layer (611), a second layer (612), a third layer (613), a fourth layer (614), a fifth layer (615), and a sixth layer (616). The fourth layer (614) may include a ground portion. For example, the fourth layer (614) may be a ground substrate. The fourth layer (614) may be referred to as a ground layer in terms of providing a ground. Assuming that one direction (e.g., the (+) z-axis direction) is upward, a layer positioned above the fourth layer (614) may be referred to as an upper layer. The first substrate (520) may include three upper layers (e.g., the first layer (611), the second layer (612), and the third layer (613)). When one direction (e.g., the (+) z-axis direction) is assumed to be upward, a layer positioned below the fourth layer (614) may be referred to as a lower layer. The second substrate (520) may include two lower layers (e.g., the fifth layer (615) and the sixth layer (616)). For example, among the layers of the second substrate (520), the fifth layer (615) may include a feed line for transmitting an RF signal. In terms of signal transmission, the fifth layer (615) may be referred to as a feed layer. The lower layers can provide an RF signal transmitted from the first substrate (510) to a radiator (e.g., radiator (550)) located in the upper layers. When radiating a signal in one direction, the radiator (e.g., radiator (550)) can be placed in at least some of the upper layers of the second substrate (520). A space for mounting the radiator (550) may be required in at least some of the upper layers. For example, the second substrate (520) can include a fill-cut region in which at least a portion of the copper foil region is removed.Due to the above space, the copper ratio of the upper layers of the second substrate (520) may be lower than the copper ratio of the lower layers of the second substrate (520). The difference between the copper ratio of the upper layers and the copper ratio of the lower layers may cause warping or bending of the second substrate (520) during a high temperature process. Since the difference between the copper ratio of the upper region and the copper ratio of the lower region is clear with respect to the fourth layer (614), which is the ground layer, in the SMD type antenna, warping of the second substrate (520) may occur more severely. To alleviate this problem, embodiments of the present disclosure provide a technique for reducing the warping characteristic of a substrate (e.g., the first substrate (510)) through the copper portion (or may be referred to as a copper pattern, a copper foil pattern, or a copper foil portion) of the lower layers of the second substrate (520) in the bonding of the first substrate (510) and the second substrate (520).

[0064] Although a second substrate (520) having a total of six layers is illustrated in FIG. 6, embodiments of the present disclosure are not limited thereto. If the substrate includes layers positioned above and below the ground layer, it can be understood as a second substrate (520) according to an embodiment of the present disclosure.

[0065] Fig. 7 illustrates an example of a first surface of a second substrate (e.g., a second substrate (520)) on which a ball grid array is arranged. A grid array (530) coupled with the second substrate (520) may include the ball grid array. The first surface of the second substrate (520) represents a surface on which the second substrate (520) of a wireless module (e.g., an RU module (400)) is coupled to a main board (e.g., the first substrate (510)) via a grid array (e.g., the grid array (530)). In Fig. 7, areas necessary for explaining the arrangement of balls of the ball grid array within the second substrate (520) may be defined.

[0066] Referring to FIG. 7, a first surface of a second substrate (520) may be coupled with a grid array (530). The first surface may include a substrate area (710) formed along a boundary of the first surface. The substrate area (710) may correspond to the entire area of ​​the first surface. For example, the substrate area (710) may have a polygonal shape. As an example, the substrate area (710) may have a rectangular shape. Since the second surface of the second substrate (520) is rectangular (or square), the substrate area (710) may have a rectangular shape. The substrate area (710) of the first surface may include a connection area (720). The connection area (720) may represent an area where solder elements of the grid array (530) are coupled. The substrate area (710) of the first surface may include at least one corner area. In the present disclosure, a corner region may refer to a region that includes a vertex of a substrate region (710) of a second substrate (520) and to which a solder element is not bonded. For example, the substrate region (710) may include a first corner region (731) corresponding to a first vertex of a rectangle, a second corner region (732) corresponding to a second vertex of the rectangle, a third corner region (733) corresponding to a third vertex of the rectangle, and a fourth corner region (734) corresponding to a fourth vertex of the rectangle.

[0067] The second substrate (520) may include a plurality of fiducial mark portions to be aligned on the first surface of the first substrate (510) when mounted on the first surface of the first substrate (510). For example, the second substrate (520) may include a first fiducial mark portion (741), a second fiducial mark portion (742a), an additional fiducial mark portion (742b), a third fiducial mark portion (743), and a fourth fiducial mark portion (744). The first fiducial mark portion (741) may be positioned in the first corner region (731). The second fiducial mark portion (742a) may be positioned in the second corner region (732). To prevent reverse mounting of the second substrate (520), the additional fiducial mark portion (742b) may be positioned in the second corner region (732). The third reference mark portion (743) can be placed in the third corner area (733). The fourth reference mark portion (744) can be placed in the fourth corner area (734).

[0068] The solder elements of the grid array (530) according to the embodiments may be arranged only within the connection area (720), which is a part of the substrate area (710), rather than the entire substrate area (710). In other words, the solder elements may be bonded only to an area (e.g., the connection area (720)) other than the corner areas (e.g., the first corner area (731), the second corner area (732), the third corner area (733), and the fourth corner area (734)) within the substrate area (710). Let us assume a process of bonding a first substrate (510) and a second substrate (520) via the grid array (530). The second substrate (520) may warp during a high-temperature process (e.g., a reflow process). If solder elements are arranged in each corner region of the substrate region (710), when the temperature decreases after the high-temperature process, the solder elements may hinder the restoration of warpage of the second substrate (520). Therefore, the grid array (530) according to embodiments of the present disclosure may include solder elements that are bonded only in a region (e.g., a connection region) excluding at least a portion (e.g., a first corner region (731), a second corner region (732), a third corner region (733), and a fourth corner region (734)) of the substrate region (710).

[0069] The solder elements coupled to the second substrate (520) may not be arranged in corner regions (e.g., the first corner region (731), the second corner region (732), the third corner region (733), and the fourth corner region (734)) of the substrate region (710). Since the solder elements are not arranged in the corner regions, a certain relationship may be formed between the vertices of the substrate region (710) and the solder elements. According to one embodiment, the solder elements may include a first solder element closest to the vertex of the substrate region (710) and a second solder element different from the first solder element. When the substrate area (710) is assumed to be a two-dimensional plane (e.g., an xy plane), the distance between the vertex and the first solder element on a first axis (e.g., an x-axis) may be shorter than the distance between the vertex and the second solder element on the first axis (e.g., an x-axis). On the other hand, the distance between the vertex and the first solder element on a second axis (e.g., an y-axis) substantially perpendicular to the first axis may be longer than the distance between the vertex and the second solder element on the second axis (e.g., an y-axis). This is because solder elements are not arranged in corner areas corresponding to the vertices of the substrate area (710) since the connection area (720) has a different shape from the substrate area (710).

[0070] According to one embodiment, among the solder elements coupled to the second substrate (520), the solder elements arranged at a boundary (boarder) may be arranged to form a boundary of a specified shape. The boundary represents the outer edge of a closed shape including the solder elements. For example, the solder elements forming the boundary may be arranged along the boundary of a shape having a shape in which an area corresponding to a vertex of a rectangular shape is cut off. For example, the solder elements forming the boundary may correspond to the boundary of an octagon. For example, the solder elements forming the boundary may include solder elements arranged in a direction different from a first direction (e.g., x-axis) and a second direction (e.g., y-axis) forming the substrate area (710) within a plane (e.g., xy plane) of the substrate area (710). For example, the connection area (720) may include solder elements arranged in a direction of about 45 degrees at a boundary adjacent to a corner area.

[0071] According to one embodiment, the solder elements coupled to the second substrate (520) may include solder elements for ground and solder elements for signal lines. The solder elements for the signal lines may be used to feed RF signals. The solder elements for the signal lines may be electrically connected to a feed line (e.g., feed line (515)) in the laminated structure of example (501) of FIG. 5. The solder elements for the signal lines are described in more detail in FIGS. 10A and 10B. To form a grid of the grid array (530), the solder elements for the ground may include solder elements arranged at regular intervals in one axis. For example, the solder elements may be arranged at regular intervals in the x-axis (hereinafter, referred to as a first interval). For example, the solder elements may be arranged at regular intervals in the y-axis (hereinafter, referred to as a second interval). The second spacing may be the same as or different from the first spacing. In one embodiment, among the solder elements, the solder elements arranged at the boundary may include solder elements whose distance to one side of the second substrate (e.g., one side of a rectangle) is longer than the specified spacing.

[0072] The connection area (720) according to embodiments of the present disclosure may correspond to a portion of the substrate area (710) rather than the entire substrate area (710). In other words, a portion of the substrate area (710) (e.g., the first corner area (731), the second corner area (732), the third corner area (733), and the fourth corner area (734)) may not be joined with solder elements (e.g., solder elements for signal lines, solder elements for ground). Solder elements (e.g., solder elements for ground) that are uniformly arranged in the connection area (720) may no longer be uniformly arranged in the portion. In addition, if solder elements for signal lines are arranged in a part of the substrate area (710) (e.g., the first corner area (731), the second corner area (732), the third corner area (733), and the fourth corner area (734)), the solder elements for the signals may not be arranged in the part because the bending may affect the power supply performance. For example, among the solder elements coupled to the second substrate (520), the solder elements forming the boarder may include the first solder element. For example, among the solder elements coupled to the second substrate (520), a solder element positioned next to the first solder element in one direction (e.g., the (+) y-axis) may not exist. In other words, based on the one direction, the first solder element may be the solder element positioned at the end. The distance between the second solder element adjacent to the first solder element and the first solder element in the direction opposite to the above-mentioned one direction (e.g., the (-) y-axis) may be referred to as a designated distance. If the distance between the first solder element and the first surface (or substrate area (710)) of the second substrate (520) in the above-mentioned one direction is longer than the designated distance, it may be confirmed that an empty area is located on the first surface of the second substrate (520).The above-mentioned empty area refers to a location included in an area (e.g., a corner area) where the placement of solder elements is restricted among locations where solder elements (e.g., solder elements for grounding) can be placed, considering the above-mentioned specified interval. According to one embodiment, the corner area may include one or more empty areas.

[0073] As the number of solder elements bonded to the second substrate (520) decreases, the degree of warpage of the second substrate (520) may decrease. However, if the number of solder elements is excessively small, problems may occur in the performance of the ground line or signal line. As the number of solder elements for grounding decreases, noise and / or interference may easily be introduced into the transmitted signal. Therefore, the grid array (530) may include solder elements arranged in consideration of the above-described trade-off. In order to reduce warpage degradation while maintaining a certain level of performance or higher, the grid array (530) may include solder elements that are not arranged only in a designated area (e.g., a corner area), but are evenly arranged in the remaining area (e.g., a connection area (720)).

[0074] Although an example in which solder elements are not arranged in a corner region including a vertex is described in FIG. 7, embodiments of the present disclosure are not limited thereto. In addition to the corner region including a vertex, solder elements may not be arranged in a region adjacent to a side of a rectangle of the substrate region (710). For example, let the spacing between solder elements in the connection region (720) with respect to a first axis (e.g., x-axis) be a first length. A boundary of the substrate region (710) parallel to a second axis (e.g., y-axis) that is perpendicular to the first axis may be a side of the rectangle. On the first axis, a solder element closest to the boundary (hereinafter, referred to as a boundary solder element) and a distance between the boundary may be longer than the first length. In other words, even though a solder element can be arranged next to the boundary solder element according to the spacing of the first length, the solder element may not be bonded to the substrate area (710) due to limitations in the corner area. For example, let the spacing between solder elements in the connection area (720) with respect to the second axis (e.g., the y-axis) be the second length. The boundary of the substrate area (710) parallel to the first axis (e.g., the x-axis) that is perpendicular to the second axis may be one side of a rectangle. On the second axis, the distance between the solder element closest to the boundary (hereinafter, the boundary solder element) and the boundary may be longer than the second length. In other words, even though a solder element can be arranged next to the boundary solder element according to the spacing of the second length, the solder element may not be bonded to the substrate area (710) due to limitations in the corner area.

[0075] Figures 8a and 8b illustrate examples of arrangements of balls in a ball grid array. A grid array (530) coupled with a second substrate (520) may include the ball grid array. In Figures 8a and 8b, an antenna board (420) for a first frequency band (e.g., a frequency band including about 26 GHz, a frequency band including about 28 GHz) is illustrated as an example of the second substrate (520).

[0076] Referring to FIG. 8A, the connection area (720) where the balls of the grid array (530) in the first arrangement (810) are arranged may be the substrate area (710) of the first surface of the second substrate (520). For example, the connection area (720) may have a rectangular shape. The balls combined within the connection area (720) may include balls for grounding and balls for signal lines. For example, the balls for grounding may include balls (hereinafter, grid balls) that are uniformly arranged within the connection area (720). Each grid ball corresponds to a ground ball.

[0077] In the second arrangement (820), the connection area (720) where the balls of the grid array (530) are arranged may have a shape in which some balls (e.g., some of the grid balls) are removed from the first arrangement (810). For example, the second arrangement (820) may have a shape in which balls adjacent to each corner of a rectangle in the first arrangement (810) are removed. As the balls arranged in the corner areas with respect to the first arrangement (810) are removed, the second arrangement (820) may not have any balls (e.g., balls for ground, balls for signal lines) arranged in the corner areas. For example, the connection area (720) may have an octagonal shape. The balls combined within the connection area (720) may include balls for ground and balls for signal lines. As an example, the balls for ground may include grid balls that are uniformly arranged within the connection area (720).

[0078] In the third arrangement (830), the connection area (720) where the balls of the grid array (530) are arranged may have a shape in which some balls (e.g., some of the grid balls) are removed from the second arrangement (820). For example, the third arrangement (830) may have a shape in which the balls arranged in the first portion (831), the balls arranged in the second portion (832), the balls arranged in the third portion (833), and the balls arranged in the fourth portion (834) are removed. For example, the connection area (720) may have an octagonal shape. The balls combined within the connection area (720) may include balls for grounding and balls for signal lines. As an example, the balls for grounding may include grid balls arranged within the connection area (720).

[0079] In the fourth arrangement (840), the connection area (720) where the balls of the grid array (530) are arranged may have a shape in which some balls (e.g., some of the grid balls) are removed from the third arrangement (830). For example, the fourth arrangement (840) may have a shape in which the balls arranged in the fifth portion (841) and the balls arranged in the sixth portion (842) are removed. For example, the connection area (720) may have an octagonal shape. The balls combined within the connection area (720) may include balls for grounding and balls for signal lines. For example, the balls for grounding may include grid balls that are uniformly arranged within the connection area (720).

[0080] Referring to FIG. 8B, a graph (850) represents the degree of warpage of a second substrate (520) having a third batch (830) according to temperature. The horizontal axis of the graph (850) represents the temperature (unit: Celsius, ℃) at which the reflow process is performed. The vertical axis of the graph (850) represents the warpage length (unit: um) of the second substrate (520). The first line (851) represents the degree of warpage of the substrate area (710) according to temperature in the third batch (830). The second line (852) represents the degree of warpage of the connection area (720) according to temperature in the third batch (830). When the reference value is about -140 um, it can be confirmed that the degree of warpage of the connection area (720) where the balls of the third batch (830) are arranged at about 250 ℃ is less than the reference value.

[0081] Figures 9a and 9b illustrate other examples of arrangements of balls in a ball grid array. A grid array (530) coupled with a second substrate (520) may include the ball grid array. In Figures 9a and 9b, as an example of the second substrate (520), at least an antenna board (430) for a second frequency band (e.g., a frequency band including about 39 GHz) is described.

[0082] Referring to FIG. 9A, the connection area (720) where the balls of the grid array (530) in the first arrangement (910) are arranged may be the substrate area (710) of the first surface of the second substrate (520). For example, the connection area (720) may have a rectangular shape. The balls combined within the connection area (720) may include balls for grounding and balls for signal lines. As an example, the balls for grounding may include balls (hereinafter, grid balls) that are uniformly arranged within the connection area (720).

[0083] In the second arrangement (920), the connection area (720) where the balls of the grid array (530) are arranged may have a shape in which some balls (e.g., some of the grid balls) are removed from the first arrangement (910). For example, the second arrangement (920) may have a shape in which the balls forming the boundary (or the balls arranged along the substrate area (710)) among the balls of the first arrangement (910) are removed. As the balls located at the edges with respect to the first arrangement (910) are removed, no balls (e.g., balls for ground, balls for signal lines) may be arranged in the corner areas of the second arrangement (920). For example, the connection area (720) may have an octagonal shape. The balls may include balls for ground and balls for signal lines. As an example, the balls for ground may include grid balls that are uniformly arranged within the connection area (720).

[0084] In the third arrangement (930), the connection area (720) where the balls of the grid array (530) are arranged may have a shape in which some balls (e.g., some of the grid balls) are removed from the second arrangement (920). For example, the third arrangement (930) may have a shape in which the balls arranged in the first portion (931), the balls arranged in the second portion (932), the balls arranged in the third portion (933), and the balls arranged in the fourth portion (934) are removed. For example, the connection area (720) may have an octagonal shape. The balls may include balls for grounding and balls for signal lines. As an example, the balls for grounding may include grid balls that are uniformly arranged within the connection area (720).

[0085] Referring to FIG. 9B, a graph (950) represents the degree of warpage of a second substrate (520) having a third batch (930) according to temperature. The horizontal axis of the graph (950) represents the temperature (unit: Celsius, degree) at which the reflow process is performed. The vertical axis of the graph (950) represents the warpage length (unit: um) of the second substrate (520). The first line (951) represents the degree of warpage of the substrate area (710) according to temperature in the third batch (930). The second line (952) represents the degree of warpage of the connection area (720) according to temperature in the third batch (930). When the reference value is about -140 um, it can be confirmed that the degree of warpage of the connection area (720) where the balls of the third batch (930) are arranged at about 250°C is less than the reference value.

[0086] Figures 10a, 10b, and 10c illustrate examples of signal lines and ground lines of a ball grid array. A grid array (530) coupled with a second substrate (520) may include the ball grid array. In Figure 10a, as an example of the second substrate (520), an antenna board (420) for a first frequency band (e.g., a frequency band including about 26 GHz, a frequency band including about 28 GHz) is described. In Figure 10b, as an example of the second substrate (520), at least an antenna board (430) for a second frequency band (e.g., a frequency band including about 39 GHz) is described.

[0087] Referring to FIG. 10A, solder elements (e.g., balls) of the grid array (530) can be bonded to a first surface of a second substrate (520). When bonding the second substrate (520) and the first substrate (510) via the grid array (530), for alignment on a plane (e.g., an xy plane), the second substrate (520) can include a plurality of reference mark portions (e.g., a first reference mark portion (741), a second reference mark portion (742a), an additional reference mark portion (742b), a third reference mark portion (743), and a fourth reference mark portion (744)). For the reference mark portions, reference may be made to the descriptions of FIGS. 7 and 7A.

[0088] The solder elements (e.g., balls) of the grid array (530) may include balls (1001) for signal lines and balls (1003) for ground. The balls (1001) for the signal lines and the balls (1003) for the ground may be bonded to a first surface of a second substrate (520). The balls (1001) for the signal lines may be arranged in a transmission area where terminals (e.g., signal pads) for power supply of radiators of the second substrate (520) are located within a connection area (720). Here, the transmission area refers to an area on the first surface of the second substrate (520) that includes balls corresponding to signal lines for transmitting RF signals. In order to transmit RF signals of each RF processing circuit to the radiator, balls for signal lines (e.g., balls (1001) for signal lines) may be arranged in transmission regions (e.g., a first transmission region (1011), a second transmission region (1012), a third transmission region (1013), and a fourth signal transmission region (1014)) of the second substrate (520). The balls (1001) for signal lines may be arranged within the transmission regions. For example, the balls (1001) for signal lines may include first balls positioned in the first transmission region (1011), second balls positioned in the second transmission region (1012), third balls positioned in the third transmission region (1013), and fourth balls positioned in the fourth transmission region (1014). For example, the balls (1001) for the signal line can be divided into first balls located in the first transmission area (1011), second balls located in the second transmission area (1012), third balls located in the third transmission area (1013), and balls located in the fourth transmission area (1014).

[0089] Each ball of the balls (1001) for the signal line may contact a feed line (e.g., feed line (555)) of the first substrate (510) through a signal pad. Since each ball is electrically connected to the feed line, an RF signal of the feed line may be provided to an antenna (e.g., radiator (550)) electrically connected to the corresponding ball. For example, the second substrate (520) may include 64 antenna elements. For the 64 antenna elements, four RF processing circuits (e.g., a first RF processing circuit, a second RF processing circuit, a third RF processing circuit, and a fourth RF processing circuit) may be electrically connected to the first substrate (510). Each RF processing circuit may provide RF signals to 16 antenna elements. The first balls located in the first transmission region (1061) may be arranged to provide RF signals from the first RF processing circuit to 16 first antenna elements. The second balls located in the second transmission region (1012) may be arranged to provide RF signals from the second RF processing circuit to 16 second antenna elements that are different from the first antenna elements connected to the first balls. For example, the third balls located in the third transmission region (1013) may be arranged to provide RF signals from the third RF processing circuit to 16 third antenna elements that are different from the first antenna elements and the second antenna elements. For example, the fourth balls located in the fourth transmission area (1014) may be arranged to provide RF signals from the fourth RF processing circuit to sixteen fourth antenna elements, which are different from the first antenna elements, the second antenna elements, and the third antenna elements.

[0090] The solder elements (e.g., balls) of the grid array (530) may include balls (1003) for grounding. For example, the balls (1003) for grounding may be divided into balls arranged within each transmission area (hereinafter, ground line balls) and balls located outside each transmission area (hereinafter, grid balls). The ground line balls arranged within each transmission area may be arranged to surround each ball for a signal line as a ground line to reduce noise and interference. For example, the ground line balls may be arranged adjacent to the balls for the signal line (e.g., the first balls, the second balls, the third balls, and the fourth balls). For example, the ground line balls arranged within the transmission area and the grid balls located outside each transmission area may be arranged periodically. For example, the grid balls may be arranged periodically at a first designated interval on a first axis (e.g., the x-axis). For example, the grid balls may be periodically arranged at a second specified interval on a second axis (e.g., the y-axis). The second specified interval may be the same as or different from the first specified interval. Balls may not be coupled at locations (e.g., empty areas) that correspond to the specified interval (e.g., the first specified interval, the second specified interval) but are outside the connection area (720). Due to limitations in corner areas, empty areas where balls (e.g., grid balls) are not coupled may be located within the substrate area (710). For example, balls located at the boundary among the grid balls may be arranged to have a shape (e.g., an octagon) that is the same as or similar to the shape of the border of the connection area (720).

[0091] Referring to FIG. 10b, solder elements (e.g., balls) of the grid array (530) may be bonded to the first surface of the second substrate (520). The area of ​​the second substrate (520) of FIG. 10b may be smaller than the area of ​​the second substrate (520) of FIG. 10a. As the area of ​​the substrate area (710) of the second substrate (520) changes, the arrangement of the solder elements within the substrate area (710) may also change. For descriptions of the same reference numerals, reference may be made to descriptions of components illustrated in the previous drawings.

[0092] The solder elements (e.g., balls) of the grid array (530) may include balls (1051) for signal lines and balls (1053) for ground. The balls (1051) for signal lines and the balls (1053) for ground may be bonded to the first surface of the second substrate (520).

[0093] The balls (1051) for the signal line may be arranged in a transmission area where terminals (e.g., signal pads) for power supply of the radiators of the second substrate (520) are located within the connection area (720). Here, the transmission area refers to an area including balls corresponding to signal lines for transmitting RF signals on the first surface of the second substrate (520). In order to transmit the RF signal of each RF processing circuit to the radiator, balls for the signal line (e.g., balls (1001) for the signal line) may be arranged in transmission areas (e.g., the first transmission area (1061), the second transmission area (1062), the third transmission transmission area (1063), and the fourth signal transmission area (1064)) of the second substrate (520). The balls (1001) for the signal line may be arranged within the transmission areas. For example, the balls (1001) for the signal line may include first balls located in the first transmission area (1061), second balls located in the second transmission area (1062), third balls located in the third transmission area (1063), and fourth balls located in the fourth transmission area (1064). For example, the balls (1051) for the signal line may include first balls located in the first transmission area (1061), second balls located in the second transmission area (1062), third balls located in the third transmission area (1063), and fourth balls located in the fourth transmission area (1064).

[0094] Each ball of the balls (1001) for the signal line may contact a feed line (e.g., feed line (555)) of the first substrate (510) through a signal pad. Since each ball of the first balls (1061) is electrically connected to the feed line, an RF signal of the feed line may be provided to an antenna (e.g., radiator (550)) connected to the corresponding ball. For example, the second substrate (520) may include 64 antenna elements. For the 64 antenna elements, four RF processing circuits (e.g., a first RF processing circuit, a second RF processing circuit, a third RF processing circuit, and a fourth RF processing circuit) may be electrically connected to the first substrate (510). Each RF processing circuit may provide RF signals to 16 antenna elements. The first balls located in the first transmission region (1061) may be arranged to provide RF signals from the first RF processing circuit to 16 first antenna elements. The second balls located in the second transmission region (1062) may be arranged to provide RF signals from the second RF processing circuit to 16 second antenna elements that are different from the first antenna elements connected to the first balls. For example, the third balls located in the third transmission region (1063) may be arranged to provide RF signals from the third RF processing circuit to 16 third antenna elements that are different from the first antenna elements and the second antenna elements. For example, the fourth balls located in the fourth transmission area (1064) may be arranged to provide RF signals from the fourth RF processing circuit to sixteen fourth antenna elements, which are different from the first antenna elements, the second antenna elements, and the third antenna elements.

[0095] Referring to FIG. 10c, a first surface of a second substrate (520) may be coupled with a grid array (530). The first surface may include a substrate area (710) formed along a boundary of the first surface. The substrate area (710) may correspond to the entire area of ​​the first surface. For example, the substrate area (710) may have a rectangular shape. The connection area (720) may represent a closed area including a portion where solder elements (e.g., solder balls) of the grid array (530) are coupled. The solder elements may include solder elements for ground and solder elements for signal lines. For example, RF processing circuits (e.g., RFICs) may be coupled to the first substrate (510). In order to transmit RF signals of each RF processing circuit to the radiator, balls for signal lines (e.g., balls for signal lines (1001), balls for signal lines (1053)) may be arranged in transmission areas (e.g., first transmission area (1071), second transmission area (1072), third transmission area (1073), fourth signal transmission area (1074)) of the second substrate (520). Here, the transmission area refers to an area including balls corresponding to signal lines for transmitting RF signals on the first surface of the second substrate (520). At least some (e.g., ground line balls) of the balls for ground lines (e.g., balls for ground lines (1003), balls for ground lines (1053)) may be arranged in the transmission areas of the second substrate (520) as ground lines of the signal lines. For example, the second substrate (520) may include 64 antenna elements. Four RF processing circuits may be electrically connected to the first substrate (510) for the 64 antenna elements. Each RF processing circuit may provide RF signals to 16 antenna elements. The second substrate (520) may include four transmission regions.For example, the second substrate (520) may include a first transmission region (1071), a second transmission region (1072), a third transmission region (1073), and a fourth signal transmission region (1074). Balls for signal lines and balls for ground may be arranged in each transmission region.

[0096] Within the connection area (710), balls for grounding may be arranged in addition to each transmission area. However, balls for signal lines may only be arranged within the transmission area. Assuming the laminated structure illustrated in FIG. 5, in the first substrate (510), the position at which the RF processing circuit (e.g., the RF processing circuit (540)) is coupled may correspond to the position of the solder element for the signal line. Since the first substrate (510) includes a feed line (e.g., a coaxial PTH (plated through hole)) for transmitting an RF signal in the z-axis direction, the position of the solder element for the signal line may correspond to the position at which the RF processing circuit (540) is coupled. For example, when looking at the RU module (400) in the (-) z-axis direction, each transmission area may at least partially overlap with the RF processing circuits. If, instead of four RF processing circuits providing RF signals to 64 antenna elements, eight RF processing circuits provide RF signals to the 64 antenna elements, the positions of the transmission regions within the connection area (720) of the second substrate (520) may vary. Since each transmission region is a position where balls for signal lines are joined, if at least one of the balls for signal lines is not bonded to the substrate due to warping or twisting of the PCB, a problem may occur in the transmission performance of the RF signal. Therefore, the transmission region for electrical connection with the RF processing circuit may be required to be located at a portion spaced apart from the corner area. For example, the balls for signal lines (balls for signal lines (1001), balls for signal lines (1051)) may be located to avoid each corner area where balls are designed not to be located.

[0097] Although FIGS. 10A to 10C illustrate examples in which balls (e.g., grid balls) for grounding are placed in addition to each transmission area within the connection area (720), embodiments of the present disclosure are not limited thereto. Instead of grid balls, other components of the RU module (400) (e.g., power circuits, RF components (e.g., converters, FPGAs, connectors), input / output (I / O) wiring) may be positioned in the area where some of the grid balls are positioned between the first substrate (510) and the second substrate (520).

[0098] Figures 11a and 11b illustrate examples of copper portions of a second substrate (e.g., the second substrate (520)). In Figures 11a and 11b, as an example of the second substrate (520), an antenna board (420) for a first frequency band (e.g., a frequency band including about 26 GHz, a frequency band including about 28 GHz) is described. In order to implement an SMD type antenna, the upper layers of the second substrate (520) may include a fill-cut area. Due to the fill-cut area, the copper ratio of the upper layers of the second substrate (520) may be lower than the copper ratio of the lower layers of the second substrate (520). In order to reduce the difference between the copper ratio of the lower layers of the second substrate (520) and the copper ratio of the upper layers of the second substrate (520), the lower layers of the second substrate (520) may include a copper portion that is partially formed in each layer.

[0099] Referring to FIG. 11A, an example (1101) represents a copper portion of a fifth layer (615) among the lower layers of a second substrate (520). The copper portion may include a first portion (1111), a second portion (1112), a third portion (1113), and a fourth portion (1114). Signals provided through the first balls coupled to the first transmission area (1011) among the balls (1001) for the signal line may be provided to the radiator through the first feed lines of the fifth layer (615). For the first feed lines electrically connected to the first balls, a first portion (1111) may be formed in the fifth layer (615). Signals provided through the second balls (1001) coupled to the second transmission area (1012) among the balls for the signal line can be provided to the radiator through the second feed lines of the fifth layer (615). For the second feed lines electrically connected to the second balls, a second part (1112) can be formed in the fifth layer (615). Signals provided through the third balls (1001) coupled to the third transmission area (1013) among the balls for the signal line can be provided to the radiator through the third feed lines of the fifth layer (615). For the third feed lines electrically connected to the third balls, a third part (1113) can be formed in the fifth layer (615). Signals provided through the fourth balls (1001) coupled to the fourth transmission area (1014) among the balls for the signal line can be provided to the radiator through the fourth feed lines of the fifth layer (615). For the fourth feed lines electrically connected to the fourth balls, a fourth portion (1114) can be formed in the fifth layer (615).

[0100] Referring to FIG. 11B, example (1103) represents a copper portion of the sixth layer (616) among the lower layers of the second substrate (520). The copper portion may include a first portion (1121), a second portion (1122), a third portion (1123), and a fourth portion (1124). Since the balls (1001) for the signal line are structures through which RF signals are supplied, the copper portion may be formed on the first surface of the second substrate (520) for electrical conductivity. For example, the first portion (1121) may include a first transmission area (1011) on which the balls for the signal line are arranged. The first portion (1121) may represent a copper portion that is partially formed in the sixth layer (616) (e.g., a layer corresponding to the lower surface of the second substrate (520). In one embodiment, a portion of the first portion (1121) may be partially disposed in an area (e.g., a first corner area (731)) where solder elements (e.g., balls for grounding) are not disposed. First feed lines electrically connected to the signal lines may be disposed in the fifth layer (615). To reduce loss and improve signal transmission performance, the second substrate (520) may include a ground area positioned around each of the first feed lines. Since the fourth layer (614), which is a ground layer, is positioned on top of each first feed line, a copper portion may be formed on the bottom of each first feed line. For example, even if copper portions are removed from the lower layers to reduce the residual conductivity in the lower layers, the copper portion may be present in an area of ​​the sixth layer (616) corresponding to the area of ​​the first feed line of the fifth layer (615). For example, to feed an antenna element located at a corner of the second substrate (520) (e.g., a corner in at least one of the first layer (611), the second layer (612), and the third layer (613), the first feed line may be formed in a corner region in the fifth layer (615).The first portion (1121) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a first corner area (731)) where solder elements (e.g., balls for grounding) are not placed for the first feed line.

[0101] The second portion (1122) may include a second transmission area (1012) where balls for signal lines are arranged. The second portion (1122) may represent a copper portion partially formed in the sixth layer (616). In one embodiment, a portion of the second portion (1122) may be partially arranged in an area (e.g., the second corner area (732)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the second feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on top of each second feed line, a copper portion may be formed on the bottom of each second feed line. The second portion (1122) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a second corner area (732)) where solder elements (e.g., balls for grounding) are not placed for the second feed line.

[0102] The third portion (1123) may include a third transmission area (1013) where balls for signal lines are arranged. The third portion (1123) may represent a copper portion partially formed in the sixth layer (616). In one embodiment, a portion of the third portion (1123) may be partially arranged in an area (e.g., a third corner area (733)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the third feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on the top of each third feed line, a copper portion may be formed on the bottom of each third feed line. The third portion (1123) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a third corner area (733)) where solder elements (e.g., balls for grounding) are not placed for the third feed line.

[0103] The fourth portion (1124) may include a fourth transmission area (1014) where balls for signal lines are arranged. The fourth portion (1124) may represent a copper portion that is partially formed in the sixth layer (616). In one embodiment, a portion of the fourth portion (1124) may be partially arranged in an area (e.g., the fourth corner area (734)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the fourth feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on top of each fourth feed line, a copper portion may be formed on the bottom of each fourth feed line. The fourth portion (1124) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a fourth corner area (734)) where solder elements (e.g., balls for grounding) are not placed for the fourth feed line.

[0104] In one embodiment, the difference between the passivation ratio of the upper layers and the passivation ratio of the lower layers may be less than or equal to a threshold value (e.g., about 40% in a frequency band including about 26 GHz). For example, assume that the passivation ratio of the upper layers is about 39.6%. If no additional copper portion is removed from the lower layers except for the area for power supply, the passivation ratio of the lower layers may be about 86.2%. At this time, the second substrate (520) may be bent to about 307.4 um at a high temperature (e.g., about 245°C). Meanwhile, by removing the copper portion from a certain portion of the lower layers, copper portions are partially formed in areas where solder elements are not bonded (e.g., corner areas), so that the passivation ratio of the lower layers may be about 76.4%. At this time, the second substrate (520) may be bent to about 214.3 um at a high temperature (e.g., about 245°C). It can be confirmed that the warpage of the second substrate (520) is reduced through the partially formed copper portions.

[0105] Figures 12a and 12b illustrate other examples of copper portions of a second substrate (e.g., second substrate (520)). In Figures 12a and 12b, at least an antenna board (430) for a second frequency band (e.g., a frequency band including about 39 GHz) is described as an example of the second substrate (520). In order to implement an SMD type antenna, the upper layers of the second substrate (520) may include a fill-cut area. Due to the fill-cut area, the copper ratio of the upper layers of the second substrate (520) may be lower than the copper ratio of the lower layers of the second substrate (520). In order to reduce the difference between the copper ratio of the lower layers of the second substrate (520) and the copper ratio of the upper layers of the second substrate (520), the lower layers of the second substrate (520) may include a copper portion that is partially formed in each layer.

[0106] Referring to FIG. 12A, an example (1201) represents a copper portion of a fifth layer (615) among the lower layers of a second substrate (520). The copper portion may include a first portion (1211), a second portion (1212), a third portion (1213), and a fourth portion (1214). Signals provided through the first balls coupled to the first transmission area (1061) among the balls (1001) for the signal line may be provided to the radiator through the first feed lines of the fifth layer (615). For the first feed lines electrically connected to the first balls, a first portion (1211) may be formed in the fifth layer (615). Signals provided through the second balls (1001) coupled to the second transmission area (1062) among the balls for the signal line can be provided to the radiator through the second feed lines of the fifth layer (615). For the second feed lines electrically connected to the second balls, a second portion (1212) can be formed in the fifth layer (615). Signals provided through the third balls (1001) coupled to the third transmission area (1063) among the balls for the signal line can be provided to the radiator through the third feed lines of the fifth layer (615). For the third feed lines electrically connected to the third balls, a third portion (1213) can be formed in the fifth layer (615). Signals provided through the fourth balls (1001) coupled to the fourth transmission area (1064) among the balls for the signal line can be provided to the radiator through the fourth feed lines of the fifth layer (615). For the fourth feed lines electrically connected to the fourth balls, a fourth portion (1214) can be formed in the fifth layer (615).

[0107] Referring to FIG. 12B, example (1203) represents a copper portion of the sixth layer (616) among the lower layers of the second substrate (520). The copper portion may include a first portion (1221), a second portion (1222), a third portion (1223), and a fourth portion (1224). Since the balls (1001) for the signal line are structures through which RF signals are supplied, the copper portion may be formed on the first surface of the second substrate (520) for electrical conductivity. For example, the first portion (1221) may include a first transmission area (1061) on which the balls for the signal line are arranged. The first portion (1221) may represent a copper portion that is partially formed in the sixth layer (616) (e.g., a layer corresponding to the lower surface of the second substrate (520). According to one embodiment, a portion of the first portion (1221) may be partially disposed in an area (e.g., a first corner area (731)) where solder elements (e.g., balls for grounding) are not disposed. First feed lines electrically connected to the signal lines may be disposed in the fifth layer (615). To reduce loss and improve signal transmission performance, the second substrate (520) may include a ground area positioned around each of the first feed lines. Since the fourth layer (614), which is a ground layer, is positioned on top of each first feed line, a copper portion may be formed on the bottom of each first feed line. For example, even if copper portions are removed from the lower layers to reduce the residual conductivity in the lower layers, the copper portion may be present in an area of ​​the sixth layer (616) corresponding to the area of ​​the first feed line of the fifth layer (615). For example, to feed an antenna element located at a corner of the second substrate (520) (e.g., a corner in at least one of the first layer (611), the second layer (612), and the third layer (613), the first feed line may be formed in a corner region in the fifth layer (615).The copper portion of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a first corner area (731)) where solder elements (e.g., balls for grounding) are not placed for the first feed line.

[0108] The second portion (1222) may include a second transmission area (1062) where balls for signal lines are arranged. The second portion (1222) may represent a copper portion partially formed in the sixth layer (616). In one embodiment, a portion of the second portion (1222) may be partially arranged in an area (e.g., the second corner area (732)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the second feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on top of each second feed line, a copper portion may be formed on the bottom of each second feed line. The second portion (1222) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a second corner area (732)) where solder elements (e.g., balls for grounding) are not placed for the second feed line.

[0109] The third portion (1223) may include a third transmission area (1063) where balls for signal lines are arranged. The third portion (1223) may represent a copper portion that is partially formed in the sixth layer (616). In one embodiment, a portion of the third portion (1223) may be partially arranged in an area (e.g., a third corner area (733)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the third feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on the top of each third feed line, a copper portion may be formed on the bottom of each third feed line. The third portion (1223) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a third corner area (733)) where solder elements (e.g., balls for grounding) are not placed for the third feed line.

[0110] The fourth portion (1224) may include a fourth transmission area (1064) where balls for signal lines are arranged. The fourth portion (1224) may represent a copper portion that is partially formed in the sixth layer (616). In one embodiment, a portion of the fourth portion (1224) may be partially arranged in an area (e.g., the fourth corner area (734)) where solder elements (e.g., balls for grounding) are not arranged. The second substrate (520) may include a ground area positioned around each of the fourth feed lines of the fifth layer (615). Since the fourth layer (614), which is a ground layer, is positioned on top of each fourth feed line, a copper portion may be formed on the bottom of each fourth feed line. The fourth portion (1224) of the sixth layer (616) may include a portion that is partially formed in an area (e.g., a fourth corner area (734)) where solder elements (e.g., balls for grounding) are not placed for the fourth feed line.

[0111] In one embodiment, the difference between the passivation ratio of the upper layers and the passivation ratio of the lower layers may be less than or equal to a threshold value (e.g., about 45% in a frequency band including about 39 GHz). For example, assume that the passivation ratio of the upper layers is about 39.3%. If no additional copper portion is removed from the lower layers except for the area for power supply, the passivation ratio of the lower layers may be about 88.3%. At this time, the second substrate (520) may be bent to about 171.6 um at a high temperature (e.g., about 245°C). Meanwhile, by removing the copper portion from a certain portion of the lower layers, copper portions are partially formed in areas where solder elements are not bonded (e.g., corner areas), so that the passivation ratio of the lower layers may be about 78.8%. At this time, the second substrate (520) may be bent to about 149.6 um at a high temperature (e.g., about 245°C). It can be confirmed that the warpage of the second substrate (520) is reduced through the partially formed copper portions.

[0112] As described through FIGS. 11a, 11b, 12a, and 12b, with respect to the ground layer (570) (e.g., the fourth layer (614) of the second substrate (520), the copper portions of the lower layers (e.g., the fifth layer (615), the sixth layer (616)) are formed partially rather than over the entire layer, thereby reducing the deviation in the copper ratio between the upper layers (e.g., the first layer (611), the second layer (612), and the third layer (613)) and the lower layers. Here, the partially formed portion indicates that the copper portion does not exist in some areas (e.g., corner areas). By removing the copper portion from one layer, the copper ratio in the one layer can be reduced. For efficient power supply performance, the partial area may be an area where solder elements are not arranged. The degree of warpage of the second substrate (520) can be alleviated through copper portions partially formed in areas where the above solder elements are not placed (e.g., the first corner area (731), the second corner area (732), the third corner area (733), and the fourth corner area (734)).

[0113] FIGS. 13A and 13B illustrate examples of wireless modules (e.g., wireless modules (400)) including SMD type antennas. With the SMD type antenna, the feed line is arranged on one layer (e.g., the fifth layer (615)) of the second substrate (520), thereby simplifying the manufacturing process of the first substrate (510). For example, the number of times the first substrate (510) is laminated may be reduced. For a higher yield of the wireless module using the SMD type antenna, the structure of the wireless module described through FIGS. 5 to 12B is illustrated.

[0114] Referring to FIG. 13A, a wireless module (e.g., RU module (400)) may include a first substrate (510), a second substrate (520), and a grid array (530). Example (501) shows a stacked structure including a path through which an RF signal provided from an RF processing circuit (540) is transmitted to a radiator (550) of an antenna. In one direction (e.g., (+) z-axis direction), the first substrate (510), the grid array (530), and the second substrate (520) may be stacked in that order. For the first substrate (510), the second substrate (520), and the grid array (530), the descriptions of FIG. 5 may be referred to.

[0115] The first substrate (510) may be electrically connected to components for processing and supplying RF signals. For example, components for processing and supplying RF signals may be disposed on one surface of the first substrate (510). For example, one surface of the first substrate (510) may be coupled to an RF processing circuit (540). The first substrate (510) may include a plurality of layers (e.g., 16 layers). The first substrate (510) may include a feed line (e.g., a coaxial plated through hole (PTH)) formed across the plurality of layers. For example, the first substrate (510) may include a first coaxial PTH for a first polarization and a second coaxial PTH for a second polarization. The first coaxial PTH may include a first feed line (1321a) and a first plate portion (1321b) for a signal line. The first plate portion (1321b) can be used as a ground for signal transmission of the first feed line (1321a). The second coaxial PTH can include a second feed line (1322a) for a signal line and a second plate portion (1322b). The second plate portion (1322b) can be used as a ground for signal transmission of the second feed line (1322a). The first polarization can be substantially perpendicular to the second polarization. For example, the first polarization can be about a 45 degree polarization, and the second polarization can be about a -45 degree polarization. For another example, the first polarization can be a vertical polarization, and the second polarization can be a horizontal polarization.

[0116] A first signal of a first polarization provided from an RF processing circuit (540) may be provided to a signal pad (1331a) through a first feed line (1321a) of a first coaxial PTH. The first signal may be provided to a second substrate (520) through the signal pad (1331a), the solder ball (1331b), and the signal pad (1331b). The first signal may be provided to a first radiator (1361) through a feed line (1341) of the second substrate (520). For example, the feed line (1341) may be disposed in a lower layer (e.g., the fifth layer (615)) of the second substrate (520). The first radiator (1361) may be configured to radiate the first signal. For example, the first radiator (1361) may be disposed on one side of the second substrate (520) (e.g., the side opposite to the bonding side). As an example, the first radiator (1361) may be disposed on the first layer (611) of the second substrate (520). A second signal of a second polarization provided from the RF processing circuit (540) may be provided to the signal pad (1332a) through the second feed line (1322a) of the second coaxial PTH. The second signal may be provided to the second substrate (520) through the signal pad (1332a), the solder ball (1332b), and the signal pad (1332b). The second signal may be provided to the second radiator (1362) through the feed line (1342) of the second substrate (520). For example, the feed line (1342) may be disposed on a lower layer (e.g., the fifth layer (615)) of the second substrate (520). The second radiator (1362) may be configured to radiate the second signal. For example, the second radiator (1362) may be disposed on a different layer from the first radiator (1361). For example, the second radiator (1362) may be disposed on the second layer (612) of the second substrate (520).

[0117] As a non-limiting example, the second substrate (520) may further include resonators in addition to the radiators (e.g., the first radiator (1361), the second radiator (1362)). For example, the second substrate (520) may include a first resonator (1371a), a second resonator (1371b), and a third resonator (1371c). The first resonator (1371a), the second resonator (1371b), and the third resonator (1371c) may be arranged to provide high radiation gain through coupling with the first radiator (1361) and isolation from adjacent antenna elements (e.g., the first radiator (1361), the second radiator (1362) correspond to the same antenna element). For example, the second substrate (520) may include a fourth resonator (1372a), a fifth resonator (1372b), and a sixth resonator (1372c). The fourth resonator (1372a), the fifth resonator (1372b), and the sixth resonator (1372c) may be arranged to provide high radiation gain through coupling with the second radiator (1362) and to provide isolation from adjacent antenna elements (e.g., the first radiator (1361) and the second radiator (1362) correspond to the same antenna element).

[0118] As a non-limiting example, the second substrate (520) may include a dummy pattern (1380). Due to the fill-cut region, the second substrate (520) may have a high difference in the copper ratio between the upper layers and the copper ratio of the lower layers (hereinafter, referred to as copper ratio deviation). Although FIGS. 11A, 11B, 12A, and 12B describe a method for reducing the copper ratio deviation through etching of the copper portion of the lower layers, the dummy pattern (1380) may be utilized to further improve warpage performance. As the dummy pattern (1380) is positioned on at least a portion of the upper layers of the second substrate (520), the copper ratio of the upper layers may be increased. Through the second substrate (520) including the dummy pattern (1380), as well as the copper portion described through FIGS. 11a, 11b, 12a, and 12b, the bond between the two substrates of the wireless module (e.g., RU module (400)) can be formed more robustly.

[0119] Referring to FIG. 13b, a wireless module (e.g., RU module (400)) may include a first substrate (510), a second substrate (520), and a grid array (530). Example (501) shows a stacked structure including a path through which an RF signal provided from an RF processing circuit (540) is transmitted to a radiator (550) of an antenna. In one direction (e.g., (+) z-axis direction), the first substrate (510), the grid array (530), and the second substrate (520) may be stacked in that order. For the first substrate (510), the second substrate (520), and the grid array (530), reference may be made to the descriptions of FIG. 5. For other components, reference may be made to the descriptions of FIG. 13a.

[0120] In the SMD type antenna, since the second substrate (520) includes a feed line (e.g., feed line (1341), feed line (1342)), the manufacturing process of the first substrate (510) can be relatively simplified. For example, the number of layers required to manufacture the first substrate (510) can be reduced. As the number of layers is reduced, the arrangement of the first coaxial PTH or the second coaxial PTH may not be easy. Therefore, the RU module (400) may include separate ground lines (e.g., first ground line (1391), second ground line (1392)) instead of the first plate portion (1321b) and the second plate portion (1322b).

[0121] FIG. 14 illustrates examples of components of an electronic device including a wireless module. For example, the electronic device (1410) may be a base station (e.g., base station (110)), a terminal (e.g., terminal (120)), an electronic device (200), and / or an AU (300). For example, the wireless module may include an RU module (210), an RU (310), and / or an RU module (400). In addition to the wireless modules mentioned through FIGS. 5 to 13B, electronic devices including the wireless modules are also included in embodiments of the present disclosure.

[0122] Referring to FIG. 14, an exemplary functional configuration of an electronic device (1410) is illustrated. The electronic device (1410) may include an antenna unit (1411), a filter unit (1412), an RF (radio frequency) processing unit (1413), and a control unit (1414).

[0123] The antenna unit (1411) may include a plurality of antennas. The antenna performs functions for transmitting and receiving signals through a wireless channel. The antenna may include a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., the second substrate (520)), an antenna board, an antenna substrate) or across at least one layer of the substrate. The antenna may radiate an up-converted signal on a wireless channel or acquire a signal radiated by another device. Each antenna may be referred to as an antenna element or antenna component. The antenna unit (1411) may include an antenna array in which a plurality of antenna elements form an array. As a non-limiting example, the antenna array may include sub-arrays. The antenna unit (1411) may be an SMD type antenna and may include radiators of the antenna array and the substrate on which the radiators are arranged.

[0124] The antenna unit (1411) may be electrically connected to the filter unit (1412) via RF signal lines. The antenna unit (1411) may be mounted on an RU board (e.g., the first substrate (510), a motherboard). The RU board may include a plurality of RF signal lines connecting each antenna element and a filter of the filter unit (1412). These RF signal lines may be referred to as a feeding network. The antenna unit (1411) may provide a received signal to the filter unit (1412) or radiate a signal provided from the filter unit (1412) into the air. According to one embodiment, the antenna unit (1411) may include at least one antenna module having a dual polarization antenna. The dual polarization antenna may include antenna elements corresponding to different polarizations. For example, a dual polarization antenna may include a first antenna element having a +45° polarization and a second antenna element having a -45° polarization. Of course, the polarization may be formed of other orthogonal polarizations other than +45° and -45°. Each antenna element may be connected to a feeding line and electrically connected to a filter unit (1412), an RF processing unit (1413), and a control unit (1414) described below.

[0125] The filter unit (1412) can perform filtering to transmit a signal of a desired frequency. The filter unit (1412) can perform a function to selectively identify a frequency by forming a resonance. For example, the filter unit (1412) can form a resonance through a cavity that structurally includes a dielectric. For example, the filter unit (1412) can form a resonance through elements that form inductance or capacitance. For example, the filter unit (1412) can include an elastic filter such as a bulk acoustic wave (BAW) filter or a surface acoustic wave (SAW) filter. The filter unit (1412) can include at least one of a band pass filter, a low pass filter, a high pass filter, or a band reject filter. The filter unit (1412) can include RF processing circuits for obtaining a signal of a frequency band for transmission or a frequency band for reception. The filter unit (1412) according to various embodiments can electrically connect the antenna unit (1411) and the RF processing unit (1413).

[0126] The RF processing unit (1413) may include multiple RF paths. An RF path may be a unit of a path through which a signal received through an antenna or a signal radiated through an antenna passes. At least one RF path may be referred to as an RF chain. The RF chain may include multiple RF components. The RF components may include amplifiers, mixers, oscillators, DACs, ADCs, etc. For example, the RF processing unit (1413) may include an up converter that up-converts a baseband digital transmission signal to a transmission frequency, and a digital-to-analog converter (DAC) that converts the up-converted digital transmission signal to an analog RF transmission signal. The up converter and the DAC form part of a transmission path. The transmission path may further include a power amplifier (PA) or a coupler (or combiner). Also, for example, the RF processing unit (1413) may include an analog-to-digital converter (ADC) that converts an analog RF reception signal into a digital reception signal and a down converter that converts the digital reception signal into a baseband digital reception signal. The ADC and the down converter form part of a receiving path. The receiving path may further include a low-noise amplifier (LNA) or a coupler (or divider). The RF components of the RF processing unit may be implemented on a PCB. The electronic device (1410) may include a structure in which an antenna unit (1411) - a filter unit (1412) - an RF processing unit (1413) are stacked in that order. The antennas and the RF components of the RF processing unit may be implemented on the PCB, and filters may be repeatedly connected between the PCBs to form a plurality of layers. The RFIC of the electronic device according to embodiments of the present disclosure may be included in the RF processing unit (1413).

[0127] The control unit (1414) can control the overall operations of the electronic device (1410). The control unit (1414) can include various modules for performing communication. The control unit (1414) can include at least one processor, such as a modem. The control unit (1414) can include modules for digital signal processing. For example, the control unit (1414) can include a modem. When transmitting data, the control unit (1414) generates complex symbols by encoding and modulating a transmission bit stream. In addition, for example, when receiving data, the control unit (1414) restores a reception bit stream by demodulating and decoding a baseband signal. The control unit (1414) can perform functions of a protocol stack required by a communication standard.

[0128] In FIG. 14, the functional configuration of the electronic device (1410) is described. However, the example illustrated in FIG. 14 is only an exemplary configuration of an electronic device including a wireless module (e.g., an RU module (400) including a first substrate (510), a second substrate (520), and a grid array (530)) according to embodiments of the present disclosure described through FIGS. 1 to 13B, and embodiments of the present disclosure are not limited to the components illustrated in FIG. 14. Accordingly, the wireless module itself according to embodiments of the present disclosure, or at least a part of a communication device including the wireless module, may also be understood as an embodiment of the present disclosure.

[0129] Although the present disclosure describes a first frequency band (e.g., a frequency band including about 26 GHz, a frequency band including about 28 GHz) and / or a second frequency band (e.g., a frequency band including about 39 GHz) as examples, the description of a specific frequency band is not to be construed as limiting other embodiments of the present disclosure. For example, the wireless module described in the present disclosure may support RF communications in the 4 GHz band, the 6 GHz band, and / or the 13 GHz band.

[0130] In embodiments, a wireless module of an electronic device for performing communication with a terminal is provided. The wireless module may include a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a second substrate including a plurality of layers, a plurality of radiators disposed on at least one first layer among the layers of the second substrate, and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate. The first surface of the second substrate may include a connection area where the plurality of solder elements are coupled and at least one corner area where no solder elements are coupled. The second substrate may include a copper portion disposed on at least one second layer different from the at least one first layer among the layers of the second substrate. The copper portion may include a portion partially formed within the at least one corner area.

[0131] In one embodiment, the plurality of solder elements may include solder elements for grounding and solder elements for signal lines. Among the solder elements for grounding, solder elements arranged at a border (boarder) may have a distance to one side of the second substrate longer than the specified interval. The solder elements may include:

[0132] According to one embodiment, the solder elements arranged at the boundary may include solder elements arranged in a direction different from a first direction of the first surface of the second substrate and a second direction perpendicular to the first direction.

[0133] In one embodiment, the solder elements arranged at the boundary may be arranged along an octagonal border.

[0134] In one embodiment, the solder elements may include a first solder element closest to a vertex of the second substrate among the solder elements, and a second solder element different from the first solder element. A distance between a second position of the second solder element and the vertex on a first axis may be shorter than a distance between a first position of the first solder element and the vertex on a first axis. A distance between the second position of the second solder element and the vertex on a second axis perpendicular to the first axis may be longer than a distance between the first position of the first solder element and the vertex on the second axis.

[0135] In one embodiment, the RF processing circuit may be coupled to a second surface of the first substrate, opposite the first surface. At least one of the radiators may be disposed on a second surface of the second substrate, opposite the first surface. The first surface of the second substrate may include a fiducial mark portion disposed in each of the at least one corner region.

[0136] In one embodiment, the coherence rate of the at least one first layer may be greater than the coherence rate of the at least one second layer. The radiators may be configured to transmit signals in a frequency band including 26 gigahertz (GHz). The difference between the coherence rate of the at least one first layer and the coherence rate of the at least one second layer may be less than about 40 percent.

[0137] In one embodiment, the coherence rate of the at least one first layer may be greater than the coherence rate of the at least one second layer. The radiators may be configured to transmit signals in a frequency band including 39 gigahertz (GHz). The difference between the coherence rate of the at least one first layer and the coherence rate of the at least one second layer may be less than about 45 percent.

[0138] In one embodiment, the second substrate may include at least one first layer, at least one second layer, and a ground layer disposed between the at least one first layer and the at least one second layer. A size of the first surface of the second substrate may be smaller than a size of the first surface of the first substrate.

[0139] In one embodiment, each of the solder elements may include a first pad coupled to the first surface of the first substrate, a second pad coupled to the first surface of the second substrate, and a solder ball including the first pad and the second pad.

[0140] In embodiments, an electronic device for performing communication with a terminal is provided. The electronic device may include a grid array including a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a plurality of second substrates, a plurality of radiators disposed on at least one first layer among layers of each of the second substrates, and a plurality of solder elements coupled to a first surface of the first substrate and a first surface of each of the plurality of second substrates. The first surface of each of the plurality of second substrates may include a connection region to which the plurality of solder elements are coupled and at least one corner region to which no solder elements are coupled. Each of the plurality of second substrates may include a copper portion disposed on at least one second layer different from the at least one first layer among the layers. The copper portion may include a portion partially formed within the at least one corner region.

[0141] In one embodiment, the plurality of solder elements may include solder elements for grounding and solder elements for signal lines. Among the solder elements for grounding, solder elements arranged at a border (boarder) may have a distance to one side of the second substrate longer than the specified interval. The solder elements may include:

[0142] According to one embodiment, the solder elements arranged at the boundary may include solder elements arranged in a direction different from a first direction of the first surface of the second substrate and a second direction perpendicular to the first direction.

[0143] In one embodiment, the solder elements arranged at the boundary may be arranged along an octagonal border.

[0144] In one embodiment, the solder elements may include a first solder element closest to a vertex of the substrate among the solder elements, and a second solder element different from the first solder element. A distance between a second position of the second solder element and the vertex on a first axis may be shorter than a distance between a first position of the first solder element and the vertex on a first axis. A distance between the second position of the second solder element and the vertex on a second axis perpendicular to the first axis may be longer than a distance between the first position of the first solder element and the vertex on a second axis.

[0145] In one embodiment, the RF processing circuit may be coupled to a second surface of the first substrate, opposite the first surface. At least one of the radiators may be disposed on a second surface of each of the plurality of second substrates, opposite the first surface. The first surface of the second substrate may include a fiducial mark portion disposed in each of the at least one corner region.

[0146] In one embodiment, the plurality of second substrates may include first antenna substrates for a first frequency band and second antenna substrates for a second frequency band higher than the first frequency band. A size of each substrate of the first antenna substrates may be larger than a size of each substrate of the second antenna substrates. For each of the first antenna substrates, a vibration coefficient of the at least one first layer may be larger than a vibration coefficient of the at least one second layer. For each of the second antenna substrates, a vibration coefficient of the at least one first layer may be larger than a vibration coefficient of the at least one second layer.

[0147] In one embodiment, the first frequency band may include 26 gigahertz (GHz). The second frequency band may include 39 GHz. For each of the first antenna substrates, a difference between a frequency of the at least one first layer and a frequency of the at least one second layer may be less than about 40 percent. For each of the second antenna substrates, a difference between a frequency of the at least one first layer and a frequency of the at least one second layer may be less than about 45 percent.

[0148] In one embodiment, each of the plurality of second substrates may include at least one first layer, at least one second layer, and a ground layer disposed between the at least one first layer and the at least one second layer. A size of the first surface of each of the plurality of second substrates may be smaller than a size of the first surface of the first substrate.

[0149] In one embodiment, each of the solder elements may include a first pad coupled to the first surface of the first substrate, a second pad coupled to the first surface of the second substrate, and a solder ball including the first pad and the second pad.

[0150] In embodiments, a wireless module of an electronic device for performing communication with a terminal is provided. The wireless module may include a first substrate, a radio frequency (RF) processing circuit electrically connected to the first substrate, a second substrate including a plurality of layers, a plurality of radiators disposed on at least one layer among the layers of the second substrate, and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate. The first surface of the second substrate may include a connection area where the plurality of solder elements are coupled and at least one corner area where no solder elements are coupled. The second substrate may include a copper portion disposed on a layer that is different from the at least one layer among the layers of the second substrate and corresponds to the first surface. The copper portion may include a portion partially formed within the at least one corner area.

[0151] In one embodiment, the layers may include at least one layer on which the plurality of radiators are arranged, a ground layer, a feed layer on which a feed line is arranged, and the layer. The feed layer may be arranged between the ground layer and the layer. The copper portion may be formed to include an entire area on the layer corresponding to a position of the feed line in the feed layer.

[0152] In one embodiment, the plurality of solder elements may include solder elements that are uniformly arranged at a specified interval within the connection area. Among the uniformly arranged solder elements, the solder elements arranged at the boundary (boarder) may include solder elements whose distance to one side of the second substrate is longer than the specified interval.

[0153] In one embodiment, the radiators may be configured to transmit signals in a frequency band including 26 gigahertz (GHz). The layers may include upper layers, lower layers, and a ground layer, each including at least one layer. The coherence of the upper layers may be greater than the coherence of the lower layers, and the difference between the coherence of the upper layers and the coherence of the lower layers may be less than about 40 percent.

[0154] In one embodiment, the radiators may be configured to transmit signals in a frequency band including 39 gigahertz (GHz). The layers may include upper layers, lower layers, and a ground layer, each including at least one layer. The coherence of the upper layers may be greater than the coherence of the lower layers, and the difference between the coherence of the upper layers and the coherence of the lower layers may be less than about 45 percent.

[0155] In one embodiment, the size of the first surface of the second substrate may be smaller than the size of the first surface of the first substrate.

[0156] In embodiments, an electronic device for performing communication with a terminal is provided. The electronic device may include a first substrate; a plurality of radio frequency (RF) processing circuits electrically connected to the first substrate; a plurality of second substrates; a plurality of radiators disposed on at least one layer among layers of each of the second substrates; and a grid array including a plurality of solder elements coupled to a first surface of the first substrate and a first surface of each of the plurality of second substrates. The first surface of each of the plurality of second substrates may include a connection region to which the plurality of solder elements are coupled and at least one corner region to which no solder element is coupled. Each of the plurality of second substrates may include a copper portion disposed on a layer that is different from at least one layer among the layers and corresponds to the first surface. The copper portion may include a portion partially formed within the at least one corner region.

[0157] In one embodiment, the layers may include at least one layer on which the plurality of radiators are arranged, a ground layer, a feed layer on which a feed line is arranged, and the layer. The feed layer may be arranged between the ground layer and the layer. The copper portion may be formed to include an entire area on the layer corresponding to a position of the feed line in the feed layer.

[0158] In one embodiment, the plurality of solder elements may include solder elements that are uniformly arranged at a specified interval within the connection area. Among the uniformly arranged solder elements, the solder elements arranged at the boundary (boarder) may include solder elements whose distance to one side of the second substrate is longer than the specified interval.

[0159] In one embodiment, the plurality of second substrates may include first antenna substrates for a first frequency band and second antenna substrates for a second frequency band higher than the first frequency band. A size of each substrate of the first antenna substrates may be larger than a size of each substrate of the second antenna substrates. The first antenna substrates may include first upper layers, a first ground layer, and first lower layers. The second antenna substrates may include second upper layers, a second ground layer, and second lower layers. For each of the first antenna substrates, a carrier coefficient of the first upper layers may be greater than a carrier coefficient of the first lower layer. For each of the second antenna substrates, a carrier coefficient of the second upper layers may be greater than a carrier coefficient of the second lower layers.

[0160] In one embodiment, the first frequency band may include 26 gigahertz (GHz). The second frequency band may include 39 GHz. For each of the first antenna substrates, a difference between the vibration rates of the first upper layers and the vibration rates of the first lower layers may be less than about 40 percent. For each of the second antenna substrates, a difference between the vibration rates of the second upper layers and the vibration rates of the second lower layers may be less than about 45 percent.

[0161] In one embodiment, the size of each of the first surfaces of the plurality of second substrates may be smaller than the size of the first surface of the first substrate.

[0162] For one or more embodiments, at least one of the components described in one or more of the preceding drawings may be configured to perform one or more operations, techniques, processes, and / or methods as described herein. For example, a processor (e.g., a baseband processor) described herein with respect to one or more of the preceding drawings may be configured to operate according to one or more examples described herein. For another example, circuitry associated with a user equipment (UE), a base station, a network element, and the like, as described above with respect to one or more of the preceding drawings, may be configured to operate according to one or more examples described herein.

[0163] Any of the embodiments described above may be combined with any other embodiment (or combination of embodiments) unless explicitly stated otherwise. The foregoing description of one or more implementations provides examples and descriptions, but is not intended to be exhaustive or limit the scope of the embodiments to the precise forms disclosed. Modifications and variations are possible in light of the above teachings or may be learned from practicing various embodiments.

[0164] The methods according to the embodiments described in the claims or specification of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0165] When implemented in software, a computer-readable storage medium storing one or more programs (software modules) may be provided. The one or more programs stored in the computer-readable storage medium are configured for execution by one or more processors in an electronic device. The one or more programs include instructions that cause the electronic device to execute methods according to embodiments described in the claims or specifications of the present disclosure. The one or more programs may be provided as included in a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read only memory (CD-ROM)) or an application store (e.g., Play Store). 쪠 ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0166] These programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), magnetic disc storage devices, compact disc-ROM (CD-ROM), digital versatile discs (DVDs) or other forms of optical storage devices, magnetic cassettes, or may be stored in memories formed by a combination of some or all of these. In addition, each configuration memory may include multiple copies.

[0167] Additionally, the program may be stored on an attachable storage device that is accessible via a communication network, such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), a storage area network (SAN), or a combination thereof. Such a storage device may be connected to a device implementing an embodiment of the present disclosure via an external port. Additionally, a separate storage device on the communication network may be connected to a device implementing an embodiment of the present disclosure.

[0168] In the specific embodiments of the present disclosure described above, components included in the disclosure are expressed singularly or plurally, depending on the specific embodiment presented. However, the singular or plural expressions are selected to suit the presented situation for convenience of explanation, and the present disclosure is not limited to singular or plural components. Components expressed in plural may be composed of singular elements, or components expressed in singular may be composed of plural elements.

[0169] According to embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., modules or programs) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

[0170] Meanwhile, although the detailed description of the present disclosure has described specific embodiments, it is obvious that various modifications are possible within the scope of the present disclosure.

Claims

1. In a wireless module of an electronic device for performing communication with a terminal, 1st substrate; A radio frequency (RF) processing circuit electrically connected to the first substrate; A second substrate comprising a plurality of layers; A plurality of radiators arranged in at least one layer among the layers of the second substrate; and A grid array comprising a plurality of solder elements coupled to a first surface of the first substrate and a first surface of the second substrate, The first surface of the second substrate includes a connection area where the plurality of solder elements are joined and at least one corner area where the solder elements are not joined, The second substrate includes a copper portion arranged in a layer that is different from at least one layer among the layers of the second substrate and corresponds to the first surface, The copper portion includes a portion partially formed within the at least one corner region. Wireless module.

2. In claim 1, The above layers include at least one layer in which the plurality of radiators are arranged, a ground layer, a feed layer in which a feed line is arranged, and the layer, The above power supply layer is arranged between the above ground layer and the above layer, The above copper portion is formed to include all areas on the layer corresponding to the position of the feed line in the feed layer. Wireless module.

3. In claim 1, The above plurality of solder elements include solder elements that are uniformly arranged at a specified interval within the connection area, Among the solder elements that are uniformly arranged, the solder elements arranged at the boundary (boarder) include solder elements whose distance to one side of the second substrate is longer than the specified interval. Wireless module.

4. In claim 3, The solder elements arranged on the above boundary include solder elements arranged in a direction different from the first direction of the first surface of the second substrate and the second direction perpendicular to the first direction. Wireless module.

5. In claim 1, The above solder elements include a first solder element closest to a vertex of the second substrate among the above solder elements and a second solder element different from the first solder element, The distance between the second position of the second solder element and the vertex on the first axis is shorter than the distance between the first position of the first solder element and the vertex on the first axis, On a second axis perpendicular to the first axis, the distance between the second position of the second solder element and the vertex is longer than the distance between the first position of the first solder element and the vertex on the second axis. Wireless module.

6. In claim 1, The above RF processing circuit is coupled to a second side of the first substrate, opposite to the first side, At least one of the above radiators is disposed on a second surface opposite to the first surface of the second substrate, The first surface of the second substrate includes a fiducial mark portion arranged in each of the at least one corner region. Wireless module.

7. In claim 1, The above radiators are configured to transmit signals in a frequency band including 26 GHz (gigahertz), The above layers include upper layers, lower layers, and a ground layer, each of which includes at least one layer, The residual rate of the upper layers is greater than that of the lower layers, and the difference between the residual rate of the upper layers and the residual rate of the lower layers is less than about 40 percent. Wireless module.

8. In claim 1, The above radiators are configured to transmit signals in a frequency band including 39 GHz (gigahertz), The above layers include upper layers, lower layers, and a ground layer, each of which includes at least one layer, The residual rate of the upper layers is greater than that of the lower layers, and the difference between the residual rate of the upper layers and the residual rate of the lower layers is less than about 45 percent. Wireless module.

9. In claim 1, The size of the first surface of the second substrate is smaller than the size of the first surface of the first substrate. Wireless module.

10. In claim 1, Each of the above solder elements comprises a first pad coupled with the first surface of the first substrate, a second pad coupled with the first surface of the second substrate, and a solder ball comprising the first pad and the second pad. Wireless module.

11. In an electronic device for performing communication with a terminal, 1st substrate; A plurality of RF (radio frequency) processing circuits electrically connected to the first substrate; Multiple secondary substrates; A plurality of radiators arranged in at least one layer among the respective layers of the second substrates; and A grid array comprising a plurality of solder elements coupled to a first surface of the first substrate and a first surface of each of the plurality of second substrates, Each of the first surfaces of the plurality of second substrates includes a connection region where the plurality of solder elements are joined and at least one corner region where the solder elements are not joined, Each of the plurality of second substrates includes a copper portion arranged in a layer that is different from at least one layer among the layers and corresponds to the first surface, The copper portion includes a portion partially formed within the at least one corner region. Electronic devices.

12. In claim 11, The above layers include at least one layer in which the plurality of radiators are arranged, a ground layer, a feed layer in which a feed line is arranged, and the layer, The above power supply layer is arranged between the above ground layer and the above layer, The above copper portion is formed to include all areas on the layer corresponding to the position of the feed line in the feed layer. Electronic devices.

13. In claim 11, The above plurality of solder elements include solder elements that are uniformly arranged at a specified interval within the connection area, Among the solder elements that are uniformly arranged, the solder elements arranged at the boundary (boarder) include solder elements whose distance to one side of the second substrate is longer than the specified interval. Electronic devices.

14. In claim 13, The solder elements arranged on the above boundary include solder elements arranged in a direction different from the first direction of the first surface of the second substrate and the second direction perpendicular to the first direction. Electronic devices.

15. In claim 11, The above solder elements include a first solder element closest to a vertex of the substrate among the above solder elements and a second solder element different from the first solder element, The distance between the second position of the second solder element and the vertex on the first axis is shorter than the distance between the first position of the first solder element and the vertex on the first axis, On a second axis perpendicular to the first axis, the distance between the second position of the second solder element and the vertex is longer than the distance between the first position of the first solder element and the vertex on the second axis. Electronic devices.

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