Mixed material substrate methods and devices

By embedding a second substrate with different characteristics into a first substrate and using a substrate carrier frame for batch processing, the challenges of high defect rates and costs in complex PCBs are addressed, enhancing device performance and reducing costs.

WO2025144939A1PCT designated stage expired Publication Date: 2025-07-03OCTAVO SYSTEMS LLC
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Patent Information

Application Number
PCT/US2024/061966
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-12-29
Filing Date
2024-12-26
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

The increasing complexity of printed circuit boards (PCBs) due to heterogeneous integration results in higher fabrication defects and costs, particularly during encapsulation and external ball attach steps, necessitating improved semiconductor fabrication processes for mixed material substrates.

Method used

The integration of a second substrate with different characteristics into a first substrate forms a mixed substrate, which is then processed using a substrate carrier frame (SCF) for batch molding and encapsulation, minimizing yield loss and assembly costs.

Benefits of technology

This approach optimizes the performance of devices by matching substrate characteristics with circuitry requirements, reducing fabrication defects and costs while maintaining high functionality and capability.

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Abstract

Method and apparatus for manufacturing multiple complex heterogeneous integrated or homogeneous integrated circuit devices using composite substrates. A second substrate is embedded in a first substrate, where the substrates have different characteristics.
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Description

MIXED MATERIAL SUBSTRATE METHODS AND DEVICESTECHNICAL FIELD

[0001] This disclosure relates to fabricating, assembling, and encapsulating systems and devices, including systems and devices using multiple combined substrates with different materials.BACKGROUND

[0002] The electronics industry is entering a new era of integration. It is moving from designing electronic systems using hundreds of independent components, both active and passive, to using system components. These systems may contain many, if not all, of those components in one packaged device. The result of system level integration, also known as Heterogeneous Integration (HI), is the ability to reduce the size of the system. Moreover, the performance of electronic systems is increasing while the power dissipation is decreasing, and the size is shrinking. To keep up with the shrinking of the system, the substrates (e.g., printed circuit boards) on which systems are integrated need to be updated. This can include aggressively shrinking their size, while increasing the density of the components on these substrates / circuit boards.

[0003] Often the printed circuit boards (PCBs) and substrates used to manufacture integrated circuit devices, such as Systems on Module (SOM) devices, System in Package (SiP) devices, Multi-Chip Module (MCM) devices, and chiplets, increase in complexity as the number of components increases to integrate more functionality and capability. This can mean more layers in the PCB / substrate. Because of the need for more layers of electrical traces, there can also be more vias between the layers, and tighter design rules for spacing between traces in a layer. Additionally, new substrate materials such as glass, silicon, and others are being used to increase conductive trace density and provide improved substrate properties.

[0004] Certain challenges exist. For instance, as a result of increased complexity, traditional semiconductor fabrication processes in which a strip of multiple tested good substrates for a particular device are assembled in bulk prior to being cut apart, could become cost prohibitive as the increase in number of layers and tighter spacing of traces in a layer results in more fabrication defects in the panel of substrates, resulting in more tested bad substrates in a panel.

[0005] One present solution, to minimize the yield loss and higher assembly costs, has been to remove the good electrical substrates from the strip or panel of substrates and assemble, encapsulate, and attach external connectors one substrate (for a device) at a time. Where this process becomes most cost prohibitive is at the encapsulation and external ball attach steps of thesemiconductor fabrication process. A possible solution is to attach lids rather than encapsulate the devices, which, in many designs, leaves all or portions of the lidded device open and unprotected from debris or chemicals that could affect the operation of the device.

[0006] There is a need for improved semiconductor fabrication processes that allow for increases in functionality and capability without adversely affecting manufacturing time and cost, including when incorporating mixed material substrates and devices, and also a need for improved methods and devices for processing singulated substrates.SUMMARY

[0007] According to embodiments, a device comprises a first substrate and a second substrate, where the first and second substrates have different characteristics, and the second substrate is embedded in the first substrate to form a mixed substrate.

[0008] According to embodiments, a method comprises: (i) inserting a second substrate into a nesting hole of a first substrate to form a mixed substrate, where the first and second substrates have different characteristics; and (ii) processing the mixed substrate to manufacture a device. This could be, for instance, semiconductor processing to manufacture a semiconductor device.

[0009] According to embodiments, a method comprises attaching a second substrate to a first substrate to form a mixed substrate, where the first and second substrates have different characteristics. The method may further comprise processing the mixed substrate. In certain aspects, an apparatus is provided for manufacturing heterogeneous integrated devices. The apparatus may comprise a panel of individual first sized substrates composed of a first substance and each having an opening (or mounting area) for mounting therein second substrate of a smaller second size composed of a second substance.

[0010] Some embodiments may include batch molding (or encapsulating) singulated substrates, such as substrates that are composed of mixed material substrates (MMSs) that are each made with different materials. For instance, embodiments described herein can use a substrate carrier frame (SCF), or similar devices and methods.

[0011] These and other features of the disclosure will become apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG. 1 illustrates an example of a Heterogeneous Integrated Device (HID).

[0013] FIGs. 2 A and 2B depict a substrate arrangement according to some embodiments.

[0014] FIGs. 3A and 3B depict a strip of mixed material substrates (MMS) on a back panel according to some embodiments.

[0015] FIGs. 4A-4G depict MMS devices at various stages of manufacturing according to some embodiments.

[0016] FIGs. 5A-5H and FIG. 5J depict MMS devices at various stages of manufacturing in a substrate carrier frame (SCF) according to some embodiments.

[0017] FIGs. 6A-6C are flow charts illustrating a method for manufacturing MMS devices according to some embodiments.

[0018] FIGs. 7-11 depict MMS devices according to embodiments.

[0019] FIGs. 12A-1, 12A-2, 12A-3, 12A-4, and 12B-12E depict different views of a substrate carrier frame (SCF) according to some embodiments.

[0020] FIGs. 13A-13F depict one or more processes according to embodiments, such as the insertion and removal of a substrate carrier frame into a mold cavity.

[0021] FIGs. 14A-14F depict views of a substrate carrier frame according to embodiments after the substrates have been populated with components and encapsulated.

[0022] FIGs. 15A and 15B depict aspects of molding individual substrates using a disposable one-piece substrate earner frame (e.g., for use in either a compression or transfer mold) according to embodiments, and FIGs. 15C-5E depict aspects of three-piece substrate carrier frame.

[0023] FIGs. 16A-16D depict methods according to embodiments for manufacturing devices that have been singulated and processed using a substrate carrier frame.

[0024] FIG. 17 shows certain processing points in a semiconductor assembly used to create a System in Package (SIP) device.

[0025] FIG. 18 shows a SIP where a lid has replaced encapsulation.

[0026] FIG. 19 is a flow chart with a process according to some embodiments.DETAILED DESCRIPTION

[0027] Heterogeneous Integration (HI) enables integration of devices, with diverse fabrication technologies, such as digital, analog, optical, and memory processes. Other devices may also be integrated, including active and / or passive devices and components (e.g., discrete circuits, sensors, power management devices, and various non-silicon devices). Some examples of non-silicon devices are mechanical, biologic, organic, fluid, etc. components, as well as germanium and gallium nitride (GaN). In some embodiments, even HI devices, such as chiplets or SIPs forinstance, may be integrated as a component in another HI device. Additionally, HI devices may include mechanical devices. One example is mechanical energy source using vibration or heat to create energy (e.g. a self -winding watch concept). HI devices are also attractive because they may allow for miniaturization of a complete system in a single package. In some cases, use of HI can reduce an entire microelectronic system on a printed circuit board (which may be tens of square cm in size) to a single package of a square cm or less. Using HI technology in SOMs, SIPs, MCMs, and chiplets can provide components or systems that are otherwise impossible or impractical to integrate in a single silicon circuit, such as an ASIC or SoC.

[0028] Another aspect of HI advances has to do with substrate technology. Various substrate materials, such as organic substrates (e.g., BT and FR4), silicon, silicon carbide, and GaN, may enable the further integration of HI devices. Even as system devices shrink, embodiments can enable use of circuit components (e.g., power management, processing elements, memories, and peripheral devices) that not only require different semiconductor processes, but may also need different substrate materials and design rules for optimal integration.

[0029] As one example, power management circuits optimally work on substrates with characteristics such as high voltage, high current, and extensive thermal requirements. But, at the same time, computing elements such as microprocessors, microcomputers, FPGAs, analog processors, and various memory devices optimally work on substrates with characteristics such as high frequency and / or low noise compatibility, low voltage requirements, and stable temperatures. Other system elements have characteristics which are different yet from power management and computing elements and may require other optimal substrate characteristics.

[0030] Another aspect of system design that may be considered is the substrate complexity. To interconnect all the various components of a complex system requires more layers of electrical conductors (traces), often with traces in each layer spaced closer to adjacent traces. To manage the complexity while maintaining a small substrate footprint, the design and layout rules may be pushed to or beyond, the state of the art. This may vary for a given material system, for a given target function, based on the components used, etc.

[0031] According to embodiments, the disclosed HI devices may contain multiple different substrates, with each substrate having potentially different characteristics, such as layer structures, design rules, or differing electrical, mechanical, thermal, and / or optical properties. These devices may be either entirely customized for a specific function or purpose, or they may be general-purpose building blocks (smart blocks) around which other specific components may be added for a specific application or end use. However, even these multiple different substrates may result in bad substrates in a panel requiring good substrates to be singulated. Accordingly, there is still a need for how to further process singulated substrates.

[0032] Aspects of this disclosure use composite or mixed material substrates (MMS) to minimize the issues caused by circuit complexity in single material substrates by combining different materials / substances with different properties. They may be combined, for instance, in each substrate in a strip or panel of composite or mixed material substrates (MMS). In embodiments, heterogeneous integration of the different substrate materials can be used to match the substrate composition characteristics with the characteristics of the circuitry mounted on it. The MMSs can then be populated with components, encapsulated, singulated, and have external connectors attached using conventional semiconductor equipment. By doing so, the yield loss is minimized, the assembly costs are minimized, and the performance of the resulting devices are optimized.

[0033] Referring now to FIG. 1, aspects of a Heterogeneous Integrated Device (HID) are illustrated. In this example, device 100 is provided on a singulated substrate, where assembled substrate 120 comprises a multi-layer substrate 102, with each layer having conductive elements (traces) 123 and the layers interconnected with vias 122. On the substrate, multiple components 103, 104 are attached and are operatively interconnected using the traces and vias in the substrate. In this example, the substrate is populated with the components necessary for its operation. Once populated, a lid 101 may then be secured to the top of the device, as singulated substrates are difficult to encapsulate using normal batch semiconductor processes. However, as illustrated in FIG. 1, such lids may leave gaps 121 between the substrate 102 and the lid 101. In addition, external connection balls 107 can be attached to the base of substrate 102.

[0034] For ease of depiction purposes, in following figures, substrates are presented without conductive elements 123 and vias 122 depicted and identified, although they may be present in the depicted substrates of various embodiments. For instance, they may be used for interconnecting the components shown in FIGs. 4 and 5. Also, for ease of depiction purposes, the number of components illustrated in the figures provided herein may be reduced from the actual number of components that are found (e.g., tightly and densely packed) in a HI device.

[0035] According to embodiments, substrates may be made from a variety of materials, and in some instance, the materials may be selected according to the application to which the electricalcomponents mounted thereon will be subjected. As a few examples, applications vary from use in computers, wireless equipment (c.g., cell phones) and military, where the electrical component is simple or complex. Different materials for substrates may include, for example, organic materials (such as FR4 and BT), glass, silicon, germanium, carbon SiC, and GAN. New substrate materials, such as for example, glass, silicon, and others are being used to increase conductive trace density and provide improved substrate properties. These various materials may be chosen for their structural rigidity, flexibility, impedance, frequency response, conductivity, temperature range, moisture resistance, and price. That is, Heterogeneous Integration (HI) of the different substrate materials are used to match the substrate composition characteristics with the characteristics of the circuitry mounted on it.

[0036] As such, substrate material composition - along with number of layers and design rules - may need to be considered as part of the total system design. In embodiments, portions of a system may be allocated to a substrate having optimal characteristics for the components to be mounted thereon and interconnected in that substrate. As an example, the substrate composition for a microprocessor and associated memories may be different from the substrate composition for a power management chip. Embodiments are directed to substrates that are made up of different portions, which are made from different materials and compositions to match substrate characteristics with the components mounted thereon.

[0037] Referring now to FIGs. 2A and 2B, aspects of a substrate arrangement 200 are illustrated with respect to some embodiments. FIG. 2A shows a top-side view of a blank strip of substrates, and FIG. 2B shows the side view. According to some embodiments, this strip of substrates is sized to be used with conventional semiconductor processing equipment. In this example, an uncut panel 300 of multiple substrates 212a is shown, each with nesting holes 244. The nesting holes 244 may be used, for instance, for locating and attaching a second substrate, such as substrate 212b illustrated with respect to FIGs. 3A and 3B. In embodiments, the substrates in FIG. 2A will be used to form mixed material substrates (MMS). FIG. 2B depicts a side view illustrating the strip 300 of FIG. 2A attached to a back plate 263. Cut lines 301 are shown to indicate the location of a completed MMS devices’ edges, for instance, once the devices have been singulated. In some embodiments, devices may comprise just the substrates, partially processed substrates with components, or fully processed devices that have been packaged.

[0038] The base substrate 212a may have components (such as components 103, 104 in FIG. 1), and an area set aside for an additional substrate 212b. For example, the second substrate 212b may be electrically interconnected to the base substrate 212a with bond wires 204 to form a mixed material substrate (MMS). Though bond wires are used as an example, other interconnection techniques may be employed to make electrical and / or mechanical connections.

[0039] Additionally, the two substrates 212a, 212b of the mixed substrate may comprise different substrate materials, and in some embodiments, may have differing numbers of layers and / or different mechanical, electrical, thermal and optical characteristics. In certain aspects, substrate 212a can act as a motherboard for substrate 212b as a daughter board or another component. For example, the base substrate 212a may have better structural integrity but lower circuit density, while the second substrate 212b may have better circuit density but lower structural integrity. Finally, the mixed substrate device may be encapsulated, ready for ball attach, singulation, and testing.

[0040] Moreover, the orientation of the second (or subsequent) substrate 212b relative to a first substrate 212a may be important and may be accomplished by using slight alterations in one side of the opening (when used) and a similar alteration in the second substrate, or bevels on one edge, or a key and associated slot. Further, tips or ledges may be left in sides of any opening to provide a way to support the second substrate in the opening, and those tips and / or ledges may contain contacts for interconnecting the two substrates. In some embodiments, the bottom-most layer (or layers) of the base substrate 212a may have one or more layers that extends across the bottom of each opening to support any substrate mounted therein.

[0041] FIGs. 3A and 3B depict top and side views, respectively, of a strip of mixed material substrates. In this example, two substrates 212a, 212b are attached to a back panel 263. Here, the two substrates 212a, 212b are combined to make up the MMS. In this embodiment, the strip of MMSs may be assembled at the beginning of the assembly process, as shown in this figure, ready to be populated with components. However, according to embodiments, the strip of MMSs may be assembled after one or both substrates 212a, 212b have been partially or completely populated with components. Again, cut lines 301 are shown to indicate the location of a completed MMS devices’ edges, for instance, once the devices have been singulated. While two types of substrates 212a, 212b are used in this example, other numbers of substrates (e.g., 3 or more) can be used. Inthis example the second substrate 212b is embedded in a hole (the gaps 231 between the two substrates 212a, 212b indicate the edges of the hole) of the base substrate 212a.

[0042] FIGs. 4A-4G depict a strip of populated mixed material substrate (MMS) devices 400 made up of at least two substrates 212a and 212b. Portions of back plate 263 may be seen through the openings in substrate 212a.

[0043] FIG. 4A is the top view of the populated strip of ten MMS devices 400. In this example, the main substrate 212a has various components 103 attached to it and includes a second substrate 212b, which also has various components 103 attached to it. The two substrates 212a and 212b are interconnected using bond wires 204. Other interconnection techniques may be employed. The two substrates 212a, 212b in this example comprise different materials with different characteristics, such as different mechanical, electrical, thermal, and / or optical characteristics. Once the MMS devices are assembled, they can be singulated (cut apart) into completed devices ready to be tested. The cut lines 301 are shown for completeness.

[0044] According to embodiments, the different substrate materials with different characteristics may include, for example, organic materials such as FR4 and BT, glass, silicon, germanium, carbon SiC, and GAN. These various materials may be chosen, for example, based on their number of layers, structural rigidity, flexibility, impedance, frequency response, conductivity, temperature range, or moisture resistance.

[0045] FIG. 4B depicts a side view of the strip of MMS devices 400 of FIG. 4A with two integrated substrates 212a and 212b, each of which are populated with their respective components and devices and interconnected using bond wires 204. The cut lines 301 indicate the location of the edges of the singulated devices 541 that can be formed from the strip. As shown in FIG. 3B, the substrates are provided on a back plate 263. Similarly, FIG. 4C depicts the strip of MMS devices of FIG. 4A with two integrated substrates 212a and 212b. Again, substrates 212a and 212b, are each populated with their respective components and devices and interconnected using bond wires 204. The cut lines 301 indicate the edges of the singulated devices 541. In FIG. 4C, the substrates and components have been encapsulated 641. FIG. 4D depicts a strip of MMS devices of FIG. 4A with two integrated substrates 212a and 212b, and encapsulate 641, with external connectors attached 550. The connectors 550 may be, for example, any of BGA balls, pins, or LGA pads. In embodiments, this strip is ready to be singulated along the cut lines 301.

[0046] FIG. 4E depicts a top view of one singulated mixed material substrate (MMS) from the panel in FIG. 4D, without cncapsulant 641 for case of depiction purposes. The embodiment of FIG. 4E depicts the base substrate 212a and the other substrate 212b. Again, each of the two substrates 212a, 212b in the MMS can use different substrate materials, for example, having different mechanical, electrical, thermal, and / or optical characteristics. However, they may be made of the same material and differ in the number of layers or design rules; the motherboard substrate 212a may have more or fewer layers, or tighter or looser design rules than any added substrate 212b. Each of the substrates may have components, active and passive, mounted thereon and operatively interconnected.

[0047] FIG. 4F depicts a side view of a singulated mixed material substrate (MMS) after it has been cut from the panel shown in FIGs. 4A-4D, in some embodiments. In this example, substrate 212b is electrically and mechanically attached to substrate 212a using bond wires 204. Each substrate is populated with active and passive components 103, and the device is encapsulated 641 and with external connectors 550 attached. FIG. 4G depicts an alternative side view of a singulated mixed material substrate (MMS) after it has been cut from the panel shown in FIGs. 4A-4D, where substrate 212b is mounted on the top surface of substrate 212a. Substrate 212b is electrically and mechanically attached to substrate 212a using bond wires 204. Each substrate is populated with active and passive components 103. The device is encapsulated 641 and with balls 550 attached. In some embodiments, an adhesive or similar material may be used to attach one substrate to another.

[0048] Although embodiments of the present disclosure illustrate two substrates, any number of substrates may be employed to create MMS substrates for semiconductor devices. However, one representative example of an MMS substrate employing two substrates that may find application to semiconductor devices, is for a high-power device. The center substrate 212b may be especially suited for high voltages and / or currents by having thick layers and thick traces of copper and may be used to power components that may require high current and / or voltages on the main substrate 212a. For example, a mother substrate (MSS) 212a may be made of FR4, which has better structural properties then the daughter substrate (DSS) 212b with high voltage and current carrying capabilities, while the daughters substrate (DSS) 212b may be made of semiconductor grade silicon that has a significant increase (e.g., orders of magnitude) of trace density compared to the MSS 212a for high speed signal interconnections between high speed components. In someembodiments other combinations may be used, including: (i) one substrate segment (MSS) optimized for electrical circuits (metal traces and vias), a second segment (DSS1) optimized for optical circuits (glass (optical) traces and vias), and a third segment (DSS2) optimized for electrical to optical interfaces; (ii) one substrate segment (MSS) optimized for power (high voltage and / or high current), one segment (DSS1) for small signal electrical, one segment (DSS2) for optical, and one or more (DSSn) for mechanical components, such as mechanical switches, digital mirror devices (DMDs), vibrators, energy scavenging, thermal management, etc. In certain aspects, substrate segments may be optimized for electrical power management, mechanical structures, small signal electronics, optical circuits, and / or thermal management Additionally, segments may be mechanically attached together, or merged on same substrate by the substrate manufacturer.

[0049] Aspects of the disclosed methods and apparatus, according to embodiments, provide an economical way to incorporate multiple substrate materials into one (or more) physical substrate structure.

[0050] Referring now to FIGs. 5A-5H and 5J, aspects of manufacturing using an SCF are provided according to embodiments. Examples of SCF devices and methods used with the present disclosure are provided later herein. In some embodiments, one or more mixed substrate devices described with respect to FIGs. 2-4 may be placed in an SCF for subsequent processing. This includes, for example: (i) individual singulated substrates, which are combined in the SCF; (ii) mixed substrates placed in the SCF; (iii) partially populated mixed substrates placed in the SCF; and (iv) fully populated mixed substrates placed in the SCF for processing (e.g., encapsulation and / or ball attach). Likewise, the SCF devices and methods discussed later herein may be used in forming a strip or panel of mixed substrates, as shown in FIGs. 2A, 3A, 4A, and 5B.

[0051] Referring to FIG. 5A as one example, a top view of one singulated mixed material substrate (MMS) is illustrated. The embodiment of FIG. 5A depicts the base substrate 212a and three other substrates 212b, 212c, 212d. Again, each of the four substrates 212a, 212b, 212c, 212d in the MMS may comprise different substrate materials, with different mechanical, electrical, thermal, and / or optical characteristics. However, in embodiments, they may be made of the same material and differ in the number of layers or design rules; the motherboard substrate 212a may have more or fewer layers, or tighter or looser design rules than any one of the added substrates 212b-d. Each of the substrates may have components 203, active and passive, mounted thereon and operatively interconnected. In some instances, the singulated MMS substrate will still requireadditional semiconductor processing. To accomplish this additional processing, the singulated MMS substrate along with other singulated MMS substrates may be placed in a substrate carrier frame (SCF 1201), as described later herein.

[0052] A singulated MMS substrate like that of FIG. 5A may, along with other singulated MMS substrates, be inserted into a substrate carrier frame SCF 1201 where, for example, a singulated MMS substrate may contain a first singulated substrate 212a that has an area removed which is populated with a second singulated substrate or chiplet 212b. This allows the properties of the first substrate 212a, for example, layer count, material, and thickness, to be different from the second substrate or chiplet 212b. The two substrates may be combined in the SCF 1201 as either pre-populated with components 103 or unpopulated and populated later during other process steps. The first substrate may be connected to the second substrate / chiplet through connection materials 204, (see FIGs. 5D, 5E, 5J, and 7-11) which may include bond wires, pads, and optical connections (as examples). The first substrate 212a and second substrate / chiplet 212b may then be processed and encapsulated into a single combined device.

[0053] FIGs. 5A-5H and 5J depict embodiments of singulated mixed material substrate (MMS) devices in a substrate carrier frame (SCF). In these examples, the outer substrate 212a has a prefabricated area for at least a second substrate 212b which may be a different material (such as glass or silicon) with, for instance, greater circuit density, varied bump density, and / or different electrical and mechanical characteristics.

[0054] According to embodiments, FIG. 5A depicts one of the mixed material substrates (MMS) 211) similar to the MMS shown in FIG. 4E, removed from the substrate carrier panel (SCF) shown in FIG. 5B. Note, in this depiction, the MSS 211 has already been populated, had its connection balls attached (not shown), and singulated. In this depiction there are three substrates 212b-d electrically and mechanically attached to substrate 212a. In addition to the three substrates 212b- d there are components, both active and passive, attached to each of the four substrates.

[0055] FIG. 5B is an example top view of the MMS similar to that depicted in FIG. 5A, but with multiple MMS mounted in a substrate carrier frame (SCF) 210. In this embodiment, each MMS 211 uses four substrates 212a-d, each with different substrate materials, different sizes, different electrical connections, different mechanical attachments, different number of layers, and / or with different functions. Substrate 212a, in some sense acts as the motherboard with substrates 212b-d as daughter boards. In this specific embodiment, the MMS devices are held in a substrate carrierframe (SCF) 210. However, for a high yielding panel of substrates 212a similar to those depicted in FIG. 4A, an SCF may not be needed and may be replaced by the high yielding substrate panel. For completeness, alignment holes 202 are shown on the panel in FIG. 5B.

[0056] In the example of FIG. 5B, the other substrates 212b-d are mechanically and electrically attached to the top surface of the base substrate 212a. Electrical interconnection between the substrates may be wire bonds 204 but could also be accomplished using other techniques (e.g., a redistribution layer (RDL) on the bottom side of 212b, through silicon vias (TSVs) in 212b, or a combination of the use of RDL and TSV). The area where substrates 212b-d are mounted on the surface of substrate 212a are prepared for these substrate mountings.

[0057] FIG. 5C is another top view of an MMS, like those depicted in FIG. 5B, in a SCF. FIG. 5C depicts an MMS substrate 212a, 212b contained within the ribs 201 of a SCF 210. In this example, the second substrate 212b is embedded in a hole (the gaps 231 between the two substrates 212a, 212b indicate the edges of the hole) of the base substrate 212a. As in FIGs.5C / 5D / 5E, the two substrates are electrically interconnected using wire bonds 204. Electrical interconnection between the substrates is shown as wire bonds 204, but could also be accomplished using, for example, a redistribution layer (RDL) on the bottom side of 212b, through silicon vias (TSVs) in 212b, or a combination of the use of RDL and TSV. Other interconnection techniques may be employed. Substrate 212a, in some sense acts as the motherboard with substrate 212b as a daughter board. The gap 231 between the edges of the two substrates 212a and 212b may be structurally enhanced when needed. In this example, the gap 231 between the two substrates has no structural elements other than the bond wires, but could be enhanced by, for example, filling the gap 231 with encapsulate 641, or conformal coating.

[0058] FIGs. 5D and 5E depict side views of alternate embodiments of an MMS in a SCF.

[0059] FIG. 5D depicts the second substrate 212b mounted electrically and mechanically on a special area or portion of the top surface of substrate 212a. The two substrates are interconnected using bond wires 204 in this example. However, electrical interconnection between the substrates could also be accomplished using other techniques, such as a redistribution layer (RDL) on the bottom side of 212b, through silicon vias (TSVs) in 212b, or a combination of the use of RDL and TSV. Other interconnection techniques may be employed. Components 203 are depicted, and the substrates have been encapsulated by encapsulant 641.

[0060] In FIG. 5E, the second substrate 212b is embedded in a nesting hole 231 , and again, the substrates arc interconnected using bond wires 204. The gap between the two substrates (in the nesting hole 231) has no structural elements other than bond wires, and may be enhanced by filling the gap with encapsulant or conformal coating, or alternatively by using lips or edges as depicted in FIG. 5G.

[0061] FIGs. 5F and 5G depict another arrangement according to embodiments, in which an HI device with mixed material substrates (MMS) 211 is used in a SCF. This embodiment depicts two substrates, each with different substrate materials, different sizes, different electrical connections, different mechanical attachments, different number of layers, and / or different functions. The second substrate 212b is embedded in nesting hole 244 with connectors 264 such as, for example, bumps, LGA pads, or BGA balls to electrically and mechanically interconnect the two substrates 212a, 212b. That is, extensions or lips or edges extend from the walls of the opening 244 to support the second substrate 212b and provide a location for providing contacts for interconnections. Again, components 203 are depicted and the substrates have been encapsulated 641 (see FIG. 5G). In this example, there are components on both the upper and lower surface of substrate 212b. Encapsulant 641 may be used to fill the nesting hole 244 to enhance structural integrity.

[0062] FIGs. 5H and 5J depict top and side views, respectively, of an embodiment of an HI device with mixed material substrates (MMS) 211 in an SCF. This embodiment depicts four substrates 212a-d, each with different substrate materials, different sizes, different electrical connections, different mechanical attachments, different number of layers, and / or different functions. Substrate 212a, in some sense acts as the motherboard with substrates 212b-d as daughterboards, where the second substrate 212b is embedded in nesting hole 244 with connectors 264 such as, for example, bumps, LGA pads, or BGA balls, to electrically and mechanically interconnect the two substrates 212a, 212b. Substrate 212c is electrically and mechanically interconnected with substrate 212a using bond wires 204. In a similar manner, substrate 212d is embedded in an opening in substrate 212a and may be interconnected with substrate 212a using connectors 264 or bond wires. Again, extensions or lips or edges extend from the walls of the opening 244 to support the second substrate 212b and provide a location for providing contacts for interconnections. Similarly, substrate 212a may have one or more or its lowest layers 265 extend across the opening 244 to provide support for a different substrate and provide an alternate locationfor providing contacts for interconnections. In this example, both 212b and 212d have components mounted on their upper and lower surfaces.

[0063] In each of the embodiments of FIGs. 5B, 5C, 5E, 5G, 5H, and 5J, external connectors for the MMS may be included (though not illustrated). FIG. 4D is an example of an MMS with external connectors 550. Also, although embodiments of the present disclosure illustrate two or four substrates as examples, any number of substrates may be employed to create MMS substrates for semiconductor devices (e.g., 3 or more). Similarly, some embodiments are depicted in a SCF but may be employed without a SCF.

[0064] In certain aspects, this disclosure provides embodiments for batch molding (encapsulating) singulated substrates. The embodiments use a substrate carrier frame (SCF) for batch molding singulated combined substrates as described later herein

[0065] FIGs. 6A, 6B, and 6C are flow charts illustrating a method for manufacturing MMS devices according to some embodiments

[0066] FIG. 6A depicts a process 600 for manufacturing complex MMS devices according to some embodiments. The process may begin, for example, by assembling 601 a strip of substrates (212a) that have one or more openings or positions ready for additional substrates. According to embodiments, the strip can be unpopulated or partially populated. The one or more singulated substrates (212b, 212c, 212d) are assembled 602. According to embodiments, in step 602 one or more singulated substrates (212b / c / ..) that can fit in the substrate strip openings are assembled (strip can be unpopulated or partially populated). In step 603, they are inserted into the substrate (212a). This can include securing unpopulated or partially populated singulated substrate (212b / c / ..) into the unpopulated or partially populated substrate strip. In step 604, assembly of the strip of combined substrates is completed. The strip is encapsulated in step 605, and step 606 includes removing the encapsulated strip from mold cavity. Process 600 can also include adding external connectors (if needed) in step 607. In step 608, MMS devices are singulated from the strip.

[0067] FIG. 6B depicts a process 610 for manufacturing complex MMS devices using a substrate carrier frame (SCF) according to embodiments. The process may comprise one or more of the following: begin by assembling (611) a strip of substrates (212a) that have one or more openings ready for additional substrates 611 - the strip can be unpopulated or partially populated; attach (612) one or more singulated substrates (e.g., 212b) that can fit in (or on) the substrate strip MMSopenings (SCF strip can be unpopulated or partially populated); secure (613) unpopulated or partially populated singulatcd substratc(s) (212b, etc.) into the unpopulated or partially populated substrates (212a); complete assembly of the strip of combined substrates (614); encapsulate the strip (615); remove encapsulated strip from mold cavity (616); add external connectors if needed (617); and singulate the MMS devices from the strip (618).

[0068] Referring now to FIG. 6C, a process 620 according to some embodiments is illustrated. Process 620 may be performed with respect to any of the devices illustrated with respect to FIGs. 1-5. The process may begin, in some embodiments, with selection of substrates and components in step 621 (e.g., first and second substrates and first and second sets of components). In some embodiments:(i) the first set of components are selected based at least in part on the characteristics of the first substrate,(ii) the first set of components are configured to perform a first function, and the characteristics of the first substrate are selected based on the first function;(iii) the second set of components are selected based at least in part on the characteristics of the second substrate; and / or(iv) the second set of components arc configured to perform a second function, and the characteristics of the second substrate are selected based on the second function.In step 622, the first and second substrates and combined. This may include, for instance, inserting a second substrate into (e.g., into a nesting hole) a first substrate. In some embodiments, the first substrate is part of a panel of multiple substrates comprising nesting holes, and inserting the second substrate comprises inserting multiple second substrates into the nesting holes of multiple first substrates of the panel. In step 623, the substrates are connected (e.g., mechanically and / or electrically). In steps 624, the substrates are processed. This could include, for example, semiconductor processing to form semiconductor devices. This could include, for example, cutting a panel of substrates. Process 620 may include any of the steps of FIGs. 6A and 6B according to some embodiments.

[0069] FIGs. 7 and 8 show various embodiments of a mixed substrate. For simplification of the discussion, the concept of a mother board and daughter board is used. Further, in these figures, the substrate that represents the concept of a mother board will be 212a and called a mother substrate (MSS) while the daughter board will be 212b and called a daughter substrate (DSS). Ina panel arrangement (e.g., as shown in FIGs. 2-4) the MSS 212a is the one which is part of the panel. The DSS 212b is the one which is electrically and mechanically attached to the MSS 212a.

[0070] FIG. 7 depicts one arrangement where the DSS 212b is mechanically and electrically attached to the top (or bottom) surface of the MSS 212a either with bond wires 204, connection pins 264, or both. Note that connection pins can be, for example, bumps, balls, RDL, through substrate vias (TSVs), or other electrical connection methods. FIG. 8 depicts an arrangement where the MSS 212a has one or more mounting holes (for ease of explanation, only one mounting hole is shown in this embodiment - see FIGs. 4 and 5 for further details). The DSS in this arrangement has a different thickness than the MSS. In certain aspects, components may be attached to the top or bottom side, or both sides, of the DSS. FIG. 9 depicts a similar arrangement to FIG. 8, but the DSS 212b is the same thickness as the MSS 212a. In certain aspects, the different substrate thicknesses could be the result of, for example, the number of trace layers, the thickness of the trace layer separators, and the thickness of the traces. FIG. 10 depicts an arrangement where the DSS 212b is attached to the MSS 212a from its back side. FIG. 11 depicts a similar arrangement to FIG. 10, except where the MSS 212a is thinner than the DSS 212b and attached to the MSS 212a on its backside. In FIG. 11, there are two rows of interconnect 264 to indicate that there could be multiple rows of interconnect in any of the arrangements depicted in FIGs. 7 - 11. In each of the five arrangements (FIGs. 7-11), a different set of alternatives are available. For example, where multiple mounting holes are employed, different arrangements may be employed for each additional DSS.

[0071] According to embodiments, mixed substrates may be processed using traditional semiconductor processes, but with increased flexibility and ability to customize processes and materials. This can be beneficial.

[0072] Semiconductor device manufacturers, using conventional semiconductor manufacturing equipment, typically have to choose a single process node, i.e. select a set of process manufacturing parameters, which best meets the operating needs of the intended use for a semiconductor device. The manufacturing process node can be optimized for things such as high power, transistor density, low noise, etc. Similarly, when packaged, a semiconductor device manufacturer typically must choose a single set of substrate parameters which best meet the needs of the packaged semiconductor device. That is, the substrate parameters should match or meet the important parameters of the parameters of the device mounted on it. This may result in selection of a substratethat is a compromise between the requirements of the devices mounted thereon. These substrate parameters, such as substrate material, minimum feature size, number of layers, etc. could be optimized for things such as cost, thermal performance, signal integrity, etc. by applying one or more of the embodiments herein.

[0073] Moving forward, it is possible that there will no longer be a single semiconductor device within a package; with HI there may be many different types of devices in a single package with each device having unique requirements for an optimum substrate. Therefore, a process is needed to create composite substrates that allow each of the composite areas / pieces of a single substrate to be optimized to meet the needs of the semiconductor devices which are mounted on them. Additionally, these composite substrates should meet the needs of the high-volume, low-cost manufacturing semiconductor process that currently exists within the semiconductor industry.

[0074] When packaging semiconductor devices, one substrate material is often selected in coordination with a set of design rules to process that semiconductor device using a strip form for the substrate. Additionally, there are generally small sections of a substrate or PCB that require the tightest design rules and a large number of layers, while the bulk of the substrate or PCB may be implemented in fewer layers and with looser design rules. Accordingly, to meet the ever- increasing complexity challenges while still maintaining lower costs, a way to effectively combine substrate characteristics and still process them as strips is needed. Then the design of a semiconductor device may be partitioned and not be forced to use a single substrate material or a fixed set of design rules for the entire substrate.

[0075] As a result of this seemingly unlimited ability to integrate more electrical / mechanical components into one package, new issues of cost-effective manufacturing processes are becoming a reality. These issues may be, for example, the cost of the substrate due to its greater complexity, the inability to use well-understood encapsulation methods, and the attachment of the external connectors to the device package. Attempts have been made to minimize these issues with the most successful being to remove the good substrates from a strip or panel of multiple substrates and process them one at a time rather than as a strip or panel of multiple substrates. Aspects of this disclosure focus on solving the most expensive issue, both in time and money. In some embodiments, an apparatus in the form of a Substrate Carrier Frame (SCF) is used. By populating SCFs with Good Singulated Substrates (GSSs) the production process flow aligns with the already existing production process. The use of SCFs may have its greatest impact during theencapsulation and external connector attachment processes. Using a SCF, the encapsulation process is a choice rather than the forced use of individual lids attached to each singulatcd device.

[0076] According to embodiments, SCFs are provided for batch molding (encapsulating) singulated MMS substrates. In some embodiments, a 1-piece substrate carrier frame (SCF) is used for batch molding singulated substrates (e.g., in a transfer mold). This is illustrated in FIGs. 12D, 12E, 14A, 14B, 14C, 14D, 14E, 14F, 16A, and 16B. In certain aspects, the SCF may be reusable, and it may be formed of metal. In some embodiments, batch molding of singulated substrates is performed using a disposable 1-piece substrate carrier frame (SCF), either in compression mold or transfer mold (e.g., inverted strip). This is illustrated in FIGs. 15A, 15B, and 16C. In certain aspects, it may be formed of plastic. In other embodiments, a 2-piece reusable substrate carrier frame (SCF) is used batch for molding singulated substrates. This may use, for instance, a compression mold (e.g., inverted strip). Aspects of the second embodiment are illustrated in FIGs. 12A, 12B, 12C, 13A, 13B, 13C, 13D, 13E, 13F, and 16D. In embodiments, the 2-piece SCF is formed of metal. Some embodiments may use a 3-piece substrate carrier frame (TSCF), such as illustrated with respect to FIGs. 15C, 15D, and 15E.

[0077] FIGs. 12A-1 and 12A-2 depict a top view of an empty substrate carrier frame (SCF) of embodiments, while FIGs. 12A-3 and 12A-4 show certain details of the SCF. FIGs. 12B and 12C depict a side view and an end view, respectively, of a populated substrate carrier frame (SCF) populated with substates and ready for component assembly, encapsulation, and external connector attachment. The singulated substrates may be inserted into the SCF either prior to component assembly or before encapsulation. In certain aspects, the SCF is populated with substrates with components attached ready for encapsulation and external connectors are attached.

[0078] Referring now to FIG. 12A-1, an arrangement 1200 using a substrate carrier frame (SCF) 1201 is provided according to some embodiments. In this example, the SCF 1201 comprises ribs 1204 spaced appropriately apart to create substrate nesting openings (SNOs) 1202 sized to accept singulated substrates 1212 (e.g., as illustrated in FIGs. 12B and 12C). According to embodiments, the openings (SNOs) 1202 have four retainer tabs 1203, each tab in one of the four corners of the nesting opening 1202 to hold the substrates 1212 in place. Though shown with four corner retainer tabs 1203 in this example, other numbers of tabs and other placements (e.g., along the edges of SNOs 1202) may be used in other embodiments. In some embodiments, and as shown in FIGs. 12A-3 and 12A-4, mold channels 1205 can be placed in the ribs 1204 of the SCF 1201 so thatmold compound (encapsulate) can flow between the openings and connect all substrates together for batch I strip processing in the case where the SCF 1201 is removed. In other embodiments the mold channels 1205 are removed which allows individually molded devices to be removed from the SCF 1201 and processed. Mold channels may be optional.

[0079] In certain aspects, the thickness of the substrate carrier, or the retainer tabs, can provide the desired thickness of encapsulate to cover the components on the substrate to a desired thickness. That is, the height of the location of the tabs in an opening along the side of a rib is adjusted, depending on the thickness of the substrate and the height of the components on the substrate to be installed on the substrate and the desired thickness of encapsulant over the components in the packaged device. In other embodiments the tabs may be removed or replaced with other methods for retaining the substrates in the SCF. In addition, a substrate carrier frame (SCF) 1201 may be reusable or disposable. In some embodiments, depending on the thickness of the various features, the encapsulant may cover the tabs depending on how the strip is cut apart into individual devices.

[0080] FIG. 12A-2 depicts an arrangement 1210 of substrate carrier frame (SCF) 1201 where the openings SNOs 1202 in the same substrate carrier frame (SCF) 1201 are different sizes for different sized singulated substrates, but the construction can be the same as FIG. 12A-1. As noted elsewhere, in addition, the substrate carrier frame (SCF) 1201 may be reusable or disposable, including when provided with different sized nesting cavities shown in FIG. 12A-2. In certain aspects, FIG. 12A2 1210 depicts an embodiment of a substrate carrier frame (SCF) 1201 where ribs 1204 are spaced appropriately apart to create nesting cavities 1202a, 1202b to accept different sized, singulated substrates. In this embodiment, the different sized nesting cavities 1202a, 1202b have four retainer tabs 1203, each in one of the four comers of the nesting cavities 1202 to hold the substrates 1212 in place. In other embodiments the retainer tabs 1203 may be removed or replaced with other methods of retaining the substrates in the SCF. Likewise, different numbers and placements of tabs may be used. As in FIG. 12A-1, notches 1205 (in the ribs 1204) may be inserted to improve the flow of the encapsulant.

[0081] Referring now to FIGs. 12A-3 and 12A-4, detailed views of a tray rib are provided in accordance with some embodiments. In the example of FIG. 12A-3, one of the ribs 1204 has a notch 1205. In this embodiment, the notch 1205 is centered between two tabs 1203; however, other placements may be used. And depending on the need, one or more notches may be insertedin each rib 1 04 of each nesting cavity 1202. In FIG. 12A-4, a side view of a nesting cavity 1202 with a notch 1205 in a rib 1204 and a substrate 1212 populated with components 1103, 1104 is shown.

[0082] According to some embodiments, FIG. 12B depicts a side view of the substrate carrier frame (SCF) 1201 after the substrates have been populated with components 1103, 1104 and are ready for encapsulation. The populated substrates 1212 are placed in the SNCs 1202 in the substrate carrier frame (SCF) 1201 and held in place by the ribs 1204 of the SCF 1201. Each rib 1204 in this example has a tab 1203 in each comer of the substrate nesting cavity 1202 of the SCF where each substrate 1212 is placed. Substrates 1212 are secured in frame 1201 by a backplate 1221 removably attached to the SCF 201 to keep the substrates 1212 secure.

[0083] FIG. 12C depicts an end view of the substrate carrier frame (SCF) 1201 having substrates 1212 each having been populated with components 1103, 1104 and ready for encapsulation. The populated substrates 1212 are placed in frame 1201 and held in place by the ribs 1204 of frame 1201. Each rib 1204 has a tab 1203 in each comer of the nesting cavity 1202 of the frame where each substrate 1212 is placed. Substrates 1212 are secured in frame 1201 by backplate 1221, which is removably attached to frame 1201. Backplate 1221 may be any suitable material with a polished or non-sticky surface for the encapsulant and may be reusable or disposable.

[0084] Again, the substrates may be populated with components before or after placing a good substrate in in the SCF.

[0085] FIG. 12D depicts a one-piece substrate carrier frame 1260 according to embodiments. In this example, the SCF 1260 has an attached bottom plate 1263 and substrate nesting cavities (SNC) 1262 to secure the individual substrates. Ribs 1261 on the substrate carrier frame form substrate nesting cavities which constrain the individual substrates (e.g., to keep them from getting misaligned). As with other embodiments, the cavities (SNCs) 1262 in the same substrate carrier frame (SCF) 1260 may be different sizes for different sized substrates. Bottom plate 1263 may be, for example, any suitable material with a polished or non-sticky surface for the encapsulant. However, other materials may be used. In addition, the substrate carrier frame (SCF) 1260 may be reusable or disposable. FIG. 12E is a side view 1280 along cross-section A-A. Specifically, FIG. 12E depicts the side view 1280 of a one-piece substrate carrier tray with nesting cavities 1262 with a bottom plate 1263 to hold individual substrates. Ribs 1261 on the substrate carrier plate formnesting cavities which constrain the individual substrates from getting mis-aligned. The bottom plate 1263 may be made of, for example, metal, plastic, or adhesive tape.

[0086] One or more aspects of the disclosure provide devices for encapsulating a plurality of singulated substrates, where the device comprises a frame structure with a plurality of openings therein and in some instances, alignment pins / holes for use with semiconductor processing equipment, wherein each opening is sized to contain a singulated substrate and having a size comparable to a panel of substrates.

[0087] Referring now to FIGs. 13A, 13B, and 13C, one or more steps are illustrated for insertion and removal of a substrate frame carrier assembly 1301 into mold cavity 1320 for encapsulating singulated substrates. According to embodiments, the steps illustrated in these figures may be used with an SCF 1201 according to FIGs. 12A, 12B, 12C. And in this embodiment, the SCF used may be either reusable or disposable, and in certain aspects, the molding may be compression molding.

[0088] FIG. 13A depicts the steps for loading of the populated substrate carrier frame (PSCF) 1301 into the mold cavity 1320 according to embodiments. The first step 1331 is to load the singulated substrates 1302a, 1302b, 1302c into a substrate carrier frame, such as SCF 1201. For ease of depiction purposes, loaded substrate carrier frame assembly 1301 contains substrate carrier frame 1201 loaded with only three substrates 1302a, 1302b, 1302c with attached representative components 1305a, 1305b, 1305c (“populated”). Once the SCF 1201 (or other SCF) has been loaded in step 1331 with the singulated substrates 1302, the backplate 1221 is attached in step 1332 to the loaded substrate carrier frame 1301. Finally, the assembly 1301 consisting of the loaded SCF 1301 and mold top plate 1310 is placed in the mold cavity 1320 in step 1333 and then encapsulated. In some embodiments the height of the carrier frame ribs 1204 and the tabs 1203 are the same, thereby limiting the thickness of the encapsulant by the tab 1203. Other thicknesses may be used.

[0089] FIG. 13B depicts the loaded substrate carrier frame assembly 1301 in mold cavity 1320, but not yet encapsulated. The loaded substrate carrier frame assembly 1301 includes the substrate carrier frame 1201 with devices 1302. It is held in place by the back plate 1221 and mold top plate 1310 and ready for mold compound. According to embodiments, at this stage the mold compound 1303 has not yet been injected.

[0090] FIG. 13C depicts one or more steps for removing 1351 the molded / encapsulated devices 1302 from mold 1320. First the mold top plate 1310 and loaded substrate carrier frame assembly 1301 are removed in step 1351 from the mold 1320. Once removed, the mold top plate 1310 and backplate 1221 are removed in steps 1352, 1353a, respectively, from the loaded substrate carrier frame assembly 1301. In the case of a reusable SCF, the encapsulated devices 1302a, 1302b, 1302c are then removed in step 1353 from the loaded substrate carrier frame assembly 1301. Finally, the substrate carrier frame may be reused after any excess mold compound 1303 is removed in steps 1353a and 1353b. In the case of a disposable SCF, the encapsulated devices 1302 are not removed and the entire loaded substrate carrier frame assembly 1301 proceeds to the next step in assembly (e.g., for singulation). For either the reusable or disposable SCF, when dictated by the assembly process, the encapsulated devices 1302 may then be singulated / separated and further processed. Because of the SCF and the encapsulated substrates, this arrangement is now equivalent to a normal panel of good substrates that have been encapsulated, and accordingly may be treated as such for future processing steps.

[0091] FIGs. 13D, 13E, and 13F depict similar processes as FIGs. 13A, 13B, and 13C. However, in these figures, the SCF 1201 is not a uniform height, which allows for a thicker encapsulant 1303. Additionally, this allows the encapsulant to connect all the substrates together for strip / batch processing in future process steps. In this respect, even without a disposable frame, all of the devices 1302 may be removed and processed as a single unit, like a panel. In some embodiments, FIGs. 13D, 13E, and 13F depict the insertion and removal of the loaded substrate carrier frame (LSCF) 1301 into a compression mold cavity 1320.

[0092] In FIG. 13D, the first step is to load the singulated substrates 1302a, 1302b, 1302c into the substrate carrier frame 1201. In this depiction the loaded substrate carrier frame (LSCF) 1301 has the substrate carrier frame 1201 loaded with three substrates 1320 with attached components 1305. Once the SCF 1201 has been loaded 1331 with singulated substrates 1302, the backplate 1221 is attached 1331 to the loaded substrate carrier frame assembly 1301. Finally, the assembly of the LSCF 1301 and upper mold cover 1310 a e placed in the mold cavity 1320. In this embodiment, the height of the SCF 1201 is greater than the ribs 1204 and the tabs 1203 allowing the thickness of the encapsulant to be determined by the SCF 1201. FIG. 13E depicts the loaded substrate carrier frame 1301 inserted into the mold cavity 1310, 1320. LSCF 1301 is held in place by the backplate 1221 ready for mold compound. At this stage of the example, the mold compound1303 has not yet been injected. FIG. 13F depicts the removal process of the devices 1302 with mold compound 1303 from the mold block 1310, 1320. First the top mold cover 1310 is removed 1352, and the substrate carrier frame assembly 1301 is removed 1351 from the mold block 1320. Once removed from the mold, the backplate 1221 is removed 1353a from the substrate carrier frame assembly 1301. In embodiments, where the encapsulated populated substrates 1302 are captured within the SCF, they will likely need to be singulated (e.g., cut out of the LSCF). In some embodiments, a ball attach process, such as described with respect to FIG. 16C, may precede the removal of the populated substrates from the SCF.

[0093] FIG.s 14A, 14B, 14C, 14D, 14E, and 14F depict example steps for encapsulation of a populated substrate carrier frame (SCF) using a transfer mold and followed by attaching external connectors to the populated substrates, while still in a “panel” or “strip” format. This embodiment of the SCF may be either reusable or disposable. According to some embodiments, the steps illustrated with respect to FIG. 14 may be used with an SCF 1260 as described in connection with FIGs. 12D and 12E.

[0094] FIG. 14A depicts a side view 1400 of the substrate carrier frame (SCF) 1201 in transfer mold 1430, 1440 after encapsulation. The substrates 1212 have been populated with components 1103, 1104 and are encapsulated 1428. The populated substrates 1212 are placed in the substrate nesting cavities 1202 in the substrate carrier frame (SCF) 1201 and held in place by the SCF 1201. In certain aspects, each rib 1204 (see FIG.s 12A, 12B and 12C) in this embodiment does not have a tab in each comer of the nesting cavity 1202 of the SCF where each substrate 1212 is placed. In this example, the substrates 1212 are held in the frame 1201 without tabs. The molding injection port is 1424. Again, the cavity depth may be adjusted to provide the desired encapsulant thickness layer over the components 1103, 1104.

[0095] FIG. 14B depicts a side view 1420 with top mold cavity 1440 and bottom cavity 1430 opened and the encapsulated strip 1428 in substrate carrier frame (SCF) 1201. This figure depicts encapsulated, singulated substrates mounted in a SCF. In more detail, the mold 1430, 1440 has been opened and the “panel” of now encapsulated, singulated substrates removed from the mold. Because of the SCF and the molding plastic encapsulating the substrates, this arrangement is now equivalent to a normal panel of good substrates that have been encapsulated, and accordingly may be treated in as such for future processing steps.

[0096] FIGs. 14C and 14D depict a side view of a reusable SCF (FIG. 14C) and a disposable SCF (FIG. 14D) where the molded substrates strip 1428 is removed from the substrate carrier frame (SCF) 1201.

[0097] FIG. 14C depicts a side view of panel of the molded substrates 1428 removed from a reusable substrate carrier frame (SCF) 1201. In more detail, the SCF is removed from the singulated substrates that are now rigidly held together by the mold that the exists between the substrates. Again, this form is basically a “panel” equivalent to a normal panel of good substrates that have been encapsulated and accordingly may be treated in as such for future processing steps. Alternatively, for a disposable substrate carrier frame (SCF) 1201, the SCF is not removed from the “panel” of encapsulated, singulated substrates and is used accordingly for future processing steps. In some embodiments, an SCF may become a part of the final packaged device.

[0098] FIG. 14D depicts a side view of panel of the molded substrates 1428 removed from the substrate carrier frame (SCF) 1201. Only the backing material 1263 is removed from the singulated substrates that are now rigidly held together by the mold and the disposable SCF 201. Again, this form is basically a “panel” equivalent to a normal panel of good substrates that have been encapsulated and accordingly may be treated in as such for future processing steps.

[0099] FIGs. 14E and 14F depict a side view molded strip 1428 for external connector attach 1485 prior to singulation. The difference is if the SCF 1201 is removed as in FIG. 14E in the case of a reusable SCF or retained as in FIG. 14F in the case of a disposable SCF. In more detail, the molded strip of encapsulated substrates is processed in a manner to attach external connectors to the base of each of the substrates, using existing techniques that are known in the art.

[0100] FIGs. 15A and 15B depict an embodiment using alternative steps 1500, 1520 that can be applied when using a disposable one-piece substrate carrier frame 1201 to process singulated substrates.

[0101] FIG. 15 A depicts process 1500, which starts with a disposable one-piece substrate carrier frame 1201 in some embodiments. The disposable one-piece substrate carrier frame 1201 could have been manufactured with openings for singulated substrates. Alternatively, openings 1502 for containing a singulated substrate may be cut into a blank strip 1501 to create a SCF. The SCF 1201 then has adhesive tape or some other suitable backing material 1503 applied to the back of the SCF 1201, with the adhesive side facing up such that it is secured to the SCF 1201. Once the SCF 1201 is prepared, the substrates 1504 (which may be populated or not) are inserted into theopenings 1502 of the SCF 1201 . The newly created strip can then be assembled and encapsulated 1505 using conventional assembly and encapsulating processes.

[0102] FIG. 15B depicts a process 1520, which starts with areusable substrate carrier frame 1201 with openings 1502 pre-cut into the substrate carrier frame 1201 according to embodiments. Once the SCF 1201 is obtained, an adhesive tape or some other suitable backing material 1503 is applied to the back of the SCF 1201, with the adhesive side facing up such that it is secured to the SCF 1201. In some embodiments, the SCF 1201 may be made of metal. Once the SCF 1201 is prepared, the substrates 1504 (which may be populated or not) are inserted into the SCF 1201. The newly created strip can then be assembled and encapsulated 1505 using conventional assembly and encapsulating processes.

[0103] FIGs. 15C, 15D, and 15E depict aspects of a three-piece substrate carrier frame (TSCF) according to some embodiments. Referring now to FIG. 15C, it shows the three components 1541, 1542, and 1543 of the TSCF separated. FIG. 15D shows the three components assembled and unpopulated. FIG.15E shows a view with the TSCF populated with substrates 1102 and components 1103,1104 and encapsulant 1581. The three components of the TSCF in this example are: the top plate 1541, the SCF 1542, and the bottom plate 1543. The tabs 1551 are in the top plate, and the SCF ribs 1552 are in the SCF 1542. The openings in the top plate 1553 and SCF 1554, along with the back plate 1543, are used to secure the substrates in the TSCF. The three components of the TSCF are aligned and secured together with alignment pins 1584 through the alignment holes 1564 in each of the components.

[0104] When preparing or processing a panel of substrates for mixed material substrates and the devices, one or more of the substrates (e.g., substrates with openings) may get tested, and in some instance, not all will pass. In embodiments, they are singulated and put into a SCF. Once in the SC, it is possible to add a second (or third) substrate and then perform additional processing. This could include, for instance, population, encapsulation, and or further singulation. In other aspects, the mixed material substrates or populated MMS devices in a panel may fail, and any good ones can be singulated. In embodiments, good singulated MMS substrates or devices may be loaded into another SCF for subsequent, additional processing as described herein.

[0105] FIG. 16A depicts a method 1600 that begins with placing individual substrates into the substrate carrier frame (SCF) 1601. In some embodiments, the SCF is populated with components 1602. This step may be optional. Next, the SCF containing substrates is placed in mold cavity1603, and the mold plates are closed 1604. Next, the assembly is encapsulated 1605, for example using a transfer molding process. The SCF is then removed 1606 along with molded strip, and optionally, the SCF is detached. While still in the SCF, in embodiments, balls or other external connectors are attached 1607. Finally, the substrates (e.g., now SiP devices) are removed from the SCF 1608 or other singulation steps are performed. Singulation can be performed, in embodiments, while devices are still in the SCF.

[0106] FIG. 16B depicts an alternative method 1620 where the substrate carrier frame is created by using a disposable substrate carrier frame (DSCF) according to some embodiments. The process may begin with cutting 1621 substrate nesting holes (SNH) into a blank substrate carrier frame (BSCF) to create a disposable substrate carrier frame (DSCF). In some embodiments, however, a pre-made substrate strip may be used. Once the DSCF is ready, adhesive tape is affixed to the back side of the DSCF 1622. Individual substrates can be populated 1623 in the openings (e.g., until they adhere to the tape). The substrates may be inserted into the SNHs. Once the singulated substrates are inserted and secured 1624 in the compression or transfer mold, it is molded 1625. In embodiments, the assembly of the substrates may be optional. Once molded, the SCF is removed from the mold 1626. Finally, the process may conclude with removing adhesive tape, removing the SCF, attaching external connectors, and / or singulating 1627. One or more aspects of step 1627 may be optional.

[0107] FIG. 16C depicts an alternative method 1630 using a substrate carrier frame (SCF) according to embodiments. The process may use a SCF with openings and tabs 1631. At step 1632, individual substrates are inserted into the opening. The substrates may be secured 1633 using, for instance, a back plate. Then, the substrates are assembled (e.g., populated with components) and secured 1664. One or more steps may be optional. For instance, in embodiments, this step may have occurred before 1632. Then, the substrate strips may be moved into an encapsulation cavity (e.g., as part of step 1634). Encapsulating the substrate strip 1635 may then be performed. Encapsulated substrate strips are removed 1636. Additionally, the back plate is removed, the SCF is removed, external connectors are attached, and / or singulation is performed at step 1637. One or more of these may be optional in embodiments.

[0108] FIG. 16D depicts two manufacturing flow options 1650. In a normal production flow, when multiple devices are on a substrate strip the flow has an input of 1) a substrate strip 1651, and 2) the components 1652. The flow has generally five stations: 1) SMT / Assembly 1661, 2)Mold 1662, 3) External connector attach 1663, 4) Singulation (e.g., cutting) 1664, and 5) Test 1665. But as devices get more complex, some designs can no longer start with a strip made up of multiple substrates due to yield issues which result from the added complexity. The alternative is to cut (singulate) the good substrates out of the strip and process them individually (one at a time).

[0109] With further reference to FIG. 16D, one or more embodiments present a solution to problems with substrate yield by using / creating a substrate carrier frame 1653 SCF (see, for instance, FIG. 12). In the first manufacturing flow option the manufacturing process is started with a substrate carrier frame (SCF) 1653 populated with substrates 1651. The normal production flow is then used to populate the good substrates 1651 attached to the SCF 1653 with components 1652 before completing the remaining steps (1662 - 1665). Or if the only steps in the production flow that need the populated SCF are the mold step 1662 and beyond (1663- 1665), the substrate carrier frame may not need to be populated with assembled substrates 1661b until the encapsulation step 1662. In this second manufacturing flow option, the singulated substrates 1651a are individually populated 1661b with components 1652 and then placed in SCFs 1661b prior to molding 1662. Independent of when in the process after molding 1662 the substrates are singulated, they will need to be singulated 1664 prior to being tested 1665.

[0110] FIG. 17 illustrates snapshots at four different points in the semiconductor manufacturing process. The starting point of the process is when a blank multi-layer panel of substrates (upperleft) is introduced to the production line. In this example, two substrates 1701,1702 have been identified as bad and “X’ed” out. These two substrates will not be populated with components. The next process is to populate the electrically good substrates with components (upper-right). Once the assembly process is completed, the whole panel is encapsulated with mold compound (lower-left). The step after encapsulation, which is not shown in this sequence of pictures, is to attach external connection balls to the back side of the substrates while still in the encapsulated panel. Finally, the substrates are cut apart (singulated), tested (not pictured), and the electrically good SiP devices placed in a shipping tray (lower-right). In this sequence of pictures, out of the 15 substrates started at the beginning of the process, 13 were assembled correctly. The yield of 13 out of 15 is adequate to continue with batch processing on a multi-substrate panel in this example.

[0111] Referring now to FIG. 18, when the percentage of good electrical substrates on a panel is high enough, assembling multiple substrates on a panel is cost effective. But when the complexity of the substrate design reduces the yield to a few good substrates per panel (upper-left), the batchprocess of a panel of substrates may no longer be cost effective. In this example only four substrates arc good out of 15. The cause of the low yield may be a result of the complexity of the substrates. The complexity becomes an issue when the substrate has an excessive number of trace layers, and the layout rules for each layer are tight to electrically connect all the components. The typical solution for a low yield of a panel of substrates is to cut out the good substrates from the panel before the assembly process begins and take them through the assembly process one at a time (upper-right, which shows a populated, singulated substrate). Beyond the basic cost increase of assembling one at a time, the process step of encapsulating the substrates is replaced with attaching lids to the devices (lower-left). A further complication that occurs is that to properly attach a lid to the substrate can increase the size of the substrate perhaps by 10mm in both the X and Y dimensions significantly enlarging its size. As one of the significant advantages of SiP devices is a small footprint, an alternative lid process is to attach a lid which is the same size as the substrate, but to do so leaves a gap between the substrate and the lid (lower-right). One or more alternatives that this disclosure addresses is to use a method that allows the good substrates out of a low yielding substrate panel to be cut out of the panel (singulated) and combined with other good substrates in a Substrate Carrier Frame (SCF), for instance, as shown in FIG. 12. By using the SCF approach, the assembly process becomes the same batch process on a panel as with high yield substrate panels. By using the SCF concept, not only is the existing issue of complexity resolved, but future issues of complexity will be resolved as the complexity of substrates continues to advance faster than advances in the manufacturing process.

[0112] In embodiments, the processes of FIGs. 17 and 18 are applied to mixed material substrates and / or populated mixed material substrate devices.

[0113] Referring now to FIG. 19, a process 1900 is provided according to some embodiments. The process may comprise loading 1901 a plurality of singulated substrates into a substrate carrier frame (SCF) comprising a plurality openings, and then processing 1902 the plurality of singulated substrates in the substrate carrier frame.

[0114] Summary of Embodiments

[0115] Al. A device comprising: a first substrate; and a second substrate, wherein the first and second substrates have different characteristics, and wherein the second substrate is embedded in the first substrate to form a mixed substrate.

[0116] A2. The device of Al , wherein: (i) the first and second substrates have different material properties (c.g., different mechanical, electrical, thermal, and / or optical characteristics), (ii) the first and second substrates have a different number of layers, and / or (iii) the first and second substrates have different applicable design rules.

[0117] A3. The device of Al or A2, further comprising: a first set of one or more components mounted on the first substrate.

[0118] A4. The device of A3, wherein: (i) the first set of components are selected based at least in part on the characteristics of the first substrate, and / or (ii) the first set of components are configured to perform a first function, and the characteristics of the first substrate are selected based on the first function.

[0119] A5. The device of any of A1-A4, further comprising: a second set of one or more components mounted on the second substrate.

[0120] A6. The device of A5, wherein: (i) the second set of components are selected based at least in part on the characteristics of the second substrate, and / or (ii) the second set of components are configured to perform a second function, and the characteristics of the second substrate are selected based on the second function.

[0121] A7. The device of A6, wherein the first and second functions are different.

[0122] A8. The device of any of A1-A7, further comprising: an encapsulant, wherein the encapsulant covers the first and second substrate to form a packaged device.

[0123] A9. The device of A8, wherein the encapsulant further covers the first and second set of components.

[0124] A10. The device of any of A1-A9, wherein the second substrate is electrically and / or mechanically attached to the first substrate with one or more bond wires.

[0125] Al l. The device of Al, wherein the first substrate comprises one or more mounting ledge (e.g., an extension, lip, or edge), and wherein the second substrate is mounted on the mounting ledges (e.g., with bumps, LGA pads, or BGA balls or other contacts on the ledges to form a mechanical and / or electrical connection to the first substrate).

[0126] A12. The device of Al l, wherein the mounting ledges are located in a nesting hole of the first substrate.

[0127] A13. The device of any of A1-A12, wherein the second substrate has an upper surface and a lower surface.

[0128] A 14. The device of Al 3, wherein: (i) components are mounted on both the upper and lower surface of the second substrate, (ii) the upper surface of the second substrate is aligned with an upper surface of the first substrate, (iii) the lower surface of the second substrate is aligned with a lower surface of the first substrate, and / or (iv) one or more of the upper and lower surface of the second substrate is not aligned with an upper or lower surface of the first substrate.

[0129] A15. The device of any of Al -A 14, wherein the second substrate has a stepped profile in cross-section.

[0130] A16. The device of any of A1-A15, further comprising: a third substrate.

[0131] A17. The device of A16, wherein the third substrate is mounted on the first substrate, or is embedded in the first substrate.

[0132] A18. The device of A16 or A17, wherein the third substrate has different characteristics than the first and / or second substrate.

[0133] A 19. The device of any of Al -A 18, further comprising: a portion of a carrier frame used to manufacture the device.

[0134] A20. The device of any of A1-A19, wherein both the first and second substrates are singulated substrates.

[0135] A21. The device of any of A1-A20, wherein the first substrate comprises FR4 and the second substrate comprises silicon.

[0136] A22. The device of any of A1-A21, comprising any of D1-D4.

[0137] Bl. A method, comprising: inserting a second substrate into a nesting hole of a first substrate to form a mixed substrate, wherein the first and second substrates have different characteristics; and semiconductor processing the mixed substrate to manufacture a semiconductor device.

[0138] B2. The method of B 1 , wherein the first substrate is part of a panel of multiple substrates comprising nesting holes, and wherein inserting the second substrate comprises inserting multiple second substrates into the nesting holes of multiple first substrates of the panel.

[0139] B3. The method of B2, wherein said processing comprises cutting the panel.

[0140] B4. The method of B2 or B3, wherein said processing is batch processing of multiple devices having mixed substrates.

[0141] B5. The method of any of B1-B4, further comprising: connecting (e.g., mechanically and / or electrically) the first and second substrates.

[0142] B6. The method of B5, wherein connecting comprises one or more of: wire bonding the first and second substrates together, and / or mounting the second substrate on a mounting ledge of the first substrate.

[0143] B7. The method of any of B1-B6, wherein said processing comprises: attaching a first set of one or more components to the first substrate.

[0144] B8. The method of B7, wherein: the first set of components are selected based at least in part on the characteristics of the first substrate, and / or the first set of components are configured to perform a first function, and the characteristics of the first substrate are selected based on the first function.

[0145] B9. The method of any of B1-B8, wherein said processing comprises: attaching a second set of one or more components to the second substrate.

[0146] B10. The method of B9, wherein: the second set of components are selected based at least in part on the characteristics of the second substrate, and / or the second set of components are configured to perform a second function, and the characteristics of the second substrate are selected based on the second function.

[0147] B 11. The method of B10, wherein the first and second functions are different.

[0148] B12. The method of any Bl-Bl l wherein said processing comprises: encapsulating the first and second substrates (and / or any components thereon).

[0149] B13. The method of any of Bl -Bl 2, further comprising: attaching a third substrate.

[0150] B14. The method of Bl 3, wherein the third substrate: is mounted on the first substrate, or is inserted into the first substrate.

[0151] B 15. The method of B 13 or B 14, wherein the third substrate has different characteristics than the first and / or second substrate.

[0152] B16. The method of any of B1-B15, further comprising: placing the first and second substrate into a substrate carrier frame.

[0153] B 17: The method of B16, wherein: (i) the first substrate is placed in the substrate carrier frame, and then the second substrate is inserted into the first substrate, (ii) the first and second substrate are inserted into the substrate carrier frame together, (iii) wherein at least one of the first and second substrate is not populated with components when placed in the substrate carrier frame, and / or (iv) wherein at least one of the first and second substrate is populated with components when placed in the substrate carrier frame.

[0154] B 18. The method of B 16 or B 17, wherein said processing is performed after the first and second substrates arc placed in the substrate carrier frame.

[0155] B 19. The method of any of B 16-B 19, further comprising any of the processing steps set forth herein using a substrate carrier frame.

[0156] B20. The method of any of B1-B19, wherein the method is used to form any of A1-A22.

[0157] Cl. A method, comprising: attaching a second substrate to a first substrate to form a mixed substrate, wherein the first and second substrates have different characteristics; and

[0158] processing the mixed substrate.

[0159] C2. The method of Cl, wherein attaching comprises: embedding the second substrate at least partially within the first substrate, or mounting the second substrate on a surface of the of the first substrate.

[0160] C3. The method of Cl or C2, wherein the second substrate is not populated with components when it is attached to the first substrate, and wherein processing the mixed substrate comprises:

[0161] populating the second substrate with a second set of components.

[0162] C4. The method of any of C1-C3, wherein the first substrate is not populated with components when the second substrate is attached, wherein processing the mixed substrate comprises: populating the first substrate with a first set of components.

[0163] C5. The method of C3 or C4, wherein (i) the first set of components are selected based at least in part on the characteristics of the first substrate, (ii) the first set of components are configured to perform a first function, and the characteristics of the first substrate are selected based on the first function, (iii) the second set of components are selected based at least in part on the characteristics of the second substrate, and / or (iv) the second set of components are configured to perform a second function, and the characteristics of the second substrate are selected based on the second function.

[0164] C6. The method of any of C1-C5, further comprising any of the steps of B 1-B20.

[0165] DI, An apparatus for manufacturing heterogeneous integrated devices, comprising:

[0166] a panel of individual first sized substrates composed of a first substance and each having an opening (mounting area) for mounting therein second substrate of a smaller second size composed of a second substance.

[0167] D2. The apparatus of DI , wherein the substances comprise at least one of the following: organic materials (such as BT and FR4), silicon, silicon carbide, and GaN.

[0168] D3. The apparatus of DI or D2, wherein the two substrates are mechanically and electrically interconnected.

[0169] D4. The apparatus of any of D1-D3, wherein the openings of said first substrate are sealed at their bottom.

[0170] D5. The apparatus of any of D1-D4, further comprising a third substrate.

[0171] El. A method for encapsulating a singulated combined substrate for a heterogeneous integrated device, comprising: creating an SCF using backing material on standard strip substrate (populated or unpopulated); securing a singulated substrate I chiplet in the SCF (populated or unpopulated); assembling combined substrates / chiplets to connect together; encapsulating; removing encapsulated body from cavity; adding external connectors (balls I pins / nothing); and singulating encapsulated combined substrates.

[0172] Fl. A method for encapsulating a panel of combined substrates for heterogeneous integrated devices, comprising: securing a second substrate (chiplet) in openings of each of first substrates that make up the panel (populated or unpopulated); assembling / populating combined substrates / chiplets to connect substrates together electrically encapsulating; removing encapsulated body from cavity; external connectors added (balls / pins I nothing); singulating.

[0173] Gl. A method comprising: loading a plurality of singulated substrates into a substrate carrier frame comprising a plurality of openings; and processing (e.g., encapsulating) the plurality of singulated substrates in the substrate carrier frame.

[0174] G2. The method of Gl, further comprising: attaching a plate to the loaded substrate carrier frame.

[0175] G3. The method of Gl or G2, wherein the singulated substrates are populated with one or more components mounted thereon before being loaded in the substrate carrier frame.

[0176] G4. The method of any of G1-G3, wherein processing the plurality of singulated substrates comprises placing the substrate carrier frame into a molding cavity and / or removing the substrate carrier frame from a molding cavity.

[0177] G5. The method of any of G1-G4, wherein processing comprises injection or compression molding to encapsulate the substrates.

[0178] G6. The method of any of G1-G5, wherein the singulated substrates are mounted on one or more retaining structures (c.g., tabs or ledges) within the openings of the substrate carrier frame.

[0179] G7. The method of any of G1-G6, further comprising: mounting one or more components on at least one of the plurality of singulated substrates (populating the substrates) while positioned in the substrate carrier frame.

[0180] G8. The method of any of G1-G7, further comprising: removing the encapsulated substrates from the substrate carrier frame (e.g., removing a panel of connected substrates postmolding); and singulating the encapsulated substrates to form a plurality of devices.

[0181] G9. The method of any of G1-G7, further comprising: singulating the encapsulated substrates to form a plurality of devices, wherein the singulating is performed while the encapsulated substrates are in the substrate carrier frame (e.g., wherein singulating comprises cutting the substrate carrier frame).

[0182] G10. The method of any of G1-G7, further comprising: removing individual encapsulated substrates from the substrate carrier frame (where the substrates are not interconnected following encapsulation).

[0183] Gi l. The method of any of G1-G10, wherein a first of the plurality of substrates is a different size than a second of the plurality of substrates.

[0184] G12. The method of any of Gl-Gl 1, further comprising: attaching at least one connection element (e.g., ball attach) to one or more of the substrates while in the substrate earner frame.

[0185] G13. The method of any of G1-G12, further comprising: testing the singulated substrates before they are loaded into the substrate carrier frame.

[0186] G14. The method of any of G1 or G3-G13, wherein the substrate carrier frame comprises a bottom plate.

[0187] G15. The method of G14, further comprising: applying an adhesive to the bottom plate.

[0188] G16. The method of any of AA1-AA15, further comprising: cutting the plurality of openings in a blank strip to form the substrate carrier frame.

[0189] Hl. A device comprising: a substrate; at least one component mounted on the substrate; an encapsulant; and a piece of a substrate carrier frame.

[0190] H2. The device of Hl, wherein the device is manufactured according to any of G1-G16.

[0191] H3. The device of Hl or H2, wherein the substrate carrier frame is a device according to any of 11-16 or J1-J15.

[0192] 11. A substrate carrier device comprising: a frame having a plurality of openings; and a bottom plate below the plurality of openings, wherein the openings arc sized to receive a singulatcd substrate and the bottom plate is configured to support the singulated substrates.

[0193] 12. The device of II, wherein the openings are separated by one or more rib portions of the frame.

[0194] 13. The device of 12, further comprising: one or more mold channels through the rib portions, wherein the mold channels connect two or more of the openings.

[0195] 14. The device of any of 11-13, wherein: all of the openings are the same size, or at least two of the openings are a different size.

[0196] 15. The device of any of C1-C4, further comprising: a singulated substrate placed in each of the openings.

[0197] 16. The device of 15, wherein the singulated substrate has at least one component mounted thereon.

[0198] JI. A substrate carrier device comprising: a frame having a plurality of openings; and at least one retainer (e.g., tab or ledge) within each of the plurality of openings.

[0199] J2. The device of JI, wherein the openings are separated by one or more rib portions of the frame.

[0200] J3. The device of J2, further comprising: one or more mold channels through the rib portions, wherein the mold channels connect two or more of the openings.

[0201] J4. The device of any of Jl-j3, wherein: all of the openings are the same size, or at least two of the openings are a different size.

[0202] J5. The device of any of J1-J4, wherein the openings arc sized to receive a singulated substrate and the retainers are configured to support the singulated substrates.

[0203] J6. The device of any of J1-J5, wherein four retainers are provided in each of the plurality of openings (e.g., in each corner of the openings).

[0204] J7. The device of any of D1-D6, wherein: the retainers are provided at a bottom surface of the frame, or the retainers are provided between an upper surface and lower surface of the frame and on an inner wall of the openings.

[0205] J8. The device of any of J1-J7, wherein the retainer is a ledge formed by a notch in the frame (e.g., in the rib portion).

[0206] J9. The device of J8, wherein the retainer fully surrounds an inner wall of the openings.

[0207] J 10. The device of any of J 1 -J9, further comprising: a singulated substrate placed in each of the openings.

[0208] JI 1. The device of J 10, wherein the singulated substrate has at least one component mounted thereon.

[0209] J 12. The device of JI 1, wherein the at least one component is mounted on the underside of the substrate.

[0210] J13. The device of any of J1-J12, further comprising: a backplate.

[0211] J14. The device of J13, wherein the backplate is positioned over the openings (e.g., to secure the singulated substrates in the openings between the backplate and the retainers, where the substrates are inverted).

[0212] KI . The device of any of II to 16 or J 1 -J 14, wherein the device is reusable or disposable.

[0213] LI. An apparatus for containing one or more singulated substrates, comprising: a panel having a plurality of openings therein and alignment pins / holes suitable for use with semiconductor processing equipment, wherein each opening is sized to contain a singulated substrate.

[0214] L2. The apparatus of LI, where each opening has one or more projections (e.g., ledges) extending from the sides of the opening for supporting a singulated substrate mounted / contained therein.

[0215] L3. The apparatus of LI, wherein each opening has a backplate at the base of each opening to support one or more singulated substrates mounted therein.

[0216] L4. The apparatus of L3, wherein the backplate is removable.

[0217] L5. The apparatus of L3 or L4, wherein the backplate comprises plastic, metal, or tape.

[0218] L6. The apparatus of any of L3-L5 wherein the backplate covers the entire back side of the panel.

[0219] LI. A method using the apparatus of any of F1-F6, comprising: wherein singulated substrates are inserted into apparatus populated with one or more components, wherein populated singulated substrates are encapsulated, balls attached, and singulated as finished devices ready for final testing, wherein singulated substrates are inserted into apparatus without components and singulated substrates are populated, encapsulated, balls attached and singulated as finished devices ready for final testing, and / or wherein the plurality of openings on said apparatus are two or more sizes.

[0220] M l . A method for processing singulated substrates, comprising: removably locating a singulatcd substrate in an appropriately sized opening in a carrier sized to contain multiple said substrates (e.g., with retaining projections or tape) in said opening; installing components (populating) on said singulated substrates while located in said carrier openings; applying a restraining material to the bottom on said opening in said carrier; inverting said carrier; inserting said carrier into a conventional encapsulating equipment / machines; applying an encapsulant to said openings in said carrier to encapsulate said populated substrates; attaching connection elements (e.g., balls); removing said carrier from said machine; removing said restraining material; and removing said encapsulated, populated substrate from said carrier.

[0221] While various embodiments of the present disclosure are described herein, it should be understood that they have been presented by way of example only, and not by way of any limitation. Thus, the breadth and scope of the present disclosure should not be limited by any of the herein above-described exemplary embodiments. Moreover, any combination of herein abovedescribed elements in all possible variations thereof is encompassed by the disclosure unless otherwise indicated herein or otherwise clearly contradicted by context. Accordingly, other embodiments, variations, and improvements not described herein are not excluded from the scope of the present disclosure. Such variations include but are not limited to new substrate material, different kinds of devices attached to the substrate not discussed, or new packaging concepts.

[0222] Additionally, while the processes described above and illustrated in the drawings are shown as a sequence of steps, this was done solely for the sake of illustration. Accordingly, it is contemplated that some steps may be added, some steps may be omitted, the order of the steps may be re-arranged, and some steps may be performed in parallel.

Claims

CLAIMS:

1. A device (400, 541) comprising: a first substrate (212a); and a second substrate (212b), wherein the first and second substrates have different characteristics, and wherein the second substrate is embedded in the first substrate to form a mixed substrate.

2. The device of claim 1, wherein the first and second substrates have different material properties or a different number of layers.

3. The device of claim 1, further comprising: a plurality of components (103), wherein a first set of one or more of the components is mounted on the first substrate, and a second set of the one or more components is mounted on the second substrate.

4. The device of claim 3, wherein the first set of components are based on a material property of the first substrate or a first function corresponding to the first substrate, and wherein the second set of components are based on a material property of the second substrate or a second function corresponding to the first substrate.

5. The device of claim 4, wherein the first set of components perform the first function and the second set of components perform the second function, and wherein the first and second functions are different.

6. The device of claim 3, further comprising: an encapsulant (641), wherein the encapsulant covers the first and second substrate and the components to form a packaged device.

7. The device of claim 1, wherein the second substrate is attached to the first substrate with one or more bond wires.

8. The device of claim 1 , wherein the first substrate comprises one or more mounting ledges in a nesting hole of the first substrate, and wherein the second substrate is mounted on at least one of the mounting ledges.

9. The device of claim 1, wherein the second substrate has a stepped profile in cross-section.

10. The device of claim 1, further comprising: a portion of a substrate carrier frame (210, 1201 ), wherein the substrate carrier frame was used to manufacture the device.

11. The device of claim 2, wherein both the first and second substrates are singulated substrates.

12. A method (620) of manufacturing a device according to claim 1, the method comprising: inserting (622) the second substrate into the first substrate to form the mixed substrate; and processing (624) the mixed substrates.

13. The method of claim 12, wherein in the method is performed using a substrate carrier frame (210, 1201).

14. The method of claim 13, wherein the substrate carrier frame comprises: a frame sized for semiconductor processing having a plurality of openings; and an attachment, wherein the openings are sized to receive a singulated substrate and the attachment is configured to support the singulated substrates.

15. The method of claim 12, wherein the first substrate is part of a panel of multiple substrates comprising nesting holes, and wherein inserting the second substrate comprises inserting multiple second substrates into the nesting holes of multiple first substrates of the panel.

16. The method of claim 1 , wherein the processing comprises: testing one or more substrates to identify good mixed substrates; and cutting the panel to remove the good mixed substrates.

17. The method of claim 12, wherein the device is manufactured using an apparatus for containing one or more singulated substrates, the apparatus comprising:a panel having a plurality of openings therein and alignment features adapted for use with semiconductor processing equipment, wherein each opening is sized to contain a singulatcd substrate.

18. The method of claim 17, where each opening has one or more projections extending from the sides of the opening for supporting a singulated therein.

19. The method of claim 17, wherein each opening has a removable backplate at the base of each opening to support one or more singulated substrates mounted therein.

20. A method (610) for processing singulated mixed substrates, comprising: providing (611) a singulated first substrate in an appropriately sized opening in a carrier; installing (612) a second substrate in an opening in the first substrate to form a mixed substrate; applying (615) an encapsulant to the mixed substrate while in the carrier; attaching (617) at least one exterior connection element; and performing singulation (618).

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