Display substrate, display panel and preparation method therefor
Patent Information
- Application Number
- PCT/CN2025/070075
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-01-23
- Filing Date
- 2025-01-02
- Publication Date
- 2025-07-31
Smart Images

Figure CN2025070075_31072025_PF_FP_ABST
Abstract
Description
Display substrate, display panel and manufacturing method thereof Technical Field
[0001] The embodiments of the present disclosure belong to the field of display technology, and particularly relate to a display substrate, a display panel, and a method for manufacturing the same. Background Art
[0002] OLED (Organic Light-Emitting Diode) displays have attracted widespread attention due to their advantages such as self-luminescence, low power consumption, lightness, flexibility, brilliant colors, high contrast, and fast response rate. Summary of the Invention
[0003] In a first aspect, an embodiment of the present disclosure provides a display substrate having a display area and a binding area, wherein the binding area is located on at least one side of the display area.
[0004] Wherein, the display substrate includes a base located in the display area and the binding area;
[0005] The first binding electrode and the second binding electrode are located in the binding area and on the same side of the substrate, and the first binding electrode is located on a side of the second binding electrode close to the display area.
[0006] The first binding electrode is configured to be bound and connected to a display driving circuit; the second binding electrode is configured to be bound and connected to a peripheral circuit board; the first binding electrode is electrically connected to the second binding electrode;
[0007] The peripheral circuit board is configured to provide a display signal and a power signal to the display driving circuit; the display driving circuit is configured to provide a display driving signal to the display area;
[0008] A distance between a surface of the first binding electrode facing away from the substrate and the substrate is greater than a distance between a surface of the second binding electrode facing away from the substrate and the substrate.
[0009] In some embodiments, a difference between a distance between a surface of the first binding electrode facing away from the substrate and the substrate and a distance between a surface of the second binding electrode facing away from the substrate and the substrate is ≥5 μm.
[0010] In some embodiments, a distance between an orthographic projection of the first binding electrode on the substrate and an orthographic projection of the second binding electrode on the substrate is ≥0 and <500 μm.
[0011] In some embodiments, the first binding electrode includes four sub-film layers, the four sub-film layers are stacked in sequence, and along a direction away from the substrate, the materials of the four sub-film layers are titanium, aluminum, titanium, and indium tin oxide in sequence;
[0012] The material of the second binding electrode includes aluminum.
[0013] In some embodiments, the first binding electrode and the second binding electrode are located in different layers, and a first insulating layer is further provided between the first binding electrode and the second binding electrode.
[0014] The display substrate further includes a first connecting line and a second connecting line.
[0015] The first connecting line and the second binding electrode are formed in the same layer and made of the same material, the first connecting line and the orthographic projection of the first binding electrode on the substrate at least partially overlap, and the first connecting line is electrically connected to the first binding electrode through a plurality of first vias provided in the first insulating layer;
[0016] The second connecting line is located on a side of the second binding electrode close to the substrate, and a second insulating layer is further provided between the second connecting line, the second binding electrode and the first connecting line;
[0017] The second connecting line at least partially overlaps with the orthographic projection of the second binding electrode and the first connecting line on the substrate;
[0018] The second connecting wires are electrically connected to the second binding electrodes and the first connecting wires respectively through a plurality of second via holes opened in the second insulating layer.
[0019] In some embodiments, the first binding electrode and the second binding electrode are located in different layers, and a first insulating layer is further provided between the first binding electrode and the second binding electrode.
[0020] The second binding electrode further extends to the orthographic projection area of the first binding electrode on the substrate, and the orthographic projection of the second binding electrode and the first binding electrode on the substrate at least partially overlap.
[0021] The second binding electrode is electrically connected to the first binding electrode through a plurality of first via holes formed in the first insulating layer.
[0022] In some embodiments, a first opening is formed in the first insulating layer, and the first opening at least partially overlaps with an orthographic projection of the second binding electrode on the substrate.
[0023] The second binding electrode is exposed at the first opening.
[0024] In some embodiments, the number of the first binding electrodes is plural, and the number of the second binding electrodes is plural; the plurality of first binding electrodes and the plurality of second binding electrodes are electrically connected in a one-to-one correspondence;
[0025] The plurality of first binding electrodes are arranged along a first direction;
[0026] A plurality of the second binding electrodes are arranged along the first direction;
[0027] Along the first direction, odd-numbered and even-numbered first binding electrodes are staggered with each other;
[0028] Along the first direction, odd-numbered and even-numbered second binding electrodes are staggered with each other;
[0029] An odd number of the first binding electrodes and an odd number of the second binding electrodes are arranged in a first straight line along the first direction;
[0030] An even number of the first binding electrodes and an even number of the second binding electrodes are arranged in a second straight line along the first direction;
[0031] The first straight line and the second straight line are parallel to each other.
[0032] In some embodiments, the first via hole is filled with tungsten.
[0033] In some embodiments, a third binding electrode is further included, located in the binding area and on the same side of the substrate as the first binding electrode and the second binding electrode, and the third binding electrode is located on a side of the first binding electrode close to the display area;
[0034] The third binding electrode does not overlap with the orthographic projections of the first binding electrode and the second binding electrode on the substrate;
[0035] The third binding electrode is configured to be bound and connected to the display driving circuit;
[0036] The third binding electrode and the first binding electrode are made of the same layer and material, and a surface of the third binding electrode facing away from the substrate is flush with a surface of the first binding electrode facing away from the substrate.
[0037] In some embodiments, the invention further comprises an anode and a pixel circuit, wherein the anode is located in the display area; the pixel circuit is located in the display area and the binding area;
[0038] The anode is made of the same layer and material as the first binding electrode and the third binding electrode;
[0039] The pixel circuit is located between the anode and the substrate; the pixel circuit is electrically connected to the anode;
[0040] The display substrate further includes a third connecting line located between the third binding electrode and the base, and the third connecting line extends from the binding area to the display area;
[0041] The third binding electrode is electrically connected to the third connection line, and the third connection line is electrically connected to the pixel circuit.
[0042] In some embodiments, the number of the third binding electrodes is multiple, and the multiple third binding electrodes are arranged in an array.
[0043] Along the arrangement direction of the display area and the binding area, positions of the third binding electrodes in any two adjacent rows in the array of the third binding electrodes are staggered.
[0044] In some embodiments, an electrostatic ring is further included, surrounding the periphery of the display area.
[0045] Part of the electrostatic ring is located in the binding area, and part of the electrostatic ring located in the binding area is located on a side of the second binding electrode away from the display area.
[0046] The electrostatic ring includes a first electrode line and a second electrode line, wherein the first electrode line and the second binding electrode are made of the same layer and material.
[0047] The second electrode line is located on a side of the first electrode line close to the substrate, the second electrode line is electrically connected to the first electrode line, and the second electrode line is grounded.
[0048] In some embodiments, along the arrangement direction of the display area and the binding area, the distance between the third binding electrode and the display area is ≥2 mm;
[0049] The distance between a side boundary of the third binding electrode close to the display area and a side boundary of the first binding electrode away from the display area is ≥ 2 mm;
[0050] The distance between a side boundary of the second binding electrode close to the display area and a side boundary thereof away from the display area is ≥100 μm;
[0051] A distance between a boundary of the second binding electrode away from the display area and a boundary of the electrostatic ring away from the display area is ≥40 μm.
[0052] In a second aspect, an embodiment of the present disclosure further provides a display panel, which includes the above-mentioned display substrate.
[0053] In some embodiments, a third insulating layer, a pixel defining layer, and an encapsulation layer are further included.
[0054] The third insulating layer, the pixel defining layer, and the encapsulation layer extend from the display area to the binding area respectively, and the third insulating layer, the pixel defining layer, and the encapsulation layer are sequentially stacked on a side of the first binding electrode in the display substrate facing away from the base;
[0055] The third insulating layer, the pixel defining layer, and the encapsulation layer are provided with second openings in regions corresponding to the first binding electrode and the third binding electrode, and the first binding electrode and the third binding electrode are exposed at the second openings;
[0056] The third insulating layer, the pixel defining layer and the encapsulation layer have a third opening in the area corresponding to the second binding electrode. The third opening overlaps with the orthographic projection of the first opening in the display substrate on the base, and the second binding electrode is exposed in the overlapping area of the orthographic projection of the third opening and the first opening.
[0057] In some embodiments, along the arrangement direction of the display area and the binding area, the opening width of the second opening is the distance between a side boundary of the third binding electrode close to the display area and a side boundary of the first binding electrode away from the display area.
[0058] In some embodiments, a display driving circuit is further included.
[0059] The display driving circuit is located on a side of the packaging layer away from the display substrate, and the display driving circuit is located at the second opening.
[0060] The input electrode of the display driving circuit is bound and electrically connected to the first binding electrode through anisotropic conductive adhesive; the output electrode of the display driving circuit is bound and electrically connected to the third binding electrode through the anisotropic conductive adhesive.
[0061] In some embodiments, a peripheral circuit board is further included, which is located outside the display substrate.
[0062] The second binding electrode is welded to one end of a binding connection wire at a position where the orthographic projections of the third opening and the first opening overlap, and the other end of the binding connection wire is welded to a binding electrode of the peripheral circuit board.
[0063] In some embodiments, the number of the binding connection wires is multiple,
[0064] Each of the binding connection wires electrically connects one of the second binding electrodes and one of the binding electrodes on the peripheral circuit board;
[0065] The outer peripheries of the plurality of binding connection wires are wrapped with protective glue, and the protective glue can insulate adjacent binding connection wires from each other.
[0066] In some embodiments, the material of the binding connecting wires includes aluminum.
[0067] In a third aspect, an embodiment of the present disclosure provides a method for manufacturing the above-mentioned display panel, which includes: preparing a display substrate;
[0068] A third insulating layer, a pixel defining layer, and an encapsulation layer are sequentially prepared on one side of the display substrate, and second openings are formed in the third insulating layer, the pixel defining layer, and the encapsulation layer by a single etching process, where the first binding electrode and the third binding electrode in the display substrate are exposed at the second openings;
[0069] Then, a third opening is formed in the third insulating layer, the pixel defining layer, and the encapsulation layer, and a first opening is formed in the first insulating layer of the display substrate through a single etching process, and the second binding electrode in the display substrate is exposed in the overlapping area of the orthographic projection of the third opening and the first opening;
[0070] The input electrode of the display driving circuit is electrically connected to the first binding electrode by hot pressing anisotropic conductive adhesive, and the output electrode of the display driving circuit is electrically connected to the third binding electrode by hot pressing the anisotropic conductive adhesive;
[0071] One end of the binding connection wire is welded to the binding electrode of the peripheral circuit board, and the other end is connected to the second binding electrode by thermocompression welding.
[0072] In the display substrate provided by the embodiments of the present disclosure, the distance between the surface of the first binding electrode facing away from the substrate and the substrate is greater than the distance between the surface of the second binding electrode facing away from the substrate and the substrate, thereby creating a step height difference between the surface of the first binding electrode facing away from the substrate and the surface of the second binding electrode facing away from the substrate. When the first binding electrode is bonded to the display driving circuit via hot-pressed anisotropic conductive adhesive, even if the anisotropic conductive adhesive overflows onto the hot-pressed welding surface between the second binding electrode and the bonding wire when squeezed, a short circuit will not occur between adjacent second binding electrodes or bonding wires. Because the gold spheres in the anisotropic conductive adhesive are not flattened during hot-press bonding between the second bonding electrode and the bonding wire, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrode and the bonding wire will not conduct electricity. Consequently, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrode and the bonding wire will not cause a short circuit between adjacent second bonding electrodes or adjacent bonding wires. This can shorten or eliminate the gap between the first and second bonding electrodes to accommodate adhesive overflow, thereby reducing the width of the bonding area away from the display area and improving wafer dicing efficiency. Furthermore, due to the step height difference between the surface of the first bonding electrode facing away from the substrate and the surface of the second bonding electrode facing away from the substrate, hot-press bonding of the bonding wire to the second bonding electrode prevents secondary damage to the already bonded display driver circuit.
[0073] The display panel provided by the embodiment of the present disclosure, by adopting the display substrate of the above embodiment, can, on the one hand, shorten or eliminate the reserved spacing between the first binding electrode and the second binding electrode for accommodating glue overflow, thereby reducing the width of the binding area in the direction away from the display area and improving the wafer cutting efficiency; on the other hand, when the hot pressing bonding connecting wire is performed to bond it to the second binding electrode, no secondary damage will be caused to the already bonded display driving circuit; on the other hand, the second binding electrode and the binding connecting wire can be easily bonded by hot pressing, and the bonding impedance between the second binding electrode and the binding connecting wire can be reduced, ensuring stable reliability. BRIEF DESCRIPTION OF THE DRAWINGS
[0074] The accompanying drawings are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed exemplary embodiments with reference to the accompanying drawings, in which:
[0075] FIG. 1 a is a cross-sectional schematic diagram of a binding area of a display panel in the related art.
[0076] FIG1 b is a top view schematically showing the arrangement of output connection terminals, input connection terminals and wire connection terminals in a display panel according to the related art.
[0077] FIG. 2 a is a schematic top view of the structure of a display substrate in an embodiment of the present disclosure.
[0078] FIG. 2 b is a schematic cross-sectional view of the structure of the substrate along the AA′ section line in FIG. 2 a according to an embodiment of the present disclosure.
[0079] FIG. 2 c is a schematic cross-sectional view of another structure of the substrate along the AA′ section line in FIG. 2 a according to an embodiment of the present disclosure.
[0080] FIG3 a is a schematic top view of the arrangement of the first binding electrode and the second binding electrode in an embodiment of the present disclosure.
[0081] FIG3 b is a schematic top view of the arrangement of the third binding electrode in an embodiment of the present disclosure.
[0082] FIG4 a is a schematic cross-sectional view of a partial structure of a display panel according to an embodiment of the present disclosure.
[0083] FIG4 b is a schematic cross-sectional view of a partial structure of another display panel according to an embodiment of the present disclosure.
[0084] FIG4 c is a schematic cross-sectional view of a partial structure of a display area of a display panel in an embodiment of the present disclosure.
[0085] FIG5 a is a schematic cross-sectional view of the structure of the display panel after step S101 is completed in the embodiment of the present disclosure.
[0086] FIG5 b is a schematic cross-sectional view of the structure of the display panel after step S102 is completed in the embodiment of the present disclosure.
[0087] FIG5 c is a schematic cross-sectional view of the structure of the display panel after step S103 of manufacturing the display panel is completed in the embodiment of the present disclosure.
[0088] FIG5 d is a schematic cross-sectional view of the structure of the display panel after step S104 is completed in the embodiment of the present disclosure.
[0089] FIG5 e is a schematic cross-sectional view of the structure of the display panel after step S105 is completed in the embodiment of the present disclosure. DETAILED DESCRIPTION
[0090] In order to enable those skilled in the art to better understand the technical solutions of the embodiments of the present disclosure, a display substrate, a display panel and a manufacturing method thereof provided by the embodiments of the present disclosure are further described in detail below with reference to the accompanying drawings and specific implementation methods.
[0091] The embodiments of the present disclosure will be described more fully below with reference to the accompanying drawings, but the illustrated embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully enable those skilled in the art to understand the scope of this disclosure.
[0092] The embodiments of the present disclosure are not limited to the embodiments shown in the drawings, but include modifications of the configurations formed based on the manufacturing process. Therefore, the regions illustrated in the drawings are schematic in nature, and the shapes of the regions shown in the drawings illustrate specific shapes of the regions, but are not intended to be limiting.
[0093] In related technologies, with the continuous iteration of silicon-based OLED products, the silicon-based MDL (module) form of Two-chip (dual-chip, i.e., the display driver chip (DDIC) and the display panel (panel) are independently set, and the display driver chip needs to be bound and connected to the display panel) has a higher product yield, which is different from the One Chip (single chip, that is, the display driver chip (DDIC) is directly integrated on the display panel (panel), and the display panel can be regarded as a single chip). In the Two-chip silicon-based MDL (module), the binding forms of the display driver chip (DDIC) include COC (chip on chip, that is, the display driver chip is bound to the display panel through anisotropic conductive adhesive) and COF (that is, the display panel and the display driver chip are bound and connected through a flexible circuit board (FPC), such as one end of the flexible circuit board is bound to the display panel and the other end is bound to the display driver chip). The binding methods for the display panel and the peripheral circuit board (such as a PCB) that complete the binding of the display driver chip include FPC (flexible circuit board, i.e., the display panel and the peripheral circuit board are bound and connected via a flexible circuit board) and Wire (i.e., the display panel and the peripheral circuit board are bound and connected via wires, and then the wires are coated with insulating glue for protection). Compared with the COC binding method and the FPC binding method, the COC binding method and the FPC binding method theoretically have better binding impedance stability.
[0094] Figure 1a is a cross-sectional schematic diagram of the display panel binding area in the related art. The display driver chip 24 is bound to the display panel using a COC method, and the display panel is bound to the peripheral circuit board using a wire method. As shown in Figure 1a, the display panel includes a display area 100 and a binding area 101. The output connection terminal (output pad) 25 and input connection terminal (input pad) 26 required for binding the display driver chip 24 on the display panel, as well as the wire connection terminal (wire pad) 27 required for binding the display panel to the peripheral circuit board, are located in the binding area 101 and are located on the same layer and the same horizontal plane. The output connection terminal 25, input connection terminal 26, and wire connection terminal 27 are arranged in sequence away from the display area 100. These three connection terminals (pads) all use a TATI (titanium, aluminum, titanium, indium tin oxide) film layer structure stacked in sequence, with the indium tin oxide film layer located on the surface of the connection terminal.
[0095] Figure 1b is a top-down schematic diagram of the arrangement of output connectors, input connectors, and wire connectors in a related art display panel. Output connectors 25 and input connectors 26 are bonded to corresponding pad bumps on display driver chip 24. To increase bonding integration, output connectors 25 and input connectors 26 are closely arranged in a staggered pattern. Wire connectors 27 are arranged in a straight line.
[0096] The structural arrangement of the display panel in Figures 1a and 1b is that, on the one hand, the display driver chip 24 is bonded to the output connection terminal 25 and the input connection terminal 26 on the display panel using anisotropic conductive adhesive (i.e., ACF conductive adhesive) 22. During bonding, the anisotropic conductive adhesive 22 is squeezed to flatten the gold ball particles therein to achieve a conductive connection. During the squeezing process, glue overflow occurs, and the anisotropic conductive adhesive 22 easily overflows onto the hot pressing welding surface between the wire 28 and the wire connection terminal 27. The gold ball particles on the hot pressing welding surface will be flattened and conductive, causing a short circuit between adjacent wires 28 or wire connection terminals 27. Therefore, a spacing L of 500 μm needs to be reserved between the input connection terminal (Input Pad) 26 and the wire connection terminal (Wire Pad) 27 in the current display panel to tolerate the glue overflow problem. During the mass production of silicon-based OLED display panels, multiple silicon-based OLED display panels are prepared on the same wafer, and each silicon-based OLED display panel is cut from the same wafer. The 500μm spacing L reserved between the input connection terminal (Input Pad) and the wire connection terminal (Wire Pad) in each of the above display panels seriously affects the wafer cutting efficiency (that is, the number of display panels that can be cut from a wafer is small). On the other hand, since the output connection terminal, the input connection terminal and the wire connection terminal are located on the same horizontal plane, the binding of the display driver chip has been completed before the wire bonding is performed. Therefore, when the aluminum wire is subsequently hot-pressed to bond it with the wire connection terminal, secondary damage will be caused to the already bound display driver chip. On the other hand, since the wire that binds the display panel to the peripheral circuit board is made of aluminum, the wire connection terminal and the wire are connected by hot-pressing welding. It is difficult for the indium tin oxide (ITO) on the surface of the wire connection terminal to bond with the aluminum wire during the hot-pressing process. Therefore, the binding impedance between the wire connection terminal and the wire is large and the reliability is unstable.
[0097] In order to solve the above three problems existing in the related art, on the first hand, the embodiment of the present disclosure provides a display substrate, and with reference to FIG2a, it is a schematic diagram of a top view of the structure of the display substrate in the embodiment of the present disclosure; FIG2b is a schematic diagram of a cross-sectional structure of the display substrate along the AA' section line in FIG2a in the embodiment of the present disclosure; wherein, the display substrate has a display area 100 and a binding area 101, and the binding area 101 is located on at least one side of the display area 100. The display substrate includes a base 1, which is located in the display area 100 and the binding area 101; a first binding electrode 2 and a second binding electrode 3 are located in the binding area 101 and are located on the base 1. On the same side, the first binding electrode 2 is located on a side of the second binding electrode 3 close to the display area 100. The first binding electrode 2 is configured to be bound and connected to the display driver circuit; the second binding electrode 3 is configured to be bound and connected to the peripheral circuit board; the first binding electrode 2 is electrically connected to the second binding electrode 3; the peripheral circuit board is configured to provide display signals and power signals to the display driver circuit; the display driver circuit is configured to provide display driver signals to the display area 100; the distance h1 between the surface of the first binding electrode 2 on the side facing away from the substrate 1 and the substrate 1 is greater than the distance h2 between the surface of the second binding electrode 3 on the side facing away from the substrate 1 and the substrate 1.
[0098] The display driver circuit is a display driver chip (DDIC). The first binding electrode 2 is bonded to the display driver circuit via hot pressing anisotropic conductive adhesive (ACF conductive adhesive), and the second binding electrode 3 is bonded to the peripheral circuit board via hot pressing welding bonding wires.
[0099] In some embodiments, substrate 1 is made of single-crystal silicon, i.e., the display substrate is a silicon-based display substrate. The display substrate is cut from a single wafer, and a single wafer can be cut into multiple display substrates. The display substrate can be an AR (Augmented Reality) or VR (Virtual Reality) display substrate. The display substrate can be used in portable display devices (such as helmets).
[0100] In this embodiment, by making the distance h1 between the surface of the first binding electrode 2 facing away from the substrate 1 and the substrate 1 greater than the distance h2 between the surface of the second binding electrode 3 facing away from the substrate 1 and the substrate 1, a step height difference is created between the surface of the first binding electrode 2 facing away from the substrate 1 and the surface of the second binding electrode 3 facing away from the substrate 1. When the first binding electrode 2 is bonded to the display driving circuit by hot-pressing anisotropic conductive adhesive, even if the anisotropic conductive adhesive overflows onto the hot-pressing welding surface between the second binding electrode 3 and the bonding wire when squeezed, it will not cause a short circuit between adjacent second binding electrodes 3 or bonding wires, because During hot-press bonding between the second bonding electrodes 3 and the bonding wires, the gold spheres in the anisotropic conductive adhesive are not flattened. Consequently, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrodes 3 and the bonding wires will not conduct electricity. Consequently, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrodes 3 and the bonding wires will not cause a short circuit between adjacent second bonding electrodes 3 or adjacent bonding wires. This can shorten or eliminate the gap between the first bonding electrodes 2 and the second bonding electrodes 3 that allows for adhesive overflow, thereby reducing the width of the bonding area 101 away from the display area 100 and improving wafer dicing efficiency. Furthermore, due to the step height difference between the surface of the first bonding electrode 2 facing away from the substrate 1 and the surface of the second bonding electrode 3 facing away from the substrate 1, hot-press bonding of the bonding wires to the second bonding electrodes 3 prevents secondary damage to the already bonded display driver circuit.
[0101] In some embodiments, the difference between the distance h1 between the surface of the first bonding electrode 2 facing away from the substrate 1 and the substrate 1 and the distance h2 between the surface of the second bonding electrode 3 facing away from the substrate 1 and the substrate 1 is ≥ 5 μm. This distance difference ensures that anisotropic conductive adhesive overflowing onto the hot-pressed bonding surface between the second bonding electrodes 3 and the bonding wires does not cause a short circuit between adjacent second bonding electrodes 3 or adjacent bonding wires. This can shorten or eliminate the reserved spacing between the first bonding electrode 2 and the second bonding electrode 3 to tolerate adhesive overflow, thereby improving wafer dicing efficiency.
[0102] In some embodiments, the distance L3 between the orthographic projection of the first bonding electrode 2 and the orthographic projection of the second bonding electrode 3 on the substrate 1 is ≥ 0 and < 500 μm. This can shorten or eliminate the reserved spacing between the first bonding electrode 2 and the second bonding electrode 3 to tolerate glue overflow, thereby improving wafer dicing efficiency.
[0103] In some embodiments, the first bonding electrode 2 comprises four sub-film layers stacked sequentially. The materials of the four sub-film layers, moving away from the substrate 1, are titanium, aluminum, titanium, and indium tin oxide, respectively. The second bonding electrode 3 is made of aluminum. The bonding conductor is aluminum. Because aluminum second bonding electrode 3 is flexible and highly conductive, hot pressing easily bonds the second bonding electrode 3 to the bonding conductor, reducing the bonding impedance between the two, ensuring reliable and stable performance. Furthermore, the aluminum second bonding electrode 3 absorbs stress generated during hot pressing of the aluminum conductor, reducing secondary damage to the display driver circuit.
[0104] In some embodiments, referring to Figure 2b, the first binding electrode 2 and the second binding electrode 3 are located in different layers, and a first insulating layer 4 is further provided between the first binding electrode 2 and the second binding electrode 3. The display substrate further includes a first connecting line 5 and a second connecting line 6. The first connecting line 5 and the second binding electrode 3 are made of the same layer and material, and the first connecting line 5 and the orthographic projection of the first binding electrode 2 on the substrate 1 at least partially overlap. The first connecting line 5 is electrically connected to the first binding electrode 2 through a plurality of first vias 40 provided in the first insulating layer 4; the second connecting line 6 is located on a side of the second binding electrode 3 close to the substrate 1, and a second insulating layer 7 is further provided between the second connecting line 6, the second binding electrode 3 and the first connecting line 5; the second connecting line 6 at least partially overlaps with the orthographic projections of the second binding electrode 3 and the first connecting line 5 on the substrate 1; the second connecting line 6 is electrically connected to the second binding electrode 3 and the first connecting line 5 respectively through a plurality of second vias 70 provided in the second insulating layer 7.
[0105] The provision of multiple first vias 40 can reduce the connection impedance between the first connecting wire 5 and the first binding electrode 2. The provision of multiple second vias 70 can reduce the connection impedance between the second connecting wire 6 and the second binding electrode 3, as well as the connection impedance between the second connecting wire 6 and the first connecting wire 5. The provision of the second connecting wire 6 can achieve electrical connection between the second binding electrode 3 and the first binding electrode 2, thereby transmitting display signals and power signals provided by the peripheral circuit board to the display driver circuit through the second binding electrode 3 and the first binding electrode 2. At the same time, the provision of the second connecting wire 6 can also reduce the connection impedance between the second binding electrode 3 and the first binding electrode 2.
[0106] In some embodiments, referring to Figure 2c, another structural cross-sectional schematic diagram of the substrate along the AA' section line in Figure 2a in an embodiment of the present disclosure is shown; the first binding electrode 2 and the second binding electrode 3 are located in different layers, and a first insulating layer 4 is further provided between the first binding electrode 2 and the second binding electrode 3. The second binding electrode 3 also extends to the orthographic projection area of the first binding electrode 2 on the substrate 1, and the second binding electrode 3 at least partially overlaps with the orthographic projection of the first binding electrode 2 on the substrate 1. The second binding electrode 3 is electrically connected to the first binding electrode 2 through a plurality of first vias 40 provided in the first insulating layer 4.
[0107] The provision of multiple first vias 40 can reduce the connection impedance between the second binding electrode 3 and the first binding electrode 2. The extended second binding electrode 3 enables electrical connection to the first binding electrode 2, allowing display signals and power signals provided by the peripheral circuit board to be transmitted to the display driver circuit via the second binding electrode 3 and the first binding electrode 2. Furthermore, the extended second binding electrode 3 can further shorten or eliminate the reserved spacing between the first binding electrode 2 and the second binding electrode 3 to accommodate glue overflow, thereby improving wafer dicing efficiency.
[0108] In some embodiments, referring to Figure 2c, the display substrate further includes a fourth connecting line 8, which is located on a side of the second binding electrode 3 close to the substrate 1, and a second insulating layer 7 is further provided between the fourth connecting line 8 and the second binding electrode 3. The fourth connecting line 8 at least partially overlaps with the orthographic projection of the second binding electrode 3 on the substrate 1; the fourth connecting line 8 is electrically connected to the second binding electrode 3 through a plurality of third vias 71 provided in the second insulating layer 7.
[0109] The provision of the plurality of third vias 71 can reduce the connection impedance between the fourth connection line 8 and the second binding electrode 3. The provision of the fourth connection line 8 can reduce the impedance of the second binding electrode 3, thereby further reducing the connection impedance between the fourth connection line 8 and the second binding electrode 3.
[0110] In some embodiments, the first insulating layer 4 and the second insulating layer 7 are both made of inorganic insulating materials, such as silicon nitride, silicon oxide, or silicon oxynitride.
[0111] In some embodiments, referring to Figures 2b and 2c, a first opening 41 is formed in the first insulating layer 4. The first opening 41 at least partially overlaps with the orthographic projection of the second binding electrode 3 on the substrate 1, and the second binding electrode 3 is exposed at the first opening 41. This facilitates the binding connection between the second binding electrode 3 and the binding connection wire.
[0112] In some embodiments, referring to FIG. 3 a , which is a top view schematically illustrating the arrangement of first and second binding electrodes in an embodiment of the present disclosure, there are multiple first binding electrodes 2 and multiple second binding electrodes 3 ; the multiple first binding electrodes 2 are electrically connected to the multiple second binding electrodes 3 in a one-to-one correspondence; the multiple first binding electrodes 2 are arranged along a first direction X; the multiple second binding electrodes 3 are arranged along the first direction X; along the first direction X, odd-numbered and even-numbered first binding electrodes 2 are staggered; along the first direction X, odd-numbered and even-numbered second binding electrodes 3 are staggered; the odd-numbered first binding electrodes 2 and the odd-numbered second binding electrodes 3 are arranged in a first straight line P1 along the first direction X; the even-numbered first binding electrodes 2 and the even-numbered second binding electrodes 3 are arranged in a second straight line P2 along the first direction X; and the first straight line P1 and the second straight line P2 are parallel to each other.
[0113] Among them, along the first direction X, odd-numbered and even-numbered first binding electrodes 2 are staggered. On the one hand, this can increase the binding integration of the first binding electrodes 2; on the other hand, it can prevent short circuits between adjacent first binding electrodes 2. Along the first direction X, odd-numbered and even-numbered second binding electrodes 3 are staggered. On the one hand, this can increase the binding integration of the second binding electrodes 3; on the other hand, it can prevent short circuits between adjacent second binding electrodes 2.
[0114] In some embodiments, the first via hole 40 is filled with tungsten. The tungsten via hole can reduce the connection impedance of the first via hole 40 and facilitate subsequent observation and detection of the binding connection between the first binding electrode 2 and the second binding electrode 3.
[0115] In some embodiments, referring to Figures 2b and 2c, the display substrate further includes a third binding electrode 9, which is located in the binding area 101 and is located on the same side of the substrate 1 as the first binding electrode 2 and the second binding electrode 3. The third binding electrode 9 is located on a side of the first binding electrode 2 that is closer to the display area 100. The orthographic projections of the third binding electrode 9, the first binding electrode 2, and the second binding electrode 3 on the substrate 1 do not overlap. The third binding electrode 9 is configured to be bound and connected to the display driver circuit. The third binding electrode 9 and the first binding electrode 2 are formed from the same layer and material, and the surface of the third binding electrode 9 facing away from the substrate 1 is flush with the surface of the first binding electrode 2 facing away from the substrate 1.
[0116] The first binding electrode 2 is bound and connected to the input electrode of the display driving circuit, and the third binding electrode 9 is bound and connected to the output electrode of the display driving circuit by hot-pressing anisotropic conductive adhesive.
[0117] In some embodiments, referring to Figures 2b and 2c, the display substrate further includes an anode 10 and a pixel circuit 11, which are located in the display area 100, and the anode 10 is in the same layer and made of the same material as the first binding electrode 2 and the third binding electrode 9; the anode 10 is located in the display area 100; the pixel circuit 11 is located in the display area 100 and the binding area 101; the pixel circuit 11 is located between the anode 10 and the substrate 1; the pixel circuit 11 is electrically connected to the anode 10; the display substrate further includes a third connecting line 12, which is located between the third binding electrode 9 and the substrate 1, and the third connecting line 12 extends from the binding area 101 to the display area 100; the third binding electrode 9 is electrically connected to the third connecting line 12, and the third connecting line 12 is electrically connected to the pixel circuit 11.
[0118] Among them, the pixel circuit 11 adopts a traditional OLED pixel circuit, and the specific circuit of the pixel circuit 11 will not be described here. The pixel circuit 11 in Figures 2b and 2c is only a schematic representation, and the specific circuit is not drawn. The third connecting line 12 is electrically connected to the third binding electrode 9 through a plurality of tungsten holes. By electrically connecting the third connecting line 12 to the pixel circuit 11, the display driving signal provided by the display driving circuit and the power supply signal provided by the peripheral circuit board can be transmitted to the pixel circuit 11, thereby realizing the driving of the OLED light-emitting element by the pixel circuit 11. The pixel circuit 11 also includes a cathode ring 110 surrounding the display area 100, and the cathode ring 110 is made of the same layer and material as the anode 10. Figures 2b and 2c show that the third connecting line 12 is electrically connected to the cathode ring 110.
[0119] In some embodiments, referring to FIG. 3b , which is a top view schematically illustrating the arrangement of third binding electrodes in embodiments of the present disclosure, there are multiple third binding electrodes 9 arranged in an array. Along the arrangement direction Y of the display area 100 and the binding area 101, the positions of any two adjacent rows of third binding electrodes 9 in the array are staggered. This arrangement increases the integration density of the third binding electrodes 9 while also improving or preventing short circuits between adjacent third binding electrodes 9.
[0120] In some embodiments, referring to Figures 2b and 2c, the display substrate further includes an electrostatic ring 13 surrounding the periphery of the display area 100. Part of the electrostatic ring 13 is located in the binding area 101, and part of the electrostatic ring 13 located in the binding area 101 is located on the side of the second binding electrode 3 away from the display area 100. The electrostatic ring 13 includes a first electrode line 131 and a second electrode line 132. The first electrode line 131 and the second binding electrode 3 are made of the same layer and material. The second electrode line 132 is located on the side of the first electrode line 131 closer to the substrate 1. The second electrode line 132 is electrically connected to the first electrode line 131 and is grounded. The first electrode line 131 and the second electrode line 132 together form the electrostatic ring 13, which can reduce the ground impedance of the electrostatic ring 13, thereby enabling the electrostatic ring to effectively conduct static electricity and protect the display substrate from damage by static electricity. In addition, the electrostatic ring can prevent cracks from entering the display substrate when cutting the wafer to form the display substrate, thereby protecting the display substrate. When cutting the wafer to form the display substrate, cutting is performed from the side of the electrostatic ring 13 away from the display area 100.
[0121] In some embodiments, referring to FIG. 2 b , along the arrangement direction Y of the display area 100 and the binding area 101 , the distance L1 between the third binding electrode 9 and the display area 100 is ≥ 2 mm; this distance ensures the safety of the anisotropic conductive adhesive during hot pressing and does not affect or damage the display area 100; the distance L2 between the side boundary of the third binding electrode 9 close to the display area 100 and the side boundary of the first binding electrode 2 away from the display area 100 is ≥ 2 mm; the distance L4 between the side boundary of the second binding electrode 3 close to the display area 100 and the side boundary thereof away from the display area 100 is ≥ 100 μm; and the distance L5 between the side boundary of the second binding electrode 3 away from the display area 100 and the side boundary of the electrostatic ring 13 away from the display area 100 is ≥ 40 μm.
[0122] In the display substrate provided by the embodiments of the present disclosure, the distance between the surface of the first binding electrode facing away from the substrate and the substrate is greater than the distance between the surface of the second binding electrode facing away from the substrate and the substrate, thereby creating a step height difference between the surface of the first binding electrode facing away from the substrate and the surface of the second binding electrode facing away from the substrate. When the first binding electrode is bonded to the display driving circuit via hot-pressed anisotropic conductive adhesive, even if the anisotropic conductive adhesive overflows onto the hot-pressed welding surface between the second binding electrode and the bonding wire when squeezed, a short circuit will not occur between adjacent second binding electrodes or bonding wires. Because the gold spheres in the anisotropic conductive adhesive are not flattened during hot-press bonding between the second bonding electrode and the bonding wire, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrode and the bonding wire will not conduct electricity. Consequently, any anisotropic conductive adhesive that overflows onto the hot-press bonding surface between the second bonding electrode and the bonding wire will not cause a short circuit between adjacent second bonding electrodes or adjacent bonding wires. This can shorten or eliminate the gap between the first and second bonding electrodes to accommodate adhesive overflow, thereby reducing the width of the bonding area away from the display area and improving wafer dicing efficiency. Furthermore, due to the step height difference between the surface of the first bonding electrode facing away from the substrate and the surface of the second bonding electrode facing away from the substrate, hot-press bonding of the bonding wire to the second bonding electrode prevents secondary damage to the already bonded display driver circuit.
[0123] In a second aspect, an embodiment of the present disclosure further provides a display panel, comprising the display substrate in the above embodiment.
[0124] In some embodiments, referring to FIG4a, a partial structural cross-sectional diagram of a display panel in an embodiment of the present disclosure is shown; FIG4b is a partial structural cross-sectional diagram of another display panel in an embodiment of the present disclosure; wherein the display panel further includes a third insulating layer 14, a pixel defining layer 15, and an encapsulation layer 16, the third insulating layer 14, the pixel defining layer 15, and the encapsulation layer 16 respectively extending from the display area 100 to the binding area 101, and the third insulating layer 14, the pixel defining layer 15, and the encapsulation layer 16 are sequentially stacked on the side of the first binding electrode 2 in the display substrate away from the base 1. side; the third insulating layer 14, the pixel defining layer 15 and the encapsulation layer 16 have second openings 17 in the areas corresponding to the first binding electrode 2 and the third binding electrode 9, and the first binding electrode 2 and the third binding electrode 9 are exposed at the second openings 17; the third insulating layer 14, the pixel defining layer 15 and the encapsulation layer 16 have third openings 18 in the areas corresponding to the second binding electrode 3, and the third opening 18 overlaps with the orthographic projection of the first opening 41 in the display substrate on the base 1, and the second binding electrode 3 is exposed in the overlapping area of the orthographic projection of the third opening 18 and the first opening 41.
[0125] In some embodiments, referring to Figures 4a, 4b, and 4c, Figure 4c is a schematic cross-sectional view of a partial structure of the display area of a display panel in an embodiment of the present disclosure. A fourth opening is defined in the portion of the third insulating layer 14 and the pixel defining layer 15 located in the display area 100, and the anode 10 in the display substrate is exposed at the fourth opening. The display panel further includes a light-emitting functional layer 19 and a cathode layer 20, which are sequentially stacked on the side of the anode 10 in the display substrate facing away from the substrate 1, and are located between the anode 10 and the encapsulation layer 16. The light-emitting functional layer 19 is located in the fourth opening, and the cathode layer 20 covers the entire display area 100, extending from the display area 100 to the bonding area 101, and is in contact with and electrically connected to the cathode ring 110 located in the bonding area 101. The anode 10, the light-emitting functional layer 19, and the cathode layer 20 at the fourth opening are stacked sequentially to form an OLED light-emitting element. The OLED light-emitting element emits light when driven by the pixel circuit 11, and the encapsulation layer 16 encapsulates the OLED light-emitting element.
[0126] In some embodiments, referring to Figures 4a and 4b , along the arrangement direction Y of the display area 100 and the binding area 101, the width of the second opening 17 is the distance L2 between the boundary of the third binding electrode 9 close to the display area 100 and the boundary of the first binding electrode 2 away from the display area 100. That is, the orthographic projections of the first binding electrode 2 and the third binding electrode 9 on the display substrate are both within the orthographic projection area of the second opening 17 on the display substrate. The second opening 17 is used for binding the display driver circuit.
[0127] In some embodiments, referring to Figures 4a and 4b, the display panel further includes a display driving circuit 21, which is located on a side of the encapsulation layer 16 away from the display substrate, and the display driving circuit 21 is located at the second opening 17, and the input electrode of the display driving circuit 21 is electrically connected to the first binding electrode 2 by an anisotropic conductive adhesive 22; the output electrode of the display driving circuit 21 is electrically connected to the third binding electrode 9 by anisotropic conductive adhesive 22.
[0128] In some embodiments, referring to Figures 4a and 4b , the display panel further includes a peripheral circuit board (not shown) located outside the display substrate. The second binding electrode 3 is welded to one end of a binding wire 23 at the intersection of the orthographic projections of the third opening 18 and the first opening 41. The other end of the binding wire 23 is welded to a binding electrode of the peripheral circuit board. That is, the second binding electrode 3 is bonded to the peripheral circuit board via the binding wire 23.
[0129] In some embodiments, there are multiple binding connection wires 23, and each binding connection wire 23 is electrically connected to a second binding electrode 3 and a binding electrode of the peripheral circuit board; the multiple binding connection wires 23 are wrapped with protective glue (not shown in the figure), and the protective glue can insulate adjacent binding connection wires 23 from each other.
[0130] In some embodiments, the material of the bonding wire 23 includes aluminum. Because the aluminum second bonding electrode 3 is soft and highly conductive, the second bonding electrode 3 and the bonding wire 23 can be easily bonded together through hot pressing. This also reduces the bonding impedance between the second bonding electrode 3 and the bonding wire 23, ensuring reliable and stable performance.
[0131] The display panel provided by the embodiment of the present disclosure, by adopting the display substrate of the above embodiment, can, on the one hand, shorten or eliminate the reserved spacing between the first binding electrode and the second binding electrode for accommodating glue overflow, thereby reducing the width of the binding area in the direction away from the display area and improving the wafer cutting efficiency; on the other hand, when the hot pressing bonding connecting wire is performed to bond it to the second binding electrode, no secondary damage will be caused to the already bonded display driving circuit; on the other hand, the second binding electrode and the binding connecting wire can be easily bonded by hot pressing, and the bonding impedance between the second binding electrode and the binding connecting wire can be reduced, ensuring stable reliability.
[0132] The display panel provided in the embodiments of the present disclosure may be any product or component with a display function, such as an OLED panel, a Micro OLED panel, an OLED TV, an OLED billboard, a display, a mobile phone, or a navigation system.
[0133] In the third aspect, the embodiments of the present disclosure also provide a method for preparing the above-mentioned display panel, referring to Figures 5a, 5b, 5c, 5d and 5e, Figure 5a is a schematic structural cross-sectional view of the display panel after step S101 is completed in the embodiment of the present disclosure; Figure 5b is a schematic structural cross-sectional view of the display panel after step S102 is completed in the embodiment of the present disclosure; Figure 5c is a schematic structural cross-sectional view of the display panel after step S103 is completed in the embodiment of the present disclosure; Figure 5d is a schematic structural cross-sectional view of the display panel after step S104 is completed in the embodiment of the present disclosure; Figure 5e is a schematic structural cross-sectional view of the display panel after step S105 is completed in the embodiment of the present disclosure; wherein, the method for preparing the display panel includes: Step S101: preparing a display substrate.
[0134] In this step, the various film layers in the display substrate are prepared using conventional processes, which will not be described in detail here. It should be noted that after the display substrate is prepared, the first opening 41 can be formed in the first insulating layer 4. Alternatively, after the display substrate is prepared, the first opening 41 can be omitted and then formed in the first insulating layer 4 in step S103.
[0135] Step S102: Prepare a third insulating layer 14, a pixel defining layer 15 and an encapsulation layer 16 in sequence on one side of the display substrate, and form a second opening 17 in the third insulating layer 14, the pixel defining layer 15 and the encapsulation layer 16 through a single etching process, so that the first binding electrode 2 and the third binding electrode 3 in the display substrate are exposed at the second opening 17.
[0136] In this step, a dry etching process is performed to form the second opening 17 in the third insulating layer 14 , the pixel defining layer 15 and the encapsulation layer 16 .
[0137] Step S103: Another etching process is performed to form a third opening 18 in the third insulating layer 14, the pixel defining layer 15 and the encapsulation layer 16, and a first opening 41 in the first insulating layer of the display substrate. The second binding electrode 3 in the display substrate is exposed in the overlapping area of the orthographic projection of the third opening 18 and the first opening 41.
[0138] In this step, the third opening 18 in the third insulating layer 14 , the pixel defining layer 15 and the encapsulation layer 16 and the first opening 41 in the first insulating layer of the display substrate are formed by a single dry etching process.
[0139] Step S104 : the input electrode of the display driving circuit 21 is electrically connected to the first binding electrode 2 by means of the hot-pressed anisotropic conductive adhesive 22 , and the output electrode of the display driving circuit 21 is electrically connected to the third binding electrode 9 by means of the hot-pressed anisotropic conductive adhesive 22 .
[0140] In this step, the gold spheres in the anisotropic conductive adhesive 22 on the bonding electrode pressing surface are flattened to conduct electricity, while the gold spheres in the anisotropic conductive adhesive 22 outside the bonding electrode pressing surface are not flattened and thus do not conduct electricity.
[0141] Step S105 : connecting the other end of the binding connection wire 23 , one end of which is welded to the binding electrode of the peripheral circuit board, to the second binding electrode 3 by thermocompression welding.
[0142] In this step, the anisotropic conductive adhesive 22 may overflow onto the hot-press welding surface between the second binding electrodes 3 and the binding connecting wires 23. However, the gold ball particles in the anisotropic conductive adhesive 22 will not be flattened during the hot-press welding, so that the anisotropic conductive adhesive 22 will not conduct electricity, thereby avoiding the overflow of the adhesive causing a short circuit between adjacent binding connecting wires 23 and adjacent second binding electrodes 3.
[0143] The other structures and film layers of the display panel in this embodiment are prepared using traditional processes, which will not be described in detail here.
[0144] It is understood that the above embodiments are merely exemplary embodiments for illustrating the principles of the present disclosure, and the present disclosure is not limited thereto. Those skilled in the art may make various modifications and improvements without departing from the spirit and substance of the present disclosure, and such modifications and improvements are also considered to be within the scope of protection of the present disclosure.
Claims
1. A display substrate having a display area and a bonding area, wherein the bonding area is located at the periphery of at least one side of the display area. Among them, The display substrate includes a substrate located in the display area and the bonding area. A first bonding electrode and a second bonding electrode are located in the bonding area and on the same side of the substrate. The first bonding electrode is located on the side closer to the display area than the second bonding electrode. The first bonding electrode is configured to be bonded and connected to a display driving circuit; the second bonding electrode is configured to be bonded and connected to an external circuit board; the first bonding electrode and the second bonding electrode are electrically connected. The external circuit board is configured to provide a display signal and a power signal to the display driving circuit; the display driving circuit is configured to provide a display driving signal to the display area. The distance between the surface of the first bonding electrode facing away from the substrate and the substrate is greater than the distance between the surface of the second bonding electrode facing away from the substrate and the substrate.
2. The display substrate according to claim 1, wherein, The difference between the distance between the surface of the first bonding electrode facing away from the substrate and the substrate and the distance between the surface of the second bonding electrode facing away from the substrate and the substrate is ≥ 5 μm.
3. The display substrate according to claim 1, wherein, The distance between the orthographic projection of the first bonding electrode on the substrate and the orthographic projection of the second bonding electrode on the substrate is ≥ 0 and < 500 μm.
4. The display substrate according to any one of claims 1-3, wherein, The first bonding electrode includes four sub-film layers which are stacked in sequence. Along the direction away from the substrate, the materials of the four sub-film layers are titanium, aluminum, titanium, and indium tin oxide in sequence. The material of the second bonding electrode includes aluminum.
5. The display substrate according to claim 4, wherein, The first bonding electrode and the second bonding electrode are located in different layers, and a first insulating layer is further provided between the first bonding electrode and the second bonding electrode. The display substrate further includes a first connection line and a second connection line. The first connection line is of the same layer and the same material as the second bonding electrode. The first connection line at least partially overlaps with the orthographic projection of the first bonding electrode on the substrate. The first connection line is electrically connected to the first bonding electrode through a plurality of first vias opened in the first insulating layer. The second connection line is located on the side of the second bonding electrode closer to the substrate, and a second insulating layer is further provided between the second connection line and the second bonding electrode and the first connection line. The second connection line at least partially overlaps with the orthographic projections of the second bonding electrode and the first connection line on the substrate. The second connection line is electrically connected to the second bonding electrode and the first connection line respectively through a plurality of second vias opened in the second insulating layer.
6. The display substrate according to claim 4, wherein, The first bonding electrode and the second bonding electrode are located in different layers, and a first insulating layer is further provided between the first bonding electrode and the second bonding electrode. The second bonding electrode further extends to the orthographic projection area of the first bonding electrode on the substrate, and the second bonding electrode at least partially overlaps with the orthographic projection of the first bonding electrode on the substrate. The second bonding electrode is electrically connected to the first bonding electrode through a plurality of first vias opened in the first insulating layer.
7. The display substrate according to claim 5 or 6, wherein, A first opening is formed in the first insulating layer, and the first opening at least partially overlaps with the orthographic projection of the second bonding electrode on the substrate. The second bonding electrode is exposed at the first opening.
8. The display substrate according to claim 5 or 6, wherein The number of the first bonding electrodes is multiple, and the number of the second bonding electrodes is multiple; the multiple first bonding electrodes and the multiple second bonding electrodes are electrically connected in one-to-one correspondence. The multiple first bonding electrodes are arranged along a first direction. The multiple second bonding electrodes are arranged along the first direction. Along the first direction, the odd-numbered and even-numbered first bonding electrodes are staggered from each other. Along the first direction, the odd-numbered and even-numbered second bonding electrodes are staggered from each other. The odd-numbered first bonding electrodes and the odd-numbered second bonding electrodes are arranged along the first direction to form a first straight line. The even-numbered first bonding electrodes and the even-numbered second bonding electrodes are arranged along the first direction to form a second straight line. The first straight line and the second straight line are parallel to each other.
9. The display substrate according to claim 5 or 6, wherein, Tungsten is filled in the first via hole.
10. The display substrate according to claim 1, wherein, It further includes a third bonding electrode, which is located in the bonding area and on the same side of the substrate as the first bonding electrode and the second bonding electrode. The third bonding electrode is located on the side of the first bonding electrode close to the display area. The orthographic projection of the third bonding electrode on the substrate does not overlap with that of the first bonding electrode and the second bonding electrode. The third bonding electrode is configured to be bonded and connected to the display driving circuit. The third bonding electrode is of the same layer and the same material as the first bonding electrode, and the surface of the third bonding electrode facing away from the substrate is flush with the surface of the first bonding electrode facing away from the substrate.
11. The display substrate according to claim 10, wherein, It further includes an anode and a pixel circuit. The anode is located in the display area; the pixel circuit is located in the display area and the bonding area. The anode is of the same layer and the same material as the first bonding electrode and the third bonding electrode. The pixel circuit is located between the anode and the substrate; the pixel circuit is electrically connected to the anode. The display substrate further includes a third connection line, which is located between the third bonding electrode and the substrate, and the third connection line extends from the bonding area to the display area. The third bonding electrode is electrically connected to the third connection line, and the third connection line is electrically connected to the pixel circuit.
12. The display substrate according to claim 11, wherein, The number of the third bonding electrodes is multiple, and the multiple third bonding electrodes are arranged in an array. Along the arrangement direction of the display area and the bonding area, the positions of any two adjacent rows of the third bonding electrodes in the array of the third bonding electrodes are staggered from each other.
13. The display substrate according to claim 12, wherein, It further includes an electrostatic ring, which surrounds the periphery of the display area. Part of the electrostatic ring is located in the bonding area, and the part of the electrostatic ring located in the bonding area is located on the side of the second bonding electrode away from the display area. The electrostatic ring includes a first electrode line and a second electrode line. The first electrode line is of the same layer and the same material as the second bonding electrode. The second electrode line is located on the side of the first electrode line close to the substrate. The second electrode line is electrically connected to the first electrode line, and the second electrode line is grounded.
14. The display substrate according to claim 13, wherein, Along the arrangement direction of the display area and the bonding area, the distance between the third bonding electrode and the display area is ≥ 2 mm; The distance between the side boundary of the third bonding electrode close to the display area and the side boundary of the first bonding electrode far from the display area is ≥ 2 mm; The distance between the side boundary of the second bonding electrode close to the display area and the side boundary of the second bonding electrode far from the display area is ≥ 100 μm; The distance between the side boundary of the second bonding electrode far from the display area and the side boundary of the static electricity ring far from the display area is ≥ 40 μm.
15. A display panel, wherein, Comprising the display substrate according to any one of claims 1-14.
16. The display panel according to claim 15, wherein, Further comprising a third insulating layer, a pixel defining layer and a packaging layer, The third insulating layer, the pixel defining layer and the packaging layer respectively extend from the display area to the bonding area, and the third insulating layer, the pixel defining layer and the packaging layer are sequentially stacked on the side of the first bonding electrode in the display substrate facing away from the substrate; The third insulating layer, the pixel defining layer and the packaging layer are provided with second openings in the areas corresponding to the first bonding electrode and the third bonding electrode, and the first bonding electrode and the third bonding electrode are exposed at the second openings; The third insulating layer, the pixel defining layer and the packaging layer are provided with third openings in the area corresponding to the second bonding electrode, and the third openings overlap with the orthographic projection of the first opening in the display substrate on the substrate, and the second bonding electrode is exposed at the overlapping area of the orthographic projections of the third opening and the first opening.
17. The display panel according to claim 16, wherein, Along the arrangement direction of the display area and the bonding area, the opening width of the second opening is the distance between the side boundary of the third bonding electrode close to the display area and the side boundary of the first bonding electrode far from the display area.
18. The display panel according to claim 17, wherein, Further comprising a display driving circuit, The display driving circuit is located on the side of the packaging layer away from the display substrate, and the display driving circuit is located at the second opening, The input electrode of the display driving circuit is electrically connected to the first bonding electrode through an anisotropic conductive adhesive in a bonded manner; the output electrode of the display driving circuit is electrically connected to the third bonding electrode through the anisotropic conductive adhesive in a bonded manner.
19. The display panel according to claim 18, wherein, Further comprising a peripheral circuit board, located outside the display substrate, One end of the bonding connection wire is welded to the second bonding electrode at the overlapping position of the orthographic projections of the third opening and the first opening, and the other end of the bonding connection wire is welded to the bonding electrode of the peripheral circuit board.
20. The display panel according to claim 19, wherein, The number of the bonding connection wires is multiple, Each bonding connection wire is correspondingly electrically connected to one second bonding electrode and one bonding electrode of the peripheral circuit board; A protective adhesive is wrapped around the multiple bonding connection wires, and the protective adhesive can insulate the adjacent bonding connection wires from each other.
21. The display panel according to claim 20, wherein, The material of the bonding connection wire includes aluminum.
22. A method for manufacturing a display panel according to any one of claims 15-21, wherein, Comprising: Preparing a display substrate; A third insulating layer, a pixel defining layer, and a packaging layer are sequentially formed on one side of the display substrate. A second opening is formed in the third insulating layer, the pixel defining layer, and the packaging layer through a single etching process, and a first bonding electrode and a third bonding electrode in the display substrate are exposed at the second opening; Then, a third opening in the third insulating layer, the pixel defining layer, and the packaging layer and a first opening in the first insulating layer of the display substrate are formed through a single etching process, and a second bonding electrode in the display substrate is exposed at an overlapping area of the positive projections of the third opening and the first opening; An input electrode of the display driving circuit is bonded and electrically connected to the first bonding electrode by hot pressing an anisotropic conductive adhesive. At the same time, an output electrode of the display driving circuit is bonded and electrically connected to the third bonding electrode by hot pressing the anisotropic conductive adhesive; The other end of a bonding connection wire, one end of which is welded and connected to a bonding electrode of the peripheral circuit board, is connected to the second bonding electrode by hot pressing and welding.
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