Data processing

Abstract

Embodiments of the present description provide a processing method and device. The data processing method comprises: in response to a power-on starting instruction of the data processing device, a baseboard management controller (BMC) writes, into a first area in a shared memory, first data to be transmitted in a cache, and in response to the power-on starting instruction, a basic input / output system (BIOS) writes, into a second area in the shared memory, second data to be transmitted determined in operation; and the BIOS acquires said first data from the first area in response to an acquisition instruction for said first data, and the BMC acquires said second data from the second area on the basis of a preset acquisition rule.

Description

Technical Field of Data Processing

[0001] The embodiments of this specification relate to the field of computer technology, and particularly to data processing. Background Art

[0002] During the startup process of a server, the BIOS (Basic Input Output System) will go through stages such as the SEC (Security Phase), PEI (Pre-EFI Initialization) phase, DXE (Driver Execution Environment) phase, BDS (Boot Device Selection) phase, and TSL (Pre-Operating System Loading) phase, etc. When the BIOS enters the BDS phase, its main functions are to initialize the console device, load necessary device drivers, and load and execute startup items according to system settings. At the same time, for a server, in the BDS phase, the BIOS needs to send the enumerated device information to the BMC (Baseboard Manager Controller).

[0003] In the server field, the BMC is an independent system, and its main role is to make corresponding adjustment operations by monitoring the system's temperature, voltage, fan, power supply, etc., so as to ensure that the server system is in a normal operating state. Therefore, during each startup process, the BIOS needs to establish communication with the BMC and send device information to the BMC. This information communication process takes a relatively long time and occupies a large proportion of the startup duration. Currently, when the BIOS and the BMC communicate, they usually interact through IPMI commands. Such a communication process will affect the operation of the BIOS, causing the BIOS to wait until the communication ends before it can run. There is too much coupling between the BIOS and the BMC, which affects the startup time of the BIOS and thus the startup time of the server. Therefore, there is an urgent need for an effective technical solution to solve the above problems. Summary of the Invention

[0004] In view of this, the embodiments of this specification provide a data processing method. One or more embodiments of this specification also relate to a data processing device to solve the technical defects existing in the related art.

[0005] According to the first aspect of the embodiments of the present specification, a data processing method is provided, which is applied to a data processing device. The data processing device includes a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC). Among them, the Baseboard Management Controller (BMC) responds to the power-on startup instruction of the data processing device, writes the first data to be transmitted in the cache into the first area of the shared memory, and the Basic Input / Output System (BIOS) responds to the power-on startup instruction, writes the second data to be transmitted determined during operation into the second area of the shared memory; the Basic Input / Output System (BIOS) responds to the acquisition instruction for the first data to be transmitted, and acquires the first data to be transmitted from the first area. The first data to be transmitted, and the Baseboard Management Controller (BMC) acquires the second data to be transmitted from the second area according to a preset acquisition rule.

[0006] According to the second aspect of the embodiments of the present specification, a data processing device is provided, which includes a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC). Among them, the Baseboard Management Controller (BMC) is configured to respond to the power-on startup instruction of the data processing device, write the first data to be transmitted in the cache into the first area of the shared memory; the Basic Input / Output System (BIOS) is configured to respond to the power-on startup instruction, write the second data to be transmitted determined during operation into the second area of the shared memory; the Basic Input / Output System (BIOS) is further configured to respond to the acquisition instruction for the first data to be transmitted, and acquire the first data to be transmitted from the first area; the Baseboard Management Controller (BMC) is further configured to acquire the second data to be transmitted from the second area according to a preset acquisition rule.

[0007] An embodiment of the present specification provides a data processing method, which is applied to a data processing device. The data processing device includes a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC). Among them, the Baseboard Management Controller (BMC) responds to the power-on startup instruction of the data processing device, writes the first data to be transmitted in the cache into the first area of the shared memory, and the Basic Input / Output System (BIOS) responds to the power-on startup instruction, writes the second data to be transmitted determined during operation into the second area of the shared memory; the Basic Input / Output System (BIOS) responds to the acquisition instruction for the first data to be transmitted, and acquires the first data to be transmitted from the first area, and the Baseboard Management Controller (BMC) acquires the second data to be transmitted from the second area according to a preset acquisition rule.

[0008] The above method sets up a shared memory that can be accessed by both the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC). The shared memory is divided into a first area and a second area. During the startup process of the data processing device, the BMC can write the first data to be transmitted to the BIOS into the first area, and the BIOS can write the second data to be transmitted to the BMC into the second area. Correspondingly, the BMC can obtain the first data to be transmitted from the first area, and the BIOS can obtain the second data to be transmitted from the second area, so that the communication from the BMC to the BIOS and the communication from the BIOS to the BMC do not affect each other. Moreover, by setting the first area and the second area in the shared memory, after the BIOS or the BMC writes the data to be transmitted into the shared memory, the BMC or the BIOS can obtain the required data at the corresponding position in the shared memory, without waiting for the feedback instruction on whether the BMC or the BIOS has received the data, realizing the decoupling between the BIOS and the BMC. Thus, the communication between the BIOS and the BMC does not affect the operation and startup time of the BIOS, ensuring that the server's boot time is not affected. Description of the Drawings

[0009] FIG. 1 is a schematic diagram of an application scenario of a data processing method provided by an embodiment of this specification;

[0010] FIG. 2 is a flowchart of a data processing method provided by an embodiment of this specification;

[0011] FIGS. 3a and 3b are flowcharts of a processing process of a data processing method provided by an embodiment of this specification;

[0012] FIG. 4 is a schematic diagram of the structure of a data processing device provided by an embodiment of this specification. Detailed Embodiments

[0013] Many specific details are set forth in the following description in order to provide a thorough understanding of this specification. However, this specification can be implemented in many other ways different from those described herein. Those skilled in the art can make similar generalizations without departing from the connotation of this specification. Therefore, this specification is not limited by the specific embodiments disclosed below.

[0014] The terminology used in one or more embodiments of this specification is for the purpose of describing specific embodiments only and is not intended to limit the one or more embodiments of this specification. As used in one or more embodiments of this specification and the appended claims, the singular forms "a," "an," "the," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and / or" used in one or more embodiments of this specification refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0015] It should be understood that while terms such as "first," "second," and so on may be used to describe various information in one or more embodiments of this specification, such information should not be limited to these terms. These terms are merely used to distinguish information of the same type from one another. For example, "first" could also be referred to as "second," and similarly, "second" could also be referred to as "first," without departing from the scope of one or more embodiments of this specification. Depending on the context, the term "if" as used herein could be interpreted as "when," "when," or "in response to a determination."

[0016] In addition, it should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in one or more embodiments of this specification are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation portals are provided for users to choose to authorize or refuse.

[0017] First, the terms involved in one or more embodiments of this specification are explained.

[0018] BIOS: Basic Input Output System, is a set of programs that are fixed on a ROM chip on the computer motherboard. It stores the most important basic input and output programs of the computer, the self-test program after powering on, and the system self-starting program. A driver that can read and write specific information of system settings from CMOS.

[0019] BMC: Baseboard Management Controller, a controller installed on the motherboard for managing and monitoring the hardware of a computer system. It can be remotely accessed and managed through an independent network interface, thus providing the ability to monitor the system in real time and perform remote control.

[0020] MMIO: Memory Mapped I / O, a form of inter-process communication, namely shared memory.

[0021] PCIE: Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard.

[0022] OS: Operating System, a set of interrelated system software programs that manage and control computer operations, utilize and run hardware and software resources, and provide common services to organize user interactions.

[0023] AC: Alternating Current, alternating current.

[0024] DC: Direct Current, direct current.

[0025] AES: An encryption algorithm.

[0026] SM1: An encryption algorithm.

[0027] NVRAM: Non-Volatile Random Access Memory, a type of RAM that can retain data even after power is cut off.

[0028] Consumption: Can be understood as reading and using, that is, the reading and use of data.

[0029] IPMI: Intelligent Platform Management Interface, used to enable communication between the BMC and the BIOS.

[0030] RSA: An encryption algorithm.

[0031] ESPI: Enhanced Serial Peripheral Interface, which can be used to enable communication between the BMC and the BIOS.

[0032] USB: Universal Serial Bus, a general - purpose serial bus that can be used to implement communication between the BMC and the BIOS.

[0033] In this specification, a data - processing method is provided. One or more embodiments of this specification also relate to a data - processing device, which will be described in detail one by one in the following embodiments.

[0034] Referring to FIG. 1, FIG. 1 shows a schematic diagram of the application scenario of a data - processing method provided according to an embodiment of this specification.

[0035] FIG. 1 includes a computer device 102, and the computer device 102 includes a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC). Among them, the computer device 102 can be understood as a computer.

[0036] Specifically, when the computer boots up, the Basic Input / Output System (BIOS), as the first program executed after the computer system is powered on, can be used to detect and initialize the hardware devices of the computer system and load the operating system. The Baseboard Management Controller (BMC) can be used to manage and monitor the hardware of the computer system. For example, it can detect the temperature, voltage, and fan speed of the hardware. By collecting and analyzing this data, the Baseboard Management Controller (BMC) can promptly discover and report hardware failures. Communication can be carried out between the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC). Specifically, the Baseboard Management Controller (BMC) can provide the startup parameters and out - of - band management information of the computer system (such as the IP information of the Baseboard Management Controller (BMC), the user name, the serial number of the motherboard, etc.) for the startup and operation of the Basic Input / Output System (BIOS), while the Basic Input / Output System (BIOS) provides the hardware status and configuration information of the computer system for the Baseboard Management Controller (BMC) to enable the Baseboard Management Controller (BMC) to monitor the computer system.

[0037] As shown in Figure 1, the Baseboard Management Controller (BMC) can write the startup parameters of the computer system into the first area of the shared memory, so that the Basic Input / Output System (BIOS) can obtain the startup parameters from the first area to achieve system startup and hardware initialization. Correspondingly, the BIOS can write the hardware status and configuration information of the computer system into the second area of the shared memory, so that the BMC can obtain the hardware status and configuration information from the second area to achieve monitoring of the computer system. By setting the shared memory and dividing it into the first area and the second area, the communication from the BMC to the BIOS and the communication from the BIOS to the BMC do not affect each other, ensuring the stability of communication and reducing the coupling between the BIOS and the BMC.

[0038] Referring to Figure 2, Figure 2 shows a flowchart of a data processing method provided according to an embodiment of this specification. The data processing method is applied to a data processing device, which includes a BIOS and a BMC. The data processing method specifically includes the following steps.

[0039] Step 202: The BMC responds to the power-on startup instruction of the data processing device, writes the first data to be transmitted in the cache into the first area of the shared memory, and the BIOS responds to the power-on startup instruction and writes the second data to be transmitted determined during operation into the second area of the shared memory.

[0040] Specifically, the data processing method provided in the embodiments of this specification can be applied to the startup process of a data processing device. Among them, the data processing device can be understood as a computing device or a server.

[0041] Among them, the power-on startup instruction can be understood as an instruction to power on the data processing device to start the data processing device. The cache can be understood as the memory of the BMC. The shared memory can be understood as being able to be managed by the substrate An addressable space that can be accessed by both the management controller BMC and the basic input / output system BIOS. This addressable space can be set in the memory of the baseboard management controller BMC, in the Flash chip of the basic input / output system BIOS, or in the main memory of the data processing device. In practical applications, the shared memory can be accessed through physical communication methods, such as through the PCIE interface, ESPI interface, or USB interface, etc. The shared memory can be, for example, MMI0 (i.e., the shared memory can be set in the baseboard management controller BMC), and the shared memory can also be, for example, the PCIE graphics card between the baseboard management controller BMC and the basic input / output system BIOS.

[0042] In one embodiment of this specification, the first data to be transmitted includes the device startup parameters of the data processing device, and the second data to be transmitted includes the device operation parameters of the data processing device.

[0043] In practical applications, the device startup parameters can include the CMOS settings of the data processing device and the host boot sequence, etc. The device operation parameters can include the hardware information of the CPU and memory of the data processing device, the actually effective startup parameters, and the dynamic data during the operation of the data processing device, etc. For example, it can be the temperature data of the CPU during the operation of the data processing device.

[0044] It can be understood that the first data to be transmitted and the second data to be transmitted are the data that the basic input / output system BIOS and the baseboard management controller BMC need to communicate and share during the startup process of the data processing device (i.e., the computer system). The specific data content and specific data types included in the first data to be transmitted and the second data to be transmitted are not limited in the embodiments of this specification.

[0045] Based on this, in response to the power-on startup instruction of the data processing device, the baseboard management controller BMC can obtain the device startup parameters of the data processing device from the memory and write the device startup parameters into the first area of the shared memory. And, in response to the power-on startup instruction of the data processing device, the basic input / output system BIOS can obtain the device operation parameters during the operation of the data processing device and write the device operation parameters into the second area of the shared memory.

[0046] In practical applications, the data communication between the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC) can include data communication during the power-on stage and data communication during the OS stage. The data communication during the power-on stage includes: obtaining information such as the BMC version, IP, username, etc., sending BIOS Setup option values, setting information such as IP and user passwords, and sending fault logs, etc. The data communication during the OS stage includes: sending fault logs, Venus diagnostic logs, and accurate logs, etc.

[0047] In an embodiment of this specification, the shared memory can be divided into a first region and a second region. Among them, the first region is used to store the data that the Baseboard Management Controller (BMC) needs to send to the Basic Input / Output System (BIOS) (i.e., the first data to be transmitted), and the second region is used to store the data that the Basic Input / Output System (BIOS) needs to send to the Baseboard Management Controller (BMC) (i.e., the second transmitted data). To ensure that the communication from BMC to BIOS and the communication from BIOS to BMC do not affect each other, the size and position of the first region and the second region can be fixed. For example, when the size of the shared memory is 4MB, the starting position of the first region can be 0, and the size can be 1MB. The starting position of the second region can be 1MB, and the size can be 2MB. That is to say, the first region occupies the position of 0 - 1MB in the shared memory, and the second region occupies the position of 1MB - 3MB in the shared memory. The shared memory can have redundancy, that is, in addition to being divided into the first region and the second region, redundant memory can also be reserved, which can ensure the stability of the shared memory.

[0048] In addition, the shared memory can also include a third region, which can be used for IPMI asynchronous communication between the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC). Specifically, after the Basic Input / Output System (BIOS) enters the OS stage, the Basic Input / Output System (BIOS) can write the third data to be transmitted into this third region, so that the Baseboard Management Controller (BMC) reads the third data to be transmitted from the third region through IPMI. The Basic Input / Output System (BIOS) can initialize the header region of this third region when powering on.

[0049] In practical applications, the size of the third region can be fixed, and it can be composed of multiple sections with fixed sizes. Specifically, the Basic Input / Output System (BIOS) can sequentially write the third data to be transmitted into each section, and the Baseboard Management Controller (BMC) reads the data from each section in a polling manner. During the writing process, when the BIOS determines that the storage space of the third region is full, it can start searching from the first section, determine the section from which the BMC has completed reading the data according to the search result, clear the data in it, and rewrite new data.

[0050] In specific implementation, when the BIOS writes the third data to be transmitted into the third region, it can encrypt the third data to be transmitted according to a preset encryption algorithm, and write the encrypted third data to be transmitted into the third region, so as to ensure the security of the data. In practical applications, the preset encryption algorithm can be the AES algorithm or the RSA algorithm, which is not limited in the embodiments of this specification. Moreover, when encrypting the third data to be transmitted according to the preset encryption algorithm, the encryption key can be pre-agreed by the BIOS and the BMC, and the key is determined at compile time. Alternatively, the key can also be dynamically generated by the BIOS each time the computer is powered on, and the key is transmitted to the BMC through IPMI or other means.

[0051] It can be understood that other regions can also be divided from the shared memory to implement data communication between the BIOS and the BMC, which is not limited in the embodiments of this specification.

[0052] In practical applications, the power-on startup instruction can be, for example, an AC power-on startup instruction. Before the BMC writes the first data to be transmitted in the cache into the first region of the shared memory, the BMC responds to the AC power-on startup instruction and initializes the shared memory (initializes the entire shared memory to 0X00), that is, clears all the data stored in the shared memory.

[0053] In specific implementation, for the convenience of storing and reading data in the shared memory, the first data to be transmitted can be arranged according to a pre- Set the data format and the preset data structure to write into the first area of the shared memory. The second data to be transmitted can be written into the second area of the shared memory according to the preset data format and the preset data structure. In practical applications, the preset data format can be, for example, the LSB little-endian format, and the preset data structure can be, for example, compactly arranged in the way of "#pack(l)". The embodiments of this specification do not limit the preset data format and the preset data structure.

[0054] During specific implementation, the baseboard management controller BMC, in response to the power-on startup instruction of the data processing device, writes the first data to be transmitted in the cache into the first area of the shared memory, including: the baseboard management controller BMC, in response to the power-on startup instruction of the data processing device, obtains the first data to be transmitted from the cache and determines the data type information of the first data to be transmitted, where the cache is set in the baseboard management controller BMC; according to the data type information of the first data to be transmitted, write the first data to be transmitted into the first area of the shared memory in the preset writing order.

[0055] Among them, the preset writing order can be understood as the order of writing the first data to be transmitted of the same type into the corresponding fields of this data type.

[0056] Based on this, the baseboard management controller BMC, in response to the power-on startup instruction of the data processing device, can obtain the first data to be transmitted from the memory, determine the data type information of the first data to be transmitted, and write the first data to be transmitted of the same type into the corresponding fields of this data type in the first area in sequence.

[0057] It can be understood that the first data to be transmitted written by the baseboard management controller BMC into the shared memory can include multiple data, and the data types of these data can be the same or different.

[0058] Specifically, when the baseboard management controller BMC writes the first data to be transmitted into the first area, it can traverse all the data type information stored in the first area, determine the data type information that is the same as the data type information of the first data to be transmitted among all the data type information in the first area according to the data type information of the first data to be transmitted, and write the first data to be transmitted into the corresponding field of this data type information. In the case where there is already data in the field corresponding to this data type, the first data to be transmitted can be inserted after the existing data in sequence.

[0059] For example, data corresponding to data type 1, data corresponding to data type 2, and data corresponding to data type 3 are stored in the first region. If the baseboard management controller (BMC) determines that the data type information of the first data to be transmitted is data type 1, then the BMC traverses all data type information in the first region, determines this data type 1, and writes the first data to be transmitted into the field corresponding to data type 1. If there is already data corresponding to data type 1 stored in the first region, the BMC can directly insert the first data to be transmitted at the end of the field corresponding to data type 1 without deleting the previously stored data.

[0060] In addition, in the shared memory, there is no need to arrange each data type information in order, and the starting addresses of each data type information can be aligned to facilitate subsequent data reading. In practical applications, the starting addresses of each data type information can be aligned to 8 bytes.

[0061] In summary, by writing the first data to be transmitted into the first region according to the preset writing order and data type information, the classification storage of data is realized, which is convenient for subsequent data reading.

[0062] Correspondingly, after writing the first data to be transmitted into the first region in the shared memory according to the preset writing order, it further includes: the baseboard management controller (BMC) updates the second data attribute information of the first data to be transmitted.

[0063] Among them, the data attribute information of the first data to be transmitted can be understood as the attribute information of the data type corresponding to the first data to be transmitted. The data attribute information of the first data to be transmitted can include the first data attribute information and the second data attribute information. The second data attribute information can be used to represent the reading status of the data, and the reading status can include the status where the data cannot be read, the status where the data can be read, and the status where the data has been read.

[0064] Based on this, after writing the first data to be transmitted into the first region in the shared memory, the baseboard management controller (BMC) can update the second data attribute information of the data type corresponding to the first data to be transmitted, and update the reading status of the second data to be transmitted to the status where the data can be read.

[0065] For example, after the baseboard management controller (BMC) writes the first data to be transmitted of data type A into the first area in the shared memory, it can update the second data attribute information of data type A corresponding to the first data to be transmitted in the first area, which is used to indicate that the first data to be transmitted corresponding to data type A can be read.

[0066] Preferably, the baseboard management controller (BMC) can update the second data attribute information after all the data in other fields have been written. Here, other fields can be understood as other fields in the first area. After all the first data to be transmitted is written into the first area, the second data attribute information of the corresponding data type of the first data to be transmitted is updated.

[0067] In practical applications, the second data attribute information can be DataReady. When DataReady is 00, it means the data cannot be read (i.e., not ready to be read). When DataReady is 0X55, it means the data can be read (i.e., ready to be read). When DataReady is 0XAA, it means the data has been read.

[0068] In summary, by updating the second data attribute information of the first data to be transmitted, the reading status of the data can be judged according to the second data reading attribute information, so as to determine whether the data can be read and whether it has been read.

[0069] Moreover, the basic input / output system (BIOS) writes the second data to be transmitted determined during operation into the second area in the shared memory in response to the power-on startup instruction, including: the basic input / output system (BIOS) determines the second data to be transmitted during operation and the data type information of the second data to be transmitted in response to the power-on startup instruction, and writes the second data to be transmitted into the second area in the shared memory in sequence according to the preset writing order according to the data type information of the second data to be transmitted. Specifically, the process of the basic input / output system (BIOS) writing the second data to be transmitted into the second area is similar to the process of the above-mentioned baseboard management controller (BMC) writing the first data to be transmitted into the first area, and will not be repeated here.

[0070]

[0071]

[0072] Correspondingly, when writing the second data to be transmitted into the second area, the second data attribute information of the data can be updated after all the data in other fields have been written.

[0072] Moreover, after the Basic Input / Output System (BIOS) writes the second data to be transmitted into the second area, it can update the second data attribute information of the second data to be transmitted.

[0073] Among them, the data attribute information of the second data to be transmitted can be understood as the attribute information of the data type corresponding to the second data to be transmitted. The data attribute information of the second data to be transmitted can include first data attribute information and second data attribute information.

[0074] In an embodiment of this specification, to ensure the security of data transmission, the Basic Input / Output System (BIOS) can encrypt the second data to be transmitted and then write it into the second area. That is to say, the data area corresponding to each data type in the second area is encrypted. Specifically, the second data to be transmitted can be encrypted according to a preset encryption algorithm. The preset encryption algorithm can be, for example, the AES algorithm or the SM1 algorithm, etc. The embodiments of this specification do not limit this. The embodiments of this specification also do not limit the process of determining the encryption key, which can be specified by developers or determined according to other methods.

[0075] In practical applications, when the Basic Input / Output System (BIOS) starts, it can clear all the data in the second area and gradually write the second data to be transmitted into the second area during the startup process and the running process. That is to say, the second data to be transmitted also includes multiple data, and the data types of these data can be the same or different.

[0076] Specifically, after writing the second data to be transmitted into the second area in the shared memory in sequence according to the preset writing order, it further includes: the Basic Input / Output System (BIOS) determines the first data attribute information and the second data attribute information of the second data to be transmitted in the second area; when it is determined that the second data to be transmitted has been acquired according to the first data attribute information and the second data attribute information of the second data to be transmitted, the second data to be transmitted is deleted from the second area.

[0077] Among them, the data attribute information of the second data to be transmitted can include first data attribute information and second data attribute information. The first data attribute information can be used to represent the valid state of the data. The valid state can include the state where the data corresponding to this data type, the latest written data is valid, the state where the data corresponding to this data type, each written data is valid (that is, for each written data, it needs to be read in sequence), and the data corresponding to this data type is read Take the state where the second data attribute information does not need to be updated after retrieval, and the state where the second data attribute information needs to be updated after the data corresponding to this data type is retrieved.

[0078] In practical applications, the first data attribute information can be Attribute, and this Attribute includes BIT0 and BIT1. When BIT0 is 0, it indicates that only the most recently written data in the data corresponding to this data type is valid. For example, in the second area, for data type 1, the first time data a corresponding to data type 1 is written, the second time data b corresponding to data type 1 is written, and the third time data c corresponding to data type 1 is written. When BIT0 of data type 1 is 0, it means that in the data corresponding to data type 1, only the data c written for the third time (i.e., the most recent time) is valid. Therefore, data c can be retrieved. Then, when BIT0 of data type 1 is 1, it means that each piece of data written in the data corresponding to this data type is valid and needs to be retrieved in sequence. Continuing with the above example, when BIT0 of data type 1 is 1, the data a written for the first time, the data b written for the second time, and the data c written for the third time need to be retrieved in sequence. Then, when BIT1 of data type 1 is 0, it means that the second data attribute information (i.e., DataReady) does not need to be updated to 0XAA after the data is retrieved. When BIT1 is 1, it means that the second data attribute information (i.e., DataReady) needs to be updated to 0XAA after the data is retrieved.

[0079] Specifically, during the process of the basic input / output system BIOS writing the second data to be transmitted into the second area, in the case where it is determined that the memory of the second area is insufficient, the second data to be transmitted in the second area can be recycled. Specifically, during implementation, the first data attribute information BIT0 and the second data attribute information DataReady of the data type corresponding to the second data to be transmitted can be determined. When it is determined that BIT0 is 0 and DataReady is 0XAA, it indicates that the data has been retrieved, and at this time, the second data to be transmitted can be deleted from the second area.

[0080] It can be understood that the data attribute information of the first data to be transmitted and the second data to be transmitted both includes the first data attribute information and the second data attribute information. During the process of updating the second data attribute information of the first data to be transmitted and the second data attribute information of the second data to be transmitted, it is necessary to determine whether to update the second data attribute information of the first data to be transmitted according to the first data attribute information of the first data to be transmitted, and to determine whether to update the second data attribute information of the second data to be transmitted according to the first data attribute information of the second data to be transmitted. For example, when the first data attribute information BIT1 is 0, it means that the second data attribute information DataReady does not need to be updated after obtaining the data; when the first data attribute information BIT1 is 1, it means that the second data attribute information DataReady needs to be updated after obtaining the data.

[0081] In practical applications, the data type can be understood as Type. Different data types correspond to different application scenarios. The data attribute information of each data type can include Attribute (the attribute used to determine whether the data is valid), DataReady (the attribute used to determine whether the data can be read), version number, length, address information, UUID, etc.

[0082] Step 204: The basic input / output system BIOS obtains the first data to be transmitted from the first area in response to the acquisition instruction for the first data to be transmitted, and the baseboard management controller BMC obtains the second data to be transmitted from the second area according to the preset acquisition rule.

[0083] Among them, the acquisition instruction for the first data to be transmitted can be understood as the instruction that needs to obtain data during the startup and operation of the basic input / output system BIOS. For example, when the basic input / output system BIOS needs to use the hardware information of a certain hardware during the initialization process of the hardware, at this time, the basic input / output system BIOS can obtain the hardware information (i.e., the first data to be transmitted) from the first area.

[0084] During specific implementation, the basic input / output system BIOS obtains the first data to be transmitted from the first area in response to an acquisition instruction for the first data to be transmitted, including: the basic input / output system BIOS determines the second data attribute information of the first data to be transmitted in response to the acquisition instruction for the first data to be transmitted; in the case where it is determined that the writing of the first data to be transmitted into the first area is completed according to the second data attribute information, the first area is traversed to obtain the first data to be transmitted from the first area.

[0085] Specifically, after the baseboard management controller BMC writes the first data to be transmitted into the first area, it will update the second data attribute information of the data type corresponding to the first data to be transmitted. Based on this, the basic input / output system BIOS can determine whether the writing of the first data to be transmitted of this data type into the first area is completed according to the second data attribute information of the data type corresponding to the first data to be transmitted. If so, the first area is traversed to obtain the first data to be transmitted from the first area. If not, the traversal ends.

[0086] In practical applications, when determining the second data attribute information, that is, when DataReady is 0, it means that the data cannot be read, that is to say, it means that the end of the data area or the latest piece of data is still being written and not written yet. At this time, the traversal of the first area ends.

[0087] In summary, by judging whether the first data to be transmitted has been written and completed according to the second data attribute information, the integrity and real-time nature of the data obtained by the basic input / output system BIOS are ensured.

[0088] In an embodiment of this specification, the preset acquisition rule can be understood as a preset time interval. Correspondingly, the baseboard management controller BMC obtains the second data to be transmitted from the second area according to the preset acquisition rule, including: the baseboard management controller BMC polls the second area according to the preset time interval to obtain the second data to be transmitted from the second area.

[0089] Specifically, the baseboard management controller BMC can perform a polling operation according to the preset time interval to obtain the second data to be transmitted from the second area.

[0090] Among them, the preset time interval can be understood as the interval time for the baseboard management controller BMC to perform the polling operation. It can be determined according to actual requirements. In practical applications, the preset time interval can be, for example, 100 milliseconds.

[0091] In summary, the Baseboard Management Controller (BMC) reads data through polling operations, enabling the Basic Input / Output System (BIOS) to write the second data to be transmitted to the second area without waiting for the feedback from the BMC, thus achieving asynchronous communication between the BMC and the BIOS.

[0092] In specific implementation, when the BMC obtains the second data to be transmitted, it can determine whether to continue obtaining the second data to be transmitted according to the second data attribute information of the data type corresponding to the second data to be transmitted. For example, when the second data attribute information (i.e., DataReady) of the data type corresponding to the second data to be transmitted is 0, it indicates that the data of this data type cannot be read, which means the traversal of the end of this data area should end, or it indicates that the latest written second data to be transmitted is still being written, and the traversal of the second area should end.

[0093] Moreover, when the BMC obtains the second data to be transmitted, it can obtain it according to the data type information and the first data attribute information of the second data to be transmitted. Specifically, it can traverse all data types in the second area. When it is determined that there is a second data to be transmitted of the same data type, and when the first data attribute information BIT0 of this data type is 0, it can read the latest written second data to be transmitted. For example, in the second area, there are data m and data n corresponding to data type 2. Data m is the data written by the BIOS for the first time, and data n is the data written by the BIOS for the second time. Then, when the BMC traverses the data types in the second area, it will traverse two duplicate data types 2, which correspond to data m and data n. At this time, when the first data attribute information BIT0 of this data type 2 is 0, the second (i.e., the latest) written data n can be obtained. Correspondingly, when the first data attribute information BIT0 of this data type 2 is 1, it can obtain each written data, that is, obtain data m and data n.

[0094] It can be understood that the order of writing of this data can be judged according to the data attribute information of the second data to be transmitted, so as to determine the latest written data.

[0095] In addition, after the BMC finishes traversing all data types in the second area and obtaining the corresponding data, the next traversal can start from the starting address of the idle position, thereby reducing the burden of traversal.

[0096] In practical applications, the basic input / output system BIOS obtains the first data to be transmitted from the first area in response to an acquisition instruction for the first data to be transmitted, including: the basic input / output system BIOS traverses the first data attribute information of the first data to be transmitted in the first area in response to the acquisition instruction for the first data to be transmitted; and obtains the first data to be transmitted from the first area according to the first data attribute information of the first data to be transmitted.

[0097] Specifically, when the basic input / output system BIOS obtains the first data to be transmitted from the first area, it can be based on the first data attribute information corresponding to the first data to be transmitted to obtain the first data to be transmitted from the first area.

[0098] In specific implementation, before obtaining the first data to be transmitted from the first area according to the first data attribute information of the first data to be transmitted, it further includes: the basic input / output system BIOS determines the first target data to be transmitted with the same data type information from the first data to be transmitted according to the data type information of the first data to be transmitted; correspondingly, obtaining the first data to be transmitted from the first area according to the first data attribute information of the first data to be transmitted includes: determining the preset acquisition times of the first target data to be transmitted according to the first data attribute information of the first target data to be transmitted; and obtaining the first target data to be transmitted from the first area according to the preset acquisition times and the writing order of the first target data to be transmitted in the first area.

[0099] Among them, the preset acquisition times can be understood as the number of times the data can be acquired. It can be understood that for the first data to be transmitted, some data types of data can only be acquired once, and some data types of data can be acquired multiple times. Therefore, the corresponding data can be obtained from the first area according to the preset acquisition times of the first data to be transmitted. The writing order of the first target data to be transmitted in the first area can be understood as the above-mentioned preset writing order, which can represent the storage position of the first target data to be transmitted in the first area.

[0100] Based on this, the Basic Input / Output System (BIOS) can traverse the data types of the first data to be transmitted in the first region, determine the first target data to be transmitted with the same data type information from the first data to be transmitted according to the data type information of the first data to be transmitted, and determine the preset acquisition times of the first target data to be transmitted according to the first data attribute information of the data type corresponding to the first target data to be transmitted. When the preset acquisition times are multiple, the first target data to be transmitted can be sequentially acquired from the first region according to the writing order of the first target data to be transmitted in the first region; when the preset acquisition times are single, the data written last time is acquired from the first region.

[0101] For example, data a and data b corresponding to data type 1 and data c corresponding to data type 2 are stored in the first region. The Basic Input / Output System (BIOS) traverses the data types in the first region, determines that the first target data to be transmitted with the same data type, that is, both data type 1, are data a and data b, and determines the first data attribute information BIT0 of data type 1. When BIT0 is 0, it indicates that only the latest data in the data corresponding to data type 1 is valid. At this time, the latest written data b can be acquired. When BIT0 is 1, it indicates that all data in the data corresponding to data type 1 is valid. At this time, data a and data b can be sequentially acquired according to the writing order.

[0102] In practical applications, the Basic Input / Output System (BIOS) can traverse all data types in the first region. When multiple repeated data types are traversed, the first data attribute information BIT0 of the repeated data type can be determined. When BIT0 is 1, it indicates that the data corresponding to the repeated data type can be acquired multiple times. At this time, the data can be sequentially acquired in order. When BIT0 is 0, it indicates that the data corresponding to the repeated data type can only be acquired once. At this time, the latest written data can be acquired.

[0103] In summary, by determining which data to acquire according to the first data attribute information, the accuracy and integrity of the data acquired by the Basic Input / Output System (BIOS) are guaranteed, thus facilitating the subsequent startup and operation of the Basic Input / Output System (BIOS).

[0104] In addition, after the Basic Input / Output System (BIOS) obtains the first data to be transmitted from the first area in response to an acquisition instruction for the first data to be transmitted, the following steps are further included: the BIOS deletes the first data to be transmitted in the first area, determines target data in the first data to be transmitted according to the first data attribute information of the first data to be transmitted, and writes the target data into a backup area, where the backup area is set in the data processing device.

[0105] Among them, the target data can be understood as the important data in the first data to be transmitted.

[0106] In practical applications, the backup area can be the NVRAM area in the data processing device. The data with the first data attribute information BITO being 0 can be determined as the target data.

[0107] Based on this, after the BIOS obtains the first data to be transmitted from the first area, it can delete the first data to be transmitted in the first area, determine the first data to be transmitted under the data type with BIT0 being 0 as the target data according to the first data attribute information BITO of the data type corresponding to the first data to be transmitted, and write the target data into the backup area.

[0108] Moreover, in practical applications, the BIOS can clear all the data in the first area after obtaining the first data to be transmitted from the first area before entering the OS stage.

[0109] In summary, by backing up the target data, it is convenient for subsequent startup and operation of the BIOS. When the data processing device restarts and cannot obtain data from the shared memory, the target data can be obtained from the backup area.

[0110] In practical applications, after writing the target data into the backup area, the following steps are further included: the BIOS obtains the target data from the backup area in response to a power-off restart instruction of the data processing device.

[0111] Among them, the power-off restart instruction can be understood as an instruction for the data processing device to restart due to power-off. The power-off restart instruction can be, for example, a DC power-on instruction or a restart instruction.

[0112] Based on this, in response to an instruction for the data processing device to restart due to power-off, when the BIOS cannot obtain data from the shared memory, it can obtain the target data from the backup area.

[0113] In addition, in response to the power-down restart instruction, the Baseboard Management Controller (BMC) can prepare the first data to be transmitted before the Basic Input / Output System (BIOS) starts, and then no longer update it. The data that needs to be updated is updated to the internal memory of the BMC, and is uniformly written into the first area of the shared memory when the data processing device is powered on.

[0114] In specific implementation, before the BIOS obtains the target data from the backup area in response to the power-down restart instruction of the data processing device, it further includes: the BMC responds to the power-down restart instruction of the data processing device, determines the first data attribute information and the second data attribute information of the first data to be transmitted; and when it is determined that the first data to be transmitted meets the preset transmission conditions according to the first data attribute information and the second data attribute information, the first data to be transmitted is rewritten into the first area.

[0115] Among them, the acquisition completion flag can be used to indicate that the data has been acquired. The preset transmission conditions can be understood as the conditions for data that needs to be acquired once, cannot be not acquired or acquired multiple times and has not been acquired.

[0116] In practical applications, for some data types, the corresponding data must be acquired once, cannot be not acquired or acquired multiple times. For this part of the data, the first data attribute information BITO of the data type corresponding to this data is 1, which is used to indicate that the data under this data type will add an acquisition completion flag after being acquired. In the case where this part of the data has not been acquired and the data processing device has already restarted, the BMC may think that the BIOS has acquired this part of the data and thus no longer write this part of the data into the first area, which may cause the BIOS to be unable to acquire this part of the data during the next boot process. Based on this, in response to the power-down restart instruction of the data processing device, the BMC will traverse all data types in the first area. When it is determined that the first data attribute information BITO of a certain data type is 1 and the second data attribute information is not 0XAA, it indicates that the data corresponding to this data type is the data that needs to be acquired once but has not been acquired. At this time, the BMC can rewrite this data into the first area so that the BIOS can obtain this data from the first area.

[0117] In addition, the Basic Input / Output System (BIOS) is provided with an API interface, which can be used for communicating with the shared memory and backing up and retrieving data. In the case where the BIOS fails to retrieve data from the shared memory, the API interface can be called to back up and retrieve the data without additional processing by the project code. The project code can be used to call the API interface without having to concern itself with specific communication details, as well as information such as data backup and retrieval. The API interface can be implemented using communication functions.

[0118] In summary, the above method can ensure that both the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC) can access the shared memory, and the shared memory is divided into a first area and a second area. During the startup process of the data processing device, the BMC can write the first data to be transmitted (i.e., initialization data) to the first area, and the BIOS can write the second data to be transmitted to the BMC to the second area. Correspondingly, the BMC can retrieve the first data to be transmitted from the first area, and the BIOS can retrieve the second data to be transmitted from the second area, so that the communication from the BMC to the BIOS and the communication from the BIOS to the BMC do not affect each other. Moreover, by setting the first area and the second area in the shared memory, after the BIOS or the BMC writes the data to be transmitted to the shared memory, the BMC or the BIOS can retrieve the required data at the corresponding location in the shared memory without having to wait for the feedback instruction on whether the BMC or the BIOS has received the data, thus realizing the decoupling between the BIOS and the BMC, so that the communication between the BIOS and the BMC does not affect the operation and startup time of the BIOS, thereby ensuring that the startup time of the server is not affected. The following further describes the data processing method in combination with FIGS. 3a and 3b, taking the application of the data processing method provided in this specification during the startup of a computing device as an example. FIGS. 3a and 3b show the flowchart of the processing procedure of a data processing method provided in an embodiment of this specification, which specifically includes the following steps.

[0119] The following further describes the data processing method in combination with FIGS. 3a and 3b, taking the application of the data processing method provided in this specification during the startup of a computing device as an example. FIGS. 3a and 3b show the flowchart of the processing procedure of a data processing method provided in an embodiment of this specification, which specifically includes the following steps.

[0120] Step 302: The Basic Input / Output System (BIOS) starts to execute in response to AC power-on.

[0121] Step 304: The Baseboard Management Controller (BMC) writes the first data to be transmitted (i.e., initialization data) to the first area in the shared memory (MMI0) in response to AC power-on.

[0122] Step 306: During the startup and operation of the Basic Input / Output System (BIOS), the first data to be transferred is consumed from the first area.

[0123] Step 308: When the BIOS finishes booting and enters the OS phase, the first data to be transferred in the first area is cleared.

[0124] Step 310: In response to a restart or DC power-on, the BIOS continues to execute Step 302.

[0125] Step 312: In response to AC power-on, the BIOS clears all the data in the second area of the shared memory.

[0126] Step 314: During the startup and operation of the BIOS, the second data to be transferred is gradually written into the second area of the shared memory.

[0127] Step 316: The Baseboard Management Controller (BMC) polls the second area of the shared memory at a preset time interval to obtain the second data to be transferred from the second area.

[0128] Step 318: In response to a restart or DC power-on, the BIOS continues to execute Step 312.

[0129] Among them, the steps from Step 302 to Step 310 shown in Figure 3a are the communication process from BMC to BIOS, and the steps from Step 312 to Step 318 shown in Figure 3b are the communication process from BIOS to BMC. Regardless of the step numbers, the two communication processes can occur simultaneously.

[0130] In summary, the above method sets a shared memory that can be accessed by both the Basic Input / Output System (BIOS) and the Baseboard Management Controller (BMC), and divides the shared memory into a first area and a second area. During the startup process of the data processing device, the BMC can write the first data to be transmitted to the BIOS into the first area, and the BIOS can write the second data to be transmitted to the BMC into the second area. Correspondingly, the BMC can obtain the first data to be transmitted from the first area, and the BIOS can obtain the second data to be transmitted from the second area, so that the communication from the BMC to the BIOS and the communication from the BIOS to the BMC do not affect each other. Moreover, by setting the first area and the second area in the shared memory, after the BIOS or the BMC writes the data to be transmitted into the shared memory, the BMC or the BIOS can obtain the required data at the corresponding position in the shared memory without waiting for the feedback instruction on whether the BMC or the BIOS has received the data, realizing the decoupling between the BIOS and the BMC, so that the communication between the BIOS and the BMC does not affect the operation and startup time of the BIOS, thus ensuring that the startup time of the server is not affected.

[0131] Corresponding to the above method embodiment, this specification also provides a data processing device embodiment. FIG. 4 shows a schematic structural diagram of a data processing device provided by an embodiment of this specification. As shown in FIG. 4, the device includes a Basic Input / Output System (BIOS) 402 and a Baseboard Management Controller (BMC) 404. Among them, the Baseboard Management Controller (BMC) 404 is configured to write the first data to be transmitted in the cache into the first area of the shared memory in response to the power-on startup instruction of the data processing device; the Basic Input / Output System (BIOS) 402 is configured to write the second data to be transmitted determined during operation into the second area of the shared memory in response to the power-on startup instruction; the Basic Input / Output System (BIOS) 402 is further configured to obtain the first data to be transmitted from the first area in response to the acquisition instruction for the first data to be transmitted; the Baseboard Management Controller (BMC) 404 is further configured to obtain the second data to be transmitted from the second area according to a preset acquisition rule.

[0132] In summary, the above device can access the shared memory by both the basic input / output system (BIOS) and the baseboard management controller (BMC). The shared memory is divided into a first area and a second area. During the startup process of the data processing device, the BMC can write the first data to be transmitted to the BIOS into the first area, and the BIOS can write the second data to be transmitted to the BMC into the second area. Correspondingly, the BMC can obtain the first data to be transmitted from the first area, and the BIOS can obtain the second data to be transmitted from the second area, so that the communication from the BMC to the BIOS and the communication from the BIOS to the BMC do not affect each other. Moreover, by setting the first area and the second area in the shared memory, after the BIOS or the BMC writes the data to be transmitted into the shared memory, the BMC or the BIOS can obtain the required data at the corresponding position in the shared memory without waiting for the feedback instruction on whether the BMC or the BIOS has received the data, realizing the decoupling between the BIOS and the BMC, so that the communication between the BIOS and the BMC does not affect the operation and startup time of the BIOS, thus ensuring that the startup time of the server is not affected.

[0133] The above is a schematic solution of a data processing device according to this embodiment. It should be noted that the technical solution of this data processing device and the technical solution of the above data processing method belong to the same concept. For the details not described in the technical solution of the data processing device, reference can be made to the description of the technical solution of the above data processing method.

[0134] The above describes specific embodiments of this specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims can be performed in a different order than in the embodiments and still achieve the desired result. Additionally, the processes depicted in the figures do not necessarily require the specific order or sequential order shown to achieve the desired result. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0135] It should be noted that for the foregoing method embodiments, for the sake of simplicity of description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of this specification are not limited by the described action sequence, because according to the embodiments of this specification, certain steps can be performed in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to the embodiments of this specification.

[0136] In the above embodiments, the descriptions of the respective embodiments each have their own emphases. For parts not detailed in a certain embodiment, reference may be made to the relevant descriptions of other embodiments.

[0137] The preferred embodiments of the present specification disclosed above are only used to help explain the present specification. The alternative embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and variations can be made according to the content of the embodiments of the present specification. These embodiments are selected and specifically described in the present specification in order to better explain the principles and practical applications of the embodiments of the present specification, so that those skilled in the art can well understand and utilize the present specification. The present specification is only limited by the claims and their full scope and equivalents.

Claims

Claims 1. A data processing method, applied to a data processing device, the data processing device including a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC), wherein, The Baseboard Management Controller (BMC) writes the first data to be transmitted in the cache into the first area of the shared memory in response to the power-on startup instruction of the data processing device, and the Basic Input / Output System (BIOS) writes the second data to be transmitted determined during operation into the second area of the shared memory in response to the power-on startup instruction; the Basic Input / Output System (BIOS) obtains the first data to be transmitted from the first area in response to the acquisition instruction for the first data to be transmitted, and the Baseboard Management Controller (BMC) obtains the second data to be transmitted from the second area according to a preset acquisition rule.

2. The data processing method according to claim 1, wherein The Baseboard Management Controller (BMC) obtains the second data to be transmitted from the second area according to a preset acquisition rule, including: the Baseboard Management Controller (BMC) polls the second area at a preset time interval to obtain the second data to be transmitted from the second area.

3. The data processing method according to claim 1, wherein, After the Basic Input / Output System (BIOS) obtains the first data to be transmitted from the first area in response to the acquisition instruction for the first data to be transmitted, it further includes: the Basic Input / Output System (BIOS) determines target data in the first data to be transmitted according to the first data attribute information of the first data to be transmitted, writes the target data into the backup area, and deletes the first data to be transmitted in the first area, where the backup area is set in the data processing device.

4. The data processing method according to claim 3, wherein, After writing the target data into the backup area, it further includes: the Basic Input / Output System (BIOS) obtains the target data from the backup area in response to the power-off and restart instruction of the data processing device.

5. The data processing method according to claim 4, wherein, Before the Basic Input / Output System (BIOS) obtains the target data from the backup area in response to the power-off and restart instruction of the data processing device, it further includes: the Baseboard Management Controller (BMC) determines the first data attribute information and the second data attribute information of the first data to be transmitted in response to the power-off and restart instruction of the data processing device; when it is determined that the first data to be transmitted meets the preset transmission conditions according to the first data attribute information and the second data attribute information, the first data to be transmitted is rewritten into the first area.

6. The data processing method according to claim 1, wherein The Baseboard Management Controller (BMC) responds to The power-on startup instruction of the data processing device writes the first data to be transmitted in the cache into the first area of the shared memory, including: the baseboard management controller (BMC) responds to the power-on startup instruction of the data processing device, obtains the first data to be transmitted from the cache, and determines the data type information of the first data to be transmitted, where the cache is set in the baseboard management controller (BMC); according to the data type information of the first data to be transmitted, the first data to be transmitted is written into the first area of the shared memory in a preset writing order.

7. The data processing method according to claim 6, wherein After writing the first data to be transmitted into the first area of the shared memory in the preset writing order, it further includes: the baseboard management controller (BMC) updates the second data attribute information of the first data to be transmitted; correspondingly, the basic input / output system (BIOS) responds to the acquisition instruction for the first data to be transmitted, and obtains the first data to be transmitted from the first area, including: the basic input / output system (BIOS) responds to the acquisition instruction for the first data to be transmitted, determines the second data attribute information of the first data to be transmitted; in the case that it is determined that the writing of the first data to be transmitted into the first area is completed according to the second data attribute information, traverse the first area to obtain the first data to be transmitted from the first area.

8. The data processing method according to claim 1, wherein The basic input / output system (BIOS) responds to the acquisition instruction for the first data to be transmitted and obtains the first data to be transmitted from the first area, including: the basic input / output system (BIOS) responds to the acquisition instruction for the first data to be transmitted, traverses the first data attribute information of the first data to be transmitted in the first area; according to the first data attribute information of the first data to be transmitted, obtains the first data to be transmitted from the first area.

9. The data processing method according to claim 8, wherein, Before obtaining the first data to be transmitted from the first area according to the first data attribute information of the first data to be transmitted, it further includes: the basic input / output system (BIOS) determines the first target data to be transmitted with the same data type information from the first data to be transmitted according to the data type information of the first data to be transmitted; correspondingly, obtaining the first data to be transmitted from the first area according to the first data attribute information of the first data to be transmitted includes: determining the preset acquisition times of the first target data to be transmitted according to the first data attribute information of the first target data to be transmitted. Obtain the first target data to be transmitted from the first area according to the preset acquisition times and the writing order of the first target data to be transmitted in the first area.

10. The data processing method according to claim 1, wherein, The Basic Input / Output System (BIOS) responds to the power-on startup instruction and writes the second data to be transmitted determined during operation into the second area of the shared memory, including: The BIOS responds to the power-on startup instruction, determines the second data to be transmitted during operation and the data type information of the second data to be transmitted, and according to the data type information of the second data to be transmitted, writes the second data to be transmitted into the second area of the shared memory in sequence according to a preset writing order.

11. The data processing method according to claim 10, wherein, After writing the second data to be transmitted into the second area of the shared memory in sequence according to the preset writing order, it further includes: The BIOS determines the first data attribute information and the second data attribute information of the second data to be transmitted in the second area; when it is determined that the second data to be transmitted has been acquired according to the first data attribute information and the second data attribute information of the second data to be transmitted, the second data to be transmitted is deleted from the second area.

12. The data processing method according to claim 1, wherein, The first data to be transmitted includes the device startup parameters of the data processing device, and the second data to be transmitted includes the device operation parameters of the data processing device.

13. A data processing device includes a Basic Input / Output System (BIOS) and a Baseboard Management Controller (BMC). Among them, the BMC is configured to respond to the power-on startup instruction of the data processing device and write the first data to be transmitted in the cache into the first area of the shared memory; the BIOS is configured to respond to the power-on startup instruction and write the second data to be transmitted determined during operation into the second area of the shared memory; the BIOS is further configured to respond to the acquisition instruction for the first data to be transmitted and acquire the first data to be transmitted from the first area; the BMC is further configured to acquire the second data to be transmitted from the second area according to a preset acquisition rule.

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