Display substrate and display

Abstract

A display substrate and a display. The display substrate is provided with a display area, wherein the display area comprises pixel openings. The display substrate comprises: a base, and a plurality of sub-pixels and a first signal line (10), which are arranged on the base, wherein at least one sub-pixel comprises a pixel driving circuit and a light-emitting device; the light-emitting device comprises a first electrode (20), a light-emitting layer at least partially arranged in a pixel opening, and a second electrode; the pixel driving circuit in the at least one sub-pixel is electrically connected to the first electrode of the light-emitting device, the first signal line is electrically connected to the second electrode of the light-emitting device or is electrically connected to the pixel driving circuit, and the first electrode comprises a main body portion and a connecting portion; and the first signal line (10) is at least partially located in the display area (100) and is of a mesh structure, and the orthographic projection of the main body portion of the first electrode (20) of the at least one light-emitting device on the base does not have an overlapping region with the orthographic projection of the first signal line (10) on the base.

Description

Display substrate and display device Technical Field

[0001] This disclosure relates to, but is not limited to, the display field, and specifically to a display substrate and a display device. Background Technology

[0002] Organic light-emitting diodes (OLEDs) and quantum dot light-emitting diodes (QLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, extremely high response speed, thinness, flexibility, and low cost. With the continuous development of display technology, flexible displays using OLEDs or QLEDs as light-emitting devices and controlled by thin-film transistors (TFTs) have become the mainstream products in the display field.

[0003] Summary of the Invention

[0004] The following is an overview of the subject matter described in detail in this disclosure. This overview is not intended to limit the scope of the claims.

[0005] In a first aspect, this disclosure provides a display substrate having a display area including a pixel opening. The display substrate includes a substrate and a plurality of sub-pixels and a first signal line disposed on the substrate. At least one sub-pixel includes a pixel driving circuit and a light-emitting device. The light-emitting device includes a first electrode, a light-emitting layer at least partially disposed in the pixel opening, and a second electrode. The pixel driving circuit in at least one sub-pixel is electrically connected to the first electrode of the light-emitting device. The first signal line is electrically connected to the second electrode of the light-emitting device or to the pixel driving circuit.

[0006] The first electrode includes a main body and a connecting part. The orthographic projection of the main body on the substrate overlaps with the orthographic projection of the pixel opening on the substrate. The connecting part is used to connect the main body and the corresponding pixel driving circuit.

[0007] The first signal line is at least partially located in the display area and has a mesh structure. The orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate does not overlap with the orthographic projection of the first signal line on the substrate.

[0008] In an exemplary embodiment, the first signal line includes: a plurality of closed regions, and a main body portion of a first electrode of at least one light-emitting device is orthogonally projected onto a substrate within a range of an orthogonal projection of at least one closed region onto the substrate.

[0009] In an exemplary embodiment, the first signal line includes: a plurality of main signal lines, the main signal lines at least partially extend along a first direction, and the plurality of main signal lines are arranged along a second direction, and the first direction and the second direction intersect;

[0010] A plurality of connection signal lines are provided between adjacent main signal lines, the connection signal lines at least partially extend along the second direction, and the plurality of connection signal lines located between adjacent main signal lines are arranged along the first direction;

[0011] At least one connection signal line among the plurality of connection signal lines located between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line and the (i + 1)-th main signal line, and an adjacent two connection signal lines located between the i-th main signal line and the (i + 1)-th main signal line form a first closed region with the i-th main signal line and the (i + 1)-th main signal line, 1 ≤ i < M, and M is the number of main signal lines included in the first signal line.

[0012] In an exemplary embodiment, a main body portion of a first electrode of at least one light-emitting device is orthogonally projected onto a substrate within a range of an orthogonal projection of at least one first closed region onto the substrate.

[0013] In an exemplary embodiment, a main body portion of a first electrode of at least one light-emitting device is at least partially overlapped with an orthogonal projection of at least one main signal line onto a substrate, and there is no overlapping region with an orthogonal projection of at least one connection signal line onto the substrate. H

[0014] In an exemplary embodiment, at least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to an adjacent second main structure;

[0015] A midline extending along the second direction of the j-th first main structure of the i-th main signal line coincides with a midline extending along the second direction of the j-th first main structure of the (i + 1)-th main signal line, and a midline extending along the second direction of the k-th second main structure of the i-th main signal line coincides with a midline extending along the second direction of the k-th second main structure of the (i + 1)-th main signal line; 1 ≤ j < N, N is the number of first main structures included in the main signal line, 1 ≤ k < K, and K is the number of second main structures included in the main signal line;

[0016] At least one connection signal line between the i-th main signal line and the (i+1)-th main signal line is connected to the first main structure of the i-th main signal line and the first main structure of the (i+1)-th main signal line, respectively.

[0017] In an exemplary embodiment, at least one connection signal line located between the i-th main signal line and the (i+1)-th main signal line and at least one connection signal line located between the (i+1)-th main signal line and the (i+2)-th main signal line are arranged along the second direction.

[0018] In an exemplary embodiment, at least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures being arranged alternately along the first direction, and the first main structure being interconnected with an adjacent second main structure;

[0019] The maximum length of the first main structure along the second direction is greater than the maximum length of the second main structure along the second direction;

[0020] At least one connecting signal line has a length along the second direction that is less than the distance between two second main structures extending along the second direction.

[0021] In an exemplary embodiment, at least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures being arranged alternately along the first direction, and the first main structure being interconnected with an adjacent second main structure;

[0022] The orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the first main structure onto the substrate, and there is no overlapping area between the orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate and the orthographic projection of the second main structure onto the substrate.

[0023] In an exemplary embodiment, at least one first main structure is a ring structure or a solid structure;

[0024] When at least one of the first main structures is a ring structure, the first main structure includes: a second closed region;

[0025] The orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the second enclosed region of the first main body structure onto the substrate.

[0026] In an exemplary embodiment, when at least one main structure is a ring structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is located within the range of the orthographic projection of the second closed region of the first main structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate overlaps with the orthographic projection portion of the first main structure on the substrate.

[0027] When at least one main structure is a solid structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is located within the range of the orthographic projection of the first main structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate.

[0028] In an exemplary embodiment, at least one second main structure includes: a first connecting structure and a second connecting structure, the first connecting structure and the second connecting structure extending along the first direction and arranged along the second direction, and at least one of the first connecting structure and the second connecting structure in the at least one second main structure is respectively connected to two first main structures connected to the second main structure;

[0029] At least one of the first and second connecting structures in the second main structure forms a third closed region between the first and second main structures connected to the second main structure;

[0030] There is no overlap between the orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate and the orthographic projection of at least one third closed region onto the substrate.

[0031] In an exemplary embodiment, the boundary of the first main structure is one of a polygon, a circle, or an ellipse.

[0032] In an exemplary embodiment, the light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device, wherein the first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color, wherein the area of ​​the first electrode of the first light-emitting device is smaller than the area of ​​the first electrode of the second light-emitting device, and the area of ​​the first electrode of the third light-emitting device is smaller than the area of ​​the first electrode of the first light-emitting device.

[0033] The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices;

[0034] The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are staggered, where 1 ≤ b < B and B is the total number of columns of the light-emitting devices;

[0035] The orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The region where the orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is located and the region where the orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is located are different first closed regions;

[0036] The orthographic projection of the main body portion of the first electrode of the third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and the first main structures that overlap with the orthographic projections of the main body portions of the first electrodes of different third light-emitting devices on the substrate are different first main structures.

[0037] In an exemplary embodiment, the midline along the first direction of the main body portion of the first electrode of at least one light-emitting device is the first midline, the midline along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second midline, the midline along the first direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the third midline, and the midline along the second direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the fourth midline;

[0038] The first midline coincides with the third midline, and the second midline coincides with the fourth midline.

[0039] In an exemplary embodiment, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate does not overlap with the orthographic projection of at least one main body signal line on the substrate, and the orthographic projection on the substrate at least partially overlaps with the orthographic projection of at least one connection signal line on the substrate.

[0040] In an exemplary embodiment, the main body signal line is a solid signal line, and the connection signal line includes: a first connection line, a second connection line, and a third connection line. The first connection line and the second connection line extend along a second direction, and the third connection line extends along a first direction;

[0041] The first connection line is electrically connected to one of the main body signal lines connected by the connection signal line and the third connection line respectively, and the second connection line is electrically connected to the other main body signal line connected by the connection signal line and the third connection line respectively;

[0042] The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connection line of at least one connection signal line on the substrate.

[0043] In an exemplary embodiment, the light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device;

[0044] The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; The light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, where 1 ≤ a < A, and A is the total number of rows of the light-emitting devices;

[0045] The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; The light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are staggered, where 1 ≤ b < B, and B is the total number of columns of the light-emitting devices;

[0046] The orthographic projections of the main body portion of the first electrode of at least one first light-emitting device, at least one second light-emitting device, and at least one third light-emitting device on the substrate do not overlap with the orthographic projections of at least one connecting signal line on the substrate; the orthographic projections of the connecting portion of the first electrode of at least one first light-emitting device and at least one second light-emitting device on the substrate do not overlap with the orthographic projections of the third connecting line of at least one connecting signal line on the substrate; and the orthographic projections of the connecting portion of the first electrode of at least one third light-emitting device on the substrate at least partially overlap with the orthographic projections of the third connecting line of at least one connecting signal line on the substrate.

[0047] In an exemplary embodiment, it further includes: a plurality of second signal lines disposed on the substrate, wherein the pixel driving circuit of the at least one sub-pixel is electrically connected to the second signal lines;

[0048] The second signal line is at least partially located in the display area and is disposed on a different layer from the first signal line, and the second signal line extends at least partially along the second direction;

[0049] At least a portion of the pixel driving circuits located in adjacent sub-pixels in the same row are symmetrically arranged with respect to the second center line, the second center line extends along the second direction, the second signal line connected to the pixel driving circuits located in adjacent sub-pixels in the same row is symmetrically arranged with respect to the second center line, and the center line of the main body portion of the first electrode of at least one light-emitting device extending along the second direction is the second center line.

[0050] In an exemplary embodiment, the first signal line includes one of a first initial signal line, a second initial signal line, a first power line, or a second power line;

[0051] The second signal line includes at least one of the following: a data signal line, a first initial signal line, a second initial signal line, a first power line, or a second power line;

[0052] The first signal line and the second signal line are different signal lines.

[0053] In an exemplary embodiment, the signal line further includes: a plurality of first anode connection electrodes and a plurality of second anode connection electrodes disposed on the substrate and located in the display area, wherein the first signal line includes: at least one first closed region;

[0054] The first anode connecting electrode and the second anode connecting electrode are respectively connected to the connecting portion of the first electrode of the light-emitting device to which the pixel driving circuit is located and the first electrode of the light-emitting device to which the pixel driving circuit is located.

[0055] Multiple first anode connecting electrodes correspond one-to-one with multiple second anode connecting electrodes. The orthographic projection of the first anode connecting electrode on the substrate at least partially overlaps with the orthographic projection of the corresponding second anode connecting electrode on the substrate, and is electrically connected to the corresponding second anode connecting electrode.

[0056] The orthographic projections of at least one first anode connecting electrode and at least one second anode connecting electrode on the substrate are located within the orthographic projection range of at least one first closed region on the substrate.

[0057] In an exemplary embodiment, when the second signal line includes a first power line, the first power line connected to the sub-pixel is the same power line as the first power line connected to one of the adjacent sub-pixels, and the first power line includes: a fourth closed region;

[0058] The orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the first power line onto the substrate;

[0059] The orthographic projections of at least one first anode connecting electrode and at least one second anode connecting electrode onto the substrate are located within the range of the orthographic projection of at least one fourth closed region onto the substrate;

[0060] The orthographic projection of at least one fourth closed region on the substrate at least partially overlaps with the orthographic projection of at least one connecting signal line on the substrate.

[0061] In an exemplary embodiment, the first signal line includes: a main signal line, which includes: a plurality of first main structures;

[0062] The orthographic projection of at least one first power line on the substrate at least partially overlaps with the orthographic projection of at least one first main structure on the substrate.

[0063] In an exemplary embodiment, the display substrate includes: a driving structure layer and a light-emitting structure layer sequentially stacked on the substrate, wherein the light-emitting device is located in the light-emitting structure layer; the pixel driving circuit includes: at least one transistor;

[0064] The driving structure layer includes: a first conductive layer, a second conductive layer, and a third conductive layer;

[0065] The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit;

[0066] The second conductive layer includes: a second signal line and a second anode connection electrode;

[0067] The third conductive layer includes: a first signal line and a first anode connection electrode.

[0068] In an exemplary embodiment, the first conductive layer is located on the side of at least one of the second and third conductive layers near the substrate;

[0069] The third conductive layer is located on the side of the second conductive layer closer to the substrate, or the third conductive layer is located on the side of the second conductive layer farther from the substrate.

[0070] In an exemplary embodiment, it further includes: an optical structure layer, the optical structure layer comprising: a plurality of filters and a black matrix structure;

[0071] The optical structure layer is located on the side of the light-emitting structure layer away from the substrate;

[0072] The orthographic projection of at least one filter onto the substrate at least partially overlaps with the orthographic projection of at least one pixel opening onto the substrate.

[0073] Secondly, this disclosure also provides a display device, including: the aforementioned display substrate.

[0074] In an exemplary embodiment, the first signal line in the display substrate includes a third enclosed region, which is a light-transmitting region;

[0075] The display device further includes: multiple photosensitive devices;

[0076] The orthographic projection of at least one photosensitive device on the substrate at least partially overlaps with the orthographic projection of at least one third enclosed region on the substrate.

[0077] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood.

[0078] Overview of the attached figures

[0079] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0080] Figure 1 is a schematic diagram of a display device;

[0081] Figure 2 is a schematic diagram of the equivalent circuit of a pixel driving circuit;

[0082] Figure 3 is a timing diagram of a pixel driving circuit.

[0083] Figure 4 is a schematic diagram of the planar structure of the display substrate;

[0084] Figure 5A is a schematic diagram of the structure of a display substrate provided in an embodiment of this disclosure;

[0085] Figure 5B is a schematic diagram of the structure of the first signal line in the display substrate provided in Figure 5A;

[0086] Figure 6A is a second schematic diagram of the structure of the display substrate provided in an embodiment of this disclosure;

[0087] Figure 6B is a schematic diagram of the structure of the first signal line in the display substrate provided in Figure 6A;

[0088] Figure 7A is a schematic diagram of the structure of the display substrate provided in the embodiment of this disclosure;

[0089] Figure 7B is a schematic diagram of the structure of the first signal line in the display substrate provided in Figure 7A;

[0090] Figure 8A is a schematic diagram of the structure of the display substrate provided in an embodiment of this disclosure;

[0091] Figure 8B is a schematic diagram of the structure of the first signal line in the display substrate provided in Figure 8A;

[0092] Figure 9A is a schematic diagram of the structure of the display substrate provided in the embodiment of this disclosure;

[0093] Figure 9B is a schematic diagram of the structure of the first signal line in the display substrate provided in Figure 9A;

[0094] Figure 10 is a schematic diagram of some film layers of the display substrate;

[0095] Figure 11 is a schematic diagram of some film layers of the display substrate (II);

[0096] Figure 12 is a schematic diagram of part of the film layers of the display substrate;

[0097] Figure 13 is a schematic diagram of part of the film layer of the display substrate.

[0098] Detailed Explanation

[0099] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. Note that the implementation methods can be carried out in many different forms. Those skilled in the art will readily understand that the methods and content can be transformed into various forms without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be construed as limited to the content described in the following embodiments. Without conflict, the embodiments and features in the embodiments of this disclosure can be arbitrarily combined with each other. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of some known functions and components have been omitted. The accompanying drawings of the embodiments of this disclosure only relate to the structures involved in the embodiments of this disclosure; other structures can be referred to with reference to general designs.

[0100] The scale of the figures in this disclosure can be used as a reference in actual manufacturing processes, but is not limited thereto. For example, the aspect ratio of the channel, the thickness and spacing of each film layer, and the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the quantities shown in the figures. The figures described in this disclosure are merely structural schematic diagrams, and one aspect of this disclosure is not limited to the shapes or values ​​shown in the figures.

[0101] The ordinal numbers “first,” “second,” and “third” used in this specification are used to avoid confusion among the constituent elements, not to limit their quantity.

[0102] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of each constituent element being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.

[0103] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the specific meaning of these terms in this disclosure based on the specific circumstances.

[0104] In this specification, a transistor is a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to the region through which current primarily flows.

[0105] In this specification, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. In cases where transistors with opposite polarities are used or the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" may sometimes be interchanged. Therefore, in this specification, the "source electrode" and "drain electrode" can be interchanged.

[0106] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0107] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.

[0108] In this specification, the terms "film" and "layer" may be interchanged. For example, "conductive layer" may sometimes be replaced with "conductive film." Similarly, "insulating film" may sometimes be replaced with "insulating layer."

[0109] In this specification, the term "same-layer arrangement" refers to a structure formed by patterning two (or more) structures through the same patterning process, and their materials may be the same or different. For example, the precursors forming multiple structures in a same-layer arrangement may be made of the same material, while the final materials may be the same or different.

[0110] In this specification, triangles, rectangles, trapezoids, pentagons, or hexagons are not strictly defined; they can be approximate triangles, rectangles, trapezoids, pentagons, or hexagons. Small deformations due to tolerances are possible, as are chamfers, curved edges, and other variations.

[0111] In this disclosure, “about” means a value that is not strictly limited and allows for process and measurement errors.

[0112] Figure 1 is a schematic diagram of a display device. As shown in Figure 1, the display device may include a timing controller, a data driver, a scan driver, a light-emitting driver, and a pixel array. The timing controller is connected to the data driver, the scan driver, and the light-emitting driver. The data driver is connected to multiple data signal lines (D1 to Dn), the scan driver is connected to multiple scan signal lines (S1 to Sm), and the light-emitting driver is connected to multiple light-emitting signal lines (E1 to Eo). The pixel array may include multiple sub-pixels Pxij, where i and j can be natural numbers. At least one sub-pixel Pxij may include a circuit unit and a light-emitting device connected to the circuit unit. The circuit unit may include a pixel driving circuit, which may be connected to the scan signal lines, the light-emitting signal lines, and the data signal lines, respectively.

[0113] In an exemplary embodiment, the timing controller can provide grayscale values ​​and control signals of specifications suitable for the data driver to the data driver, clock signals, scan start signals, etc. of specifications suitable for the scan driver to the scan driver, and clock signals, transmit stop signals, etc. of specifications suitable for the light-emitting driver to the light-emitting driver. The data driver can use the grayscale values ​​and control signals received from the timing controller to generate data voltages to be provided to data signal lines D1, D2, D3, ..., Dn. For example, the data driver can sample grayscale values ​​using a clock signal and apply data voltages corresponding to the grayscale values ​​to data signal lines D1 to Dn on a pixel-row basis, where n can be a natural number. The scan driver can generate scan signals to be provided to scan signal lines S1, S2, S3, ..., Sm by receiving clock signals, scan start signals, etc. from the timing controller. For example, the scan driver can sequentially provide scan signals with on-level pulses to scan signal lines S1 to Sm. For example, a scan driver can be configured as a shift register and can generate scan signals by sequentially transmitting scan start signals, provided in the form of on-level pulses, to the next stage circuit under the control of a clock signal, where m can be a natural number. An LED driver can generate transmit signals to be provided to the LED signal lines EM1, E2, E3, ..., Eo by receiving clock signals, transmit stop signals, etc., from a timing controller. For example, the LED driver can sequentially provide transmit signals with cutoff level pulses to the LED signal lines EM1 to Eo. For example, the LED driver can be configured as a shift register and can generate transmit signals by sequentially transmitting transmit stop signals, provided in the form of cutoff level pulses, to the next stage circuit under the control of a clock signal, where o can be a natural number.

[0114] At least one sub-pixel includes a pixel driving circuit and a light-emitting device. The pixel driving circuit in the sub-pixel is connected to a scan signal line, a data signal line, and a light-emitting signal line, respectively. The pixel driving circuit is configured to receive the data voltage transmitted by the data signal line and output a corresponding current to the light-emitting device under the control of the scan signal line and the light-emitting signal line. The light-emitting device in the sub-pixel is connected to the pixel driving circuit of its respective sub-pixel, and the light-emitting device is configured to emit light of a corresponding brightness in response to the current output by the pixel driving circuit of its respective sub-pixel.

[0115] Figure 2 is an equivalent circuit diagram of a pixel driving circuit. In an exemplary embodiment, the pixel driving circuit can be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C, or 8T1C structure. As shown in Figure 4, the pixel driving circuit can include seven transistors (first transistor T1 to seventh transistor T7), one capacitor C, and can be connected to eight signal lines (data signal line Data, scan signal line Gate, reset signal line Reset, light emission signal line EM, first initial signal line INIT1, second initial signal line INIT2, first power supply line VDD, and second power supply line VSS).

[0116] In an exemplary embodiment, the pixel driving circuit may include a first node N1, a second node N2, and a third node N3. The first node N1 is connected to the first terminal of the third transistor T3, the second terminal of the fourth transistor T4, and the second terminal of the fifth transistor T5, respectively. The second node N2 is connected to the second terminal of the first transistor T1, the first terminal of the second transistor T2, the control terminal of the third transistor T3, and the second terminal of the capacitor C, respectively. The third node N3 is connected to the second terminal of the second transistor T2, the second terminal of the third transistor T3, and the first terminal of the sixth transistor T6, respectively.

[0117] In an exemplary embodiment, the first end of capacitor C is connected to the first power line VDD, and the second end of capacitor C is connected to the second node N2, that is, the second end of capacitor C is connected to the control electrode of the third transistor T3.

[0118] The control electrode of the first transistor T1 is connected to the reset signal line Reset, the first electrode of the first transistor T1 is connected to the first initial signal line INIT1, and the second electrode of the first transistor is connected to the second node N2. When the on-level scan signal is applied to the reset signal line Reset, the first transistor T1 transmits the initialization voltage to the control electrode of the third transistor T3 to initialize the charge of the control electrode of the third transistor T3.

[0119] The control electrode of the second transistor T2 is connected to the scan signal line Gate, the first electrode of the second transistor T2 is connected to the second node N2, and the second electrode of the second transistor T2 is connected to the third node N3. When a conduction-level scan signal is applied to the scan signal line Gate, the second transistor T2 causes the control electrode of the third transistor T3 to connect to its second electrode.

[0120] The control electrode of the third transistor T3 is connected to the second node N2, meaning the control electrode of the third transistor T3 is connected to the second terminal of capacitor C. The first electrode of the third transistor T3 is connected to the first node N1, and the second electrode of the third transistor T3 is connected to the third node N3. The third transistor T3 can be called the driving transistor. The third transistor T3 determines the magnitude of the driving current flowing between the first power line VDD and the second power line VSS based on the potential difference between its control electrode and its first electrode.

[0121] The control electrode of the fourth transistor T4 is connected to the scan signal line Gate, the first electrode of the fourth transistor T4 is connected to the data signal line Data, and the second electrode of the fourth transistor T4 is connected to the first node N1. The fourth transistor T4 can be called a switching transistor, scan transistor, etc. When a conduction-level scan signal is applied to the scan signal line Gate, the fourth transistor T4 causes the data voltage of the data signal line Data to be input to the pixel driving circuit.

[0122] The control electrode of the fifth transistor T5 is connected to the light-emitting signal line EM, the first electrode of the fifth transistor T5 is connected to the first power supply line VDD, and the second electrode of the fifth transistor T5 is connected to the first node N1. The control electrode of the sixth transistor T6 is connected to the light-emitting signal line EM, the first electrode of the sixth transistor T6 is connected to the third node N3, and the second electrode of the sixth transistor T6 is connected to the first electrode of the light-emitting device. The fifth transistor T5 and the sixth transistor T6 can be referred to as light-emitting transistors. When a conduction-level light-emitting signal is applied to the light-emitting signal line EM, the fifth transistor T5 and the sixth transistor T6 cause the light-emitting device to emit light by forming a driving current path between the first power supply line VDD and the second power supply line VSS.

[0123] The control terminal of the seventh transistor T7 is connected to either the scan signal line Gate or the reset signal line Reset. The first terminal of the seventh transistor T7 is connected to the second initial signal line INIT2, and the second terminal of the seventh transistor T7 is connected to the first terminal of the light-emitting device L. When a conduction-level scan signal is applied to either the scan signal line Gate or the reset signal line Reset, the seventh transistor T7 transmits an initialization voltage to the first terminal of the light-emitting device, thereby initializing or releasing the accumulated charge in the first terminal of the light-emitting device.

[0124] In an exemplary embodiment, the second electrode of the light-emitting device is connected to the second power line VSS, where the signal of the second power line VSS is a low-level signal, and the signal of the first power line VDD is a continuously high-level signal. The scan signal line Gate is the scan signal line in the pixel driving circuit of this display row, and the reset signal line Reset is the scan signal line in the pixel driving circuit of the previous display row. The reset signal line Reset of this display row and the scan signal line Gate of the previous display row pixel driving circuit are the same signal line, which can reduce the number of signal lines on the display substrate and achieve a narrow bezel on the display substrate.

[0125] Based on their characteristics, transistors can be classified into N-type transistors and P-type transistors. When a transistor is P-type, its turn-on voltage is a low-level voltage (e.g., 0V, -5V, -10V, or other suitable voltage), and its turn-off voltage is a high-level voltage (e.g., 5V, 10V, or other suitable voltage). When a transistor is N-type, its turn-on voltage is a high-level voltage (e.g., 5V, 10V, or other suitable voltage), and its turn-off voltage is a low-level voltage (e.g., 0V, -5V, -10V, or other suitable voltage).

[0126] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 can be either P-type transistors or N-type transistors. Using the same type of transistor in the pixel driving circuit can simplify the process flow, reduce the manufacturing difficulty of the display panel, and improve the product yield. In some possible implementations, the first transistor T1 to the seventh transistor T7 may include both P-type and N-type transistors.

[0127] In an exemplary embodiment, the first transistor T1 to the seventh transistor T7 can be a low-temperature polycrystalline silicon (LTPS) thin-film transistor, or an oxide thin-film transistor, or a combination of both. The active layer of the LTPS is made of low-temperature polycrystalline silicon, while the active layer of the oxide thin-film transistor is made of oxide. LTPS transistors have advantages such as high mobility and fast charging, while oxide thin-film transistors have advantages such as low leakage current. Integrating LTPS and oxide thin-film transistors onto a single display substrate to form a low-temperature polycrystalline oxide (LTPO) display substrate leverages the advantages of both, enabling low-frequency driving, reducing power consumption, and improving display quality.

[0128] In an exemplary embodiment, the scan signal line Gate, the reset signal line Reset, and the light emission signal line EM can extend in a horizontal direction.

[0129] In an exemplary embodiment, the light-emitting device L may be an organic light-emitting diode (OLED), including a first electrode (anode), an organic light-emitting layer, and a second electrode (cathode) stacked together.

[0130] In an exemplary embodiment, the organic light-emitting layer may include an emissive layer (EML) and one or more of the following: a hole injection layer (HIL), a hole transport layer (HTL), an electron blocking layer (EBL), a hole blocking layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). In an exemplary embodiment, one or more of the hole injection layer, hole transport layer, electron blocking layer, hole blocking layer, electron transport layer, and electron injection layer of all sub-pixels may be common layers connected together, and the emissive layers of adjacent sub-pixels may have a small amount of overlap or may be isolated.

[0131] In exemplary embodiments, a capacitor can be a capacitor device manufactured through a process, for example, by fabricating dedicated capacitor electrodes. Multiple capacitor electrodes can be implemented using metal layers, semiconductor layers (e.g., doped polysilicon), etc. Alternatively, a capacitor can be a parasitic capacitance between multiple devices, implemented using the transistor itself and other devices or circuits. The connection method of the capacitor includes, but is not limited to, the methods described above; other applicable connection methods can be used, as long as the voltage level of the corresponding node is stored. Here, the exemplary embodiments of this disclosure do not limit this.

[0132] Figure 3 is a timing diagram of a pixel driving circuit. The following describes an exemplary embodiment of this disclosure through the operation of the pixel driving circuit illustrated in Figure 2. The pixel driving circuit in Figure 2 includes seven transistors (first transistor T1 to seventh transistor T7) and one capacitor C. All seven transistors are P-type transistors.

[0133] In an exemplary embodiment, taking the electrical connection between the control electrode of the seventh transistor T7 and the scan signal line Gate as an example, the operation of the pixel driving circuit may include:

[0134] The first stage, A1, is called the reset stage. The Reset signal is low, while the Gate and EM signals are high. The low Reset signal turns on the first transistor T1, and the INIT1 signal is sent to the second node N2 to initialize (reset) the capacitor C, clearing its charge. The high Gate and EM signals turn off the second, fourth, fifth, sixth, and seventh transistors T2, T4, T5, T6, and T7. During this stage, the light-emitting device L does not emit light.

[0135] The second stage, A2, is called the data writing stage or threshold compensation stage. During this stage, the signal on the Gate scan line is low, while the signals on the Reset and EM reset lines are high. The Data signal line outputs a data voltage. Because the signal at the second terminal of capacitor C is low, the third transistor T3 is turned on. The low signal on the Gate scan line turns on the second transistor T2, the fourth transistor T4, and the seventh transistor T7. The turn-on of the second transistor T2 and the fourth transistor T4 allows the data voltage output from the Data signal line to be supplied to the second node N2 via the first node N1, the turned-on third transistor T3, the third node N3, and the turned-on second transistor T2. The difference between the data voltage output from the Data signal line and the threshold voltage of the third transistor T3 is charged into capacitor C. The voltage at the second terminal of capacitor C (second node N2) is Vdata - |Vth|, where Vdata is the data voltage output from the Data signal line and Vth is the threshold voltage of the third transistor T3. The seventh transistor T7 is turned on, providing the initial voltage of the second initial signal line INIT2 to the first terminal of the light-emitting device L, initializing (resetting) the first terminal of the light-emitting device L, clearing its internal pre-stored voltage, completing the initialization, and ensuring that the light-emitting device L does not emit light. The reset signal line Reset is a high-level signal, causing the first transistor T1 to turn off. The light-emitting signal line EM is a high-level signal, causing the fifth transistor T5 and the sixth transistor T6 to turn off.

[0136] The third stage, A3, is called the light-emitting stage. During this stage, the light-emitting signal line EM is at a low level, while the scan signal line Gate and the reset signal line Reset are at a high level. The low-level signal on EM turns on the fifth transistor T5 and the sixth transistor T6. The power supply voltage output from the first power line VDD then provides a driving voltage to the first terminal of the light-emitting device L through the turned-on fifth transistor T5, third transistor T3, and sixth transistor T6, driving the light-emitting device L to emit light.

[0137] During the pixel driving circuit operation, the driving current flowing through the third transistor T3 (driving transistor) is determined by the voltage difference between its gate electrode and its first electrode. Since the voltage at the second node N2 is Vdata - |Vth|, the driving current of the third transistor T3 is: I = K*(Vgs - Vth) 2 =K*[(Vdd-Vdata+|Vth|)-Vth] 2 =K*(Vdd-Vdata) 2

[0138] Where I is the driving current flowing through the third transistor T3, which is the driving current driving the light-emitting device L, K is a constant, Vgs is the voltage difference between the gate electrode and the first electrode of the third transistor T3, Vth is the threshold voltage of the third transistor T3, and Vdd is the power supply voltage output by the first power supply line VDD.

[0139] As can be seen from the derivation of the above current formula, during the light-emitting stage, the driving current of the third transistor T3 is no longer affected by the threshold voltage of the third transistor T3, thereby eliminating the influence of the threshold voltage of the third transistor T3 on the driving current. This ensures uniform display brightness of the display product and improves the overall display effect of the display product.

[0140] The flatness of the anode of at least one light-emitting device in the display substrate is not high, which causes color distortion in the display substrate and thus affects the display effect of the display substrate.

[0141] Figure 4 is a schematic diagram of the planar structure of the display substrate. Figure 5A is a schematic diagram of the structure of the display substrate provided in this embodiment of the present disclosure, Figure 6A is a schematic diagram of the structure of the display substrate provided in this embodiment of the present disclosure, Figure 7A is a schematic diagram of the structure of the display substrate provided in this embodiment of the present disclosure, Figure 8A is a schematic diagram of the structure of the display substrate provided in this embodiment of the present disclosure, and Figure 9A is a schematic diagram of the structure of the display substrate provided in this embodiment of the present disclosure. As shown in Figure 4, the display substrate provided in this embodiment of the present disclosure has a display area 100, the display area includes a pixel opening, and the display substrate includes: a substrate and a plurality of sub-pixels (not shown in the figure) disposed on the substrate and a first signal line 10. At least one sub-pixel includes: a pixel driving circuit and a light-emitting device. The pixel opening is an effective light-emitting area.

[0142] As shown in Figures 5A to 9A, the light-emitting device includes: a first electrode 20, a light-emitting layer at least partially disposed in the pixel opening, and a second electrode. A pixel driving circuit in at least one sub-pixel is electrically connected to the first electrode 20 of the light-emitting device. A first signal line 10 is electrically connected to the second electrode 20 of the light-emitting device, or electrically connected to the pixel driving circuit.

[0143] In an exemplary embodiment, as shown in Figures 5A to 9A, the first electrode 20 of the light-emitting device includes a main body portion 210 and a connecting portion 220. Exemplarily, the main body portion 210 of the first electrode 20 refers to the portion of the first electrode 20 corresponding to the pixel opening, and the area of ​​the main body portion of the first electrode 20 is larger than the area of ​​the pixel opening. The main body portion 210 of the first electrode 20 is the portion marked by the dashed box in Figures 5A to 9A.

[0144] In an exemplary embodiment, the orthographic projection of the main body portion 210 on the substrate overlaps with the orthographic projection of the pixel opening on the substrate, and the connecting portion 220 is used to connect the main body portion and the corresponding pixel driving circuit.

[0145] In an exemplary embodiment, the shape of the main body 210 of at least one light-emitting device can be the same as the shape of the pixel opening. For example, the shape of the main body 210 of at least one light-emitting device can be square, circular or elliptical. The shape of the connecting part 220 of at least one light-emitting device can be polygonal. For example, the shape of the connecting part 220 of at least one light-emitting device can be rectangular, and the corners of the rectangular shape can be chamfered.

[0146] In an exemplary embodiment, as shown in Figures 5A to 9A, the first signal line 10 is at least partially located in the display area 100 and has a mesh structure. The orthographic projection of the main body of the first electrode 20 of at least one light-emitting device onto the substrate does not overlap with the orthographic projection of the first signal line 10 onto the substrate. Figures 5A to 9A show the film layer where the first signal line is located and the film layer where the first electrode of the light-emitting device is located.

[0147] In an exemplary embodiment, as shown in Figures 5A to 9A, the light-emitting device includes a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of ​​the first electrode 21 of the first light-emitting device is smaller than the area of ​​the first electrode 22 of the second light-emitting device, and the area of ​​the first electrode 23 of the third light-emitting device is smaller than the area of ​​the first electrode 21 of the first light-emitting device.

[0148] In an exemplary embodiment, the main body of the first electrode 21 of the first light-emitting device is the portion marked by the dashed box in the first electrode 21 of the first light-emitting device, the main body of the first electrode 22 of the second light-emitting device is the portion marked by the dashed box in the first electrode 22 of the second light-emitting device, and the main body of the first electrode 23 of the third light-emitting device is the portion marked by the dashed box in the first electrode 23 of the third light-emitting device.

[0149] In an exemplary embodiment, the area of the main body portion of the first electrode 21 of the first light-emitting device is smaller than the area of the main body portion of the first electrode 22 of the second light-emitting device, and the area of the main body portion of the first electrode 23 of the third light-emitting device is smaller than the area of the main body portion of the first electrode 21 of the first light-emitting device.

[0150] In an exemplary embodiment, the first color, the second color, and the third color are different colors and are one of red, blue, and green. Exemplarily, the first color may be red, the second color may be blue, and the third color may be green.

[0151] In an exemplary embodiment, the light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction D1, the light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction D1, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction D1; the light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, 1 ≤ a < A, where A is the total number of rows of the light-emitting devices; the light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction D2, the light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction D2, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction D1; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are staggered, 1 ≤ b < B, where B is the total number of columns of the light-emitting devices.

[0152] In an exemplary embodiment, the first direction D1 and the second direction D2 intersect. Among them, the included angle between the first direction D1 and the second direction D2 may be 70 degrees to 90 degrees. Exemplarily, the included angle between the first direction D1 and the second direction D2 is 90 degrees.

[0153] In an exemplary embodiment, the display substrate includes: a plurality of pixel units, and at least one pixel unit includes: one first light-emitting device, one second light-emitting device, and two third light-emitting devices.

[0154] In an exemplary embodiment, the substrate may be a flexible substrate or a rigid substrate. The rigid substrate may include, but is not limited to, one or more of glass and quartz, and the flexible substrate may be, but is not limited to, one or more of polyethylene terephthalate, ethylene terephthalate, polyether ether ketone, polystyrene, polycarbonate, polyarylate, polyarylate, polyimide, polyvinyl chloride, polyethylene, and textile fibers.

[0155] In a plane parallel to the display substrate, the display substrate may further include: a bonding area 200 and a bezel area (not shown). The bezel area surrounds at least one side of the display area. The bezel area may include a gate driving circuit. The bonding area 200 is located on one side of the display area 100, and the bonding area 200 may include a first fan-out area, a bending area, a second fan-out area, a driver chip area, and a bonding pin area arranged sequentially along a direction away from the display area. The first fan-out area includes at least data fan-out lines, and multiple data fan-out lines are configured to connect the data signal lines of the display area in a fan-out routing manner. The bending area may include a composite insulating layer with grooves, configured to bend the bonding area to the back side of the display area. The second fan-out area may include multiple data fan-out lines led out in a fan-out routing manner. The anti-static area may include an anti-static circuit, configured to prevent electrostatic damage to the display substrate by eliminating static electricity. The driver chip area may include an integrated circuit (IC), configured to be connected to the multiple data fan-out lines. The bonding pin area may include bonding pads, which are configured to bond to an external flexible printed circuit (FPC).

[0156] In an exemplary embodiment, the first signal line 10 can provide a constant voltage signal.

[0157] In an exemplary embodiment, the first signal line 10 may be a first power line VDD, or a second power line VSS, or a first initial signal line INIT1, or a second initial signal line INIT2.

[0158] In the display substrate provided in this embodiment, the first signal line has a mesh structure, which can reduce the voltage drop of the first signal line, improve the image quality of the display substrate, and reduce the power consumption of the display substrate. In addition, in this disclosure, the orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the first signal line on the substrate do not overlap, which means that the first signal line is set to avoid the first electrode of at least one light-emitting device. This can improve the planarization layer of the first electrode of at least one light-emitting device, thereby improving the color shift phenomenon of the display substrate and improving the display effect of the display substrate.

[0159] In an exemplary embodiment, as shown in Figures 5A to 9A, the first signal line 10 may include: a plurality of closed regions R, wherein the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device onto the substrate is located within the range of the orthographic projection of at least one closed region R onto the substrate.

[0160] In an exemplary embodiment, FIG. 5B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 5A, FIG. 6B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 6A, FIG. 7B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 7A, FIG. 8B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 8A, and FIG. 9B is a schematic structural diagram of a first signal line in the display substrate provided in FIG. 9A. As shown in FIGS. 5B to 9B, the first signal line 10 may include: a plurality of main signal lines 11, the main signal lines 11 at least partially extend along the first direction D1, and the plurality of main signal lines 11 are arranged along the second direction D2. A plurality of connection signal lines 12 are provided between adjacent main signal lines 11, the connection signal lines 12 at least partially extend along the second direction D2, and the plurality of connection signal lines 12 located between adjacent main signal lines 11 are arranged along the first direction D1.

[0161] As shown in FIGS. 5B to 9B, at least one of the plurality of connection signal lines 12 located between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line 11 and the (i + 1)-th main signal line 11, and an adjacent two of the connection signal lines 12 located between the i-th main signal line 11 and the (i + 1)-th main signal line 11 form a first closed region R1 with the i-th main signal line 11 and the (i + 1)-th main signal line 11, where 1 ≤ i < M, and M is the number of main signal lines 11 included in the first signal line.

[0162] In an exemplary embodiment, the boundary of the first closed region R1 may be a polygon, and chamfers may be provided at the corners of the polygon. The present disclosure does not make any limitation thereto.

[0163] In an exemplary embodiment, in the display substrate provided in FIGS. 5A to 9A, the orthographic projection of the main portion 210 of the first electrode 20 of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region R1 on the substrate. FIGS. 5A to 7A are described by taking the orthographic projection of the main portion 210 of the first electrode 20 of one light-emitting device on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example, FIG. 8A is described by taking the orthographic projection of the main portions 210 of the first electrodes 20 of two light-emitting devices on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example, and FIG. 9A is described by taking the orthographic projection of the main portions 210 of the first electrodes 20 of four light-emitting devices on the substrate being within the range of the orthographic projection of one first closed region R1 on the substrate as an example. The present disclosure does not make any limitation thereto.

[0164] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps the orthographic projection of at least one main signal line 11 on the substrate, and there is no overlapping area with the orthographic projection of at least one connection signal line 12 on the substrate.

[0165] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one main signal line 11 includes: a plurality of first main structures 111 and a plurality of second main structures 112. The plurality of first main structures 111 and the plurality of second main structures 112 are alternately arranged along the first direction D1, and the first main structure 111 is connected to the adjacent second main structure 112. Among them, the midline of the j-th first main structure 111 of the i-th main signal line 11 extending along the second direction D2 coincides with the midline of the j-th first main structure 111 of the (i + 1)-th main signal line 延续沿第二方向D2延伸的中线重合;1≤j<N,N为主体信号线11所包括的第一主体结构111的数量,1≤k<K,K为主体信号线11所包括的第二主体结构112的数量。

[0166] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one connection signal line 12 between the i-th main signal line 11 and the (i + 1)-th main signal line 11 is respectively connected to the first main structure 111 of the i-th main signal line 11 and the first main structure of the (i + 1)-th main signal line 111.

[0167] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, at least one connection signal line 12 located between the i-th main signal line 11 and the (i + 1)-th main signal line 11 and at least one connection signal line 12 located between the (i + 1)-th main signal line 11 and the (i + 2)-th main signal line 11 are arranged along the second direction D2.

[0168] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, a plurality of first closed regions R1 are arranged in a matrix along the first direction D1 and the second direction D2.

[0169] In an exemplary embodiment, in the display substrate provided in FIGS. 5A, 6A, and 7A, the maximum length L1 of the first main structure 111 along the second direction D2 is greater than the maximum length L2 of the second main structure 112 along the second direction D2.

[0170] It should be noted that there seems to be some incorrect or incomplete expressions in the original text in item , which may affect the accurate understanding and translation. The above translation is based on the existing text as much as possible.In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the length L3 of at least one connection signal line 12 along the second direction D2 is less than the distance L4 between two second main body structures 112 extending along the second direction D2.

[0171] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure 111 on the substrate, and there is no overlapping area between the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate and the orthographic projection of the second main structure 112 on the substrate.

[0172] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, at least one second main structure 112 includes: a first connecting structure 112A and a second connecting structure 112B, the first connecting structure 112A and the second connecting structure 112B extending along a first direction D1 and arranged along a second direction D2, and at least one of the first connecting structure 112A and the second connecting structure 112B in at least one second main structure 112 being connected to two first main structures 111 connected to the second main structure 112 respectively.

[0173] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, a third closed region R3 is formed between the first connecting structure 112A and the second connecting structure 112B in at least one second main structure 112 and the two first main structures 111 connected to the second main structure 112.

[0174] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, a plurality of third enclosed regions R3 are arranged in a matrix along the first direction D1 and the second direction D2.

[0175] There is no overlap between the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate and the orthographic projection of at least one third closed region R3 on the substrate.

[0176] The multiple enclosed regions of the first signal line in the display substrate shown in Figure 5A include: multiple first enclosed regions R1, multiple second enclosed regions R2, and multiple third enclosed regions R3. The multiple enclosed regions of the first signal line in the display substrate shown in Figures 6A and 6B include: multiple first enclosed regions R1 and multiple third enclosed regions R3.

[0177] In exemplary embodiments, at least one first main structure 111 is an annular structure or a solid structure. The display substrate provided in FIG5A is illustrated with the first main structure 111 being an annular structure, i.e., the first main structure being a hollow structure. The display substrates provided in FIG6A and 7A are illustrated with the first main structure 111 being a solid structure.

[0178] In an exemplary embodiment, in the display substrate provided in FIG5A, when at least one first main structure 111 is an annular structure, the first main structure 111 includes a second enclosed region R2. The orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate.

[0179] In an exemplary embodiment, in the display substrate provided in FIG5A, a plurality of second enclosed regions R2 are arranged in a matrix along the first direction D1 and the second direction D2.

[0180] In an exemplary embodiment, in the display substrate provided in FIG5A, when at least one main structure is a ring structure, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate is located within the range of the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate, and the orthographic projection of the connecting portion 220 of the first electrode 20 of at least one light-emitting device on the substrate overlaps with the orthographic projection of the first main structure 111 on the substrate. In this disclosure, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate being located within the range of the orthographic projection of the second enclosed region R2 of the first main structure 111 on the substrate ensures that no structure of the first signal line is disposed below the main body portion of the first electrode of at least one light-emitting device, thereby improving the flatness of the first electrode of the light-emitting device.

[0181] In an exemplary embodiment, in the display substrate provided in Figures 6A and 7A, when at least one main structure is a solid structure, the orthographic projection of the main body portion 220 of the first electrode 20 of at least one light-emitting device onto the substrate is within the range of the orthographic projection of the first main structure 111 onto the substrate, and the orthographic projection of the connecting portion 210 of the first electrode 20 of at least one light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the first main structure 111 onto the substrate. In this disclosure, having the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device onto the substrate within the range of the orthographic projection of the second enclosed region R2 of the first main structure 111 onto the substrate ensures that the first signal line is located below the main body portion of the first electrode of at least one light-emitting device, thus improving the flatness of the first electrode of the light-emitting device.

[0182] In exemplary embodiments, the boundary of the first main structure 111 is a polygon, a circle, or an ellipse. FIG6A illustrates a display substrate where the boundary of the first main structure 111 is a polygon, and the angle of the polygon can be set to be chamfered. FIG7A illustrates a display substrate where the boundary of the first main structure 111 is a circle. When the boundary of the first main structure 111 is circular, the shape of the first main structure 111 is the same as that of the main body portion of the first electrode of at least one light-emitting device. In this disclosure, having the same shape for the first main structure 111 and the main body portion of the first electrode of at least one light-emitting device reduces the influence of the film layer containing the first signal line on light transmittance.

[0183] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the orthographic projection of the main body portion 210 of the first electrode of the first light-emitting device 21 onto the substrate is located within the range of the orthographic projection of at least one first enclosed region R1 onto the substrate.

[0184] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the orthographic projection of the main body portion 210 of the first electrode of the second light-emitting device 22 onto the substrate is located within the range of the orthographic projection of at least one first enclosed region R1 onto the substrate.

[0185] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the region where the orthographic projection of the main body portion 210 of the first electrode of the first light-emitting device 21 is located on the substrate is a different first closed region from the region where the orthographic projection of the main body portion 210 of the first electrode of the second light-emitting device 22 is located on the substrate.

[0186] In an exemplary embodiment, in the display substrate provided in FIG5A, FIG6A and FIG7A, the orthographic projection of the main body portion 210 of the first electrode of the third light-emitting device 23 on the substrate at least partially overlaps with the orthographic projection of the first main structure 111 on the substrate, and the first main structure 111 overlapping with the orthographic projection of the main body portion 210 of the first electrode of different third light-emitting devices 23 on the substrate is a different first main structure 111.

[0187] In an exemplary embodiment, in the display substrate provided in Figures 5A, 6A, and 7A, the centerline extending along the first direction D1 of the main body portion of the first electrode of at least one light-emitting device is designated as the first centerline O1; the centerline extending along the second direction D2 of the main body portion of the first electrode of at least one light-emitting device is designated as the second centerline O2; the centerline extending along the first direction D1 of the first closed region R1 or the first main structure 111, which overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate, is designated as the third centerline O3; and the centerline extending along the second direction D2 of the first closed region R1 or the first main structure 111, which overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate, is designated as the fourth centerline O4. The first centerline O1 coincides with the third centerline O3, and the second centerline O2 coincides with the fourth centerline O4. For example, the first closed region R1 overlaps with the orthographic projection of the main body portion of the first electrode of the first light-emitting device and the main body portion of the first electrode of the second light-emitting device on the substrate, and the first main body structure 111 overlaps with the orthographic projection of the main body portion of the first electrode of the third light-emitting device on the substrate.

[0188] In the display panel shown in Figure 5A, the orthographic projections of the main body portion 210 of the first electrode of the first light-emitting device and the main body portion 210 of the first electrode of the second light-emitting device onto the substrate do not overlap with the orthographic projection of the first signal line onto the substrate. The orthographic projection of the main body portion 210 of the first electrode of the third light-emitting device onto the substrate is located within the orthographic projection range of the second enclosed region of the first main structure onto the substrate. In other words, the first signal line is not disposed below the main body portion 210 of the first electrode of the light-emitting device, thus avoiding the influence of the first signal line on the flatness of the first electrode of the light-emitting device. The first electrode of the light-emitting device in the display substrate shown in Figure 5A has good flatness.

[0189] In the display substrates provided in Figures 6A and 7A, the orthographic projections of the main body of the first electrode of the first light-emitting device and the main body of the first electrode of the second light-emitting device onto the substrate do not overlap with the orthographic projection of the first signal line onto the substrate. The orthographic projection of the main body of the first electrode of the third light-emitting device onto the substrate is within the range of the orthographic projection of the first main structure onto the substrate. In other words, the first signal line is not disposed below the main body of the first electrode of the first and second light-emitting devices, thus avoiding the influence of the first signal line on the flatness of the first and second light-emitting devices' first electrodes. The first signal line is disposed below the main body of the first electrode of the third light-emitting device, but the area of ​​the first signal line is larger than the area of ​​the main body of the first electrode, which also avoids the influence of the first signal line on the flatness of the first electrode of the third light-emitting device. The first electrode of the light-emitting device in the display substrates provided in Figures 6A and 7A exhibits good flatness.

[0190] In the display substrates provided in Figures 6A and 7A, a first main structure of the first signal line is provided below the main body of the first electrode of the third light-emitting device, and no first signal line is provided below the first electrode of the first light-emitting device and the first electrode of the second light-emitting device, so that the parasitic capacitance of the first electrode of the different light-emitting devices can be realized.

[0191] In an exemplary embodiment, in the display substrate provided in FIG8A and FIG9A, the orthographic projection of the main body portion 210 of the first electrode 20 of at least one light-emitting device on the substrate does not overlap with the orthographic projection of the main signal line 11 on the substrate, and the orthographic projection on the substrate overlaps at least partially with the orthographic projection of at least one connection signal line 12 on the substrate.

[0192] In an exemplary embodiment, in the display substrate provided in FIG8A and FIG9A, the main signal line 11 is a solid signal line.

[0193] In an exemplary embodiment, the shape of the main signal line 11 can be a straight line or a broken line, and this disclosure does not limit it in any way.

[0194] The multiple enclosed regions in the display substrate provided in Figures 8A and 9A include: multiple first enclosed regions R1.

[0195] In an exemplary embodiment, in the display substrate provided in FIG8A and FIG9A, the connection signal line 12 may include: a first connection line 12A, a second connection line 12B and a third connection line 12C. The first connection line 12A and the second connection line 12B extend along a second direction D2, and the third connection line 12C extends along a first direction D1. The first connection line 12A is electrically connected to one of the main signal lines 11 and the third connection line 12C connected to the connection signal line 12, respectively. The second connection line 12B is electrically connected to the other main signal line 11 and the third connection line 12C connected to the connection signal line 12, respectively.

[0196] In an exemplary embodiment, in the display substrate provided in Figures 8A and 9A, the orthographic projection of the main body 210 of the first electrode 20 of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connecting line 12C of at least one connecting signal line 12 on the substrate. Exemplarily, the orthographic projection of the connecting portion of the first electrode 23 of at least one third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connecting line 12C of at least one connecting signal line 12 on the substrate.

[0197] In an exemplary embodiment, in the display substrate provided in Figures 8A and 9A, the orthographic projection of the main body portion 220 of the first electrode 20 of at least one light-emitting device on the substrate does not overlap with the orthographic projection of at least one connection signal line 12 on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connecting line 12C of at least one connection signal line 12 on the substrate. The absence of overlap between the orthographic projection of the main body portion 220 of the first electrode 20 of at least one light-emitting device and the orthographic projection of at least one connection signal line 12 on the substrate ensures that there is no first signal line below the main body portion of the first electrode 20 of at least one light-emitting device, thus guaranteeing the flatness of the first electrode 20 of at least one light-emitting device.

[0198] In an exemplary embodiment, the m-th connection signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 and the m-th connection signal line 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11 are arranged along the second direction D2; or, the extension of at least one connection signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 is located between the extensions of two adjacent connection signal lines 12 between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11. The extension of at least one connecting signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11, and the extension between two adjacent connecting signal lines 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11, refers to the multiple connecting signal lines 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11, which are interleaved with the multiple connecting signal lines 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11.

[0199] The display substrate shown in Figure 8A is illustrated using an example where the m-th connection signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 and the m-th connection signal line 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11 are arranged along the second direction D2. The plurality of first enclosed regions in Figure 8A are arranged in a matrix along the first direction D1 and the second direction D2.

[0200] In an exemplary embodiment, in the display substrate provided in FIG8A, when the m-th connection signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 and the m-th connection signal line 12 located between the (i+1)-th main signal line 11 and the (i+2)-th main signal line 11 are arranged along the second direction D2, the orthographic projection of the main body portion of the first electrode 21 of at least one first light-emitting device on the substrate and the orthographic projection of the main body portion of the first electrode 23 of at least one third light-emitting device on the substrate are located in the same first closed region R1; the orthographic projection of the main body portion of the first electrode 22 of at least one second light-emitting device on the substrate and the orthographic projection of the main body portion of the first electrode 23 of at least one third light-emitting device on the substrate are located in the same first closed region R1; the first closed region R1 where the orthographic projection of the main body portion of the first electrode 21 of the first light-emitting device is located on the substrate and the first closed region R1 where the orthographic projection of the main body portion of the first electrode 22 of the second light-emitting device is located on the substrate are different closed regions. For example, in the display substrate provided in FIG8A, the orthographic projections of the main body of the first electrode 21 of a first light-emitting device and the main body of the first electrode 23 of a third light-emitting device on the substrate are located in the same first closed region R1, and the orthographic projections of the main body of the first electrode 22 of a second light-emitting device and the main body of the first electrode 23 of a third light-emitting device on the substrate are located in the same first closed region R1.

[0201] The display substrate shown in Figure 9A is illustrated using the example where the extension of at least one connecting signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 lies between the extensions of two adjacent connecting signal lines 12 located between the (i+1)-th and (i+2)-th main signal lines 11. In Figure 9A, multiple first enclosed regions located in the same row are arranged along the first direction D1, and multiple first enclosed regions in adjacent rows are staggered.

[0202] In an exemplary embodiment, in the display substrate provided in FIG9A, when the extension of at least one connection signal line 12 located between the i-th main signal line 11 and the (i+1)-th main signal line 11 is located between the extensions of two adjacent connection signal lines 12 between the (i+1)-th and (i+2)-th main signal lines 11, the orthographic projection of the main body portion of the first electrode of at least one first light-emitting device, the orthographic projection of the main body portion of the first electrode of at least one second light-emitting device, and the orthographic projection of the main body portion of the first electrode of at least one third light-emitting device on the substrate are located in the same first enclosed region R1. Exemplarily, in the display substrate provided in FIG9A, the orthographic projections of the main body portion of the first electrode 21 of one first light-emitting device, the main body portion of the first electrode 22 of one second light-emitting device, and the main body portions of the first electrodes 23 of two third light-emitting devices on the substrate are located in the same first enclosed region R1.

[0203] In the display panels provided in Figures 8A and 9A, the orthographic projections of the main body of the first electrode of the first light-emitting device, the main body of the first electrode of the second light-emitting device, and the main body of the first electrode of the third light-emitting device onto the substrate do not overlap with the orthographic projection of the first signal line onto the substrate. In other words, the first signal line is not positioned below the main body of the first electrode of the light-emitting device, thus avoiding the influence of the first signal line on the flatness of the first electrode of the light-emitting device. The first electrode of the light-emitting device in the display substrates provided in Figures 8A and 9A exhibits good flatness.

[0204] In an exemplary embodiment, FIG10 is a schematic diagram of a portion of the film layers of the display substrate, and FIG11 is a schematic diagram of a portion of the film layers of the display substrate. As shown in FIG10 and FIG11, the display substrate provided in this embodiment may further include: a plurality of second signal lines disposed on the substrate, and a pixel driving circuit of at least one sub-pixel electrically connected to the second signal lines. FIG10 and FIG11 include: a first electrode 21 of a first light-emitting device, a first electrode 22 of a second light-emitting device, and a first electrode 23 of a third light-emitting device. FIG10 includes the film layer where the second signal lines are located and the film layer where the first electrode of the light-emitting device is located, and FIG11 includes the film layer where the first and second electrodes of at least one transistor in the pixel driving circuit are located and the film layer where the first electrode of the light-emitting device is located. FIG11 includes: the second electrode 64 of the sixth transistor in the pixel driving circuit (which is also the second electrode 74 of the seventh transistor).

[0205] In an exemplary embodiment, the second signal line may include at least one of: a data signal line Data, a first initial signal line INIT1, a second initial signal line INIT2, a first power line VDD, and a second power line VSS. The second signal line is a different signal line from the first signal line. For example, when the first signal line is the second power line VSS, the second signal line may include at least one of: a data signal line Data, a first initial signal line INIT1, a second initial signal line INIT2, and a first power line VDD. For instance, the second signal line may include the first power line VDD and the data signal line Data. FIG10 is illustrated with the example of the second signal line including the first power line VDD and the data signal line Data.

[0206] In an exemplary embodiment, the second signal line is at least partially located in the display area and is disposed on a different layer from the first signal line, and the second signal line extends at least partially along the second direction D2.

[0207] As shown in Figures 10 and 11, at least a portion of the pixel driving circuits of adjacent sub-pixels in the same row are symmetrically arranged with respect to the second center line O2, the second center line O2 extends along the second direction, the second signal line connected to the pixel driving circuits of adjacent sub-pixels in the same row is symmetrically arranged with respect to the second center line O2, and the center line of the main body of the first electrode of at least one light-emitting device extending along the second direction is the second center line O2.

[0208] In this disclosure, at least a portion of the pixel driving circuits located in adjacent sub-pixels in the same row are symmetrically arranged with respect to a second center line, and the second signal lines connected to the pixel driving circuits located in adjacent sub-pixels in the same row are symmetrically arranged with respect to the second center line O2. The center line extending along the second direction of the main body of the first electrode of at least one light-emitting device is the second center line O2. The center line extending along the second direction of the main body of the first electrode of at least one light-emitting device is the same center line as the center line symmetrically arranged with respect to at least a portion of the pixel driving circuits located in adjacent sub-pixels in the same row and the center line symmetrically arranged with respect to the second signal lines connected to the pixel driving circuits located in adjacent sub-pixels in the same row. This avoids the influence of part of the pixel driving circuit structure and the second signal lines on the flatness of the first electrode of the light-emitting device, and ensures the flatness of the first electrode of the light-emitting device.

[0209] In an exemplary embodiment, FIG12 is a schematic diagram of a portion of the film layers of the display substrate (Figure 3), and FIG13 is a schematic diagram of a portion of the film layers of the display substrate (Figure 4). As shown in FIG5A to 9A, FIG10, FIG12, and FIG13, the display substrate may further include: a plurality of first anode connection electrodes 30 and a plurality of second anode connection electrodes 40 disposed on the substrate and located in the display area, and the first signal line includes: at least one first closed region R1. The first anode connection electrodes 30 and the second anode connection electrodes 40 are respectively connected to the pixel driving circuit and the connection portion of the first electrode of the light-emitting device connected to the pixel driving circuit. The first anode connection electrodes 30 and the second anode connection electrodes 40 are respectively connected to the second electrode 64 (also the second electrode 74 of the seventh transistor) of the pixel driving circuit. FIG12 is illustrated using the example of a main signal line including a plurality of first main structures and a plurality of second main structures. FIG13 is illustrated using the example of a solid signal line as the main signal line.

[0210] In an exemplary embodiment, as shown in Figures 11 to 13, a plurality of first anode connecting electrodes 30 correspond one-to-one with a plurality of second anode connecting electrodes 40. The orthographic projection of the first anode connecting electrode 30 on the substrate at least partially overlaps with the orthographic projection of the corresponding second anode connecting electrode 40 on the substrate, and is electrically connected to the corresponding second anode connecting electrode 40.

[0211] In an exemplary embodiment, as shown in Figures 12 and 13, the orthogonal projections of at least one first anode connecting electrode 30 and at least one second anode connecting electrode 40 onto the substrate are located within the orthogonal projection range of at least one first enclosed region onto the substrate.

[0212] In an exemplary embodiment, as shown in Figures 10, 12, and 13, when the second signal line includes a first power line VDD, the first power line connected to the sub-pixel is the same as the first power line connected to one of the adjacent sub-pixels. The first power line includes a fourth enclosed region R4. The orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first power line VDD on the substrate.

[0213] In an exemplary embodiment, the orthographic projection of the main body of the first electrode of at least one third light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the first power line VDD onto the substrate.

[0214] In an exemplary embodiment, when the first main structure is a solid structure, since the orthographic projection of the main body of the first electrode of at least one third light-emitting device on the substrate partially overlaps with the orthographic projection of the first main structure on the substrate, and the orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first power line VDD on the substrate, that is, both the first main structure and the first power line are provided below the main body of the first electrode of the third light-emitting device, which can better protect the flatness of the main body of the first electrode of the third light-emitting device.

[0215] In an exemplary embodiment, when the first main structure is a ring structure, since the orthographic projection of the main body of the first electrode of at least one third light-emitting device on the substrate and the orthographic projection of the second closed region of the first main structure on the substrate are within the range of the orthographic projection of the main body of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the first power line VDD on the substrate, at least partially overlap, that is, the first power line is provided below the main body of the first electrode of the third light-emitting device, which can effectively protect the flatness of the first electrode of the third light-emitting device.

[0216] As shown in Figures 12 and 13, the orthogonal projections of at least one first anode connecting electrode 30 and at least one second anode connecting electrode 40 on the substrate are located within the range of the orthogonal projection of at least one fourth closed region R4 on the substrate.

[0217] As shown in Figures 12 and 13, the orthographic projection of at least one fourth closed region R4 onto the substrate at least partially overlaps with the orthographic projection of at least one connecting signal line 12 onto the substrate. Exemplarily, the connecting signal line 12 that overlaps with the fourth closed region passes through the centerline of the fourth closed region R4 extending along the second direction D2.

[0218] In an exemplary embodiment, the first signal line includes a main signal line 11, and the main signal line 11 includes a plurality of first main structures 111. As shown in Figures 12 and 13, the orthographic projection of at least one first power line VDD on the substrate at least partially overlaps with the orthographic projection of at least one first main structure 111 on the substrate. This partial overlap ensures the flatness of the first electrode of at least one light-emitting device by providing both the first power line and the first main structure below the main body portion of the first electrode.

[0219] As shown in Figure 12, the third closed area R3 can be used as a light-transmitting area. The display substrate can be provided with vias in the third closed area R3, and photosensitive devices can be provided at the via locations.

[0220] In an exemplary embodiment, the display substrate may include: a driving structure layer and a light-emitting structure layer sequentially stacked on a substrate, with the light-emitting device located in the light-emitting structure layer; the pixel driving circuit includes: at least one transistor. The driving structure layer includes: a first conductive layer, a second conductive layer, and a third conductive layer;

[0221] The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit;

[0222] The second conductive layer includes: a second signal line and a second anode connection electrode.

[0223] The third conductive layer includes: a first signal line and a first anode connection electrode.

[0224] In an exemplary embodiment, the first conductive layer is located on the side of at least one of the second and third conductive layers near the substrate.

[0225] In an exemplary embodiment, the third conductive layer may be located on the side of the second conductive layer closer to the substrate, or the third conductive layer may be located on the side of the second conductive layer farther from the substrate.

[0226] In an exemplary embodiment, when the third conductive layer is located on the side of the second conductive layer closer to the substrate, the second electrode of the sixth transistor (which is also the second electrode of the seventh transistor) of the pixel driving circuit is electrically connected to the connection portion of the first electrode of the light-emitting device via the first anode connection electrode and the second anode connection electrode in sequence. When the third conductive layer is located on the side of the second conductive layer farther from the substrate, the second electrode of the sixth transistor (which is also the second electrode of the seventh transistor) of the pixel driving circuit is electrically connected to the connection portion of the first electrode of the light-emitting device via the second anode connection electrode and the first anode connection electrode in sequence.

[0227] In an exemplary embodiment, the display substrate may further include a third signal line disposed on the substrate and located in the display area. The third signal line extends at least partially along the first direction.

[0228] In an exemplary embodiment, the third signal line may include at least one of a reset signal line, a scan signal line, and a light emission signal line.

[0229] In an exemplary embodiment, the pixel driving circuit further includes a capacitor. The driving structure layer may also include a semiconductor layer, a fourth conductive layer, and a fifth conductive layer.

[0230] The semiconductor layer may include at least: an active pattern of at least one transistor located in at least one pixel driving circuit.

[0231] The fourth conductive layer may include at least: a third signal line, a gate electrode of at least one transistor located in at least one pixel driving circuit, and a first plate of a capacitor.

[0232] The fifth conductive layer may include at least the second plate of a capacitor located in at least one pixel driving circuit.

[0233] In an exemplary embodiment, the first conductive layer, the second conductive layer, the third conductive layer, the fourth conductive layer, and the fifth conductive layer may be made of metallic materials, such as any one or more of silver (Ag), copper (Cu), aluminum (Al), and molybdenum (Mo), or alloys of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb). They may be single-layer structures or multi-layer composite structures, such as Mo / Cu / Mo.

[0234] In an exemplary embodiment, the first insulating layer, the second insulating layer, the third insulating layer, the fourth insulating layer, and the fifth insulating layer may be any one or more of silicon oxide (SiOx), silicon nitride (SiNx), and silicon oxynitride (SiON), and may be a single layer, a multilayer, or a composite layer.

[0235] In an exemplary embodiment, the driving structure layer may further include: a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, and a fifth insulating layer. The first insulating layer is located between the semiconductor layer and the fourth conductive layer; the second insulating layer is located between the fourth conductive layer and the fifth conductive layer; the third insulating layer is located between the fifth conductive layer and the first conductive layer; the fourth insulating layer is located between the first conductive layer and the second conductive layer; and the fifth insulating layer is located between the second conductive layer and the third conductive layer.

[0236] In an exemplary embodiment, at least one of the first to fifth conductive layers has a planarization layer on the side away from the substrate.

[0237] In an exemplary embodiment, the planarization layer may be made of organic materials, such as resin.

[0238] In an exemplary embodiment, the light-emitting structure layer may include a sixth conductive layer, an organic layer, and a seventh conductive layer sequentially stacked on the driving structure layer.

[0239] The sixth conductive layer may include at least: a first electrode of at least one light-emitting device.

[0240] The organic layer may include at least one organic structural layer of a light-emitting device.

[0241] The seventh conductive layer may include at least: a second electrode of at least one light-emitting device.

[0242] In an exemplary embodiment, the display substrate may further include an encapsulation structure layer. The encapsulation structure layer may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked together. The first and third encapsulation layers may be made of inorganic materials, while the second encapsulation layer may be made of organic materials. The second encapsulation layer is disposed between the first and third encapsulation layers to prevent external moisture from entering the light-emitting structure layer.

[0243] In an exemplary embodiment, the display substrate may further include a touch structure layer. The touch structure layer may include a first touch insulating layer disposed on the encapsulation structure layer, a first touch metal layer disposed on the first touch insulating layer, a second touch insulating layer covering the first touch metal layer, a second touch metal layer disposed on the second touch insulating layer, and a touch protective layer covering the second touch metal layer. The first touch metal layer may include a plurality of bridging electrodes, and the second touch metal layer may include a plurality of first touch electrodes and second touch electrodes. The first touch electrodes or the second touch electrodes may be connected to the bridging electrodes via vias.

[0244] In an exemplary embodiment, the display substrate may further include an optical structure layer comprising a plurality of filters and a black matrix structure. The optical structure layer is located on the side of the light-emitting structure layer away from the substrate. The orthographic projection of at least one filter onto the substrate at least partially overlaps with the orthographic projection of at least one pixel opening onto the substrate.

[0245] In an exemplary embodiment, the filter includes a first filter, a second filter, and a third filter. The orthographic projection of the first filter on the substrate at least partially overlaps with the orthographic projection of the main body of the first electrode of the first light-emitting device on the substrate. The orthographic projection of the second filter on the substrate at least partially overlaps with the orthographic projection of the main body of the first electrode of the second light-emitting device on the substrate. The orthographic projection of the third filter on the substrate at least partially overlaps with the orthographic projection of the main body of the first electrode of the third light-emitting device on the substrate.

[0246] In an exemplary embodiment, the filter can be prepared on the packaging structure layer by a coating exposure and development process to achieve further in-screen integration.

[0247] This disclosure also provides a display device, including: the display substrate provided in any of the foregoing embodiments.

[0248] In an exemplary embodiment, the display device can be any product or component with display function, such as an organic light-emitting diode (OLED) display device, an active-matrix organic light-emitting diode (AMOLED) display device, a mobile phone, a tablet computer, a flexible display device, a television, and a monitor.

[0249] In an exemplary embodiment, the display device further includes a plurality of photosensitive devices.

[0250] In an exemplary embodiment, the first signal line in the display substrate includes a third enclosed region, which is a light-transmitting region. The orthographic projection of at least one photosensitive device on the substrate at least partially overlaps with the orthographic projection of at least one third enclosed region on the substrate.

[0251] The accompanying drawings of the embodiments disclosed herein only relate to the structures involved in the embodiments of this disclosure; other structures can be referred to in a general design.

[0252] For clarity, the thickness and dimensions of layers or microstructures are enlarged in the accompanying drawings used to describe embodiments of this disclosure. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being “on” or “below” another element, the element may be located “directly” on or “below” the other element, or there may be intermediate elements present.

[0253] While the embodiments disclosed herein are as described above, the content is merely for the purpose of facilitating understanding of this disclosure and is not intended to limit this disclosure. Any person skilled in the art to which this disclosure pertains may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed herein; however, the scope of patent protection of this disclosure shall still be determined by the scope defined in the appended claims.

Claims

1. A display substrate having a display area, the display area including pixel openings, the display substrate comprising: A substrate, a plurality of sub-pixels provided on the substrate, and a first signal line. At least one sub-pixel includes: a pixel driving circuit and a light-emitting device. The light-emitting device includes: a first electrode, a light-emitting layer at least partially disposed in the pixel aperture, and a second electrode. The pixel driving circuit in at least one sub-pixel is electrically connected to the first electrode of the light-emitting device. The first signal line is electrically connected to the second electrode of the light-emitting device or to the pixel driving circuit. The first electrode includes a main body portion and a connecting portion. The orthographic projection of the main body portion on the substrate overlaps with the orthographic projection of the pixel aperture on the substrate. The connecting portion is used to connect the main body portion and the corresponding pixel driving circuit. The first signal line is at least partially located in the display area and has a mesh structure. The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate does not have an overlapping area with the orthographic projection of the first signal line on the substrate.

2. The display substrate according to claim 1, wherein, 3. The display substrate according to claim 1 or 2, wherein, The first signal line includes: a plurality of closed regions. The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one closed region on the substrate. The first signal line includes: a plurality of main signal lines. The main signal lines at least partially extend in a first direction, and the plurality of main signal lines are arranged in a second direction. The first direction and the second direction intersect. A plurality of connecting signal lines are provided between adjacent main signal lines. The connecting signal lines at least partially extend in the second direction, and the plurality of connecting signal lines located between adjacent main signal lines are arranged in the first direction.

4. The display substrate according to claim 3, wherein, At least one connecting signal line among the plurality of connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the i-th main signal line and the (i + 1)-th main signal line. And an adjacent two connecting signal lines located between the i-th main signal line and the (i + 1)-th main signal line form a first closed region with the i-th main signal line and the (i + 1)-th main signal line, where 1 ≤ i < M, and M is the number of main signal lines included in the first signal line.

5. The display substrate according to claim 4, wherein, The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate.

6. The display substrate according to claim 5, wherein, The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of at least one main signal line on the substrate, and there is no overlapping area with the orthographic projection of at least one connecting signal line on the substrate. At least one main signal line includes: a plurality of first main structures and a plurality of second main structures. The plurality of first main structures and the plurality of second main structures are alternately arranged in the first direction, and the first main structure is connected to the adjacent second main structure. The midline of the j-th first main structure of the i-th main signal line extending in the second direction coincides with the midline of the j-th first main structure of the (i + 1)-th main signal line extending in the second direction, and the midline of the k-th second main structure of the i-th main signal line extending in the second direction coincides with the midline of the k-th second main structure of the (i + 1)-th main signal line extending in the second direction; 1 ≤ j < N, where N is the number of first main structures included in the main signal line, and 1 ≤ k < K, where K is the number of second main structures included in the main signal line; At least one connection signal line between the i-th main signal line and the (i + 1)-th main signal line is respectively connected to the first main structure of the i-th main signal line and the first main structure of the (i + 1)-th main signal line.

7. The display substrate according to claim 6, wherein, At least one connection signal line located between the i-th main signal line and the (i + 1)-th main signal line and at least one connection signal line located between the (i + 1)-th main signal line and the (i + 2)-th main signal line are arranged along the second direction.

8. The display substrate according to claim 3, wherein, At least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to the adjacent second main structure; The maximum length of the first main structure along the second direction is greater than the maximum length of the second main structure along the second direction; The length of at least one connection signal line along the second direction is less than the distance between two second main structures extending along the second direction.

9. The display substrate according to claim 3, wherein, At least one main signal line includes: a plurality of first main structures and a plurality of second main structures, the plurality of first main structures and the plurality of second main structures are alternately arranged along the first direction, and the first main structure is connected to the adjacent second main structure; The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and there is no overlapping area between the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of the second main structure on the substrate.

10. The display substrate according to claim 9, wherein, At least one first main structure is a ring structure or a solid structure; When at least one first main structure is a ring structure, the first main structure includes: a second closed area; The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the second closed area of the first main structure on the substrate.

11. The display substrate according to claim 10, wherein, When at least one main structure is a ring structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of the second closed area of the first main structure on the substrate, and the orthographic projection of the connection portion of the first electrode of at least one light-emitting device on the substrate partially overlaps with the orthographic projection of the first main structure on the substrate; When at least one main structure is a solid structure, the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is within the range of the orthographic projection of the first main structure on the substrate, and the orthographic projection of the connecting portion of the first electrode of at least one light-emitting device on the substrate overlaps at least partially with the orthographic projection of the first main structure on the substrate.

12. The display substrate according to claim 8, wherein, At least one second main structure includes: a first connecting structure and a second connecting structure. The first connecting structure and the second connecting structure extend along the first direction and are arranged along the second direction. At least one of the first connecting structure and the second connecting structure in at least one second main structure is respectively connected to two first main structures connected to the second main structure. A third closed region is formed between the first connecting structure and the second connecting structure in at least one second main structure and the two first main structures connected to the second main structure. There is no overlapping region between the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate and the orthographic projection of at least one third closed region on the substrate.

13. The display substrate according to claim 12, wherein, The boundary of the first main structure is one of the shapes of a polygon, a circle or an ellipse.

14. The display substrate according to claim 12, wherein, The light-emitting device includes: a first light-emitting device, a second light-emitting device and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, and the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device. The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices. The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction. The light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are staggered, where 1 ≤ b < B and B is the total number of columns of the light-emitting devices. The orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is within the range of the orthographic projection of at least one first closed region on the substrate. The region where the orthographic projection of the main body portion of the first electrode of the first light-emitting device on the substrate is located and the region where the orthographic projection of the main body portion of the first electrode of the second light-emitting device on the substrate is located are different first closed regions. The orthographic projection of the main body portion of the first electrode of the third light-emitting device on the substrate at least partially overlaps with the orthographic projection of the first main structure on the substrate, and the first main structures that overlap with the orthographic projections of the main body portions of the first electrodes of different third light-emitting devices on the substrate are different first main structures.

15. The display substrate according to claim 12, wherein, The median line along the first direction of the main body portion of the first electrode of at least one light-emitting device is the first median line, the median line along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second median line, the median line along the first direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the third median line, and the median line along the second direction of the first closed region or the first main structure that overlaps with the orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate is the fourth median line; The first median line coincides with the third median line, and the second median line coincides with the fourth median line.

16. The display substrate according to claim 4, wherein, The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate has no overlapping region with the orthographic projection of at least one main signal line on the substrate, and at least partially overlaps with the orthographic projection of at least one connection signal line on the substrate.

17. The display substrate according to claim 16, wherein, The main signal line is a solid signal line, and the connection signal line includes: a first connection line, a second connection line, and a third connection line. The first connection line and the second connection line extend along the second direction, and the third connection line extends along the first direction; The first connection line is electrically connected to one of the main signal lines connected by the connection signal line and the third connection line respectively, and the second connection line is electrically connected to the other main signal line connected by the connection signal line and the third connection line respectively; The orthographic projection of the main body portion of the first electrode of at least one light-emitting device on the substrate at least partially overlaps with the orthographic projection of the third connection line of at least one connection signal line on the substrate.

18. The display substrate according to claim 17, wherein, The light-emitting device includes: a first light-emitting device, a second light-emitting device, and a third light-emitting device. The first light-emitting device emits light of a first color, the second light-emitting device emits light of a second color, the third light-emitting device emits light of a third color. The area of the first electrode of the first light-emitting device is smaller than the area of the first electrode of the second light-emitting device, and the area of the first electrode of the third light-emitting device is smaller than the area of the first electrode of the first light-emitting device; The light-emitting devices in the a-th row include a plurality of third light-emitting devices arranged along the first direction. The light-emitting devices in the (a + 1)-th row include a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the first direction. The plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; The light-emitting devices in the a-th row and the light-emitting devices in the (a + 1)-th row are staggered, where 1 ≤ a < A and A is the total number of rows of the light-emitting devices; The light-emitting devices in the b-th column include a plurality of third light-emitting devices arranged along the second direction. The light-emitting devices in the (b + 1)-th column include: a plurality of first light-emitting devices and a plurality of second light-emitting devices arranged along the second direction, and the plurality of first light-emitting devices and the plurality of second light-emitting devices are alternately arranged along the first direction; the light-emitting devices in the b-th column and the light-emitting devices in the (b + 1)-th column are arranged in a staggered manner, where 1 ≤ b < B and B is the total number of columns of the light-emitting devices; The positive projection of the main body portion of the first electrodes of at least one first light-emitting device, at least one second light-emitting device, and at least one third light-emitting device on the substrate does not overlap with the positive projection of at least one connection signal line on the substrate. The positive projection of the connection portion of the first electrodes of at least one first light-emitting device and at least one second light-emitting device on the substrate does not overlap with the positive projection of the third connection line of at least one connection signal line on the substrate. The positive projection of the connection portion of the first electrode of at least one third light-emitting device on the substrate at least partially overlaps with the positive projection of the third connection line of at least one connection signal line on the substrate.

19. The display substrate according to claim 1, further comprising: A plurality of second signal lines are provided on the substrate, and the pixel driving circuit of at least one sub-pixel is electrically connected to the second signal lines; At least part of the second signal lines is located in the display area and is provided in a different layer from the first signal lines, and at least part of the second signal lines extends along the second direction; At least part of the pixel driving circuits of adjacent sub-pixels in the same row are symmetrically arranged with respect to the second center line extending along the second direction. The second signal lines connected to the pixel driving circuits of adjacent sub-pixels in the same row are symmetrically arranged with respect to the second center line. The center line along the second direction of the main body portion of the first electrode of at least one light-emitting device is the second center line.

20. The display substrate according to claim 19, wherein, The first signal line includes: one of a first initial signal line, a second initial signal line, a first power supply line, or a second power supply line; The second signal line includes: at least one of a data signal line, a first initial signal line, a second initial signal line, a first power supply line, or a second power supply line; The first signal line and the second signal line are different signal lines.

21. The display substrate according to claim 20, further comprising: A plurality of first anode connection electrodes and a plurality of second anode connection electrodes are provided on the substrate and located in the display area. The first signal line includes: at least one first closed area; The first anode connection electrode and the second anode connection electrode are respectively connected to the pixel driving circuit where they are located and the connection portion of the first electrode of the light-emitting device connected to the pixel driving circuit where they are located; The plurality of first anode connection electrodes and the plurality of second anode connection electrodes correspond to each other one by one. The positive projection of the first anode connection electrode on the substrate at least partially overlaps with the positive projection of the corresponding second anode connection electrode on the substrate and is electrically connected to the corresponding second anode connection electrode; The positive projections of at least one first anode connection electrode and at least one second anode connection electrode on the substrate are within the positive projection range of at least one first closed area on the substrate.

22. The display substrate according to claim 21, wherein, When the second signal line includes the first power line, the first power line connected to the sub-pixel is the same power line as the first power line connected to one of the adjacent sub-pixels. The first power line includes: a fourth closed region. The orthographic projection of the main body portion of the first electrode of at least one light-emitting device onto the substrate at least partially overlaps with the orthographic projection of the first power line onto the substrate; The orthographic projections of at least one first anode connecting electrode and at least one second anode connecting electrode onto the substrate are located within the range of the orthographic projection of at least one fourth closed region onto the substrate; The orthographic projection of at least one fourth closed region on the substrate at least partially overlaps with the orthographic projection of at least one connecting signal line on the substrate.

23. The display substrate according to claim 22, wherein, The first signal line includes: a main signal line, and the main signal line includes: a plurality of first main structures; The orthographic projection of at least one first power line on the substrate at least partially overlaps with the orthographic projection of at least one first main structure on the substrate.

24. The display substrate according to claim 21, wherein, The display substrate includes: a driving structure layer and a light-emitting structure layer sequentially stacked on the substrate, wherein the light-emitting device is located in the light-emitting structure layer; the pixel driving circuit includes: at least one transistor; The driving structure layer includes: a first conductive layer, a second conductive layer, and a third conductive layer; The first conductive layer includes: a first electrode and a second electrode of at least one transistor in at least one pixel driving circuit; The second conductive layer includes: a second signal line and a second anode connection electrode; The third conductive layer includes: a first signal line and a first anode connection electrode.

25. The display substrate according to claim 24, wherein, The first conductive layer is located on the side of at least one of the second and third conductive layers near the substrate; The third conductive layer is located on the side of the second conductive layer closer to the substrate, or the third conductive layer is located on the side of the second conductive layer farther from the substrate.

26. The display substrate according to claim 24, wherein, Also includes: An optical structure layer, the optical structure layer comprising: a plurality of filters and a black matrix structure; The optical structure layer is located on the side of the light-emitting structure layer away from the substrate; The orthographic projection of at least one filter onto the substrate at least partially overlaps with the orthographic projection of at least one pixel opening onto the substrate.

27. A display device, comprising: The display substrate as described in any one of claims 1 to 26.

28. The display device according to claim 27, wherein, The first signal line in the display substrate includes a third enclosed region, which is a light-transmitting region. The display device further includes: multiple photosensitive devices; The orthographic projection of at least one photosensitive device on the substrate at least partially overlaps with the orthographic projection of at least one third enclosed region on the substrate.

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