Electrostatic discharge protection circuit and electronic device

Abstract

The present application discloses an electrostatic discharge (ESD) protection circuit and an electronic device. The ESD protection circuit comprises an internal circuit, a first component, a plurality of inductors, and a plurality of ESD protection units; the plurality of ESD protection units include a first protection structure, a second protection structure, and a fifth ESD protection unit; the plurality of inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit is connected to the first branch and the second protection structure; and two ends of each of the first protection structure, the second protection structure, and the fifth ESD protection unit are respectively connected to a power line and a ground wire. The technical solution provided in embodiments of the present application can improve, on the basis of the first protection structure and the second protection structure, the protection capability for the internal circuit under rapid ESD pulses, improve the ESD protection capability, and reduce the impact of a capacitive load of the second protection structure on signals, thereby improving the quality of the signals.

Description

Electrostatic protection circuit and electronic equipment

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on January 29, 2024, with application number 202410123093.0 and application name “An Electrostatic Protection Circuit and Electronic Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present invention relates to the field of circuit technology, in particular to an electrostatic protection circuit and electronic equipment. Background Art

[0003] As a subcategory of integrated circuits, RF chips, like most integrated circuits, are developing towards high speed and high integration. To achieve this high integration, advanced processes with smaller critical dimensions are becoming increasingly widely used. While advanced processes offer advantages in area and power consumption, they also reduce transistors' capabilities in areas such as electrostatic discharge (ESD) tolerance. To ensure sufficient ESD protection for the chip, ESD protection units are typically added to the chip ports for port voltage clamping and static charge discharge.

[0004] However, adding an electrostatic protection unit destroys the impedance matching of the high-speed RF port, directly affecting the signal quality and resulting in a low electrostatic protection capability.

[0005] Summary of the Invention

[0006] The purpose of the present invention is to provide an electrostatic protection circuit and electronic equipment to improve electrostatic protection capability and signal quality.

[0007] The embodiments of this application adopt the following technical solutions:

[0008] In a first aspect, an embodiment of the present application provides an electrostatic protection circuit, comprising: an internal circuit, a first component, a plurality of inductors, and a plurality of electrostatic protection units, wherein the plurality of electrostatic protection units include a first protection structure, a second protection structure, and a fifth electrostatic protection unit;

[0009] A plurality of inductors are connected to the first component to form a first branch, a first protection structure is connected to the first branch, and a second protection structure is connected to the first branch;

[0010] The internal circuit is connected to the first branch and the second protection structure;

[0011] Two ends of the first protection structure, the second protection structure and the fifth electrostatic protection unit are connected to the power line and the ground line respectively.

[0012] In the technical solution provided in the embodiment of the present application, the protection capability of the internal circuit under fast ESD pulses can be improved according to the first protection structure and the second protection structure, and the electrostatic protection capability can be improved, while the impact of the capacitive load of the second protection structure on the signal can be reduced, thereby improving the signal quality.

[0013] In an implementation of the first aspect, the first protection structure includes a first electrostatic protection unit and a second electrostatic protection unit, and the first electrostatic protection unit is connected in series with the second electrostatic protection unit; the second protection structure includes a third electrostatic protection unit and a fourth electrostatic protection unit, and the third electrostatic protection unit is connected in series with the fourth electrostatic protection unit.

[0014] In an implementation of the first aspect, the first electrostatic protection unit, the second electrostatic protection unit, the third electrostatic protection unit, the fourth electrostatic protection unit, and the fifth electrostatic protection unit include ESD protection units formed of a PN junction and an MIS structure.

[0015] In the technical solution provided in the embodiment of the present application, by adding a second protection structure, the protection capability of the internal circuit under fast ESD pulses can be improved.

[0016] In an implementation of the first aspect, the multiple inductors include a first inductor, a second inductor, and a third inductor, and the electrostatic protection circuit further includes:

[0017] One end of the first electrostatic protection unit is connected to the first inductor, the second inductor and the second electrostatic protection unit.

[0018] The other end of the first electrostatic protection unit is connected to the power line, and the second electrostatic protection unit is connected to the ground line;

[0019] One end of the third electrostatic protection unit is connected to the power line, the first electrostatic protection unit and the fifth electrostatic protection unit, the other end of the third electrostatic protection unit is connected to the second inductor, the second branch and the fourth electrostatic protection unit, and the fourth electrostatic protection unit is connected to the ground line.

[0020] In the technical solution provided in the embodiment of the present application, an inductor with two taps is used to form an electrostatic protection circuit together with a two-stage electrostatic protection unit and a first component.

[0021] In an implementation of the first aspect, the internal circuit is connected to the first branch and the second protection structure, including:

[0022] The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor and the second branch.

[0023] In an implementation of the first aspect, the electrostatic protection circuit further includes: a signal port pad, the signal port pad is connected to the first inductor and the first branch, and the first branch includes a third inductor and a first component.

[0024] In an implementation of the first aspect, the signal port pad is connected to the first inductor and the first branch, including:

[0025] The signal port pad is connected to the first inductor and the first component; or,

[0026] The signal port pad is connected to the first inductor, the third inductor, and the first component.

[0027] In an implementation of the first aspect, the multiple inductors include a first inductor, a second inductor, and a third inductor, and the multiple inductors are connected to the first component to form a first branch, including:

[0028] The first inductor and the second inductor are connected in series, and the first component and the third inductor are connected to form a second branch;

[0029] Two ends of the second branch are respectively connected to the first inductor and the second inductor to form a first branch.

[0030] In an implementation of the first aspect, the first component is connected to the third inductor to form a second branch, including:

[0031] The first component and the third inductor are connected in series to form a second branch; or,

[0032] The first component is connected in parallel with the third inductor to form a second branch.

[0033] In an implementation of the first aspect, the internal circuit is connected to the third ESD protection unit, the fourth ESD protection unit, the second inductor, and the second branch, including:

[0034] The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor and the third inductor; or,

[0035] The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor, the third inductor and the first component.

[0036] In an implementation manner of the first aspect, the first component includes a bridge capacitor or an ESD diode.

[0037] In the technical solution provided in the embodiment of the present application, the bridge capacitor can be replaced by the junction capacitance of the ESD diode, which can provide a high-frequency current branch while providing voltage clamping at both ends of the inductor.

[0038] In a second aspect, an embodiment of the present application provides an electronic device, which includes the electrostatic protection circuit in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] FIG1 is a schematic diagram of an electrostatic protection circuit provided in the related art;

[0040] FIG2 is a schematic diagram of another electrostatic protection circuit provided in the related art;

[0041] FIG3 is a voltage waveform diagram of the clamping voltage in FIG2 ;

[0042] FIG4 is a schematic diagram of another electrostatic protection circuit provided in the related art;

[0043] FIG5 is a schematic diagram of the hardware structure of an electronic device provided in one embodiment of the present application;

[0044] FIG6 is a schematic diagram of a scenario of an electrostatic protection circuit provided in an embodiment of the present application;

[0045] FIG7 is a schematic diagram of the installation position of an electrostatic protection circuit provided in one embodiment of the present application;

[0046] FIG8 is a schematic diagram of an electrostatic protection circuit provided in an embodiment of the present application;

[0047] FIG9A is a comparison diagram of voltage waveforms of the electrostatic protection circuit in FIG8 and the electrostatic protection circuit in FIG2;

[0048] FIG9B is a comparison diagram of return losses of the electrostatic protection circuit in FIG8 and the electrostatic protection circuit in FIG4;

[0049] FIG9C is a comparison diagram of the insertion loss of the electrostatic protection circuit in FIG8 and the electrostatic protection circuit in FIG4;

[0050] FIG10 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application;

[0051] FIG11 is a comparison diagram of voltage drops of the electrostatic protection circuit in FIG10 and the electrostatic protection circuit in FIG8 ;

[0052] FIG12 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application;

[0053] FIG13 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0054] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limiting the present invention.

[0055] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0056] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the embodiments of the present application. The singular forms "a", "an", "the" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms unless the context clearly indicates otherwise.

[0057] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. Furthermore, the character " / " in this document generally indicates an "or" relationship between the associated objects.

[0058] An electrostatic protection circuit is provided in the related art. FIG1 is a schematic diagram of an electrostatic protection circuit provided in the related art. As shown in FIG1 , the electrostatic protection circuit includes: a first electrostatic protection unit 11, a second electrostatic protection unit 12, an internal circuit 13, a signal port pad 14, and a fifth electrostatic protection unit 15. Among them, one end of the first electrostatic protection unit 11 is connected to the power line / ESD bus, the other end of the first electrostatic protection unit 11 is connected to the second electrostatic protection unit 12, the internal circuit 13, and the signal port pad 14, the internal circuit 13 is connected to the signal port pad 14, the second electrostatic protection unit 12 is connected to the ground line, and the two ends of the fifth electrostatic protection unit 15 are respectively connected to the power line / ESD bus and the ground line.

[0059] ESD protection units are typically constructed from a PN junction and a metal-insulator-semiconductor (MIS) structure, which inevitably introduces parasitics (such as leakage current and parasitic capacitance). These parasitics disrupt impedance matching for high-speed RF ports, directly impacting signal quality. Furthermore, ESD protection units also occupy a certain amount of on-chip space, increasing the chip area. These factors limit their practical use.

[0060] Another electrostatic protection circuit is provided in the related art. FIG2 is a schematic diagram of another electrostatic protection circuit provided in the related art. As shown in FIG2, the electrostatic protection circuit includes: a first electrostatic protection unit 21, a second electrostatic protection unit 22, an internal circuit 23, a signal port pad 24, a fifth electrostatic protection unit 25, a first inductor 26, a second inductor 27, and a bridge capacitor 28. Among them, one end of the first electrostatic protection unit 21 is connected to the power line / ESD bus, and the other end of the first electrostatic protection unit 21 is connected to the second electrostatic protection unit 22, the first inductor 26, and the second inductor 27. The signal port pad 24 is connected to the first inductor 26, the first inductor 26 is connected to the second inductor 27, and the second inductor 27 is connected to the internal circuit 23. The signal port pad 24 is also connected to the bridge capacitor 28, and the bridge capacitor 28 is connected to the second inductor 27 and the internal circuit 23. The second electrostatic protection unit 22 is connected to the ground line, and the two ends of the fifth electrostatic protection unit 25 are respectively connected to the power line / ESD bus and the ground line.

[0061] In the ESD protection circuitry of high-frequency, wide-bandwidth ports, a tapped inductor and bridge capacitor can be combined with an ESD protection unit to form a T-coil structure. This structure offsets the parasitic capacitance introduced by the ESD protection unit, thereby relaxing restrictions on the use of the ESD protection unit on the port.

[0062] In the frequency range below the operating bandwidth, the signal current primarily flows through the inductor branch of the first inductor 26 and the second inductor 27. By properly setting the parameters of each component, the mutual inductance of the first and second inductors 26, 27 ensures that the currents flowing into and out of the node connecting the ESD protection unit and the inductors are approximately equal, resulting in the ESD protection unit having no significant effect on the signal. In the frequency range above the operating bandwidth, the signal primarily enters the internal circuit through the bridge capacitor, bypassing the inductor branch and thus having no effect on the signal from the ESD protection unit.

[0063] Figure 3 is a voltage waveform diagram of the clamping voltage in Figure 2. As shown in Figure 3, in the ESD protection circuit of Figure 2, the ESD protection unit (node ​​n2) is not directly connected to the internal circuit 23 (node ​​n3), but is connected via a second inductor 27. For ESD events with a relatively slow rising edge, such as Human Body Model (HBM) pulses, this provides sufficient voltage clamping. However, for fast discharge models, such as Charged Device Model (CDM) pulses, the ESD protection unit cannot effectively clamp the internal circuit 23 due to the additional voltage drop across the second inductor 27.

[0064] Another electrostatic protection circuit is provided in the related art. FIG4 is a schematic diagram of another electrostatic protection circuit provided in the related art. As shown in FIG4 , the electrostatic protection circuit includes: a first electrostatic protection unit 31, a second electrostatic protection unit 32, an internal circuit 33, a signal port pad 34, a fifth electrostatic protection unit 35, a first inductor 36, a second inductor 37, a bridge capacitor 38, a third electrostatic protection unit 39, and a fourth electrostatic protection unit 40. Among them, one end of the first electrostatic protection unit 31 is connected to the power line / ESD bus, and the other end of the first electrostatic protection unit 31 is connected to the second electrostatic protection unit 32, the first inductor 36, and the second inductor 37. The signal port pad 34 is connected to the first inductor 36, the first inductor 36 is connected to the second inductor 37, and the second inductor 37 is connected to the internal circuit 33. The signal port pad 34 is also connected to the bridge capacitor 38, and the bridge capacitor 38 is connected to the second inductor 37 and the internal circuit 33. The second ESD protection unit 32 is connected to the ground line. One end of the third ESD protection unit 39 is connected to the power line / ESD bus. The other end of the third ESD protection unit 39 is connected to the fourth ESD protection unit 40, the second inductor 37, the bridge capacitor 38, and the internal circuit 33. The fourth ESD protection unit 40 is connected to the ground line. The two ends of the fifth ESD protection unit 35 are connected to the power line / ESD bus and the ground line, respectively. To effectively protect the internal circuit 33, a stack of ESD protection units (third ESD protection unit 39 and fourth ESD protection unit 40) can be added at adjacent nodes to form a two-stage protection structure. However, this will introduce a new capacitive load, disrupting impedance matching and affecting signal integrity.

[0065] In order to solve the technical problems in the related art, an embodiment of the present application provides an electronic device.

[0066] In some embodiments, electronic devices include but are not limited to Or devices with other operating systems.

[0067] In one embodiment of the present application, electronic devices include but are not limited to mobile phones, virtual reality (VR) devices, watches, smart screens, tablet computers, laptops, wearable devices, car computers, etc.

[0068] FIG2 is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. For example, as shown in FIG2 , the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display 194, and a subscriber identification module (SIM) card interface 195, etc. The sensor module 180 may include a pressure sensor 180A, a gyroscope sensor (GYRO for short) 180B, an air pressure sensor 180C, a magnetic sensor 180D, an accelerometer (ACC for short) 180E, a distance sensor 180F, a proximity light sensor 180G, a fingerprint sensor 180H, a temperature sensor 180J, a touch sensor 180K, an ambient light sensor 180L, a bone conduction sensor 180M, etc.

[0069] It should be understood that the structures illustrated in the embodiments of the present application do not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0070] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0071] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0072] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the same instruction or data again, it can directly access the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0073] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface.

[0074] It is understood that the interface connection relationship between the modules illustrated in the embodiments of the present application is merely an illustrative illustration and does not constitute a structural limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may also adopt different interface connection methods from the above embodiments, or a combination of multiple interface connection methods.

[0075] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0076] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. Each antenna in electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In other embodiments, the antennas can be used in conjunction with a tuning switch.

[0077] The mobile communication module 150 can provide solutions for wireless communications including 2G / 3G / 4G / 5G applied to the electronic device 100. The mobile communication module 150 may include at least one filter, a switch, a power amplifier, a low noise amplifier (LNA), etc. The mobile communication module 150 can receive electromagnetic waves from the antenna 1, and filter, amplify, and process the received electromagnetic waves, and transmit them to the modulation and demodulation processor for demodulation. The mobile communication module 150 can also amplify the signal modulated by the modulation and demodulation processor, and convert it into electromagnetic waves for radiation through the antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be set in the same device as at least some of the modules of the processor 110.

[0078] The wireless communication module 160 can provide wireless communication solutions including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc., which are applied to the electronic device 100. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive the signal to be sent from the processor 110, frequency modulate it, amplify it, and convert it into electromagnetic waves for radiation through the antenna 2.

[0079] In some embodiments, the antenna 1 of the electronic device 100 is coupled to the mobile communication module 150, and the antenna 2 is coupled to the wireless communication module 160, so that the electronic device 100 can communicate with a network and other devices through wireless communication technologies. The wireless communication technologies may include global system for mobile communications (GSM), general packet radio service (GPRS), code division multiple access (CDMA), wideband code division multiple access (WCDMA), time-division code division multiple access (TD-SCDMA), long term evolution (LTE), BT, GNSS, WLAN, NFC, FM, and / or IR technology. The GNSS may include a global positioning system (GPS), a global navigation satellite system (GLONASS), a Beidou navigation satellite system (BDS), a quasi-zenith satellite system (QZSS) and / or a satellite based augmentation system (SBAS).

[0080] Electronic device 100 implements display functionality through a GPU, display screen 194, and an application processor. A GPU is a microprocessor for image processing that connects display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0081] Display screen 194 is used to display images, videos, and the like. Display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a MiniLED, a MicroLED, a Micro-oLed, or a quantum dot light-emitting diode (QLED). In some embodiments, electronic device 100 may include one or N display screens 194, where N is a positive integer greater than one.

[0082] The electronic device 100 can implement audio functions such as music playback and recording through the audio module 170, the speaker 170A, the receiver 170B, the microphone 170C, the headphone jack 170D, and the application processor.

[0083] In order to solve the technical problems in the related art, an embodiment of the present application provides a scenario of an electrostatic protection circuit. Figure 6 is a schematic diagram of the scenario of the electrostatic protection circuit provided by an embodiment of the present application. As shown in Figure 6, the scenario schematic diagram includes a robotic arm, a suction nozzle, a chip and a printed circuit board (Printed Circuit Board, referred to as PCB). The robotic arm is connected to the suction nozzle, the suction nozzle is connected to the chip, and the chip may include an electrostatic protection circuit. The chip can be brought into contact with the PCB board through the robotic arm, so that CDM discharge is caused between the chip and the PCB board. The electrostatic protection circuit provided in an embodiment of the present application can be applied to the CDM discharge process.

[0084] Based on the electronic device in Figure 2, Figure 7 is a schematic diagram of the setting position of the electrostatic protection circuit provided in an embodiment of the present application. As shown in Figure 7, the electronic device includes a PCB circuit board, the PCB circuit board includes a radio frequency chip, and the radio frequency chip includes an electrostatic protection circuit. The electrostatic protection circuit includes a power line / ESD bus, a signal interface pad, an ESD protection structure, an internal circuit and a ground wire. Among them, the signal interface pad is connected to the ESD protection structure, the ESD protection structure is connected to the power line / ESD bus, the ground wire and the internal circuit, and the internal circuit is connected to the power line / ESD bus and the ground wire.

[0085] The electrostatic protection circuit provided in one embodiment of the present application is mainly used to improve the protection capability of the signal port of the radio frequency chip against fast ESD events (such as CDM pulses). A two-stage electrostatic protection structure is used, and two-tap inductors and bridge capacitors are used to offset the parasitic capacitance introduced by the two-stage electrostatic protection unit. The electrostatic protection circuit includes: an internal circuit, a first component, multiple inductors and multiple electrostatic protection units, and the multiple electrostatic protection units include a first protection structure, a second protection structure and a fifth electrostatic protection unit; multiple inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit are connected to the power line and the ground line at both ends respectively.

[0086] Specifically, the electronic device in FIG. 2 may include an electrostatic protection circuit as shown in FIG. 8 , FIG. 10 , FIG. 12 or FIG. 13 . The electrostatic protection circuit is described in detail below in conjunction with FIG. 8 , FIG. 10 , FIG. 12 or FIG. 13 .

[0087] Figure 8 is a schematic diagram of an electrostatic protection circuit provided in an embodiment of the present application. As shown in Figure 8, the electrostatic protection circuit includes: an internal circuit 43, a first component, multiple inductors and multiple electrostatic protection units, and the multiple electrostatic protection units include a first protection structure, a second protection structure and a fifth electrostatic protection unit 45; multiple inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit 43 is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit 45 are connected to the power line and the ground line at both ends, respectively.

[0088] In one embodiment of the present application, the first protection structure includes a first electrostatic protection unit 41 and a second electrostatic protection unit 42, and the first electrostatic protection unit 41 is connected in series with the second electrostatic protection unit 42; the second protection structure includes a third electrostatic protection unit 49 and a fourth electrostatic protection unit 50, and the third electrostatic protection unit 49 is connected in series with the fourth electrostatic protection unit 50.

[0089] In one embodiment of the present application, the first electrostatic protection unit 41 , the second electrostatic protection unit 42 , the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 and the fifth electrostatic protection unit 45 include ESD protection units formed of PN junctions and MIS structures.

[0090] In one embodiment of the present application, the multiple inductors include a first inductor 46, a second inductor 47 and a third inductor 51, one end of the first electrostatic protection unit 41 is connected to the first inductor 46, the second inductor 47 and the second electrostatic protection unit 42, the other end of the first electrostatic protection unit 41 is connected to the power line / ESD bus, and the second electrostatic protection unit 42 is connected to the ground line.

[0091] One end of the third electrostatic protection unit 49 is connected to the power line / ESD bus, the first electrostatic protection unit 41 and the fifth electrostatic protection unit 45, and the other end of the third electrostatic protection unit 49 is connected to the second inductor 47, the second branch and the fourth electrostatic protection unit 50, and the fourth electrostatic protection unit 50 is connected to the ground line.

[0092] In one embodiment of the present application, the internal circuit 43 is connected to the third ESD protection unit 49, the fourth ESD protection unit 50, the second inductor 47, and the second branch, wherein the bridge capacitor 48 and the third inductor 51 are connected in series to form the second branch.

[0093] Specifically, the internal circuit 43 is connected to the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 , the second inductor 47 , and the third inductor 51 .

[0094] In one embodiment of the present application, the electrostatic protection circuit further includes: a signal port pad 44 , the signal port pad 44 is connected to the first inductor 46 and the first branch, and the first branch includes a third inductor 51 and a bridge capacitor 48 .

[0095] Specifically, the signal port pad 44 is connected to the first inductor 46 and the bridge capacitor 48 .

[0096] Specifically, the first inductor 46 and the second inductor 47 are connected in series, and the bridge capacitor 48 and the third inductor 51 are connected to form a second branch; the two ends of the second branch are respectively connected to the first inductor 46 and the second inductor 47 to form a first branch.

[0097] The ESD protection circuit in Figure 8 utilizes two tapped inductors (first inductor 46, second inductor 47, and third inductor 51), with tapped nodes n2 and n3. Third inductor 51 is located in the branch where bridge capacitor 48 is located. The second protection structure is directly connected to the input node (node ​​n3) of internal circuit 43, providing more efficient voltage clamping. The parasitic capacitance introduced by the second protection structure is offset by the second inductor 47, third inductor 51, and their mutual inductance.

[0098] Figure 9A is a voltage waveform comparison diagram of the electrostatic protection circuit in Figure 8 and the electrostatic protection circuit in Figure 2, that is, the voltage waveform of the n3 node of the electrostatic protection circuit in Figure 8 is compared with that of the electrostatic protection circuit in Figure 2 under the CDM pulse. As shown in Figure 9A, the voltage waveform of the n3 node of the electrostatic protection circuit in Figure 8 under the CDM pulse is relatively flat, and the voltage waveform of the n3 node of the electrostatic protection circuit in Figure 2 under the CDM pulse has a larger jitter.

[0099] Figure 9B compares the return loss of the ESD protection circuit in Figure 8 with that of the ESD protection circuit in Figure 4, and Figure 9C compares the insertion loss of the ESD protection circuit in Figure 8 with that of the ESD protection circuit in Figure 4. These figures can be used to compare the impact of the ESD protection circuit in Figure 8 and the ESD protection circuit in Figure 4 on port signals. As shown in Figure 9B, the return loss of the ESD protection circuit in Figure 8 is lower than that of the ESD protection circuit in Figure 4 at the same frequency. As shown in Figure 9C, the insertion loss of the ESD protection circuit in Figure 8 is approximately zero at all frequencies, while the insertion loss of the ESD protection circuit in Figure 4 decreases with increasing frequency. As shown in Figures 9B and 9C, simulations of the impact of the ESD protection circuit in Figure 8 on port signals show that, after using two-tap inductors and bridge capacitors, the impact of the parasitic capacitance of the two-stage protection structure on the signal can be eliminated within a wide bandwidth.

[0100] In the technical solution provided by the embodiment of the present application, due to the addition of the second protection structure, the embodiment of the present application has a better voltage clamping effect, which can effectively improve the protection capability of the chip port against fast ESD events (such as CDM pulses).

[0101] In the technical solution provided in the embodiment of the present application, the structure of two-tap inductors + bridge capacitors can effectively offset the parasitic capacitance introduced by the electrostatic protection unit and reduce the impact of the electrostatic protection circuit on signal integrity.

[0102] Figure 10 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application. As shown in Figure 10, the electrostatic protection circuit includes: an internal circuit 43, a first component, multiple inductors and multiple electrostatic protection units, and the multiple electrostatic protection units include a first protection structure, a second protection structure and a fifth electrostatic protection unit 45; multiple inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit 43 is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit 45 are connected to the power line and the ground line at both ends, respectively.

[0103] In one embodiment of the present application, the first protection structure includes a first electrostatic protection unit 41 and a second electrostatic protection unit 42, and the first electrostatic protection unit 41 is connected in series with the second electrostatic protection unit 42; the second protection structure includes a third electrostatic protection unit 49 and a fourth electrostatic protection unit 50, and the third electrostatic protection unit 49 is connected in series with the fourth electrostatic protection unit 50.

[0104] In one embodiment of the present application, the first electrostatic protection unit 41 , the second electrostatic protection unit 42 , the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 and the fifth electrostatic protection unit 45 include ESD protection units formed of PN junctions and MIS structures.

[0105] In one embodiment of the present application, the multiple inductors include a first inductor 46, a second inductor 47 and a third inductor 51, one end of the first electrostatic protection unit 41 is connected to the first inductor 46, the second inductor 47 and the second electrostatic protection unit 42, the other end of the first electrostatic protection unit 41 is connected to the power line / ESD bus, and the second electrostatic protection unit 42 is connected to the ground line.

[0106] One end of the third electrostatic protection unit 49 is connected to the power line / ESD bus, the first electrostatic protection unit 41 and the fifth electrostatic protection unit 45, and the other end of the third electrostatic protection unit 49 is connected to the second inductor 47, the second branch and the fourth electrostatic protection unit 50, and the fourth electrostatic protection unit 50 is connected to the ground line.

[0107] In one embodiment of the present application, the internal circuit 43 is connected to the third ESD protection unit 49, the fourth ESD protection unit 50, the second inductor 47, and the second branch, wherein the ESD diode 52 and the third inductor 51 are connected in series to form the second branch.

[0108] Specifically, the internal circuit 43 is connected to the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 , the second inductor 47 , and the third inductor 51 .

[0109] In one embodiment of the present application, the electrostatic protection circuit further includes: a signal port pad 44 , the signal port pad 44 is connected to the first inductor 46 and the first branch, and the first branch includes a third inductor 51 and an ESD diode 52 .

[0110] Specifically, the signal port pad 44 is connected to the first inductor 46 and the ESD diode 52 .

[0111] Specifically, the first inductor 46 and the second inductor 47 are connected in series, the ESD diode 52 and the third inductor 51 are connected to form a second branch, and both ends of the second branch are respectively connected to the first inductor 46 and the second inductor 47 to form a first branch.

[0112] In the technical solution provided in the embodiments of this application, the bridge capacitor is replaced with an ESD diode. Because the ESD diode has junction capacitance, this junction capacitance can achieve the same effect as the bridge capacitor. Furthermore, during a rapid ESD event, large voltages will be induced across the first, second, and third inductors, particularly between nodes n1 and n3, potentially leading to inductor breakdown. The ESD diode also acts as a voltage clamp.

[0113] FIG11 is a voltage drop comparison diagram of the ESD protection circuit in FIG10 and the ESD protection circuit in FIG8 . As shown in FIG11 , due to the addition of the ESD diode, the voltage drop at the n1 - n3 node on the inductor under the CDM pulse can be effectively suppressed.

[0114] Figure 12 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application. As shown in Figure 12, the electrostatic protection circuit includes: an internal circuit 43, a first component, multiple inductors and multiple electrostatic protection units, and the multiple electrostatic protection units include a first protection structure, a second protection structure and a fifth electrostatic protection unit 45; multiple inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit 43 is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit 45 are connected to the power line and the ground line at both ends, respectively.

[0115] In one embodiment of the present application, the first protection structure includes a first electrostatic protection unit 41 and a second electrostatic protection unit 42, and the first electrostatic protection unit 41 is connected in series with the second electrostatic protection unit 42; the second protection structure includes a third electrostatic protection unit 49 and a fourth electrostatic protection unit 50, and the third electrostatic protection unit 49 is connected in series with the fourth electrostatic protection unit 50.

[0116] In one embodiment of the present application, the first electrostatic protection unit 41 , the second electrostatic protection unit 42 , the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 and the fifth electrostatic protection unit 45 include ESD protection units formed of PN junctions and MIS structures.

[0117] In one embodiment of the present application, the multiple inductors include a first inductor 46, a second inductor 47 and a third inductor 51, one end of the first electrostatic protection unit 41 is connected to the first inductor 46, the second inductor 47 and the second electrostatic protection unit 42, the other end of the first electrostatic protection unit 41 is connected to the power line / ESD bus, and the second electrostatic protection unit 42 is connected to the ground line.

[0118] One end of the third electrostatic protection unit 49 is connected to the power line / ESD bus, the first electrostatic protection unit 41 and the fifth electrostatic protection unit 45, and the other end of the third electrostatic protection unit 49 is connected to the second inductor 47, the second branch and the fourth electrostatic protection unit 50, and the fourth electrostatic protection unit 50 is connected to the ground line.

[0119] In one embodiment of the present application, the internal circuit 43 is connected to the third ESD protection unit 49, the fourth ESD protection unit 50, the second inductor 47, and the second branch. The bridge capacitor 48 is connected in parallel with the third inductor 51 to form the second branch.

[0120] Specifically, the internal circuit 43 is connected to the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 , the second inductor 47 , the third inductor 51 and the bridge capacitor 48 .

[0121] In one embodiment of the present application, the electrostatic protection circuit further includes: a signal port pad 44 , the signal port pad 44 is connected to the first inductor 46 and the first branch, and the first branch includes a third inductor 51 and an ESD diode 52 .

[0122] Specifically, the signal port pad 44 is connected to the first inductor 46 , the third inductor 51 and the bridge capacitor 48 .

[0123] Specifically, the first inductor 46 and the second inductor 47 are connected in series, the bridge capacitor 48 and the third inductor 51 are connected in parallel to form a second branch, and both ends of the second branch are respectively connected to the first inductor 46 and the second inductor 47 to form a first branch.

[0124] In the technical solution provided in the embodiment of the present application, the series branch of the bridge capacitor 48 and the third inductor 51 in Figure 8 is changed into a parallel branch, and its technical effect is similar to that of the electrostatic protection circuit in Figure 8, which will not be repeated here.

[0125] Figure 13 is a schematic diagram of another electrostatic protection circuit provided in an embodiment of the present application. As shown in Figure 13, the electrostatic protection circuit includes: an internal circuit 43, a first component, multiple inductors and multiple electrostatic protection units, and the multiple electrostatic protection units include a first protection structure, a second protection structure and a fifth electrostatic protection unit 45; multiple inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit 43 is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit 45 are connected to the power line and the ground line at both ends, respectively.

[0126] In one embodiment of the present application, the first protection structure includes a first electrostatic protection unit 41 and a second electrostatic protection unit 42, and the first electrostatic protection unit 41 is connected in series with the second electrostatic protection unit 42; the second protection structure includes a third electrostatic protection unit 49 and a fourth electrostatic protection unit 50, and the third electrostatic protection unit 49 is connected in series with the fourth electrostatic protection unit 50.

[0127] In one embodiment of the present application, the first electrostatic protection unit 41 , the second electrostatic protection unit 42 , the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 and the fifth electrostatic protection unit 45 include ESD protection units formed of PN junctions and MIS structures.

[0128] In one embodiment of the present application, the multiple inductors include a first inductor 46, a second inductor 47 and a third inductor 51, one end of the first electrostatic protection unit 41 is connected to the first inductor 46, the second inductor 47 and the second electrostatic protection unit 42, the other end of the first electrostatic protection unit 41 is connected to the power line / ESD bus, and the second electrostatic protection unit 42 is connected to the ground line.

[0129] One end of the third electrostatic protection unit 49 is connected to the power line / ESD bus, the first electrostatic protection unit 41 and the fifth electrostatic protection unit 45, and the other end of the third electrostatic protection unit 49 is connected to the second inductor 47, the second branch and the fourth electrostatic protection unit 50, and the fourth electrostatic protection unit 50 is connected to the ground line.

[0130] In one embodiment of the present application, the internal circuit 43 is connected to the third ESD protection unit 49, the fourth ESD protection unit 50, the second inductor 47, and the second branch, wherein the ESD diode 52 is connected in parallel with the third inductor 51 to form the second branch.

[0131] Specifically, the internal circuit 43 is connected to the third electrostatic protection unit 49 , the fourth electrostatic protection unit 50 , the second inductor 47 , the third inductor 51 , and the ESD diode 52 .

[0132] In one embodiment of the present application, the electrostatic protection circuit further includes: a signal port pad 44 , the signal port pad 44 is connected to the first inductor 46 and the first branch, and the first branch includes a third inductor 51 and an ESD diode 52 .

[0133] Specifically, the signal port pad 44 is connected to the first inductor 46 , the third inductor 51 , and the ESD diode 52 .

[0134] Specifically, the first inductor 46 and the second inductor 47 are connected in series, the ESD diode 52 and the third inductor 51 are connected in parallel to form a second branch, and both ends of the second branch are respectively connected to the first inductor 46 and the second inductor 47 to form a first branch.

[0135] In the technical solution provided in the embodiment of the present application, the series branch of the ESD diode 52 and the third inductor 51 in Figure 10 is changed into a parallel branch, and its technical effect is similar to that of the electrostatic protection circuit in Figure 10, which will not be repeated here.

[0136] In the technical solution provided in the embodiment of the present application, the electrostatic protection circuit includes: an internal circuit, a first component, a plurality of inductors and a plurality of electrostatic protection units, the plurality of electrostatic protection units including a first protection structure, a second protection structure and a fifth electrostatic protection unit; the plurality of inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; the internal circuit is connected to the first branch and the second protection structure; the first protection structure, the second protection structure and the fifth electrostatic protection unit are connected to the power line and the ground line at both ends, respectively. In the technical solution provided in the embodiment of the present application, the protection capability of the internal circuit under fast ESD pulses can be improved according to the first protection structure and the second protection structure, the electrostatic protection capability can be improved, and at the same time, the influence of the capacitive load of the second protection structure on the signal can be reduced, thereby improving the signal quality.

[0137] It should also be noted that, in the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the existence of A alone, the existence of A and B at the same time, and the existence of B alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b and c can represent: a, b, c, a and b, a and c, b and c or a and b and c, where a, b, c can be single or multiple.

[0138] In the embodiments of the present application, the terms "comprises," "includes," or any other variations thereof are intended to encompass non-exclusive inclusion, such that a process, method, commodity, or apparatus comprising a series of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, commodity, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not preclude the presence of additional identical elements in the process, method, commodity, or apparatus comprising the element.

[0139] The above description is merely a specific embodiment of the present application. Any person skilled in the art may easily conceive of variations or substitutions within the technical scope disclosed in this application, and such variations or substitutions shall be within the scope of protection of this application. The scope of protection of this application shall be subject to the scope of protection of the claims.

Claims

1. An electrostatic protection circuit, characterized in that: include: An internal circuit, a first component, a plurality of inductors, and a plurality of electrostatic protection units, wherein the plurality of electrostatic protection units include a first protection structure, a second protection structure, and a fifth electrostatic protection unit; The plurality of inductors are connected to the first component to form a first branch, the first protection structure is connected to the first branch, and the second protection structure is connected to the first branch; The internal circuit is connected to the first branch and the second protection structure; Two ends of the first protection structure, the second protection structure, and the fifth electrostatic protection unit are connected to the power line and the ground line respectively.

2. The electrostatic protection circuit according to claim 1, characterized in that: The first protection structure includes a first electrostatic protection unit and a second electrostatic protection unit, and the first electrostatic protection unit is connected in series with the second electrostatic protection unit; the second protection structure includes a third electrostatic protection unit and a fourth electrostatic protection unit, and the third electrostatic protection unit is connected in series with the fourth electrostatic protection unit.

3. The electrostatic protection circuit according to claim 2, characterized in that: The first electrostatic protection unit, the second electrostatic protection unit, the third electrostatic protection unit, the fourth electrostatic protection unit, and the fifth electrostatic protection unit include ESD protection units composed of PN junctions and MIS structures.

4. The electrostatic protection circuit according to claim 2, characterized in that: The plurality of inductors include a first inductor, a second inductor, and a third inductor, and the electrostatic protection circuit further includes: One end of the first electrostatic protection unit is connected to the first inductor, the second inductor and the second electrostatic protection unit. The other end of the first electrostatic protection unit is connected to the power line, and the second electrostatic protection unit is connected to the ground line; One end of the third electrostatic protection unit is connected to the power line, the first electrostatic protection unit and the fifth electrostatic protection unit, the other end of the third electrostatic protection unit is connected to the second inductor, the second branch and the fourth electrostatic protection unit, and the fourth electrostatic protection unit is connected to the ground line.

5. The electrostatic protection circuit according to claim 4, characterized in that: The internal circuit is connected to the first branch and the second protection structure, and includes: The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor, and the second branch.

6. The electrostatic protection circuit according to claim 4, characterized in that: The electrostatic protection circuit further includes: a signal port pad, wherein the signal port pad is connected to the first inductor and the first branch, and the first branch includes a third inductor and a first component.

7. The electrostatic protection circuit according to claim 6, characterized in that: The signal port pad is connected to the first inductor and the first branch, including: The signal port pad is connected to the first inductor and the first component; or, The signal port pad is connected to the first inductor, the third inductor, and the first component.

8. The electrostatic protection circuit according to claim 1, wherein: The plurality of inductors include a first inductor, a second inductor, and a third inductor, and the plurality of inductors are connected with the first component to form a first branch, comprising: The first inductor and the second inductor are connected in series, and the first component and the third inductor are connected to form a second branch; Two ends of the second branch are respectively connected to the first inductor and the second inductor to form the first branch.

9. The electrostatic protection circuit according to claim 8, characterized in that: The first component is connected to the third inductor to form a second branch, comprising: The first component and the third inductor are connected in series to form a second branch; or, The first component and the third inductor are connected in parallel to form a second branch.

10. The electrostatic protection circuit according to claim 9, characterized in that: The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor, and the second branch, and includes: The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor, and the third inductor; or, The internal circuit is connected to the third electrostatic protection unit, the fourth electrostatic protection unit, the second inductor, the third inductor, and the first component.

11. The electrostatic protection circuit according to claim 1, characterized in that: The first component includes a bridge capacitor or an ESD diode.

12. An electronic device, characterized in that: The electronic device comprises the electrostatic protection circuit according to any one of claims 1 to 11.

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