Laser devices and methods for producing thereof

Abstract

A vertical-cavity surface-emitting laser (VCSEL) includes a substrate; a first mirror formed above a first surface of the substrate; a second mirror formed above the first surface of the substrate; and an active region formed above the first surface of a substrate between the first mirror and the second mirror structure comprising at least one quantum-wells (QW) region. The first mirror and / or the second mirror include one or more low thermal conductivity layers.

Description

[0001] LASER DEVICES AND METHODS FOR PRODUCING THEREOF

[0002] Field

[0003] This present disclosure generally relates to semiconductor- based lasers and methods for producing thereof.

[0004] Background

[0005] FIG. 1 shows a diagram of a typical vertical cavity surface emitting laser (VCSEL) 100. The VCSEL 100 includes a p-type distributed Bragg reflecto (DBR) 105 at the top, and similarly a n-type DBR 110 a : the bottom.

[0006] The mirror or reflectors, e.g., the DBRs or DBR mirrors 105 and 110 are based on AlGaAs / GaAs material system. That is, each of the DBR mirrors 105 and 10 include alternating layers. For example, a first layer 112 can be a layer of Aluminum Gallium Arsenide (AlGAas) and a second layer 114 can be a layer of Gallium Arsenide (GaAs) . In some instances, example, the alternating layers may be of AlxGa!-xand GaAs. For AlxGai-x, x can indicate high aluminum content, x > 60 (at least 60% aluminum) , or low aluminum content, x < 40 (less than 40% aluminum) . In some instances, aluminum arsenide, (AlAs) may be used.

[0007] The VCSEL 100 can include an active region that is principally made of a p-i-n junction, which can include multiple quantumwells (MQWs) or quantum dot layers that generate photons. FIG. 1 shows a MQW or MQW layer 120. Alternatively, reference number 120 can designate a quantum dot layer.

[0008] The electrical and optical confinement in the VCSEL 100 is achieved by using an oxide layer 130, which can be located or placed above (and sometimes below) the active region. The oxide layer 130 can typically be an aluminum oxide layer (A12O3) . The oxide layer 130 can include an aperture region 150 . The aperture region 150 may be formed from a semiconductor layer or material .

[0009] These layers are typically grown on the GaAs substrate 140 and using a Metalorganic Chemical Vapor Deposition (MOCVD) technique .

[0010] As shown in FIG . 1 , the ohmic contacts at the top, also called the anode 165 and the ohmic contacts at the bottom, also called the cathode 160 are placed for inj ecting current flow into the device .

[0011] The VCSEL 100 can be configured to emit a light beam 170 .

[0012] The axes depicted in FIG . 1 show the typical directions with respect to the VCSEL 100 . The Z direction or vertical direction is a direction from the second reflector 110 to the first reflector 105 . The hori zontal or lateral directions perpendicular to the Z direction are an X direction and Y directions , e . g . , in a XY plane .

[0013] Generally, the goal is to design VCSELs to avoid generate too much heat internally which can negatively af fect performance . That is , VCSELs are typically designed to remove heat in order to optimi ze performance .

[0014] Brief Description of the Drawings

[0015] In the drawings , like reference characters generally refer to the same parts throughout the di f ferent views . The drawings are not necessarily to scale , emphasis instead generally being placed upon illustrating the principles of the disclosure . In the following description, various aspects of the disclosure are described with reference to the following drawings , in which : FIG . 1 shows a diagram of a typical vertical cavity surface emitting laser ;

[0016] FIGS . 2A-2C shows diagrams of a vertical cavity surface emitting lasers according to aspects of the present disclosure ; and

[0017] FIG . 3 show a flow diagram of a method according to at least one aspect of the present disclosure .

[0018] Description

[0019] The following detailed description refers to the accompanying drawings that show, by way of illustration, speci fic details and aspects in which the disclosure may be practiced . One or more aspects are described in suf ficient detail to enable those skilled in the art to practice the disclosure . Other aspects may be utili zed and structural , logical , and electrical changes may be made without departing from the scope of the disclosure . The various aspects described herein are not necessarily mutually exclusive , as some aspects can be combined with one or more other aspects to form new aspects . Various aspects are described in connection with methods and various aspects are described in connection with devices . However, it may be understood that aspects described in connection with methods may similarly apply to the devices , and vice versa . Throughout the drawings , it should be noted that like reference numbers are used to depict the same or similar elements , features , and structures . Throughout the drawings , it should be noted that proportions are not necessary to scale and that the si ze of features may be emphasi zed for ease of illustration .

[0020] FIG . 2A shows a diagram of a vertical cavity surface emitting laser (VCSEL ) 200a according to at least one exemplary embodiment of the present disclosure .

[0021] In FIG . 2 , the VCSEL 200a includes a first mirror 210 , a current distribution layer 270 , an aperture layer 230 defining an aperture opening 250, an active region 220, a second mirror 212. These elements or components are formed above (e.g., in vertical / Z-direction) the substrate 240, e.g., on or above a main surface 240a of the substrate 240. Further, a contact ring or metal current injection contact 265 is formed on the current distribution layer 270.

[0022] Other components or elements not shown may also be included in the VCSEL.

[0023] The active region 220 includes one or more quantum-well (QW) or a multiple quantum well (MQW) layers / regions or one or more quantum dot layers 225. For example, the active region 220 can include a p-i-n junction, which can include multiple quantum-wells (MQWs) that generate photons. While a single QW / MQW region is shown, this is not necessarily so. In other cases, a plurality of QW / MQW regions can be included, such as 3 or more, 6 or more, 9 or more, etc.

[0024] For the VCSEL 200a, the first mirror 210 may be of a first conductivity type with the second mirror 212 of a second conductivity type, which is opposite to the first conductivity type. For instance, the first mirror 210 can have or be of p- type conductivity and the second mirror 212 can have a n-type conductivity, or vice versa.

[0025] The first mirror and / or and the second mirror may have a high ohmic resistance, e.g., an ohmic resistance of at least 0.1 Ohm* cm .

[0026] The first mirror 210 of the VCSEL 200a includes one or a plurality of low thermal conductivity layers 210a. The low thermal conductivity layers 210 (which may also be referred to as low thermal conductivity regions) can be arranged in an alternating fashion with one or more second layers 210b. The one or more second layers can be, for example, one or more semiconductor layers. The second layer can be aluminum gallium arsenide, aluminum arsenide, or gallium arsenide.

[0027] The low thermal conductivity layer / regions 210a can have a thermal conductivity that is worse or less than the thermal conductivity or heat transfer ability of other layers, e.g., other layers (e.g., semiconductor layers) of the same mirror.

[0028] Low thermal conductivity layers / regions described in embodiments or examples of the present disclosure can have a thermal conductivity being less than 10 Watts per meter Kelvin (W / mK) , for example, less than 5 W / mK, or less than 1 W / mK.

[0029] In the VCSEL 200a, the low thermal conductivity layer / regions 210a can maintain or confine internally generated heat. Said differently, the low thermal conductivity layer / regions 210a cause heat to be maintained internally within the VCSEL 200, e.g., during operation of the VCSEL 200. The low thermal conductivity layer / regions 210a are configured to prevent heat transferring out of the VCSEL 200, e.g., through a side of the VCSEL 200.

[0030] Further, the heat transfer property of the low thermal conductivity layer / regions 210a cause rise a in temperature in the active region 220. During operation, e.g., during laser emission, the active region 220 experiences a rapid rise in temperature due to the low thermal conductivity layer / regions 210a.

[0031] The presence or existence of the one or more low thermal conductivity layer / regions 210a can cause the active region 220 to experience an increase at least 5 degrees Kelvin (K) in temperature. In other cases, the active region 220 may undergo increase in temperature at least 10 degrees K, e.g., at least 15 degrees K. The temperature increase occurring in the active region 220, changes the wavelength of the light emitted by the VCSEL 200. That is, the wavelength of light outputted by the VCSEL 200a is shifted compared to a wavelength of light that would have been emitted by the VCSEL 200a without the temperature increase occurring in the active region 220. For example, the wavelength in light outputted may increase or decrease.

[0032] In the example of FIG. 2A, the arrangement of the low thermal conductivity layer / regions 210a in the first mirror 210 can result in the first mirror 210 having its thermal conductivity along a horizontal direction (e.g., in XY plane) being three times or more higher its thermal conductivity along the vertical direction or Z-direction.

[0033] In at least one example of the present disclosure, the low thermal conductivity layer / regions 210a can be dielectric layers. These dielectric layers can have a thermal conductivity of less than 10 Watts per meter Kelvin (W / Mk) , e.g., less than 5 W / mK, e.g., less than 1 W / mK. Some types of dielectric layers or materials for the low thermal conductivity layers may include amorphous silicon, titanium oxide, tantalum oxide, aluminum oxide, and / or silicon nitride.

[0034] In other instances, the low thermal conductivity layer / regions 210a may be air filled layers. That is, the low thermal conductivity layer / regions 210a may be a porous layer with its gaps or empty region filled with a gas, e.g., air or one or more other gases having low thermal conductivity properties. For example, a porous layer (e.g., a semiconductor or dielectric layer) may include one or more air filled gaps or regions which produces overall a low thermal conductivity layer / region as described herein.

[0035] The first mirror 210 using the low thermal conductivity layers / regions 210 can be a Bragg mirror. In some cases, where the first mirror 210 includes low thermal conductivity dielectric layers or air / gas filled low thermal conductivity layers, the first mirror 210 may be considered a dielectric mirror. Further, such a mirror with may be considered or implemented as a Bragg dielectric mirror where the dielectric or air-filled layers 210a can may alternate with the second layer 210b, e.g., a semiconductor layer.

[0036] Further, as shown in FIG. 2A, the VCSEL 200a can include a current distribution layer 270 which can be arranged between the first mirror 210 and the aperture layer 230. For the VCSEL 200a, the current distribution layer 270 can be included and configured to transport charges to the active region 220.

[0037] The current distribution 270 can be used to compensate for the low thermal conductivity layers / regions 210a of the first mirror 210. The current distribution layer 270 can be made of or include materials that are both electrically conductive and optically transparent, for example, in at least in the desired wavelength. For instance, the current distribution layer 270 may include or be a layer of indium tin oxide and / or zinc selenide.

[0038] Further, to compensate for the low thermal conductivity of the first mirror, the current distribution layer 270 may have a maximum thickness. For example, the current distribution layer 270 can have a thickness of 500 nanometers or less, e.g., 200 nanometers or less, e.g., 100 nanometers or less, e.g., 1 micron or less.

[0039] For the VCSEL 200a, the second mirror 212 can include layers of materials with different refractive indices. In at least one case, the second mirror 212 can be a Bragg mirror, for example, e.g., a Bragg mirror based on AlGaAs / GaAs material system or similar system for example, as described in the mirrors of FIG. 1. In one example there may be alternating of aluminum gallium arsenide and gallium arsenide. The aluminum gallium arsenide in such a case may be represented as AlxGai-x, where x can indicate high aluminum content, e.g., x > 60 (at least 60% aluminum) , or low aluminum content, e.g., x < 40 (less than 40% aluminum) . In the example of the VCSEL 200, the second mirror 212 may not include any low thermal conductivity layer / regions . That is, the first mirror 210 of the VCSEL 200a can have low thermal conductivity layers / regions while the second mirror 212 may not include any .

[0040] In the example of FIG. 2A, the aperture layer 230 may be disposed adjacent to the active region 220, e.g., between the active region 220 and the current distribution layer 270, along the Z-direction. The aperture layer 230 may be an electrically isolating layer including or defining an aperture or aperture opening 250. The aperture layer 230 may be thin and have a thickness (measure in Z-direction) of 50 nanometers or less, e.g., 10 nanometers or less, e.g., 5 nanometers or less. The aperture or aperture opening 250 may have a diameter of 10 microns or less.

[0041] The aperture layer 230 may be formed and then subsequently patterned (e.g., etched) to realize the aperture opening 250. In some cases, the aperture layer 230 may be an oxide layer, which is then patterned to form the aperture 250. The oxide layer may be formed using atomic layer deposition layer (ALD) . In some cases, the oxide layer may include Niobium oxide (NB2O5) , with or without tantalum.

[0042] In at least one case, the edges of the aperture layer 230 that surround the aperture opening 250 e.g., the inner periphery, can be tapered which can smoothen the refractive index transition .

[0043] In the VCSEL 200a of FIG. 2A, a distance between a QW / MQW / quantum dot layer 225 of the active region 220 and one of the low thermal conductivity layers 210a may be five microns or less. This distance can be measured vertically or along the Z-direction (e.g. in a direction from first mirror to second mirror) . This maximum distance may be used as a limit on the distance between at least the two closest vertical pair (in the z-direction) of a low thermal conductivity layer 210a and a QW / MQW region or quantum dot layer region 225 (in the case where there are multiple low thermal conductivity layers 210a and multiple QW / MQW or quantum dot regions 250. This distance limit in the vertical direction can help ensure that heat maintained or confined in the VCSEL 200a due to the low thermal conductivity layers 210a has an appreciable or sufficient effect on the active region to result in a wavelength shift in light outputted by the VCSEL 200a.

[0044] FIG. 2B shows a diagram of a vertical cavity surface emitting laser (VCSEL) 200b according to at least one exemplary embodiment of the present disclosure. In many respects, the VCSEL 200b may be similar to the VCSEL 200a of FIG. 2A. To simplify the explanation, it is noted that some components or features of VCSEL 200b are identical or closely resemble those mentioned earlier in the context of the VCSEL 200a. These shared elements or components can be indicated using the same reference numbers and description thereof may be omitted. These same or similar elements can have the same properties and be manufactured or realized in the same or similar way.

[0045] In FIG. 2B, the VCSEL 200b includes a first mirror 210, an aperture layer 230 with aperture opening 250, an active region 220, a current distribution layer 270, and a second mirror 212. These elements or components are formed above (e.g., in vertical / Z-direction) the substrate 240, e.g., on or above a main surface 240a of the substrate 240. Further, a contact ring 265 may be formed on the VCSEL 200b, e.g., on or over the aperture layer 230.

[0046] According to the example of FIG. 2B, the VCSEL 200b also includes low thermal conductivity layers. However, in this instance, the VCSEL 200b may have low thermal conductivity layers in the second mirror 212 but not low thermal conductivity layers in the first mirror 210. In particular, the second mirror 212 can have one or more low thermal conductivity layers 212a.

[0047] The low thermal conductivity layers 212a may be same or similar to the low thermal conductivity layers 210a described in the context of VCSEL 200a. For example, the low thermal conductivity layers 212a can be dielectric layers and / or layers with air filled gaps as described above.

[0048] The second mirror 212 of the VCSEL 200b may be realized or implemented similar to the first mirror 210 of FIG. 2A. That is, the second mirror 212 of VCSEL 200b may be a dielectric mirror, e.g., a dielectric Bragg mirror. The second mirror 212 can have alternating layers of the low thermal conductivity layers 212a and the second layer 212b. The second layer 212b can be any suitable semiconductor layer or material, e.g., AlGaAs or GaAs .

[0049] Further, the first mirror 210 of the VCSEL 200b may like the second mirror 212 of the VCSEL 200a. That is, the first mirror 210 may be any suitable mirror, such as a Bragg mirror, including, for example, a Bragg mirror based on AlGaAs / GaAs material system (e.g., alternating layers of aluminum gallium arsenide (AlGaAs) and gallium arsenide (GaAs) . Again, aluminum arsenide may be represented as AlxGa!-x, where x can indicate high aluminum content, e.g., x > 60 (at least 60% aluminum) , or low aluminum content, x < 40 (less than 40% aluminum) .

[0050] In addition, for the VCSEL 200b, the conductivity types of the first mirror 210 and the second mirror 212 may be opposite to each other. That is, the first mirror 210 may be an n-type conductivity and the second mirror 212 may be a p-type conductivity, or vice versa. The VCSEL 200b can have a current distribution layer 270 that is the same or similar to the current distribution layer 270 of VCSEL 200a . However, the current distribution layer 270 for the VCSEL 200b can be arranged between the second mirror 212 and the active region 220 .

[0051] In the VCSEL 200b, the low thermal conductivity layers 212a can have the same ef fect as the low thermal conductivity layers 210a of VCSEL 200a . That is , the low thermal conductivity can maintain or confine internally generated heat in the VCSEL 200b so as to cause an increase the temperature in the active region 220 ( e . g . , during operation) . The temperature increase in the active region 220 results in a wavelength shi ft of light emitted by the VCSEL 200b . The wavelength shi ft produced in the VCSEL 200b may be the same or similar to the wavelength shi ft reali zed by the VCSEL 200a .

[0052] Further, as described with respect to the VCSEL 200a, the maximum (vertical ) distance between a closest vertically-wise pair of a QW / MQW / quantum dog layer and a low thermal conductivity layers 212a may be five microns or less .

[0053] FIG . 2C shows a diagram of a vertical cavity surface emitting laser (VCSEL ) 200c according to at least one exemplary embodiment of the present disclosure . The VCSEL 200c is similar to the VCSEL 200a and VCSEL 200b of FIGS . 2A and 2B, or at least aspects thereof .

[0054] Again, to simpli fy explanation, it is noted that some components or features of VCSEL 200c are identical or closely resemble those mentioned earlier in the context of VCSEL 200a and / or VCSEL 200b . Shared elements can be indicated using the same reference numbers and description thereof may be omitted . These same or s imilar elements or components can have the same properties and be manufactured or reali zed in the same or similar way . According to the example of FIG . 2C, the VCSEL 200c also includes low thermal conductivity layers . However, in this instance , the VCSEL 200c can include low thermal conductivity layers in both the first mirror 210 and the second mirror 212 .

[0055] For example , both the first mirror 210 and the second mirror 212 can be seen as being exempli fied by the first mirror in VCSEL 200a and the second mirror in VCSEL 200b . Hence , the first mirror 210 includes one or more low thermal conductivity layers 210a and the second mirror includes one or more low thermal conductivity layers 212a . The low thermal conductivity layers 210a, 212a, can be any low thermal conductivity layers described herein .

[0056] Moreover, the first mirror 210 and / or the second mirror 212 of VCSEL 200c may be dielectric mirror, e . g . , a dielectric Bragg mirror . The first mirror 210 and / or the second mirror 212 can have alternating layers of the low thermal conductivity layers 210a / 212a and second layers 210b / 212b . The second layers 210b / 212b can be any suitable semiconductor layer or material , e . g . , GaAs .

[0057] As in other examples described herein, the conductivity types of the first mirror 210 and the second mirror 212 may be opposite to each other . For instance , the first mirror 210 may be an n-type conductivity and the second mirror 212 may be a p-type conductivity, or vice versa .

[0058] Further, the VCSEL 200c may have one or more current distribution layers . As shown in FIG . 2C, the VCSEL 200c can have a current distribution layer 270 between the second mirror 212 and the active region 220 can have a current distribution layer 270 between the first mirror and the aperture layer 270 / active region 220 .

[0059] As explained in other examples of the present disclosure , the low thermal conductivity layers 210a and 212a can maintain or confine internally generated heat so as to increase the temperature of the active region 220 . As described in other examples , heat internally generated or produced during operation of the VCSEL 200c can be confined within the VCSEL 200c to increase the temperature in the active region 220 . This temperature increase results in a wavelength shi ft of light emitted by the VCSEL 200c . The wavelength shi ft reali zed may be the same or similar to the wavelength shi ft reali zed by the VCSEL 200a or 200b .

[0060] FIG . 3 shows a method 300 producing a VCSEL according to one or more embodiments of the present disclosure . The method 300 can be used for forming VCSELs described herein, VSCELS such as or similar to the VCSELs described in the context of FIGS . 2A-2C .

[0061] The method 300 includes at 310 forming a second mirror above above a first surface of a substrate .

[0062] At 320 , the method 300 includes forming an active region above the first surface of substrate and above the second mirror, wherein the active region comprises one or more quantum-wells (QW) / multiple quantum well (MQW) regions .

[0063] At 330 , the method 300 includes forming an aperture layer including an aperture opening above the active region .

[0064] At 340 , the method 300 includes forming a current distribution layer over the aperture layer .

[0065] At 350 , the method 300 includes forming a first mirror on or over the current distribution layer .

[0066] For the method 300 , the first mirror and / or the second mirror includes one or more low thermal conductivity layers , wherein the one or more low thermal conductivity layers each has a thermal conductivity of less than 10 Watts per METER Kelvin (W / Mk) , e.g., less than 5 W / mK, e.g., less than 1 W / mK.

[0067] The various components or subcomponents can be formed by any suitable processes or techniques, including, for example, semiconductor manufacturing techniques. For instance, dielectric layers or regions described herein, e.g., for a mirror, can be formed using atomic layer deposition (ALD) , chemical vapor deposition (CVD) , metalorganic chemical vapor deposition (MOCVD) , physical vapor deposition (PVD) and the like. Semiconductor layers described herein, e.g., for a mirror may be formed by epitaxial methods, e.g., molecular beam epitaxy.

[0068] Any suitable etching or photolithography techniques may be used in some instances, such as in one instance, for forming layers (e.g., dielectric layers) with gaps or regions to be filled with air or another suitable low thermal conductivity / low heat transfer gas.

[0069] For example, active regions, dielectric layers, aperture layers, etc., described herein can be formed using atomic layer deposition (ALD) , chemical vapor deposition (CVD) , metalorganic chemical vapor deposition (MOCVD) .

[0070] The VCSELs described herein, e.g., the VCSELs 200a-200c use internally generated heat to cause a high temperature increase. In particular, the high temperature increase occurs at least in the active region, e.g., during operation, such as during emission of 1 microsecond pulse. With a sufficient temperatures increase in the active region, light emitted by the VCSEL can have a substantial wavelength shift. For example, a sufficient temperature increase, e.g., 5 or more degrees K, e.g., 10 or more degrees, may cause an appreciable wavelength shift. The temperature increase occurs due to the heat being contained efficiency as result of the presence of low thermal conductivity in a mirror / ref lector of the VCSEL. Such VCSELs described herein can be useful and tailored to various applications such as for self-mixing interferometry (SMI) applications and devices, including, for example, Frequency-Modulated Continuous Wave (FMCW) like sensing applications and systems. The VCSELs can be used for This because the VCSELs described herein can be used to generate sufficiently high SMI signal with low power consumption as the temperature rise generated in VCSELs can occur without increasing energy-loss.

[0071] In addition, the VCSELs described herein, e.g., VCSELs 200a- 200c may be designed or used as a top emitter, bottom emitter, or a (both) side emitter.

[0072] [EXAMPLE SECTION BASED ON FINALIZED CLAIMS]

[0073] Any of the aspects, examples, and / or embodiments described herein may be suitable or appropriately combined.

[0074] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any example or design described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other examples or designs .

[0075] For the purposes of the present disclosure, the phrase "A and / or B" means (A) , (B) , or (A and B) . For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A) ,

[0076] (B) , (C) , (A and B) , (A and C) , (B and C) , or (A, B, and C) .

[0077] Reference to "one embodiment" or "an embodiment" in the present disclosure means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase "in one embodiment" or "in an embodiment" are not necessarily all referring to the same embodiment. The appearances of the phrase "for example," "in an example," or "in some examples" are not necessarily all referring to the same example.

[0078] The words "plurality" and "multiple" in the description or the claims expressly refer to a quantity greater than one. The terms "group (of) ", "set [of] ", "collection (of) ", "series (of)", "sequence (of)", "grouping (of)", etc., and the like in the description or in the claims refer to a quantity equal to or greater than one, i.e. one or more. Any term expressed in plural form that does not expressly state "plurality" or "multiple" likewise refers to a quantity equal to or greater than one .

[0079] The term "connected" can be understood in the sense of a (e.g. mechanical, optical and / or electrical) , e.g. direct or indirect, connection and / or interaction. For example, several elements can be connected together mechanically such that they are physically retained (e.g., a plug connected to a socket) and electrically such that they have an electrically conductive path (e.g., signal paths exist along a communicative chain) .

[0080] As used herein, unless otherwise specified the use of the ordinal adjectives "first", "second", "third" etc., to describe a common object, merely indicate that different instances of like objects are being referred to, and are not intended to imply that the objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner.

[0081] As utilized herein, terms "module", "component," "system," "circuit, " "element, " "slice, " "circuitry, " and the like are intended to refer to a set of one or more electronic components, a computer-related entity, hardware, software (e.g., in execution) , and / or firmware. For example, circuitry or a similar term can be a processor, a process running on a processor, a controller, an obj ect , an executable program, a storage device , and / or a computer with a processing device . By way of illustration, an application running on a server and the server can also be circuitry . One or more circuits can reside within the same circuitry, and circuitry can be locali zed on one computer and / or distributed between two or more computers . A set of elements or a set of other circuits can be described herein, in which the term " set" can be interpreted as "one or more . "

[0082] Such electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors . The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application . As yet another example , circuitry can be an apparatus that provides speci fic functionality through electronic components without mechanical parts ; the electronic components can include one or more processors therein to execute executable instructions stored in computer readable storage medium and / or firmware that confer ( s ) , at least in part , the functionality of the electronic components . As another example , circuitry or similar term can be implemented in hardware such as application speci fic integrated circuit (AS IC ) , programmable gate array ( PGA) , discrete digital circuits , etc . ) or in a combination of hardware and software ( e . g . , a software model executed by a corresponding processor ) .

[0083] The term " semiconductor substrate" can mean any construction comprising semiconductor material , for example , a silicon substrate with or without an epitaxial layer, a silicon-on- insulator substrate containing a buried insulator layer, or a substrate with a silicon germanium layer .

[0084] A lateral direction is understood to mean a direction that runs , in particular, parallel to a main extension surface of the component , in particular of a layer . A vertical direction is understood to mean a direction that is oriented, in particular, perpendicular to the main extension surface of the component and / or layer . The vertical direction and the lateral direction are approximately orthogonal to each other .

[0085] Further, spatially relative terms , such as "beneath, " "below, " " lower, " " above , " "upper" and the like , may be used herein for ease of description to describe one element or feature ' s relationship to another element ( s ) or feature ( s ) as illustrated in the figures . The spatially relative terms are intended to encompass di f ferent orientations of the device in use or operation in addition to the orientation depicted in the figures . The apparatus may be otherwise oriented ( rotated 90 degrees or at other orientations ) and the spatially relative descriptors used herein may likewise be interpreted accordingly .

[0086] The term "data" as used herein may be understood to include information in any suitable analog or digital form, e . g . , provided as a file , a portion of a file , a set of files , a signal or stream, a portion of a signal or stream, a set of signals or streams , and the like . Further, the term "data" may also be used to mean a reference to information, e . g . , in form of a pointer . The term data, however, is not limited to the aforementioned examples and may take various forms and represent any information as understood in the art .

[0087] As used herein, a signal that is " indicative of" a value or other information may be a digital or analog signal that encodes or otherwise communicates the value or other information in a manner that can be decoded by and / or cause a responsive action in a component receiving the signal . The signal may be stored or buf fered in computer readable storage medium prior to its receipt by the receiving component and the receiving component may retrieve the signal from the storage medium . Further, a "value" that is " indicative of" some quantity, state , or parameter may be physically embodied as a digital signal , an analog signal , or stored bits that encode or otherwise communicate the value .

[0088] Unless otherwise stated, the words "about" and " substantially" as used herein are to be construed as meaning the normal measuring and / or fabrication limitations related to the value or condition which the word "about" or " substantially" modi fies . Unless expressly stated otherwise , the term "embodiment" is used herein to mean an embodiment of the present disclosure .

[0089] As used herein, a signal may be transmitted or conducted through a signal chain in which the signal is processed to change characteristics such as phase , amplitude , frequency, and so on . The signal may be referred to as the same signal even as such characteristics are adapted . In general , so long as a signal continues to encode the same information, the signal may be considered as the same signal . For example , a transmit signal may be considered as referring to the transmit signal in baseband, intermediate , and radio frequencies .

[0090] While the above descriptions and connected figures may depict device components as separate elements , skilled persons will appreciate the various possibilities to combine or integrate discrete features , functions into a single element . Such may include combining two or more components into a single component . Conversely, skilled persons will recogni ze the possibility to separate a single element into two or more discrete elements , such as splitting a single component into two or more separate components .

[0091] It is appreciated that implementations of methods detailed herein are exemplary in nature , and are thus understood as capable of being implemented in a corresponding device . Likewise , it is appreciated that implementations of devices detailed herein are understood as capable of being implemented as a corresponding method . It is thus understood that a device corresponding to a method detailed herein may include one or more components configured to perform each aspect of the related method .

[0092] All acronyms defined in the above description additionally hold in all claims included herein .

[0093] While embodiments of the present disclosure have been described above , it is obvious that further embodiments may be implemented . For example , further embodiments may comprise any subcombination of features recited in the claims or any subcombination of elements described in the examples given above . Accordingly, this spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein .

[0094] While the disclosure has been particularly shown and described with reference to speci fic embodiments , it should be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims . The scope of the disclosure is thus indicated by the appended claims and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced .

[0095] Reference Numeral List VCSEL p-type DBR n-type DBR first layer of 105 second layer of 105 MQW layer oxide layer substrate aperture region cathode anode emitted light beam a, 200b, 200c VCSEL first mirror a low thermal conductivity layer b second layer second mirror a low thermal conductivity layer b second layer active region QW / MQW region or quantum dot layer aperture layer substrate a substrate main surface aperture region contact ring current distribution layer method

Claims

CLAIMS1 . A vertical-cavity surface-emitting laser (VCSEL ) comprising : a substrate ; a first mirror formed above a first surface of the substrate ; a second mirror formed above the first surface of the substrate ; an active region formed above the first surface of a substrate between the first mirror and the second mirror structure comprising at least one quantum-wells ( QW) region; wherein the first mirror and / or the second mirror comprises one or more low thermal conductivity layers , wherein the one or more low thermal conductivity layers each has a thermal conductivity of less than 10 Watts per meter Kelvin (W / mK) .2 . The VCSEL of claim 1 , wherein during operation of the VCSEL, the first mirror and / or the second mirror comprising the one or more low thermal conductivity layers is configured to generate a temperature increase internally so that to cause a wavelength shi ft in light outputted by the VCSEL .3 . The VCSEL of claim 2 , wherein during operation of the VCSEL, the first mirror and / or the second mirror comprising the one or more low thermal conductivity layers is configured to cause a temperature increase of more than 5 degrees K in the active region .4 . The VCSEL of claim 1 , wherein the thermal conductivity of the first mirror and / or the second mirror comprising the one or more low thermal conductivity layers has a thermal conductivity in a hori zontal direction that will be three times higher than a thermal conductivity in a vertical direction, wherein the vertical direction is a direction from the first mirror to the second mirror .

5. The VCSEL of claim 1 , wherein the one or more low thermal conductivity layers have a thermal conductivity of less than 5 Watts per meter Kelvin .

6. The VCSEL of claim 1 , wherein the one or more low thermal conductivity layers comprises one or more dielectric layers .7 . The VCSEL of claim 6 , wherein the one or more dielectric layers comprises amorphous silicon, titanium oxide , tantalum oxide , aluminum oxide , and / or silicon nitride .8 . The VCSEL of any of claims 1 to 5 , wherein the one or more low thermal conductivity layers comprises one or more air filled regions .

9. The VCSEL of any of claims 1 to 5 , wherein the first mirror is a Bragg mirror comprising one or more low thermal conductivity layers .10 . The VCSEL of any of claims 1 to 5 , wherein the second mirror is a Bragg mirror comprising one or more low thermal conductivity layers .

11. The VCSEL of any of claims 1 to 5, where the first mirror has a first conductivity type and the second mirror has a second conductivity type opposite to the first conductivity type .

12. The VCSEL of claim 11, wherein the first conductivity is p-type and the second conductivity is n-type.

13. The VCSEL of claim 11, wherein the first conductivity is n-type and the second conductivity is p-type.

14. The VCSEL of any of claims 1 to 5, wherein the first mirror and / or the second mirror comprise alternating layers of aluminum gallium arsenide.

15. The VCSEL of claim 14, where aluminum gallium arsenide is represented as AlxGa!-xAs, where x > 0.6, or x < 0.4.

16. The VCSEL of any of claims 1 to 5, further comprising: an aperture layer including an aperture opening, the aperture layer disposed between the active region and the first mirror.

17. The VCSEL of claim 16, wherein aperture opening has a diameter of less than 10 microns and has a thickness of less than 50 nanometers measured vertically from the first mirror to the second mirror .

18. The VCSEL of claim 16, wherein the aperture layer comprises an oxide layer formed by atomic layer deposition (ALD) .

19. The VCSEL of claim 16, further comprising: a current distribution layer disposed between the first mirror and the aperture layer.

20. The VCSEL of claim 19, wherein the current distribution layer has a thickness in a vertical direction measured from the first mirror to the second mirror of less than one micron.

21. The VCSEL of claim 19, wherein the current distribution layer comprises indium tin oxide or zinc selenide.

22. The VCSEL of claim 19, further comprising: a contact ring disposed on the current distribution layer .

23. The VCSEL of claim 1, wherein a distance of between a QW or quantum dot layer of the active region and one of the one or more one or more low thermal conductivity layers is less than five microns.24 . The VCSEL of claim 1 , wherein the VCSEL is configured as a top emitter, bottom emitter, or a side emitter .25 . The VCSEL of claim 1 , wherein the VCSEL is configured as a bottom emitter .26 . The VCSEL claim 1 , wherein the VCSEL is configured as a side emitter and wherein the VCSEL comprises one or more optical surfaces .27 . A method for forming a vertical-cavity surface-emitting laser, the method comprising : forming a second mirror above a first surface of a substrate ; forming an active region above the first surface of substrate and above the second mirror, wherein the active region comprises one or more quantum-wells regions ( QW) or layers containing Quantum Dots ( QD) ; forming an aperture layer including an aperture opening above the active region; forming a current distribution layer over the aperture layer ; and forming a first mirror on or over the current distribution layer, wherein the first mirror and / or the second mirror comprises one or more low thermal conductivity layers , wherein the one or more low thermal conductivity layers eachhas a thermal conductivity of less than 10 Watts per meter Kelvin .28 . The method of claim 27 , wherein the one or more low thermal conductivity layers comprises one or more dielectric layers , and wherein forming the first mirror and / or the second mirror comprises forming the one or more one or more dielectric layers using chemical vapor deposition ( CVD) , metalorganic chemical vapor deposition (MOCVD) , atomic layer deposition (ALD) , physical vapor deposition ( PVD) , or sputtering .29 . The method of claim 27 , wherein the one or more low thermal conductivity layers comprises one or more air gaps , and wherein forming the first mirror and / or the second mirror comprises forming the one or more one or air gaps by etching gaps in one or more silicon materials for the first mirror and / or the second mirror .30 . The method of claims 27 , wherein the one or more low thermal conductivity layers have a thermal conductivity of less than 5 Watts per meter Kelvin .31 . The method of claim 27 , wherein the thermal conductivity of the first mirror and / or the second mirror comprising the one or more low thermal conductivity layers has a thermal conductivity in a hori zontal direction will be three times higher than thermal conductivity in a vertical direction, wherein the verticaldirection is a direction from the first mirror to the second mirror .

32. The method of claim 27, wherein forming the first mirror comprises forming a Bragg mirror comprising one or more low thermal conductivity layers .

33. The method of claim 27, wherein forming the second mirror comprises forming a Bragg mirror comprising one or more low thermal conductivity layers .

34. The method of claim 27, where the first mirror has a first conductivity type and the second mirror has a second concavity type opposite to the first conductivity type.

35. The method of claim 34, wherein the first conductivity is p-type and the second conductivity is n-type.

36. The method of claim 34, wherein the first conductivity is n-type and the second conductivity is p-type.

37. The method of any of claims 27 to 36, wherein the first mirror and / or and the second mirror have a high ohmic resistance of at least 0.1 Ohm* cm.

38. The method of any of claims 27, wherein forming the first mirror and / or the second mirror comprising forming alternating layers of aluminum gallium arsenide (AlGaAs) and gallium arsenide (GaAs) of forming alternating layers of AlxGa(l-x) .

39. The method of claim 38, where x > 0.6, or x < 0.4.

40. The method of claim 27, forming the aperture layer comprises forming the aperture layer using atomic layer deposition (ALD) .

41. The method of claim 40, wherein the aperture layer comprises an oxide layer formed by atomic layer deposition (ALD) .

42. The method of claim 27, wherein the current distribution layer has a thickness in a vertical direction measured from the first mirror to the second mirror of less than one micron.

43. The method of claim 27, wherein the current distribution layer comprises indium tin oxide or zinc selenide.

44. The method of claim 27, further comprising: forming a contact ring on the current distribution layer .

45. The method of any of claims 27 to 44, wherein a distance of between a QW or quantum dot layer of the active region and one of the one or more one or more low thermal conductivity layers is less than five microns.

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