Multi-rail ion trap for multi-parcel operations

Abstract

A quantum information processing (QIP) system is provided. The QIP system includes at least three radio frequency (RF) rails (401-403) driven by one or more RF sources. The at least three RF rails (401-403) are arranged in parallel and configured to generate a respective RF null, in between each pair of adjacent RF rails from among the at least three RF rails. A path of the respective RF null is configured as an RF track that is configured to confine ion parcels. The QIP system further includes a plurality of Direct Current (DC) electrodes (601) arranged in between each pair of adjacent RF rails and outside of peripheral RF rails from among the at least three RF rails (401-403). The plurality of DC electrodes (601) is configured to generate one or more potentials that confine the ion parcels along respective RF tracks.

Description

MULTI-RAIL ION TRAP FOR MULTI-PARCEL OPERATIONSCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. Provisional Application No. 63 / 559,104, filed February 28, 2024, and U.S. Provisional Patent Application No. 63 / 559,094, filed February 28, 2024, the contents of each of which applications are hereby incorporated herein by reference in their entireties.TECHNICAL FIELD

[0002] Aspects of the present disclosure relate generally to systems and methods for use in the implementation and / or operation of quantum information processing (QIP) systems.BACKGROUND

[0003] Trapped atoms are one of the leading implementations for quantum information processing or quantum computing. Other implementations include those based on superconducting qubits or photonic qubits, for example. Atomic-based qubits may be used as quantum memories, as quantum gates in quantum computers and simulators, and may act as nodes for quantum communication networks. Qubits based on trapped atomic ions enjoy a rare combination of attributes. For example, qubits based on trapped atomic ions have very good coherence properties, may be prepared and measured with nearly 100% efficiency, and are readily entangled with each other by modulating their Coulomb interaction with suitable external control fields such as optical or microwave fields. These attributes make atomic-based qubits attractive for extended quantum operations such as quantum computations or quantum simulations.

[0004] For atomic ion based quantum computers and simulators, the ions may be confined in an ion trap that is an RF Paul trap. The ions may be grouped into parcels with each parcel containing one or more of the ions confined in the ion trap. The ions in each parcel are confined together as a unit on the trap as a chain. When the ions are grouped into parcels, this is called a multi-parcel configuration. Transport of a parcel refers to controlled movement of the ions in the parcel as a unit while maintaining the ions as a chain and the order of the ions in the chain. The parcels may be transported between regions of the ion trap by signals applied to the ion trap. Parcels may be merged into larger parcels to enable multi-qubit quantum operations between ions in two different parcels. Merged parcels may then be split back into theconstituent parcels for independent transport of the now separated parcels. Each parcel may contain the same number of ions, there may be differing numbers of ions in different parcels, or a combination of the two with some parcels having the same number of ions and others having differing numbers of ions. The number of parcels that an ion trap can confine and transport depends on the design of the trap.

[0005] Grouping the ions as parcels may improve control of the ion positions under the effect of non-ideal trap behavior when compared to a large, single chain of ions. This improved control may result in higher fidelity quantum operations on merged parcels. Also, as the number of ions in a chain grows, effects such as frequency crowding, may reduce the fidelity of the quantum operations. By limiting the quantum operations to a chain consisting of one parcel or two or more merged parcels, spectral crowding may be reduced and that may increase the fidelity of the quantum operations. The number of ions in a parcel may be limited by these considerations.

[0006] Quantum operations between ions in two parcels may require merging those parcels. Generally, it is advantageous to design the ion trap such that the trap supports merging for all pairs of parcels. In this way. the QIP system can perform quantum operations on any pair of ions in the system. When there are more than two parcels in a trap, the trap is said to support parcel reordering if it can support merging for all pairs of parcels.

[0007] It is a general goal of ion based QIP systems to increase the number of ions in the trapping region. As the number of ions in a parcel may be limited, growth in the total number of ions in an ion trap may require increasing the number of parcels. Extending the number of parcels in a QIP system requires managing the trap size, power bum of the device, and the parcel reordering capabilities. All of these requirements place design restrictions on the ion trap’s Radio Frequency (RF) and Direct Current (DC) electrode structures.

[0008] It is therefore important to develop new techniques that improve the design, fabrication, implementation, and / or control of different QIP systems used as quantum computers or quantum simulators, and particularly for those QIP systems that handle operations based on atomic-based qubits.SUMMARY

[0009] The following presents a simplified summan' of one or more aspects to provide a basic understanding of such aspects. This summary7is not an extensive overview of all contemplated aspects and is intended to neither identify key or critical elements of all aspectsnor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.

[0010] This disclosure describes various aspects of a trap architecture that supports multiparcel operation and parcel reordering while maintaining a compact footprint.

[0011] According to an exemplary aspect, a quantum computing system (QIP) is provided. The QIP system includes at least three radio frequency (RF) rails driven by one or more RF sources. The at least three RF rails are arranged in parallel and configured to generate a respective RF null, in between each pair of adjacent RF rails from among the at least three RF rails. A path of the respective RF null is configured as an RF track for confining ion parcels. The QIP system further includes a plurality of Direct Current (DC) electrodes arranged in between each pair of adjacent RF rails and outside of peripheral RF rails from among the at least three RF rails. The plurality of DC electrodes are configured to generate one or more potentials that confine the ion parcels along respective RF tracks.

[0012] According to another exemplary’ aspect, a quantum computing system (QIP) is provided. The QIP system includes at least three radio frequency (RF) rails driven by one or more RF sources. The plurality of RF rails are arranged in parallel and configured to generate a respective RF null having a path in between an adjacent pair of the plurality of RF rails that is configured as an RF track and that is configured to confine ion parcels. The QIP system further includes a controller configured to control a plurality of Direct Current (DC) electrodes. The plurality of DC electrodes are arranged in between the adjacent pair of RF rails and outside of peripheral RF rails of the plurality of RF rails, to selectively apply one or more potentials to perform an ion parcel manipulation operation on at least one of the ion parcels confined in the RF track.

[0013] To the accomplishment of the foregoing and related ends, the one or more aspects comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, how ever, of but a few- of the various ways in which the principles of various aspects may be employed, and this description is intended to include all such aspects and their equivalents.BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The disclosed aspects will hereinafter be described in conjunction with the appended drawings, provided to illustrate and not to limit the disclosed aspects, wherein like designations denote like elements, and in which.

[0015] FIG. 1 illustrates a view of atomic ions in a linear cry stal or chain, in accordance with exemplary- aspects of the disclosure.

[0016] FIG. 2 illustrates an example of a quantum information processing (QIP) system, in accordance with exemplary aspects of the disclosure.

[0017] FIG. 3 illustrates an example of a computer device, in accordance with exemplary aspects of the disclosure.

[0018] FIG. 4 illustrates an example multi-track architecture is shown, in accordance with exemplary aspects of the disclosure.

[0019] FIG. 5 illustrates an example cross section of the multi-track architecture 400 of FIG. 4, in accordance yvith exemplary aspects of the disclosure.

[0020] FIG. 6 illustrates a multi-track architecture of FIG. 4, in accordance with exemplary aspects of the disclosure., in accordance with exemplary aspects of the disclosure.

[0021] FIG. 7 illustrates an example parcel jump operation, in accordance with exemplary aspects of the disclosure.

[0022] FIG. 8 illustrates an example parcel shift operation, in accordance yvith exemplary aspects of the disclosure.

[0023] FIG. 9 illustrates an example parcel jump operation and shift operation executed in parallel, in accordance with exemplar}- aspects of the disclosure.

[0024] FIG. 10 illustrates an example parcel merge, in accordance yvith exemplary aspects of the disclosure.

[0025] FIG. 11 illustrates an example racetrack architecture, in accordance with exemplary aspects of the disclosure.

[0026] FIGS. 12-16 illustrates an example method for implementing a trap having at least three parallel rails, in accordance yvith exemplary aspects of the present disclosure.DETAILED DESCRIPTION

[0027] DEFINITIONS:

[0028] “RF rails'’ and “DC controls'’

[0029] - The term “RF rails” refers to trap electrodes designed to produce ion confinement when a radio frequency (RF) signal or signals are applied to them. The RF signal or signals may be sinusoidal voltage with a frequency of 50 MHz, but may be non-sinusoidal and may have frequency or frequency components that are larger or smaller than 50 MHz. The amplitude of the RF signals may be constant in time or may be time vary ing.

[0030] - The term “DC controls” refers to trap electrodes designed to position the ions and move the ions when constant (DC) voltages are applied. While the term DC implies only constant voltages, transport of the parcels requires time varying signals to be applied. Tn this disclosure, the term DC will refer to both the constant and time varying signals applied to the DC controls. These signals usually have frequency components that are much lower than the signal applied to the RF rails but need not be limited to such a frequency range. The RF rails may also have a DC signal added to the RF signal.

[0031] “trap architecture” versus “trap design” versus “trap implementation”The term “trap architecture” refers to the particular layout of RF rails being described.- The term “trap design” refers to the layout of the RF rails (trap architecture) and the DC electrodes without reference to the details related to fabrication of the device.The term “trap implementation” refers to the fabrication design and / or actual trap die.

[0032] “RF null” and “RF track”- The RF rails with the RF signal or signals applied to them are configured to generate one or more RF nulls above the surface of the trap where the RF fields cancel out or nearly cancel out. These nulls may provide two dimensional confinement of the ions. RF rails may be configured to generate a null along a continuous line or curve above the trap.- Here, the term “RF track” is used to indicate this continuous line or curve. RF tracks may or may not intersect each other. When three or more RF tracks intersect at a point in space, that point in space and the RF rails around it are called a junction. A parcel transported by the DC signals along one of these RF tracks into the junction can move onto one of the other RF tracks that intersect in the junction. In the specific case of junctions, the ion or ions remain on or near the RF track.- Herein, a trap architecture is described with two or more non-intersecting RF tracks where DC signals move the parcel between tracks by leaving the neighborhood of thefirst RF track and moving to the second RF track. This method of moving parcels between tracks is termed a parcel jump operation.- NOTE: RF null might not be exactly a null, in which case this refers to an RF minima in radial direction.

[0033] “2 parallel RF rails”, “dual-track trap”, “multi-track architecture”A trap with two parallel RF rails supports a single RF track.- When properly configured, a trap with three parallel RF rails can support two parallel RF tracks. This architecture is referred to as a dual-track trap and represents a specific case of the architectures described in this disclosure.The term “multi-track architecture” describes an architecture that supports two or more tracks where a parcel cannot move between those two or more tracks via junctions alone.

[0034] “multi-parcel operations”A trap may be configured to confine a single parcel or to confine multiple parcels simultaneously. The term multi-parcel operation describes transport of one or more parcels when the trap is confining two or more parcels simultaneously.

[0035] “parcel jump operation” versus “parcel shift operation”The term “parcel jump operation” refers to the action of moving the ion or ions of a parcel between two different RF tracks by moving the parcel away from the RF null of the first RF track and delivering the parcel to the RF null of the second RF track.The term “parcel shift operation” refers to the action of moving the ion or ions of a parcel along the line or curve of an RF track.[32’] “reordering”- When there are more than two parcels in a trap, the trap is said to support parcel reordering if it can support merging for all pairs of parcels.

[0036] The ion traps described herein use a combination of RF and DC signals applied to the RF rails and DC electrodes to confine the ions and transport between regions of the trap. The RF rails are trap electrodes designed to produce ion confinement when a radio frequency (RF) signal or signals are applied to them. The RF signal or signals may be sinusoidal voltage with a frequency of 50 MHz, but may be non-sinusoidal and may have frequency or frequency components that are larger or smaller than 50 MHz. The amplitude of the RF signals may be constant in time or may be time vary ing. The DC controls are trap electrodes designed to position the ions and move the ions when constant (DC) voltages are applied. While the termDC implies only constant voltages, transport of the parcels requires time varying signals to be applied. Herein, the term DC " will refer to both the constant and time varying signals applied to the DC controls. These signals usually have frequency components that are much lower than the signal applied to the RF rails but need not be limited to such a frequency range. The RF rails may also have a DC signal added to the RF signal.

[0037] The RF rails with the RF signal or signals applied to them are configured to generate one or more RF nulls above the surface of the trap where the RF fields cancel out or nearly cancel out. These nulls may provide two dimensional confinement of the ions. RF rails may be configured to generate a null along a continuous line or curve above the trap. In this disclosure, we use the term RF track to indicate this continuous line or curve. RF tracks may or may not intersect each other. When two or more RF tracks intersect at a point in space, that point in space and the RF rails around it are called a junction. A parcel transported by the DC signals along one of these RF tracks into the junction can move onto one of the other RF tracks that intersect in the junction. In the specific case of junctions, the ion or ions remain on or near the RF track.

[0038] An ion trap may be configured to confine a single parcel or to confine multiple parcels simultaneously. The term multi-parcel operation describes transport of one or more parcels when the trap is confining two or more parcels simultaneously.

[0039] A trap with two parallel RF rails supports a single RF track. When properly configured, a trap with three parallel RF rails can support two parallel RF tracks. This architecture is referred to as a dual-track trap and represents a specific case of the architectures described herein. Herein, the term multi-track architecture describes an architecture that supports two or more tracks where a parcel cannot move between those two or more tracks via junctions alone.

[0040] Aspects of the present disclosure are directed to a multi -track ion trap that creates two or more non-intersecting RF tracks. DC signals move the parcel between tracks by directing a parcel away from the first RF track and into the second RF track. Contrary7to other implementations of multi-track ion traps, the RF signal is not necessarily changed during the transport. This method of moving parcels between tracks is termed a parcel jump operation. The parcel jump operation allows for parcels to be moved between tracks without implementing a junction connecting the track or changing the RF signal. Changing the RF signal affects all parcels in the trap, even those not being transported, possibly leading to ionloss or undesired transport. Changing the RF signal may also cause transients in the trap temperature that may affect quantum gate operations.

[0041] Aspects of the present disclosure provide an ion trap architecture with three or more parallel RF rails that allow for parcel transport and parcel reordering in a compact footprint. The design is compatible with transporting “long parcels” (e.g., groups of ions having greater than 2 members and preferably in the tens or more).

[0042] Further, the multi-parcel operations, which can generally be referred to as “ion parcel manipulation operation”, in accordance with this disclosure can be applicable to multiple types of quantum information processing (QIP) systems and qubit technologies. While various aspects of the multi-parcel operations are described with reference to a QIP system based on trapped-atom qubits, the disclosure is not limited in that respect. Indeed, the multi-parcel operations in accordance with this disclosure can be used in other types of QIP systems based on solid-state qubits. Additionally, while described with reference to qubits, the multi-parcel operations of this disclosure can in some cases be implemented for other types of quantum devices, such as qudit devices.

[0043] It is to be appreciated that aspects of the present disclosure improve the functioning of a computing system such as a QC by reducing the footprint of the trap and enabling reordering of the parcels. In this way, optimum performance may be achieved by a QC due to freedom of ion movements afforded by various aspects of the present disclosure.

[0044] FIG. 1 shown below illustrates a diagram with multiple atomic ion parcels 106 (e.g., atomic ion parcels 106a and 106b) trapped in a linear crystal or chain 110 using a trap (the trap can be inside a vacuum chamber as shown in FIG. 2). The trap may be referred to as an ion trap. The ion trap shown may be built or fabricated on a semiconductor substrate, a dielectric substrate, or a glass die or wafer (also referred to as a glass substrate). The atomic ion parcels 106 may be provided to the trap as atomic species for ionization and confinement into the chain 110.

[0045] In the example shown in FIG. 1, the trap includes electrodes for trapping or confining multiple atomic ion parcels into the chain 110 that are laser-cooled to be nearly at rest. The number of atomic ions (N) trapped can be configurable and more or fewer atomic ions may be trapped. The atomic ions can be Ytterbium ions (e.g.,171Yb+ions), for example. The atomic ion parcels are illuminated with laser (optical) radiation tuned to a resonance in171Yb+and the fluorescence of the atomic ion parcels is imaged onto a camera or some other type ofdetection device. The separation of the atomic ions is determined by a balance between the confinement force and Coulomb repulsion and does not need to be uniform.

[0046] FIG. 2 shown below is a block diagram that illustrates an example of a QIP system 200 in accordance with various aspects of this disclosure. The QIP system 200 may also be referred to as a quantum computing system, a quantum computer, a computer device, a trapped ion system, or the like. The QIP system 200 may be part of a hybrid computing system in which the QIP system 200 is used to perform quantum computations and operations and the hybrid computing system also includes a classical computer to perform classical computations and operations.

[0047] Shown in FIG. 2 is a general controller 205 configured to perform various control operations of the QIP system 200, such as ion parcel manipulation operations. Instructions for the control operations may be stored in memory (not shown) in the general controller 205 and may be updated over time through a communications interface (not shown). Although the general controller 205 is shown separate from the QIP system 200, the general controller 205 may be integrated with or be part of the QIP system 200. The general controller 205 may include an automation and calibration controller 280 configured to perform various calibration, testing, and automation operations associated with the QIP system 200.

[0048] The QIP system 200 may include an algorithms component 210 that may operate with other parts of the QIP system 200 to perform quantum algorithms or quantum operations, including a stack or sequence of combinations of single qubit operations and / or multi-qubit operations (e.g., two-qubit operations) as well as extended quantum computations. As such, the algorithms component 210 may provide instructions to various components of the QIP system 200 (e.g., to the optical and trap controller 220) to enable the implementation of the quantum algorithms or quantum operations. The algorithms component 210 may receive information resulting from the implementation of the quantum algorithms or quantum operations and may process the information and / or transfer the information to another component of the QIP system 200 or to another device for further processing.

[0049] The QIP system 200 may include an optical and trap controller 220 that controls various aspects of a trap 270 in a chamber 250. including the generation of signals to control the trap 270, and controls the operation of lasers and optical systems that provide optical beams that interact with the atoms or ions in the trap. When used to confine or trap ions, the trap 270 may be referred to as an ion trap. The trap 270, however, may also be used to trap neutral atoms, Rydberg atoms, different atomic ions or different species of atomic ions. The lasers andoptical systems can be at least partially located in the optical and trap controller 220 and / or in the chamber 250. For example, optical systems within the chamber 250 may refer to optical components or optical assemblies. The optical and trap controller 220 includes signal generators 221 configured to generate various AC and DC potentials applied to the RF rails (not shown, see FIG. 4) of the trap 270 and the DC electrodes (not shown, see FIG. 6) of the trap 270. In further detail, one or more of the signal generators (also referred to herein as RF sources7’) are configured to drive the RF rails of trap 270 and one or more single generators are configured to generate signals for driving the DC electrodes of trap 270. The algorithms components 210 may store method 1200 of FIGS. 12-16. To that end, method 1200 may be configured to have sets of known DC signals and RF signals for implementing transport of parcels along the RF tracks or between RF tracks.

[0050] In another or the same aspect, a feedback mechanism may be used to adjust the signals generated by the signal generator(s) 221 to generate the RF tracks by the RF rails and the forces by the DC electrodes.

[0051] The QIP system 200 may include an imaging system 230. The imaging system 230 may include a high-resolution imager (e.g., CCD camera) or other type of detection device (e.g., photomultiplier tube or PMT) for monitoring the atomic ions while they are being provided to the trap 270 and / or after they have been provided to the trap 270. In an aspect, the imaging system 230 can be implemented separate from the optical and trap controller 220, however, the use of fluorescence to detect, identify, and label atomic ions using image processing algorithms may need to be coordinated with the optical and trap controller 220.

[0052] In addition to the components described above, the QIP system 200 can include a source 260 that provides atomic species (e.g., a plume or flux of neutral atoms) to the chamber 250 having the trap 270. When atomic ions are the basis of the quantum operations, that trap 270 confines the atomic species once ionized (e.g., photoionized). The trap 270 may be part of a processor or processing portion of the QIP system 200. That is, the trap 270 may be considered at the core of the processing operations of the QIP system 200 since it holds the atomic-based qubits that are used to perform the quantum operations or simulations. At least a portion of the source 260 may be implemented separate from the chamber 250.

[0053] It is to be understood that the various components of the QIP system 200 described in FIG. 2 are described at a high-level for ease of understanding. Such components may include one or more sub-components, the details of which may be provided below as needed to better understand certain aspects of this disclosure.

[0054] Aspects of this disclosure may be implemented at least partially using the general controller 205, the automation and calibration controller 280, and / or the algorithms component 210.

[0055] Referring now to FIG. 3 shown below, illustrated is an example of a computer system or device 300 in accordance with aspects of the disclosure. The computer device 300 can represent a single computing device, multiple computing devices, or a distributed computing system, for example. The computer device 300 may be configured as a quantum computer (e g., a QIP system), a classical computer, or to perform a combination of quantum and classical computing functions, sometimes referred to as hybrid functions or operations. For example, the computer device 300 may be used to process information using quantum algorithms, classical computer data processing operations, or a combination of both. In some instances, results from one set of operations (e.g., quantum algorithms) are shared with another set of operations (e.g., classical computer data processing). A generic example of the computer device 300 implemented as a QIP system capable of performing quantum computations and simulations is, for example, the QIP system 200 shown in FIG. 2.

[0056] The computer device 300 may include a processor 310 for earning out processing functions associated with one or more of the features described herein. The processor 310 may include a single or multiple set of processors or multi-core processors. Moreover, the processor 310 may be implemented as an integrated processing system and / or a distributed processing system. The processor 310 may include one or more central processing units (CPUs) 310a, one or more graphics processing units (GPUs) 310b, one or more quantum processing units (QPUs) 310c, one or more intelligence processing units (IPUs) 310d (e.g., artificial intelligence or Al processors), or a combination of some or all those types of processors. In one aspect, the processor 310 may refer to a general processor of the computer device 300. which may also include additional processors 310 to perform more specific functions (e.g., including functions to control the operation of the computer device 300).

[0057] The computer device 300 may include a memory 320 for storing instructions executable by the processor 310 to carry out operations. The memory 320 may also store data for processing by the processor 310 and / or data resulting from processing by the processor 310. In an implementation, for example, the memory 320 may correspond to a computer-readable storage medium that stores code or instructions to perform one or more functions or operations. Just like the processor 310, the memory 320 may refer to a general memory of the computerdevice 300, which may also include additional memories 320 to store instructions and / or data for more specific functions.

[0058] It is to be understood that the processor 310 and the memory 320 may be used in connection with different operations including but not limited to computations, calculations, simulations, controls, calibrations, system management, and other operations of the computer device 300, including any methods or processes described herein.

[0059] Further, the computer device 300 may include a communications component 330 that provides for establishing and maintaining communications with one or more parties utilizing hardware, software, and services. The communications component 330 may also be used to carry communications between components on the computer device 300, as well as between the computer device 300 and external devices, such as devices located across a communications network and / or devices serially or locally connected to computer device 300. For example, the communications component 330 may include one or more buses, and may further include transmit chain components and receive chain components associated with a transmitter and receiver, respectively, operable for interfacing with external devices. The communications component 330 may be used to receive updated information for the operation or functionality of the computer device 300.

[0060] Additionally, the computer device 300 may include a data store 340, which can be any suitable combination of hardware and / or software, which provides for mass storage of information, databases, and programs employed in connection with the operation of the computer device 300 and / or any methods or processes described herein. For example, the data store 340 may be a data repository for operating system 360 (e.g., classical OS, or quantum OS, or both). In one implementation, the data store 340 may include the memory 320. In an implementation, the processor 310 may execute the operating system 360 and / or applications or programs, and the memory 320 or the data store 340 may store them.

[0061] The computer device 300 may also include a user interface component 350 configured to receive inputs from a user of the computer device 300 and further configured to generate outputs for presentation to the user or to provide to a different system (directly or indirectly). The user interface component 350 may include one or more input devices, including but not limited to a keyboard, a number pad, a mouse, a touch-sensitive display, a digitizer, a navigation key, a function key, a microphone, a voice recognition component, any other mechanism capable of receiving an input from a user, or any combination thereof. Further, the user interface component 350 may include one or more output devices, includingbut not limited to a display, a speaker, a haptic feedback mechanism, a printer, any other mechanism capable of presenting an output to a user, or any combination thereof. In an implementation, the user interface component 350 may transmit and / or receive messages corresponding to the operation of the operating system 360. When the computer device 300 is implemented as part of a cloud-based infrastructure solution, the user interface component 350 may be used to allow a user of the cloud-based infrastructure solution to remotely interact with the computer device 300.

[0062] FIGS. 4-10 below describe various features of the present disclosure, in accordance with various aspects. While the present disclosure is not limited to the specific QIP system shown in FIG. 2 and may be applied to other systems configurations and types as mentioned herein, QIP system 200 will be used hereinafter in describing the various features of the present disclosure, including with respect to FIGS. 4-10.

[0063] Referring to FIG. 4, an example multi-track architecture 400 is shown, in accordance with an exemplary aspects of the disclosure. As shown, the multi-track architecture 400 includes three RF rails, but can include four or more rails in alternative aspects. In an exemplary aspect, the multi-track architecture 400 can be implemented as part of an ion trap, such as ion trap 270 as shown in FIG. 2 and described above.

[0064] The multi-track architecture 400 includes three parallel RF rails, namely a first RF rail 401, a second RF rail 402, and a third RF rail 403. Semi-static, potentials from the DC electrodes generate three dimensional confinement for the parcels. It should be appreciated that the term '‘parallel’’ in an exemplary aspect refers to the RF rails being physical parallel to one another or “substantially parallel”, taking into account minor design and / or manufacturing variances.

[0065] In an exemplary aspect, a single RF signal is used for all three rails and the amplitude and frequency of that RF signal is constant in time.

[0066] In other aspects, more than one RF signal may be used and the RF signal amplitude and / or frequency varied to facilitate the operations described in this disclosure.

[0067] In an aspect, DC signals applied to the DC electrodes (not shown) confine multiple parcels (groups of one or more ions) along the two RF tracks 411 and 412. That is, as discussed in more detail below, a controller, such as general controller 205 and / or optical and trap controller 220 as described above, is configured to the DC electrodes, to selectively applying the one or more potentials to perform one or more ion parcel manipulation operations on one or a plurality of ion parcels confined in one or more RF tracks.

[0068] For example, Parcels 421 through 423 are shown confined to RF track 411 and parcel 431 is shown confined to RF track 412 for the sake of illustration. When the DC signals are static, the DC electrodes create electric fields to confine ion parcels in fixed positions in the RF tracks 411 and 412 as shown by the locations of parcels 421-431. Moreover, time varying DC signals, where the time variation is typically slow compared to the RF signals, applied to the DC electrodes allow for transport of one or more parcels along the RF tracks and, as an exemplary aspect, between the RF tracks. For example, some of the DC electrodes may create an attracting field while other ones of the DC electrodes may create a repelling field to move an ion parcel along a RF track or between RF tracks while maintaining the parcel as a unit. Similarly, forces generated by the DC electrodes may merge two or more parcels into a single larger parcel or the forces generated may split one parcel into two or more smaller parcels.

[0069] According to an exemplary aspect, the ion parcel manipulation operations can be one or more of an ion parcel transportation, an ion parcel merging, an ion parcel separation, and an ion parcel jumping (e.g.. a parcel jump operation). In an exemplary aspect, a parcel jump operation is the action of moving the ion or ions of a parcel between two different RF tracks by moving the parcel away from the RF null of the first RF track and delivering the parcel to the RF null of the second RF track. A parcel shift operation (e.g., an ion parcel transportation) is the action of moving the ion or ions of a parcel along the line or curve of an RF track. A parcel merge (e.g.. an ion parcel merging) is the action of taking two or more parcels and merging them into a single, larger parcel. A parcel split (e.g., an ion parcel separation) is the action of taking one parcel and splitting it into two or more smaller parcels. The details of these operations are described below.

[0070] In an aspect, the placement, shape, and distribution of the DC electrodes are chosen such that different regions along the RF tracks 41 1 and 412 are better suited to perform some operations than others. For example, the DC electrodes may be configured in a particular region of the RF tracks 411 and 412 to facilitate parcel jump operations in that region or to facilitate the precise control of the ions in the parcel as needed for quantum operations.

[0071] In an aspect, a relatively uniform placement of the DC electrodes is implemented to allow relatively equal capability along the RF tracks for the various operations supported by the trap, such as jump and shift operations and quantum operations.

[0072] It is to be appreciated that the three parallel RF rails 401-403 are not shown to scale and are instead truncated and can thus extend a distance to the left and / or to the right from whatis shown. Furthermore, the three parallel RF rails 401-403 may change shape, merge into fewer electrodes, and / or split into more electrodes at a distance to the left and / or to the right of what is s own.

[0073] It is to be further appreciated that while three parallel RF rails 401-403 are shown for the sake of illustration, any number of parallel RF rails equal to or greater than three can be used to achieve the benefits of the present disclosure.

[0074] The use of two (or more) parallel tracks provides a spatially compact architecture when compared to a single track device that can hold the same number of parcels. The linear single track is effectively folded into the multi-track configuration, shortening the overall length of the trap architecture. Furthermore, ‘‘sharing” of the RF rail between the parallel tracks can reduce the overall device capacitance and, consequently, reduce the heat generated by the device from ohmic heating from the RF currents needed to apply the RF signal to the RF rails or from RF dielectric loss in the materials supporting the electrodes.

[0075] Referring to FIG. 5, an example cross section 500 of the multi-track architecture 400 of FIG. 4 is shown, in accordance with exemplary aspects of the disclosure.

[0076] The two RF track 411 and 412 (RF track 412 is shown) are located above the surface of the trap 510 w hich includes the trap substrate 511 and the patterned metal layer(s) 512 that constitute the RF and DC electrodes. Parcels 531, 532, and 533 are confined to the RF track 412 by the electric fields generated by the RF rails 402-403. While a single metal layer 512 is shown for clarity, this layer may be composed of multiple metal layers and dielectric layers to form the RF electrodes and DC electrodes and provide paths for electrical connections from the signal source(s) 260.

[0077] Referring to FIG. 6, a variation 600 of the example multi-track architecture 400 of FIG. 4 is shown, in accordance with an exemplary’ aspects of the disclosure.

[0078] In the variation 600, the spaces between and outside the three RF rails 401-403 are filled with DC electrodes 601. The DC electrodes 601 are used to provide control over the parcel locations. The DC electrodes 601 may have static or time vary ing potentials applied. The number and placement of the DC electrodes 601 may be adjusted and optimized for particular requirements.

[0079] The number and locations of the DC electrodes 601 in FIG. 6 are merely illustrative. In the example, there are two rows of consecutive DC electrodes 601 in each of the regions between the three parallel RF rails 601-603 and a row of consecutive electrodes on the outside of each of the outer two parallel RF rails 601 and 603. In other aspects, alternating orother paterns or random placements of the DC electrodes 601 may be used. In particular, there are inside DC electrodes 601 A and outside DC electrodes 601B. Inside DC electrodes 601 have two sides adjacent to a respective RF rail while outside DC electrodes 60 IB have one side adjacent to an RF rail.

[0080] The DC electrodes 601 are connected to the signal generator(s) 221 and the signal generate r(s) 221 are configured by the optical and trap controller 220. In particular, the optical and trap controller 220 configure the signal generators 221 to generate voltages that are used to confine the ion parcels along the RF nulls 41 1 and 412. In further detail, the signal generators 221 are configured to generate time-varying forces on one or more parcels to transport the one or more parcels to other locations along one or more RF tracks or move one or more parcels between RF tracks, or a combination of the two operations. In this way. an entire parcel(s) can be transported along an RF track or between RF tracks. In an aspect, feedback is used by the optical and trap controller 220 to determine and / or otherwise adjust the voltage for and during a parcel(s) transport operation.

[0081] Referring to FIG. 7, an example parcel jump operation 700 is shown, in accordance with exemplary aspects of the disclosure.

[0082] Parcels 721-723 and 731 are shown along with a location 722’ that does not include a parcel. By controlling the DC electrodes 601 (not shown in FIG. 7, see FIG. 6), parcel 722 can be made to move across the central RF rail 402 from RF track 411 to the position 722' on RF track 412 (or vice versa) in a ‘"parcel jump operation” 600.

[0083] In an aspect, the DC electric fields created by the DC electrodes 601 can be varied to confine parcel 722 at one moment and then exert a force to move parcel 722 at the next moment. A chain of DC electrodes may be controlled to exert the same force along an ion chain in order to uniformly apply force across all ions in the parcel, while maintaining confinement of the ions within the parcel, to move the parcel across the rail 402 from one RF track, e.g., RF track 411, to another RF track, e.g., RF track 412.

[0084] In an exemplary aspect, the ions of parcel 722 leaves the vicinity of the RF track 411, travels in the interim space between RF tracks 411 and 412, and then enters the vicinity of the RF track 412 at position 722'. During this transit, the ions of the parcel are maintained as a single, confined unit with the ions remaining configured as a linear chain without buckling or changing to a zig-zag configuration.

[0085] In an exemplary' aspect, the radial confinement along the RF track 411 and 412 for parcels 721, 723. and 731 are maintained at a constant strength during parcel jump operation.

[0086] In an aspect, the confinement along the RF tracks 411 and 412 can be momentarily relaxed by changing the RF signal(s) to facilitate travel of the ion parcel 722 over the central RF rail 402 during the parcel jump operation.

[0087] Referring to FIG. 8, an example parcel shift 800 is shown, in accordance with exemplary aspects of the disclosure.

[0088] Parcels 721, 722, 731, and 732 are shown along with a location 731' that does not include a parcel. By controlling the DC electrodes 601 (not shown in FIG. 8. see FIG. 6), parcel 731 can be made to shift positions to the location 731 ’ along RF track 412. In other aspects, a chain of two or more parcels may be simultaneously shifted along the same RF track in order to move the chain of tw o or more parcels.

[0089] Referring to FIG. 9, two example parcel jump operations 901 and 902 are shown, with the two parcel jump operations performed at the same time, in accordance with exemplary aspects of the disclosure.

[0090] Parcel jump operation 901 involves parcel 931 jumping from RF track 412 over RF rail 402 to RF track 411. Parcel jump operation 902 involves parcel 922 jumping from RF track 411 over RF rail 402 to RF track 412.

[0091] In an aspect, parcel jump operations may occur in both directions from RF track 411 to RF track 412 and from RF track 412 to RF track 411.

[0092] As shown, multiple parcel jump operations (and / or parcel shift operations(s)) may occur at the same time. For example, multiple parcel jump operations may be simultaneously performed, multiple parcel shift operations may be simultaneously performed, and / or one or more parcel jump operations and one or more parcel shift operations may be simultaneously performed. Such operations are implemented by controlling the DC electrodes 601.

[0093] Referring to FIG. 10, an example parcel merge 1000 is shown, in accordance with exemplary aspects of the disclosure.

[0094] Parcels 1021, 1022, 1031, and 1032 are shown along with locations 1023. Parcels 1021 and 1022 on RF track 411 can be merged into a single larger parcel 1023 (i.e., an ion parcel merging operation) to allow7for connectivity between parcel 1021 and parcel 1022 via quantum gates. A parcel merge operation is shown here on track 411 but that does not preclude parcel merge operations on track 412. Alternatively, one or more parcels can also be separated into multiple smaller parcels (e.g., separating parcel 1023 into one or more of parcels 1021 and 1022) as part of an ion parcel separation operation.

[0095] Referring to FIG. 11, an example “racetrack’" architecture 1100 incorporating the multi-track architecture with other architectural elements is shown, in accordance with exemplary aspects of the disclosure.

[0096] The racetrack architecture 1100 is an exemplary configuration of an ion trap that includes two RF tracks 401 and 402 configured to, in turn, include a triple track portion 403’. That is, substantially oval RF track 401 is placed adjacent to substantially straight but nonintersecting RF track 402 to create triple track portion 403’.

[0097] In an aspect, RF track 401 may be placed adjacent to RF track 402 at triple track portion 403’ so as to use a single set of intermediate DC electrodes (not shown) therebetween to save space (e.g., by reducing a row of DC electrodes) and / or duplicate control (e g., on both tracks RF 401 and 402 in triple track portion 403’). While we describe a particular arrangement of such components, this does not preclude other arrangements, exclusion of some shown components, and / or the inclusion of components not shown here in an architecture.

[0098] While this example architecture demonstrates two RF tracks, this does not preclude architectures with three or more RF tracks. Moreover, while this example architecture demonstrates a substantially oval RF track and a substantially straight but disjointed track, in another aspect, two substantially oval RF tracks and / or two substantially straight tracks and / or substantial straight but disjointed tracks, and / or so forth may be used.

[0099] Referring now to FIGS. 12-16, an example method 1200 for implementing a trap having at least three parallel rails 401-403 is shown and described in accordance with exemplary aspects of the present disclosure. In an aspect, the method 1200 can be at least primarily performed by the general controller 205 and / or the optical and trap controller 220. In an aspect, at least one of the general controller 205 and / or the optical and trap controller 220 include and / or otherwise connected to one or more voltage generators 221 for generating static or time varying signals for the RF rails 401-403 and for the DC electrodes 601. Solid lines indicate primary blocks of method 1200, and dashed and / or dotted lines indicate non-primary blocks of method 1200. The method is applicable at manufacture and subsequent to manufacture, as described in further detail hereinbelow.

[0100] At block 1210, the method 1200 includes configuring at least three radio frequency (RF) rails 401-403 driven by one or more RF sources 221. The at least three RF rails 401-403 are arranged in parallel to generate respective RF tracks 411 and 412 (paths of RF null or near null), in between each pair of adjacent RF rails ((401 / 402 and 402 / 403)) from among the at least three RF rails 401-403, that confine ion parcels to the RF tracks.

[0101] It is envisioned that block 1210 comprises initially configuring the at least three rails 401-403 at manufacture and / or configuring the at least three rails 401-403 subsequent to manufacture. At manufacture, the at least three RF rails 401-403 would be configured to be parallel with respect to each other and responsive to signals and / or potentials from signal generators 221 that generate RF nulls in between adjacent rails ((401 / 402 and 402 / 403)). Subsequent to manufacture, the at least three RF rails 401-403 would already be parallel and would be configured by the application of signals and / or potentials from signal generators 221 to generate RF tracks that are in between adjacent rails ((401 / 402 and 402 / 403)) to confine the ion parcels to the RF tracks and permit transportation of ion parcels, e.g., along a RF track and / or across an intermediate RF rail.

[0102] In an aspect, block 1210 may include block 1210A.

[0103] At block 1201A, additional architectural elements may be included with the multitrack architecture in 1210. An example of such additional elements is the racetrack architecture 1100 shown in FIG. 11, but is not limited to that example.

[0104] At block 1220, the method 1200 includes configuring a set of Direct Current (DC) electrodes 601. arranged between each pair of adjacent RF rails ((401 / 402 and 402 / 403) and outside of peripheral RF rails ((401 and 403) from among the at least three RF rails 401-403, to generate one or more potentials that confine the ion parcels along respective RF tracks ((411 and 412)) generated by the at least three RF rails 401-403.

[0105] It is envisioned that block 1220 comprising initially configuring the set of DC electrodes 601 at manufacture and / or configuring the set of DC electrodes 601 subsequent to manufacture. At manufacture, the set of DC electrodes 601 would be configured to be positionally effective to implement one or more ion parcel transportation operations responsive to signals and / or potentials from signal generators 221 that generate RF nulls (e.g., RF nulls 411 and 412) in between adjacent rails ((401 / 402 and 402 / 403)). Subsequent to manufacture, the set of DC electrodes 601 would already be positionally located and would be configured by the application of signals and / or potentials from signal generators 221 to generate forces (e.g., repulsion, attraction, etc.) at the RF tracks (e.g., RF tracks 411 and 412) that are in between adjacent rails ((401 / 402 and 402 / 403)) to confine and / or move ion parcels along a RF track and / or across an intermediate RF rail.

[0106] In an aspect, block 1220 may include one or more of blocks 1220A through 1220N.

[0107] At block 1220A, the method 1200 includes consecutively arranging at least some of the DC electrodes 601.

[0108] At block 1220B, the method 1200 includes disjointly arranging at least some of the DC electrodes 601.

[0109] At block 1220C, the method 1200 includes arranging one or more inside DC electrodes 601A in between the adjacent RF rails, and / or arranging one or more outside DC electrodes 60 IB outside of the peripheral RF rails.

[0110] At block 1220D, the method 1200 includes arranging at least some of the inside DC electrodes 601 A to have a different layout pattern than at least some of the outside DC electrodes 601 B.

[0111] At block 1220E, the method 1200 includes arranging at least some of the inside DC electrodes 601 A to have a different layout pattern with respect to each other.

[0112] At block 1220F, the method 1200 includes arranging at least some of the outside DC electrodes 601 B to have a different layout pattern with respect to each other.

[0113] At block 1220G, the method 1200 includes arranging the inside DC electrodes 601A in between a respective pair of adjacent RF rails (401 / 402 and 402 / 403) to form two or more rows of DC electrodes in parallel with the at least three RF rails 401-403.

[0114] At block 1220H, the method 1200 includes determining a number and a placement of at least some of the DC electrodes 601 responsive to particular requirements relating to ion transport (i.e., an ion parcel transportation operation) between different positions along at least one RF track 411 and 412 in between at least one pair of adjacent RF rails (401 / 402 and 402 / 403) from among the three RF rails 401-403.

[0115] At block 12201, the method 1200 includes determining a number and a placement of at least some of the DC electrodes 601 responsive to particular requirements relating to ion transport across at least one intermediate RF rail 402 from among the at least three RF rails 401-403.

[0116] At block 1220J, the method 1200 includes determining a number and a placement of at least some of the DC electrodes 601 responsive to particular requirements relating to ion merging between different positions along at least one RF track 411 and 412 in between at least one pair of adjacent RF rails (401 / 402 and 402 / 403) from among the three RF rails 401-403.

[0117] At block 1220K, the method 1200 includes determining a number and a placement of at least some of the DC electrodes 601 responsive to particular requirements relating to ion position merging across at least one intermediate RF rail 402 from among the at least three RF rails 401-403.

[0118] At block 1220L, the method 1200 includes configuring one or more DC electrodes adjacent to a given ion location, from among the set of DC electrodes 601. to be separately controllable to confine ions in the given ion location.

[0119] At block 1220M, the method 1200 includes configuring a controller 205 and / or an optical and trap controller 220 to control the set of DC electrodes 601 by selectively applying the one or more potentials via signal generators 221 to selectively perform at least one operation selection from the group consisting of ion transportation, ion merging, ion separation, and ion jumping. Thus, one or more ion transportation operations, one or more ion merging operations, and / or one or more ion jumping operations may be consecutively or concurrently performed or a hybrid mix of the two (consecutively and concurrently).

[0120] At block 12200. the method 1200 includes configuring different portions of the racetrack 1 100 to be optimized for different operations. The operations may include ion parcel separations, mergers, jumps, and so forth. The different portions of the racetrack 1100 may be differently configured by using different placements of the DC electrodes 601 and / or potential values for the DC electrodes 601, for the different portions and / or different operations performed in the different portions. As an example. RF rail sections numbering three or more in parallel may be optimized for at least jump operations, given the at least one intermediate RF rail.

[0121] At block 1220P, the method 1200 includes configuring the set of DC electrodes 601 to implement quantum gate functions.

[0122] At block 1220Q, the method 1200 includes configuring the set of DC electrodes 601 to implement load operations. In an aspect, one or more voids may be created in the set of DC electrodes 601 to allow ion parcel loading.

[0123] At block 1221. the method 1200 includes generating at least some of the one or more potentials as static potentials.

[0124] At block 1222, the method 1200 includes generating at least some of the one or more potentials as time-varying potentials.

[0125] At block 1230. the method 1200 includes selectively applying the one or more potentials to at least some of the DC electrodes 601 to selectively perform one or more operations selected from the group consisting of ion transportation, ion merging, ion separation, and ion jumping. Thus, one or more ion transportation operations, one or more ion merging operations, one or more ion separation operations, and / or one or more ion jumpingoperations may be consecutively or concurrently performed or a hybrid mix of the two (consecutively and concurrently).

[0126] At block 1241, the method 1200 includes controlling the one or more signals applied to the at least three RF rails 401-403 to adjust the respective RF track in between each pair of adjacent RF rails.

[0127] At block 1242, the method 1200 includes controlling the one or more signals applied to the at least three RF rails 401-403 to adjust the respective RF track in between each pair of adjacent RF rails responsive to respective requirements for a given ion parcel operation.

[0128] Various aspects of the disclosure may take the form of an entirely or partially hardware aspect, an entirely or partially software aspect, or a combination of software and hardware. Furthermore, as described herein, various aspects of the disclosure (e.g., systems and methods) may take the form of a computer program product comprising a computer- readable non-transitory storage medium having computer-accessible instructions (e.g., computer-readable and / or computer-executable instructions) such as computer software, encoded or otherwise embodied in such storage medium. Those instructions can be read or otherwise accessed and executed by one or more processors to perform or permit the performance of the operations described herein. The instructions can be provided in any suitable form, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, assembler code, combinations of the foregoing, and the like. Any suitable computer-readable non-transitory storage medium may be utilized to form the computer program product. For instance, the computer-readable medium may include any tangible non- transitory medium for storing information in a form readable or otherwise accessible by one or more computers or processor(s) functionally coupled thereto. Non-transitory storage media can include read-only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory, and so forth.

[0129] Aspects of the present disclosure may be implemented in accordance with one or more of the following clauses.

[0130] Clause 1. A quantum computing system comprising: at least three radio frequency (RF) rails driven by one or more RF sources, wherein the at least three RF rails are arranged in parallel and configured to generate a respective RF null, in between each pair of adjacent RF rails from among the at least three RF rails, wherein configured to confine ion parcels; and a plurality of Direct Current (DC) electrodes arranged in betw een each pair of adjacent RF rails and outside of peripheral RF rails from among the at least three RF rails, the plurality of DCelectrodes being configured to generate one or more potentials that confine the ion parcels along respective RF tracks.

[0131] Clause 2. The quantum computing system in accordance with clause 1, further comprising a controller configured to control the plurality of DC electrodes by selectively applying the one or more potentials to selectively perform one or more operations on at least one of the ion parcels that includes at least one of ion transportation, ion merging, and ion jumping.

[0132] Clause 3. The quantum computing system in accordance with any preceding clauses, wherein at least a portion of the one or more potentials are static.

[0133] Clause 4. The quantum computing system in accordance with any preceding clauses, wherein at least a portion of the one or more potentials are time-varying.

[0134] Clause 5. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise consecutively arranged DC electrodes.

[0135] Clause 6. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise disjointly arranged DC electrodes.

[0136] Clause 7. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise: inside DC electrodes that are disposed between the adjacent RF rails; and outside DC electrodes that are disposed outside of the peripheral RF rails.

[0137] Clause 8. The quantum computing system in accordance with any preceding clauses, wherein at least a portion of the inside DC electrodes have a different layout pattern than at least a portion of the outside DC electrodes.

[0138] Clause 9. The quantum computing system in accordance with any preceding clauses, wherein the inside DC electrodes in between a respective pair of adjacent RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RF rails.

[0139] Clause 10. The quantum computing system in accordance with any preceding clauses, wherein the outside DC electrodes outside the RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RF rails.

[0140] Clause 11. The quantum computing system in accordance with any preceding clauses, further comprising additional RF and DC structures appended to the three or more RFrails and configured to implement a racetrack loop that connects one end of the three or more RF rails to another end of the three or more rails.

[0141] Clause 12. The quantum computing system in accordance with any preceding clauses, wherein the additional RF and DC structures are further appended to the three or more RF rails and configured to implement transitions to two rail straight or curved traps for loading ions.

[0142] Clause 13. The quantum computing system in accordance with any preceding clauses, wherein the three or more rails are curved to generate two or more curved RF tracks.

[0143] Clause 14. A quantum computing system comprising: at least three radio frequency (RF) rails arranged in parallel and configured to generate a respective RF null, such that a path of each respective RF null is provided as an RF track in between each pair of adjacent RF rails from among the at least three RF rails, and the RF track is configured to confine ion parcels; and a plurality of Direct Current (DC) electrodes arranged in between each pair of adjacent RF rails and outside of peripheral RF rails from among the at least three RF rails, the plurality of DC electrodes being configured to generate one or more potentials that confine the ion parcels along respective RF tracks.

[0144] Clause 15. The quantum computing system in accordance with clause 14, further comprising a controller configured to control the plurality of DC electrodes by selectively applying the one or more potentials to selectively perform one or more operations on at least one of the ion parcels that includes at least one of ion parcel transportation, ion parcel merging, ion parcel separation, and ion parcel jumping.

[0145] Clause 16. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise consecutively arranged DC electrodes.

[0146] Clause 17. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise disjointly arranged DC electrodes.

[0147] Clause 18. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes comprise: inside DC electrodes that are disposed between the adjacent RF rails; and outside DC electrodes that are disposed outside of the peripheral RF rails.

[0148] Clause 19. The quantum computing system in accordance with any preceding clauses, wherein the inside DC electrodes in between a respective pair of adjacent RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RFrails, and wherein the outside DC electrodes outside the RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RF rails.

[0149] Clause 20. The quantum computing system in accordance with any preceding clauses, further comprising additional RF and DC structures appended to the three or more RF rails and configured to implement a racetrack loop that connects one end of the three or more RF rails to another end of the three or more rails.

[0150] Clause 21. A quantum computing system comprising: a plurality of radio frequency (RF) rails driven by one or more RF sources, arranged in parallel and configured to generate a respective RF null having a path in between an adjacent pair of the plurality of RF rails that is configured as an RF track and that is configured to confine ion parcels; and a controller configured to control a plurality of Direct Current (DC) electrodes, which are arranged in between the adjacent pair of RF rails and outside of peripheral RF rails of the plurality of RF rails, to selectively apply one or more potentials to perform an ion parcel manipulation operation on at least one of the ion parcels confined in the RF track.

[0151] Clause 22. The quantum computing system in accordance with clause 21, wherein the ion parcel manipulation operation is at least one of an ion parcel transportation, an ion parcel merging, an ion parcel separation, and an ion parcel jumping.

[0152] Clause 23. The quantum computing system in accordance with any preceding clauses, wherein the controller is configured to control the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel transportation as the ion parcel manipulation operation w ich includes transporting the at least one ion parcel between different positions along the RF track.

[0153] Clause 24. The quantum computing system in accordance with any preceding clauses, wherein the controller is configured to control the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel merging as the ion parcel manipulation operation which includes merging the at least one ion parcel and one additional ion parcel into a single larger ion parcel.

[0154] Clause 25. The quantum computing system in accordance with any preceding clauses, wherein the controller is configured to control the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel separating as the ion parcel manipulation operation which includes separating the at least one ion parcel into tw o or more smaller ion parcels.

[0155] Clause 26. The quantum computing system in accordance with any preceding clauses, wherein the controller is configured to control the plurality of DC electrodes to selectively apply the one or more potentials to perform a parcel jump operation as the ion parcel manipulation operation which includes moving the ion parcel from the RF track to another RF track between a pair of adjacent RF rails of the plurality' of RF rails.

[0156] Clause 27. The quantum computing system in accordance with any preceding clauses, wherein the controller is configured to control the plurality' of DC electrodes to selectively apply' the one or more potentials to perform an parcel jump operation as the ion parcel manipulation operation which includes moving the ion parcel away from the RF null of the RF track and delivering the ion parcel to an RF null of an additional RF track between a pair of adjacent RF rails of the plurality of RF rails.

[0157] Clause 28. The quantum computing system in accordance with any preceding clauses, wherein at least a portion of the one or more potentials are static.

[0158] Clause 29. The quantum computing system in accordance with any preceding clauses, wherein at least a portion of the one or more potentials are time-varying.

[0159] Clause 30. The quantum computing system in accordance with any preceding clauses, wherein a number and a placement of at least a portion of the DC electrodes are determined responsive to requirements relating to the ion transport betw een different positions along the RF

[0160] Clause 31. The quantum computing system in accordance with any preceding clauses, wherein a number and a placement of at least some of the DC electrodes are determined responsive to requirements relating to the ion merging between different positions along the RF track.

[0161] Clause 32. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes are configured to implement quantum gate functions.

[0162] Clause 33. The quantum computing system in accordance with any preceding clauses, wherein the plurality of DC electrodes is configured to implement load operations, and wherein one or more voids are created in the plurality of DC electrodes to allow ion parcel loading.

[0163] Clause 34. A method for controlling a quantum computing system, the method comprising: configuring a plurality of radio frequency (RF) rails driven by one or more RF sources and arranged in parallel to generate a respective RF null having a path in between anadjacent pair of the plurality of RF rails that is configured as an RF track to confine ion parcels; and controlling a plurality of DC electrodes, which are arranged in between the adjacent pair of RF rails and outside of peripheral RF rails of the plurality of RF rails, to selectively apply one or more potentials to perform an ion parcel manipulation operation on at least one of the ion parcels confined in the RF track.

[0164] Clause 35. The method in accordance with clause 34, further comprising controlling the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel transportation as the ion parcel manipulation operation which includes transporting the at least one ion parcel between different positions along the RF track.

[0165] Clause 36. The method in accordance with any preceding clauses, further comprising controlling the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel merging as the ion parcel manipulation operation which includes merging the at least one ion parcel and one additional ion parcel into a single larger ion parcel.

[0166] Clause 37. The method in accordance with any preceding clauses, further comprising controlling the plurality of DC electrodes to selectively apply the one or more potentials to perform an ion parcel separating as the ion parcel manipulation operation which includes separating the at least one ion parcel into two or more smaller ion parcels.

[0167] Clause 38. The method in accordance with any preceding clauses, further comprising controlling the plurality of DC electrodes to selectively apply the one or more potentials to perform a parcel jump operation as the ion parcel manipulation operation which includes moving the ion parcel from the RF track to another RF track between a pair of adjacent RF rails of the plurality of RF rails.

[0168] Clause 39. The method in accordance with any preceding clauses, further comprising controlling the plurality of DC electrodes to selectively apply the one or more potentials to perform a parcel jump operation as the ion parcel manipulation operation which includes moving the ion parcel aw ay from the RF null of the RF track and delivering the ion parcel to an RF null of an additional RF track between a pair of adjacent RF rails of the plurality of RF rails.

[0169] Clause 40. The method in accordance with any preceding clauses, further comprising configuring a number and a placement of at least a portion of the DC electrodes responsive to requirements relating to ion parcel transport between different positions along the RF track.

[0170] Clause 41. The method in accordance with any preceding clauses, further comprising configuring a number and a placement of at least some of the DC electrodes responsive to requirements relating to ion parcel merging and / or ion parcel separation between different positions along the RF track.

[0171] Clause 42. The method in accordance with any preceding clauses, further comprising configuring the plurality of DC electrodes to implement quantum gate functions.

[0172] Clause 43. The method in accordance with any preceding clauses, further comprising configuring the plurality of DC electrodes to implement load operations, and wherein one or more voids are created in the plurality of DC electrodes to allow ion parcel loading.

[0173] Clause 44. The method in accordance with any preceding clauses, further comprising applying one or more signals to the plurality of RF rails to adjust the respective RF track in between each pair of adjacent RF rails.

[0174] Aspects of this disclosure are described herein with reference to block diagrams and flowchart illustrations of methods, systems, apparatuses, and computer program products. It can be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by computer-accessible instructions. In certain implementations, the computer- accessible instructions may be loaded or otherwise incorporated into a general-purpose computer, a special-purpose computer, or another programmable information processing apparatus to produce a particular machine, such that the operations or functions specified in the flowchart block or blocks can be implemented in response to execution at the computer or processing apparatus.

[0175] Unless otherwise expressly stated, it is in no way intended that any protocol, procedure, process, or method set forth herein be construed as requiring that its acts or steps be performed in a specific order. Accordingly, where a process or method claim does not actually recite an order to be follow ed by its acts or steps, or it is not otherwise specifically recited in the claims or descriptions of the subject disclosure that the steps are to be limited to a specific order, it is in no way intended that an order be inferred, in any respect. This holds for any possible non-express basis for interpretation, including: matters of logic with respect to the arrangement of steps or operational flow7; plain meaning derived from grammatical organization or punctuation; the number or ty pe of aspects described in the specification or annexed drawings; or the like.

[0176] As used in this disclosure, including the annexed drawings, the terms “component.” “module.” “system,” and the like are intended to refer to a computer-related entity or an entity related to an apparatus with one or more specific functionalities. The entity can be either hardware, a combination of hardware and software, software, or software in execution. One or more of such entities are also referred to as “functional elements.” As an example, a component can be a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. For example, both an application running on a server or network controller, and the server or network controller can be a component. One or more components can reside within a process and / or thread of execution and a component can be localized on one computer and / or distributed between two or more computers. Also, these components can execute from various computer readable media having various data structures stored thereon. The components can communicate via local and / or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and / or across a network such as the Internet with other systems via the signal). As another example, a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, which parts can be controlled or otherwise operated by program code executed by a processor. As yet another example, a component can be an apparatus that provides specific functionality through electronic components without mechanical parts, the electronic components can include a processor to execute program code that provides, at least partially, the functionality of the electronic components. As still another example, interface(s) can include I / O components or Application Programming Interface (API) components. While the foregoing examples are directed to aspects of a component, the exemplified aspects or features also apply to a system, module, and similar.

[0177] In addition, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless specified otherwise, or clear from context, “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then “X employs A or B” is satisfied under any of the foregoing instances. Moreover, articles “a” and “an” as used in this specification and annexed drawings should be construed to mean “one or more” unless specified otherwise or clear from context to be directed to a singular form.

[0178] In addition, the terms “example” and “such as” are utilized herein to mean serving as an instance or illustration. Any aspect or design described herein as an “example” or referredto in connection with a “such as'’ clause is not necessarily to be construed as preferred or advantageous over other aspects or designs described herein. Rather, use of the terms “example” or “such as” is intended to present concepts in a concrete fashion. The terms “first,” “second,” “third,” and so forth, as used in the claims and description, unless otherwise clear by context, is for clarity7only and does not necessarily indicate or imply any order in time or space.

[0179] The term “processor,” as utilized in this disclosure, can refer to any computing processing unit or device comprising processing circuitry that can operate on data and / or signaling. A computing processing unit or device can include, for example, single-core processors; single-processors with software multithread execution capability7; multi-core processors; multi-core processors with software multithread execution capability; multi-core processors with hardware multithread technology7; parallel platforms; and parallel platforms with distributed shared memory. Additionally, a processor can include an integrated circuit, an application specific integrated circuit (ASIC), a digital signal processor (DSP), a field programmable gate array (FPGA), a programmable logic controller (PLC), a complex programmable logic device (CPLD), a discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. In some cases, processors can exploit nano-scale architectures, such as molecular and quantumdot based transistors, switches and gates, in order to optimize space usage or enhance performance of user equipment. A processor may also be implemented as a combination of computing processing units.

[0180] In addition, terms such as “store,” “data store,” data storage,” “database,” and substantially any other information storage component relevant to operation and functionality of a component, refer to “memory components,” or entities embodied in a “memory ” or components comprising the memory. It will be appreciated that the memory components described herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. Moreover, a memory7component can be removable or affixed to a functional element (e.g., device, server).

[0181] Simply as an illustration, nonvolatile memory can include read only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable ROM (EEPROM), or flash memory. Volatile memory can include random access memory7(RAM), which acts as external cache memory. By way of illustration and not limitation, RAM is available in many forms such as synchronous RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM),enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and direct Rambus RAM (DRRAM). Additionally, the disclosed memory components of systems or methods herein are intended to comprise, without being limited to comprising, these and any other suitable types of memory.

[0182] Various aspects described herein can be implemented as a method, apparatus, or article of manufacture using standard programming and / or engineering techniques. In addition, various of the aspects disclosed herein also can be implemented by means of program modules or other types of computer program instructions stored in a memory device and executed by a processor, or other combination of hardware and software, or hardware and firmware. Such program modules or computer program instructions can be loaded onto a general-purpose computer, a special-purpose computer, or another type of programmable data processing apparatus to produce a machine, such that the instructions which execute on the computer or other programmable data processing apparatus create a means for implementing the functionality of disclosed herein.

[0183] The term “article of manufacture’' as used herein is intended to encompass a computer program accessible from any computer-readable device, carrier, or media. For example, computer readable media can include but are not limited to magnetic storage devices (e.g., hard drive disk, floppy disk, magnetic strips, or similar), optical discs (e.g., compact disc (CD), digital versatile disc (DVD), blu-ray disc (BD), or similar), smart cards, and flash memory devices (e.g., card, stick, key drive, or similar).

[0184] The detailed description set forth herein in connection with the annexed figures is intended as a description of various configurations or implementations and is not intended to represent the only configurations or implementations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of various concepts. However, it will be apparent to those skilled in the art that these concepts may be practiced without these specific details or with variations of these specific details. In some instances, w ell-known components are shown in block diagram form, while some blocks may be representative of one or more well-known components.

[0185] The previous description of the disclosure is provided to enable a person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the common principles defined herein may be applied to other variations without departing from the scope of the disclosure. Furthermore, although elements of the described aspects may be described or claimed in the singular, the plural iscontemplated unless limitation to the singular is explicitly stated. Additionally, all or a portion of any aspect may be utilized with all or a portion of any other aspect, unless stated otherwise. Thus, the disclosure is not to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

CLAIMSWhat is claimed is:

1. A quantum computing system comprising: at least three radio frequency (RF) rails (401-403) driven by one or more RF sources, wherein the at least three RF rails are arranged in parallel and configured to generate a respective RF null, in between each pair of adjacent RF rails from among the at least three RF rails, wherein a path of the respective RF null is configured as an RF track that is configured to confine ion parcels; and a plurality of Direct Current (DC) electrodes 601 arranged in between each pair of adjacent RF rails and outside of peripheral RF rails from among the at least three RF rails, the plurality of DC electrodes being configured to generate one or more potentials that confine the ion parcels along respective RF tracks.

2. The quantum computing system in accordance with claim 1, further comprising a controller configured to control the plurality of DC electrodes by selectively applying the one or more potentials to selectively perform one or more operations on at least one of the ion parcels that includes at least one of ion parcel transportation, ion parcel merging, ion parcel separation, and ion parcel jumping.

3. The quantum computing system in accordance with claim 1 , wherein at least a portion of the one or more potentials are static.

4. The quantum computing system in accordance with claim 1. wherein at least a portion of the one or more potentials are time-varying.

5. The quantum computing system in accordance with claim 1, wherein the plurality of DC electrodes comprise consecutively arranged DC electrodes.

6. The quantum computing system in accordance with claim 1, wherein the plurality of DC electrodes comprise disjointly arranged DC electrodes.

7. The quantum computing system in accordance with claim 1, wherein the plurality of DC electrodes comprise: inside DC electrodes that are disposed between the adjacent RF rails; and outside DC electrodes that are disposed outside of the peripheral RF rails.

8. The quantum computing system in accordance with claim 7. wherein at least a portion of the inside DC electrodes have a different layout pattern than at least a portion of the outside DC electrodes.

9. The quantum computing system in accordance with claim 7, wherein the inside DC electrodes in between a respective pair of adjacent RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RF rails.

10. The quantum computing system in accordance with claim 7, wherein the outside DC electrodes outside the RF rails form two or more rows of DC electrodes that are disposed in parallel with the at least three RF rails.

11. The quantum computing system in accordance with claim 1, further comprising additional RF and DC structures appended to the three or more RF rails and configured to implement a racetrack loop that connects one end of the three or more RF rails to another end of the three or more rails.

12. The quantum computing system in accordance with claim 11, wherein the additional RF and DC structures are further appended to the three or more RF rails and configured to implement transitions to two rail straight or curved traps for loading ions.

13. The quantum computing system in accordance with claim 1 , wherein the three or more rails are curved to generate two or more curved RF tracks.

14. A quantum computing system comprising: a plurality of radio frequency (RF) rails driven by one or more RF sources, the plurality of RF rails arranged in parallel and configured to generate a respective RF null having a pathin between an adjacent pair of the plurality of RF rails that is configured as an RF track and that is configured to confine ion parcels; and a controller configured to control a plurality of Direct Current (DC) electrodes, which are arranged in between the adjacent pair of RF rails and outside of peripheral RF rails of the plurality of RF rails, to selectively apply one or more potentials to perform an ion parcel manipulation operation on at least one of the ion parcels confined in the RF track.

15. The quantum computing system in accordance with claim 14, wherein the ion parcel manipulation operation is at least one of an ion parcel transportation, an ion parcel merging, an ion parcel separation, and an ion parcel jumping.

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