Method of processing an optoelectronic device and optoelectronic device

Abstract

The invention concerns a method of processing an optoelectronic device, comprising the steps of providing a growth substrate and depositing a semiconductor layer stack. The stack includes a first layer of doped GaN, a first doped dislocation shaping layer, a second layer of doped GaN, a second dislocation shaping layer, a third layer of doped GaN, an active layer and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN. A material of the first and second dislocation shaping layer comprises AlxGa1-xN or InyAlxGa1-x-yN with x between 0.02 and 0.5. A first mesa etch is conducted to remove material of the exposed portions, whereby the second dislocation shaping layer is left unetched by said first mesa etch. An ALD process and a second mesa etch is conducted, removing material of the second dislocation shaping layer and the second layer of doped GaN. Finally, a second dielectric material is deposited on the exposed sidewalls.

Description

[0001] METHOD OF PROCESSING AN OPTOELECTRONIC DEVICE AND OPTOELECTRONIC

[0002] DEVICE

[0003] The present invention concerns a method for processing an optoelectronic device and an optoelectronic device .

[0004] BACKGROUND

[0005] Optoelectronic devices are used for a variety of applications and also come in different shapes , sizes and arrangements . Certain optoelectronic devices , referred to as LEDs or pLEDs are provided as separate elements . While LEDs are generally referred to any light emitting device based on a semiconductor material , pLEDs are characterized by their significantly reduced size . pLEDs are currently defined as optoelectronic devices with a top light emitting surface diameter of less than 50pm and in particular down to a range between 1 pm to appr . 20 pm. Those sizes pose completely new challenges in production and handling to either obtain good electrical and optical characteristics but also obtain good yield during processing of such devices .

[0006] Optoelectronic devices , irrespective of their respective sizes , are usually processed on wafer level , where a semiconductor layer stack is epitaxially grown having an active layer arranged in between . Then, the layer stack is structured to form individual and separable devices , a process generally known as mesa structuring .

[0007] During processing of such mesa structured devices , the portions of the layer stack forming the LEDs and pLEDs are sometimes etched in two consecutive steps known as shallow and deep mesa etching steps . Based on the semiconductor material system for the optoelectronic devices , various intermediate steps are usually conducted to address issues either occurring during the actual processing of the devices , but which may be also an inherent characteristic of the material system of the LED and pLED . In particular , processing of pLEDs with their small size is a challenging task as processing tolerances and material properties cause a larger impact on the efficiency of light generation and extraction . Some material characteristics in the GaN material system cause the generation of small particles on the wafer surface during some production steps . Particularly, certain types of defects in the GaN material system extending through the crystal structure of the stack lead to the formation of pinholes that later form seeds for the above- mentioned particles . The particles cause obstacles in subsequent steps and reduce the overall production yield . While wafer cleaning steps may reduce the number of particles on the wafer surface , the root cause is not addressed, and the cleaning steps are time-consuming , costly and imperfect .

[0008] It is therefore an obj ect of the present invention to reduce the impact of the above-mentioned defects in semiconductor devices , particularly pLEDs during processing of such devices .

[0009] SUMMARY OF THE INVENTION

[0010] This and other obj ects are addressed by the subj ect matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims .

[0011] During mesa structuring of semiconductors based on nitride material systems , including but not limited to optoelectronic devices and particularly pLEDs , a two-step etch process may be performed, which exposes sidewalls of a functional layer of the device and subsequently further portions of the layer stack . The initial first etching step, referred to a shallow mesa etch, is beneficial as the exposed sidewalls or facets of the functional layer can be treated and the defect density reduced resulting in an increase of the internal quantum efficiency .

[0012] The first etching process may comprise a dry etch, followed by a dielectric coating ( e . g . , SiOx, A10x, HfOx, NbOx) of the etched facets . Then the second consecutive etch, referred to as a deep mesa etch is conducted . By this sequence , a "spacer" can be formed on the side facets of the first etch . During growth of Gan material layers various effects and dislocations occur . Some of those are referred to as screw and threading dislocations , usually terminate only at a surface or when j oining another screw and / or threading dislocation . Growth parameters and layer compositions can change morphological aspects of the dislocation, for example its diameter and shape , but a dislocation itself will generally propagate through the epi layer stack until it hits a surface of the GaN crystal .

[0013] The sizes and other parameters of such dislocation may be large enough to open pinholes or GaN nanopipes that extend through the material . However , the density of actual dislocations in GaN material is still orders of magnitude larger than the density dislocation that are large enough to form pinholes . The size of such pinholes may vary and range from virtual no opening to a diameter of maybe 10 nm to 15 nm. Hence , not all of such pinholes are causing the above-mentioned issues .

[0014] It has been found that the density of GaN posts without any mitigation efforts is in the range of about 1E6 1 / cm2) , while the density of screw and edge-type dislocations is in the range of 1E8 to 1E 9 1 / cm2) . it seems that the probability to form pinholes is larger for screw dislocations than for edge-type dislocations , and the former may possess a hollow core ( nanopipes ) or develops an open core in interaction with the first , shallow mesa etch .

[0015] During a subsequent passivation step, dielectric material that is deposited on the exposed facets may fill a hollow core of some of those dislocations , e . g . particularly larger ones . For the purpose of this applications , the dislocations that actual result in the formation of hollow cores with sizes that are large enough to be filled at least partially with dielectric material are referred to as screw dislocations herein . As mentioned above , it has been found that an ALD process causes dielectric material to diffuse into the screw dislocations causing a mas king effect in the subsequent deep mesa etch, leading to the formation of high aspect ratio GaN needles ("GaN posts" ) . The posts may cause significant obstacles in the following process steps , e . g . , by breaking off and leading to high particle counts . The inventors now propose the introduction of aluminum in GaN layer i . e . , as AlGaN layer or InAlGaN layer with a defined Al content directly below a trench etch step . It has been found that an AlGaN layer leads to a temporary constriction or "plugging" of the above-mentioned GaN hollow cores and nanopipes caused by the screw dislocations . Consequently, a thin AlGaN layer can be used to avoid a filling of GaN micropipes by material of the dielectric layers e . g . , oxide-passivation layers deposited by Atomic Layer Deposition (ALD) . However , as mentioned above , the reduction of the hollow core screw dislocation diameter is only temporary, hence it may not be sufficient to simply deposit a single AlGaN layer and then continue with GaN layer growth .

[0016] Rather, it has been found that , the hollow core screw dislocation opens again some distance after the AlGaN layer ( in growth direction ) , which is why the deeper n-AlGaN layers in state-of-the-art structures are insufficient to reduce the number of "GaN posts" in shallow mesa etching processes . The inventors therefore propose the introduction of an additional n-AlGaN layer below, i . e . , in the range of a few tens of nm from the etching end point of the first shallow mesa etching step . The AlGaN layer causes the GaN pipes to become narrowed or "partially plugged" at this point of the structure . In the subsequent step , the material of the dielectric coating layer cannot penetrate deeply into the screw dislocations , which reduces or even eliminates the masking effect .

[0017] The proposed approach leads to a significant reduction in "GaN post" and particle density compared to the state-of-the-art structure . It has further been observed that the required Al content to achieve such shrinking of the screw dislocation' s size is not large and in the range of a few percent . Consequently, no significant changes in the design are necessary and possible adverse effects on the efficiency of the devices are compensated by the gains in yield and the electrical and mechanical improvements .

[0018] In some aspects , the inventors propose a method of processing a GaN- based electronic device . The proposed method is not limited to optoelectronic devices , although the specification hereinafter refers to pLEDs and optoelectronic devices . Although pLEDs and other optoelectronic devices with high yield requirements are processed advantageously with the proposed method, the method explained herein is not limited to such devices . Rather, the proposed method is suitable for implementation in processing other GaN-based electronic devices , including field effect transistors , diodes , and other devices . Hence , the expression "active layer" used in the following section should be interpreted as functional layer providing a desired function . Being an active layer in its traditional sense related to optoelectronic devices is j ust one out of many different functions . For example a field effect transistor having two p-doped separated areas in an n-doped well ( or vice versa ) with a gate in between is also considered to be a functional layer .

[0019] A growth substrate is provided in a first step . Then, a semiconductor layer stack is deposited . The layer stack comprises a second layer of doped GaN, a second dislocation shaping layer on the second layer and a third layer of doped GaN on the second dislocation shaping layer . In some instances , an optional first layer of doped GaN can be deposited particularly between the growth substrate and the second layer of doped GaN . In some instances , a first dislocation shaping layer can be deposited between the first doped GaN layer and the second doped GaN layer .

[0020] An active layer is deposited thereupon and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN may be arranged optionally in some instances ( i . e . in case of optoelectronic devices , otherwise it can be left out ) on top of the active layer . In some instances , an additional electron blocking layer for example of p-doped AlGaN material is arranged between the active layer and the third layer of doped Gan .

[0021] In accordance with the proposed principle , a material of the optional first dislocation shaping layer and the second doped dislocation shaping layer comprises one of AlxGaixN and InyAlxGai-x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 . Other ranges of x , also different Al content in the different dislocation shaping layer is possible , although the overall content is lower than 50% and particularly lower than 30% and more particularly lower than 20% , ( i . e . , x=0 . 2 ) .

[0022] All the layers mentioned above can be grown epitaxially with various dopant concentrations . In some aspects , the doped semiconductor layer is a p-doped layer and may contain one or more sublayers thereof . The doping concentration may vary and can also provide different functionalities . The other layers , including the various doped dislocation shaping layers are usually n-doped . The doping concentration may also vary in those layers . In some instances , the second dislocation shaping layer comprises a slightly larger dopant concentration then the two adj acent doped GaN layers .

[0023] The active layer may comprise one or more undoped cladding layers adj acent to the doped layer and configured to reduce the diffusion of dopants into the active layer material . The active layer material may include a simple pn- j unction, a quantum well or a multi quantum well structure . In other instances , the active layer may comprise a field effect transistor structure . The thickness of the active layer is in the range of 50 nm to about 350 nm in some instances .

[0024] The method further comprises the step of providing a structured mask layer on the doped semiconductor layer . By doing so , some portions of the doped semiconductor layers ' surface are exposed . The structured mas k layer comprises a material significantly less prone to the subsequent shallow mesa etching process , whereas the expression "prone" is referred to as having a significantly higher etching rate than the semiconductor material of the exposed portions .

[0025] A first etching process is conducted after applying the structured mask layer to remove material of the exposed portions , thereby exposing facets of the active layer and at least portions of the third layer of doped GaN . However , the etching process is stopped in time , thus leaving the second dislocation shaping layer unetched . In some aspects , the first etching process may either be stopped directly on the material of the second dislocation shaping layer or shortly before said second dislocation shaping layer . In an alternative embodiment , an etchant can be used that is highly selective on the material and does not etch ( or not significantly) the material of the second dislocation shaping layer .

[0026] Then, a first dielectric material is deposited onto the exposed facets of the active layer and the third layer of doped GaN . The deposition process may utilize an atomic layer deposition or any other isotropic deposition process . This step may also include various surface treating steps prior to the actual deposition of the first dielectric material to reduce a defect density on the facets of the active layer .

[0027] A second etching process is conducted removing material of the second dislocation shaping layer and the second layer of doped GaN, thereby exposing facets thereof . Then, a second dielectric material is deposited on the exposed facets .

[0028] The second dislocation shaping layer that is unetched after the shallow mesa etching process ensures that no dielectric material during the deposition process covering the exposed facets will fill the screw dislocation preventing the generation of GaN post as stated above . Consequently, the density of particles is reduced as those posts cannot break and contaminate the surface of the wafer and the layer stack .

[0029] In some aspects , the second etching process is taking place at a location of the first mesa etching process . The second mesa etching process may etch through the second doped GaN layer and optionally through the first GaN layer down to or close before the growth substrate . The second mesa etching process can be used to either separate the respective semiconductor layer stacks on wafer level or at least prepare the stack for separation in subsequent processes , i . e . after rebonding .

[0030] In some further aspects , the step of depositing a layer stack comprises depositing one or more GaN layers ( either doped or undoped) on the growth substrate , depositing a third doped dislocation shaping layer ( either doped or undoped) on the one or more GaN layers . The first layer of doped GaN is then epitaxially grown on the third doped dislocation shaping layer . A material of the third dislocation shaping layer comprises one of AlxGaixN and InyAlxGai-x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 or one of the concentrations mentioned above . The third dislocation shaping layer is suitable for the deep mesa etching process , as such etching process may terminate on or short before the third dislocation shaping layer . Depending on the design of the devices , the third dislocation shaping layer may provide other benefits during epitaxial growth . If needed however , possible screw dislocations are also reduced by such layer .

[0031] In some further aspects , step of conducting a second etching process comprises the step of removing material of the first doped dislocation shaping layer and at least portions of the first layer of doped GaN, thereby exposing facets thereof , wherein the third doped dislocation shaping layer is left unetched by said second etching process .

[0032] In some instances , the process parameters may vary during the deposition of doped layers and the various dislocation shaping layers . Further , the doping concentrations may vary as well . In some aspects , a thickness of at least one of the first , second and third doped dislocation shaping layer is in the range between 10 nm and 250 nm and more particularly between 20 nm and 40nm and in particular between 15 nm and 45 nm and in particular between 30 nm and 60 nm and in particular larger than 25 nm. Other ranges like 40 nm, 45 nm, 50 nm, 60nm, 70 nm, 80 nm and 100 nm are possible with variation of 2 nm in between . Annealing steps can be performed during or in between various steps of epitaxial growth . The doping concentration in the second shaping dislocation layer may be larger than in the adj acent doped layers , this is due to a different lattice constant of the shaping dislocation layer . By using a higher dopant concentration, e . g . in the range of about 120% to 200% of the dopant concentration of the adj acent layers , one can ensure a low resistance in the shaping dislocation layer . The doping concentration in the first and / or third shaping dislocation layer may be in the same range as in the adj acent doped or undoped layers . Some aspects concern the first dielectric material . In some aspects , the first dielectric material is deposited using an atomic layer deposition process covering the facets of the facets exposed previously . Suitable dielectric materials contain one of A1OX, HfOx, NbOxand SiOx or a combination thereof .

[0033] It has been found that that reduction of the screw dislocations ' size caused by the respective dislocation shaping layer extends into a subsequently grown layer to some extent , i . e . , the screw dislocation does not immediately increase in its diameter, once a GaN material is epitaxially grown on top of doped dislocation shaping layer . Rather, the size of the screw dislocation remains small over a certain thickness of the subsequently grown GaN layer , most likely in the range of 10 nm to 100 nm and then increases again . Hence , it is proposed in some aspects , to conduct the steps of the first etching process and / or the second etching process not till the actual dislocation shaping layer is reached but to end a short distance before the respective doped dislocation shaping layer . This distance can be in the range of appr 2 nm to 250 nm and more particular between 10 nm and 150 nm and more particular between 0 nm and 100 nm and more particular between 5 nm and 50 nm and more particular between 10 nm and 40 nm.

[0034] In this regard, the screw dislocations shrink in diameter during the step of depositing a dislocation shaping layer comprising AlGaN . More particularly, screw dislocations extend through the second layer and through the second dislocation shaping layer, but a lateral size of the screw dislocations in the second dislocation shaping layer is reduced with increasing distance to the layer beneath the second dislocation shaping layer .

[0035] In some cases , a size of the screw dislocation is significantly reduced, but the dislocation may not close completely during the step of depositing one of the first , second and third screw dislocation layer . Hence , one should etch close to the respective dislocation layer, but not into or even through the respective dislocation layer to avoid open the screw dislocation right beneath the dislocation shaping layer . Another aspect concerns the doping concentration and particular the doping concentration in the respective shaping layers . As some shaping layers are grown within the doped GaN layers , it is suitable to ensure a certain doping concentration to reduce its resistance and ensure charge carrier transport in those layers . In some aspects , a doping concentration in at least one of the first , second and third doped dislocation shaping layer is in the range between 4el 8 1 / cm3and 5el 9 1 / cm3. Similar to other layers , the doping concentration may vary between different shaping layers or even within a shaping layer . In some aspects , the doping concentration in a shaping layer at an interface to a GaN layer is the same as the doping concentration in the adj acent GaN layer close to the respective interface . In other words , there is no "j ump" between doing concentration between the shaping layer and the adj acent doped GaN layers , but rather a smooth transition .

[0036] The dopant is usually the same as in the adj acent GaN layer and may for example be Si in at least one of the first , second and third doped dislocation shaping layer .

[0037] The proposed method provides a way to reduce particle density and other defects in the processed devices . Some aspects therefore concern a semiconductor device based on GaN and particularly an optoelectronic device . The optoelectronic device comprises a structured semiconductor stack based on a nitride material system, comprising an optional first layer of doped GaN, an optional first doped dislocation shaping layer, a second layer of doped GaN, a second dislocation shaping layer , a third layer of doped GaN, an active layer and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN . However, this above-mentioned enumeration of layers is not limited . Further layers with varying dopant concentration and even materials can be provided, serving different functionalities . In addition, the shaping layer may be combined with other functionalities .

[0038] In accordance with the proposed principle , a material of the first and second dislocation shaping layer comprises one of AlxGaixN and InyAlxGaix-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 and particularly between 0 . 03 and 0 . 12 . The optoelectronic device also comprises a mesa etched facet having an upper portion adj acent to the active layer and an inclined lower portion . The mesa etched facets can be vertical or inclined . The upper portion is covered by a first dielectric material layer , and may be substantially vertical , that is perpendicular to a top or bottom surface of the structured semiconductor stack .

[0039] The inclined lower portion comprises a second dielectric material arranged upon, said second dielectric material being different from the first dielectric material in some instances . In other instances , the first and second dielectric material is the same . The lower portion may for example comprise at its bottom or next to the side facet at least one screw dislocation extending from the bottom in a direction facing away from the active layer . The at least one screw dislocation may extend into the remaining material of the layer stack towards the bottom.

[0040] In accordance with the proposed principle , the screw dislocation is substantially free of the first dielectric material , this will avoid the formation of needles or GaN posts as in conventional solutions .

[0041] In an alternative , a device comprises a structured semiconductor stack based on a nitride material system, with a second layer of doped GaN, a second dislocation shaping layer , a third layer of doped GaN, an active layer and a doped semiconductor structure having a different conductivity type than the third layer of doped GaN . The device can be an optoelectronic device , but also form another circuitry based on GaN material , like for example a field effect transistor, a diode , a Triac and the like . The device may also comprise an integrated circuit comprising a plurality of individual components embedded therein .

[0042] In some aspects , the optoelectronic device may further comprise a first doped GAN layer and a first dislocation shaping layer arranged between the first doped GaN layer and the second doped GaN layer . A material of the optional first and the second dislocation shaping layer comprises one of AlxGai-xN and InyAlxGai-x-y] N with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 .

[0043] The optoelectronic device further comprises inclined mesa etched facets having an upper portion adj acent to the active layer and comprising a first dielectric material arranged on the upper portion, and an inclined lower portion comprising a second dielectric material arranged upon, said second dielectric material in some instances being different from the first dielectric material . In some other instances , the second and the first dielectric material is the same .

[0044] In accordance with the proposed principle , a lower end of the first dielectric material extends from the top of the layer stack ( that is the third doped GaN layer along the facets down to a level , that is vertically distanced to a level of the second dislocation shaping layer . In other words , the first dielectric material ends at a level that is above the level of the second dislocation shaping layer , when viewed from the top by about 5 nm to 100 nm and in particular by about 10 nm to 50 nm. Simply speaking , the first dielectric material ends on the side facets above the level of the second dislocation shaping layer . Consequently, any screw dislocation extending though the second dislocation shaping layer , but laterally displaced to the side facets and the first dielectric material would still comprise a small size . This structure and the geometrical and spatial relationship between the second dislocation shaping layer and the first dielectric layer is a consequence when realizing the proposed principle and conducting a shallow mesa etching process close to but not reaching the second dislocation shaping layer .

[0045] In some aspects of the optoelectronic device , the screw dislocation extends through the first and / or second layer of doped GaN and the second doped dislocation shaping layer . A portion of the screw dislocation within the second doped dislocation shaping layer comprises a smaller diameter . This smaller diameter may also extend into the adj acent first or second doped GaN layer and optionally within 10 nm and particularly within 50 nm of the second layer of doped GaN adj acent to the second doped dislocation shaping layer . In some aspects , the optoelectronic device comprises one or more GaN layers and a third doped dislocation shaping layer on the one or more GaN layers . The first layer of doped GaN is arranged on the third doped dislocation shaping layer . Similar to the other shaping layers , the third dislocation shaping layer may comprise a material including one of AlxGaixN and InyAlxGai-x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 and particularly between 0 . 03 and 0 . 14 . In this regard, the Al content of the first , second and third dislocation shaping layer may vary between the various dislocation shaping layers . The variation is a design choice and may be relevant if further functionalities are implemented in the dislocation shaping layers .

[0046] In some aspects , the facets of the inclined lower portion of the mesa etched semiconductor layer stack may comprise material of the first doped dislocation shaping layer and the second doped dislocation shaping layer . In other words , the mesa facets reach from the top surface all the way through the two dislocation shaping layers . In some aspects , the material of the third dislocation shaping layer remains covered by adj acent portions of doped material , in particular GaN .

[0047] In some aspects , the first dielectric material comprises one of A10x, HfOxand NbOx, whereas the second dielectric material may comprise SiOxor SiN, in case the first and second materials are different from each other .

[0048] Some aspects concern a distance of the third dislocation shaping layer to an exposed surface , in particular to a facet . Said distance can be in the range between 5 nm and 100 nm and more particular between 10 nm and 150 nm and more particular between 10 nm and 250 nm and more particular between 30 nm and 500 nm and more particular between 10 nm and 400 nm.

[0049] In some aspects , the mesa separating the optoelectronic devices and generating the exposed facets also expose material of the first doped dislocation shaping layer and the second doped dislocation shaping layer . The material is then covered by a dielectric material , in this regard, the second dielectric material use to cover the lower portion of the inclined facets may comprise SiO2 or SiN . In some other aspects , the first dielectric material comprises one of AI2O3, HfOxand Nb2Os, whereas the second dielectric material may optionally comprise SiO2 or SiN .

[0050] Some further aspects concern a doping concentration of the first , second and the third dislocation shaping layers . The second dislocation shaping layer may comprise a dopant concentration that is up to 6 times , and in particular up to 5 times higher than the surrounding doped GaN layers . Other dislocation shaping layers may comprise a doping concentration that is within 20 % and particularly within 10% and particularly within 5% of a doping concentration of the adj acent doped GaN layer at the interfaces between the respective one of the first , third dislocation shaping layers and the adj acent doped GaN layer .

[0051] A thickness of at least one of the first , second and the third dislocation shaping layers can be in the range between 10 nm and 250 nm and more particularly between 20 nm and 40nm and in particular between 15 nm and 45 nm and in particular between 10 nm and 50 nm and in particular larger than 5 nm . Other possible thicknesses are mentioned herein as well .

[0052] SHORT DESCRIPTION OF THE DRAWINGS Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings in which

[0053] Figure 1 shows a first embodiment of a part of a semiconductor layer stack partially processed with a method in accordance with some aspects of the proposed principle ;

[0054] Figures 2A to 2G illustrate some method steps of processing an optoelectronic device in accordance with some aspects of the proposed principle ; Figures 3A to 3D show some further method steps of processing an optoelectronic device in accordance with some aspects of the proposed principle ;

[0055] Figures 4A and 4B show some further method steps of processing an optoelectronic device in accordance with some aspects of the proposed principle ;

[0056] Figure 5 illustrates some steps of processing a device by a conventional method .

[0057] DETAILED DESCRIPTION

[0058] The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form. It should be noted that in practice slight differences and deviations from the ideal form may occur without , however, contradicting the inventive idea .

[0059] In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged .

[0060] Figure 5 illustrates in its partial drawings A to D several method steps in accordance with a conventional process for manufacturing an optoelectronic device on a wafer level substrate .

[0061] Figure 5A illustrates the result of the first few steps in a more detailed form, in which a semiconductor layer stack having a plurality of layers 11 , 12 , 13 , 14 , and 17 are epitaxially grown on a sapphire substrate 10 . A plurality of screw dislocations 20 are generated already in the first buffer layer 11 of the gallium nitride material , GaN due to crystal mismatch and other defects in the sapphire substrate 10 . The GaN material of layer 11 can be doped ( i . e . n-doped in the present embodiment ) or undoped . The screw dislocations generated in layer 11 comprise a diameter in the range of a few nanometers up to a few of tens of nanometers and extend from the sapphire substrate 10 substantially through the first layer 11 and potentially further layer epitaxially grown thereupon . An aluminum gallium nitride layer , AlGaN, 12 with an aluminum content in the range of a few percent ( i . e . less than 50 % and particularly less than 20% ) is epitaxially grown as a dislocation shaping layer on the first buffer GaN layer 11 . The layer 12 may also be doped with a concentration similar to layer 11 or 13 .

[0062] The aluminum gallium nitride layer 12 as a dislocation shaping layer is relatively thin in comparison to buffer layer 11 and the subsequent gallium nitride layer, GaN 13 . However , AlGaN generally reduces the diameter of the screw dislocation directly at the interface between layer 11 and layer 12 , thereby causing a significant reduction of the diameter and size of the screw dislocation 20 . However , growth characteristics prevent the dislocation from either completely closing or at least being strain free . As a result , the screw dislocation is significantly diminished in size , but will eventually widen when new layers of GaN are formed . Hence , a smaller screw dislocation may subsequently extend through the thin gallium nitride layer 13 as screw dislocation 21 . Another aluminum gallium nitride layer 14 as a further dislocation shaping layer is deposited on the doped GaN layer 13 , again reducing the overall size of the screw dislocations .

[0063] However , on top of aluminum gallium nitride layer 14 another doped GaN layer 15 is epitaxially deposited . Its thickness is several hundred nanometers and thus significantly larger than the thin aluminum gallium nitride layers 12 and 14 acting as dislocation shaping layers . As illustrated, the screw dislocations in the shaping layers are relatively small in size and also stay small after the GaN layer is deposited . For example , GaN layer 13 is relatively thin and thus the size of screw dislocation 21 will remain substantially small as well and comparable to the screw dislocation in AlGaN layer 12 . However, if the thickness of the GaN layer increases as shown in GaN layer 15 , the small screw dislocation section referred to as 20 ' in Figure 5A will eventually grow again in size . More particularly, portion 20 ' with a small size comparable to the screw dislocation 20 will remain substantially small but increases again with an increasing thickness of GaN layer 15 ( i . e . starting at appr 100 nm) , resulting in a threatening screw dislocation 20 with a size of approximately a few tens of nanometers . Overall , the screw dislocations extend through layer 17 substantially up to the surface .

[0064] Subsequent steps are then conducted generating the active layer 18 , as well as a p-doped layer 19 on top of active layer 18 . A hard mas k ( not shown ) is deposited on the top surface , structured, and a first shallow mesa etching process is conducted resulting in a shallow mesa recess 30 . Due to its position, screw dislocation 20 now reaches up to the bottom of the trench or recess 30 . The resulting structure is depicted in Figure 5B .

[0065] An atomic layer deposition process is performed in a subsequent step , for covering the exposed facets of the two opposing optoelectronic devices depicted on the left and right side of Figure 5C . The atomic layer deposition process or ALD is a highly unselective , uniform and isotropic process , resulting in a deposition of the dielectric material on the side facets and bottom of trench 30 . The size of the screw dislocation causes dielectric material to diffuse into screw dislocation 20 . Further, capillary or other effects cause the dielectric material to grow within the screw dislocation and reach a substantial depth deep into the GaN layer 15 . In the present example , the diffusion of the ALD material is stopped only by the shrinking size of the screw dislocation in section 20 ' . As a result , a needle or micro pipe 25 of dielectric material is formed within the screw dislocation 20 in layer 15 .

[0066] In a subsequent second mesa etching process depicted in Figure 5D, micro pipe 25 generates a protruding needle post 41 ' comprising a dielectric material within . The needle post 41 ' , illustrated by the dashed line around it , may break during subsequent process steps with a remaining roughened inclined sidewalls in the deep mesa trench . This roughened area is more difficult to process and can among other issues impact the robustness of the final device . Furthermore , the remnants of the broken needle post may either remain in the trench or be flushed onto the top surface of the respective optoelectronic devices on the left and right side of Figure 5D, thereby either causing damaged or broken optoelectronic devices or complicate further processing .

[0067] The present invention now aims to avoid the generation of needle posts by slightly changing the epitaxial growth process of the semiconductor layer stack and the first shallow mesa etching step . As a result , optoelectronic devices are processed, in which the existing screw dislocations 20 are still present but substantially unfilled or at least free of dielectric material used for covering the exposed facets after the first mesa etching process is conducted .

[0068] Figure 1 illustrates a respective embodiment of such an optoelectronic device 1 . The optoelectronic device 1 comprises an undoped gallium nitride layer 13 , an n-doped aluminum gallium nitride layer 14 on which a further n-doped gallium nitride layer 15 is deposited upon . As shown in Figure 1 , several screw dislocations 20 are present in the gallium nitride layers 13 and 15 , respectively . However , the dislocation shaping layer 14 made of aluminum gallium nitride reduces the size and dimension of the screw dislocation 20 . While the aluminum gallium nitride layer 14 reduce the screw dislocation diameter , and temporarily constrict a possible hollow core . However, the crystal growth parameters make it virtually impossible to avoid the dislocation to "reopen" when GaN is deposited again on the dislocation shaping layers .

[0069] The optoelectronic device comprises mesa etched facets with inclined sidewall portions 60 and substantially vertical portions 61 . The vertical facet portions 61 expose the active layer 18 , a small portion of n-doped gallium nitride layer 17 as well as the p-doped layer 19 on top of active layer 18 . Active layer 18 may comprise a pn-j unction, a quantum well structure or a multi-quantum well structure as possible design choices . A current distribution layer 190 is deposited on top of the p-doped layer 19 . The vertical facets of the upper portion 61 of the mesa structure are covered by a thin dielectric layer 40 of e . g . A1OXdeposited by an ALD process . The surface of the thin dielectric layer 40 as well as the surface of the lower portion 60 and the inclined facets thereupon are completely covered by a second dielectric material 50 , for example , comprising of SiOx, or SiNx for example . The second dielectric material 50 also extends partially on top of the current inj ection layer 190 leaving a central recess , which is filled by a metal contact 51 .

[0070] As illustrated in Figure 1 , certain screw dislocations 20 extend through the n-doped gallium nitride layers 13 , 15 and 17 , respectively . However , the thin dislocation shaping layers 16 and 14 of aluminum gallium nitride temporarily reduce the screw dislocation diameter . In accordance with the proposed principle , some screw dislocations may surface at the inclined facets of the lower portion 60 of the mesa structured device . However, due to the inventive process illustrated herein, these screw dislocations are substantially free of any a dielectric material and particularly free of the dielectric material used for ALD layer 40 . As a result , the inclined sidewalls are substantially free of any protruding needle posts or protrusions , thereby avoiding the risk of particles on the top surface of the optoelectronic device . The screw dislocations 20 on the surface of the inclined sidewall portions may be either substantially free of a dielectric material or partially filled with dielectric material of layer 50 . However, such material in the screw dislocations 20 is not hampering the efficiency or functionality of the device and does not cause significant issues in the further processing steps .

[0071] Figures 2A to 2G illustrate several method steps for processing optoelectronic devices in accordance with the proposed principle . A growth substrate 10 , for example a sapphire or any other suitable material , is provided in Figure 2A. The growth substrate is suited for the deposition of a nitride base material system, for example GaN . In a first step, a gallium nitride buffer layer 11 is epitaxially grown on the top surface of growth substrate 10 . A plurality of screw dislocations is generated during the epitaxial growth of the buffer layer 11 due to crystal mismatches , defects , residuals and other irregularities on the growth substrate . These screw dislocations do unfortunately not completely vanish with increasing thickness of the buffer layer and further deposition of atomic layers but extend through the buffer layer 11 to the top surface of the epi layer stack . Their sizes , forms and shapes can vary . However, an average size and diameter of these screw dislocations lies in the range between 10 nm and 30 nm . An aluminum gallium nitride layer 12 is deposited upon the gallium nitride layer 11 to reduce the screw dislocations ' size . This is illustrated in Figure 2B .

[0072] The aluminum content of the aluminum gallium nitride layer is in the range of a few percent , for example between 10 % and 20 % . In addition, the aluminum gallium nitride layer 12 can be doped with silicon, a dopant also used for n-doping of the GaN layers . As a result of the deposition and epitaxial growth of the dislocation shaping layer 12 , the screw dislocations are reduced in size down to a few nanometers or even less .

[0073] Figure 2C illustrates the next step, in which an n-doped gallium nitride layer 13 is epitaxially grown on the dislocation shaping layer 12 . Due to the screw dislocation reducing behavior of layer 12 , the screw dislocations are not completely closed ( contrary to the depiction in the Figure ) and may extend into layer 13 starting to grow in size again within layer 13 . The continuation and growth of the screw dislocations through the various shaping layers may depend on the thickness of the respective shaping layers . In the given example , the screw dislocations will start growing in size and again reach through the whole deposited material of layer 13 .

[0074] Another dislocation shaping layer 14 made of aluminum gallium nitride is deposited on the layer 13 . This reduces the diameter of screw dislocations again . Apart from the size reduction of the screw dislocations i . e . , the doping , thickness and Al concentration of dislocations shaping layers 12 and 14 can provide further functionalities , i . e . charge carrier inj ection or transport . Figure 2E shows the next step , in which a large ( appr 1000 nm) n-doped gallium nitride layer 15 is deposited . The dopant concentration of layer 15 may vary and adapted to serve different functionalities . Similar to the previous doped dislocation shaping layer 12 , the screw dislocations in the dislocation shaping layer 14 are reduced in size , but extend again with increasing distance to layer 14 during the deposition process of the doped volume nitride layer 15 .

[0075] Following with the next process step illustrated in Figure 2 F, another dislocation shaping layer 16 made of aluminum gallium nitride is deposited . Similar to the previous layers , the screw dislocations shrunk in their respective size , as illustrated by the left screw dislocation 21 . The thickness of the dislocation shaping layers 16 , 14 and 12 are in the range of approximately 10 to hundred nanometers depending on the design choice . Generally, thicker shaping layers tend to reduce the screw dislocation diameter more reliably, while potentially generating electrical challenges during charge carrier transport or cause other disadvantages . Consequently, a trade-off is made between the thickness of the dislocation shaping layers 12 , 14 and 16 , and the electrical and charge carrier transportation properties .

[0076] Figure 2G illustrates the next step, in which an n-doped gallium nitride layer 17 is epitaxially deposited, followed by an active layer 18 and p-doped gallium nitride layer 19 . The active layer 18 may comprise a pn-j unction, a quantum well structure or a multi-quantum well structure . In this regard, active layer 18 may also comprise two cladding layers adj acent to n-doped layer 17 and p-doped layer 19 . The cladding layers are undoped and configured to prevent and undesired dopant diffusion from the doped layers 17 and 19 into the active layer 18 . In some instances , a small p-doped AlGaN layer acting as electron blocking layer may be deposited between the active layer 18 and the p- doped layer 19 .

[0077] Layers 17 and 19 can have different dopant concentrations depending on the design choice . Alternatively or in addition, they may comprise a dopant gradient or several substructures and sub-layers having those different doping concentrations or gradients . The dislocation shaping layers 12 is undoped the layer 14 is also n-doped with a concentration similar to layer 13 . The dopant concentration of layer 16 is the largest and exceeds the dopant concentration of its two surrounding layers 17 and 15 , respectively . For example , the doping concentration of layer 16 at the interfaces to layers 15 and 17 may correspond to appr 5 times doping concentrations of such layers .

[0078] Figures 3A to 3D illustrate the next step of the manufacturing process . A hard mas k layer material 80 is deposited on top of the p-doped layer 19 and subsequently structured to expose certain top surface portions of layer 19 for the subsequent shallow mesa etching process .

[0079] The hard mas k layer comprises a material , which is resistant to the subsequent etching process . The etching process can be a dry and / or a wet etching process and is conducted to remove the material of the exposed portions that is the material of the doped layer 19 , the active layer 18 and portions of layer 17 . The etching process is terminated within the n-doped layer 17 and particularly short before ( i . e . 10 nm to appr 600 nm and particularly less than 300 nm and particularly less than 100 nm) the n-doped dislocation shaping layer 16 . The resulting structure of the etching process is shown in Figure 3B .

[0080] As illustrated in Figure 3B , the distance between the dislocation shaping layer 16 to the surface of the mesa etched layer 17 lies in the range of a few of 10 nm. Particularly, the distance is small enough that the screw dislocation extending through the remaining portions of layer 17 still comprises a relatively small size due to the previously reduced size by the dislocation shaping layer 16 . Hence , screw dislocation 210 as illustrated in Figure 3B comprises various small diameters , sufficiently small that the first dielectric material deposited by an ALD process cannot diffuse far into the screw dislocation . Thereby, any protrusion or needle post by the subsequent processing is avoided .

[0081] In some alternative embodiment , the etching process is terminated right above the dislocation shaping layer 16 and can in some further instances also slightly end within the dislocation shaping layer 16 . However , it is ensured that the mesa etching process terminates prior to reaching layer 15 to avoid the generation of the micropipes being filled with the first dielectric material .

[0082] After cleaning and annealing to reduce the defects on the site facets , an ALD process 40 is performed covering the exposed top portions 17 , the site facets of active layer 18 , layer 19 and also extends above the top surface of hard mas k layer 80 .

[0083] In this regard, and in an alternative embodiment , the hard mask layer 80 can also be removed after the first mesa etching process to expose the doped layer 19 . The ALD process would then deposit material on top of layer 19 instead of hard mas k layer 80 . ALD material may comprise A12O3 , HfOx , Nb2O5 or other suitable materials for GAN based devices .

[0084] In a subsequent step, a second mesa etching process also referred to as deep mesa etch is conducted . However , the exposed site facets are now inclined due to the etching process and the crystal structure of layers 17 , 16 and 16 . The resulting mesa etched facets correspond to the lower portion 60 , while the vertical facets and sidewalls covered by material 40 correspond to the upper portion 61 . During the mesa etching process , the screw dislocations 20 in layer 15 are exposed . However , as in the previous shallow mesa etching process forming the upper portion 61 , the screw dislocations were reduced in size by the dislocation shaping layer 16 , the screw dislocations 20 are now substantially free of any dielectric material previously deposited during the ALD process .

[0085] Consequently, no protruding area , needle post or other particle is generated during the deep mesa etching process . The lower portion 60 now comprises facets of the lower part of n-doped layer 17 , as well as layer 15 . Side facets of the dislocation shaping layers 16 and 14 are also exposed . The deep mesa etching process can be terminated shortly before the dislocation shaping layer 12 similar as in the previous shallow mesa etching process . The distance between the surface of the deep mesa etching step in layer 13 and the interface of layer 12 lies in the range of a few of tens of nanometers , wherein the size of the screw dislocation is still small and comparable to the size of the screw dislocation in the dislocation shaping layer 12 .

[0086] In a subsequent step presented in Figure 4A, the ALD material 40 as well as the hard mask layer 80 on the top surface are removed by a selective etching process . As stated previously, this removal can be conducted in the previous step . The remaining exposed facets of the inclined sidewall portion 60 as well as the material 40 on the exposed facets of portion 61 are then covered by a second dielectric material 50 as shown in Figure 4B . The second dielectric material 50 also extends over the top surface of the doped layer 19 to be opened up to form a recess for contacting top surface layer 19 later on . The second dielectric material also covers the small size screw dislocation portion in GaN layer 13 . However, due to the small size , the dielectric material does not significantly diffuse into the screw dislocation and particularly does not reach through the dislocation shaping layer 12 .

[0087] The device can then be further processed in accordance with conventional techniques .

[0088] LIST OF REFERENCES optoelectronic device growth substrate buffer layer dislocation shaping layer ( first ) n-doped GaN layer dislocation shaping layer ( second ) n-doped GaN layer dislocation shaping layer ( third) n-doped ( In) GaN layer active layer p-doped GaN layer screw dislocations , 21 ' screw dislocations 0 screw dislocations dielectric material dielectric material contact lower portion upper portion hard mas k

Claims

CLAIMS1 . Method of processing an optoelectronic device , comprising the steps ofProviding a growth substrate ;Depositing a semiconductor layer stack comprising an optional first layer of doped GaN, an optional first doped dislocation shaping layer , a second layer of doped GaN, a second dislocation shaping layer, a third layer of doped GaN, an active layer and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN, wherein a material of the optional first and the second dislocation shaping layer comprises one of AlxGaixN and InyAlxGai x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 ;Providing a structured mas k layer on the doped semiconductor layer having a different conductivity type , with portions of its surface being exposed;Conducting a first etching process to remove material of the exposed semiconductor portions , thereby exposing sidewalls of the active layer and optionally portions of the third layer of doped GaN, whereby the second dislocation shaping layer is left unetched by said first etching process ;Depositing, in particular using atomic layer deposition, a first dielectric material onto the exposed sidewalls of the active layer and the third layer of doped GaN;Conducting a second etching process removing material of the second dislocation shaping layer and the second layer of doped GaN, thereby exposing sidewalls thereof ;Depositing a second dielectric material on the exposed sidewalls .2 . Method according to claim 1 , wherein the step of depositing a layer stack comprises :Depositing one or more GaN layers on the growth substrate , depositing a third doped dislocation shaping layer on the one or more GaN layers , and Depositing the optional first layer of doped GaN on the third doped dislocation shaping layer ;wherein a material of the third dislocation shaping layer comprises one of AlxGaixN and InyAlxGai-x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 ;3 . Method according to claim 2 , wherein the step of conducting a second etching process comprises the step ofRemoving material of the optional first doped dislocation shaping layer and at least portions of the optional first layer of doped GaN, thereby exposing sidewalls thereof , wherein the third doped dislocation shaping layer is left unetched by said second etching process .4 . Method according to any of the preceding claims , wherein second etching process is conducted at a location of the semiconductor layer stack at which a first etching process has been conducted .5 . Method according to any of the preceding claims , wherein the first dielectric material comprises one of A10x, HfOx, SiOx and NbOx.6 . Method according to any of the preceding claims , wherein a thickness of at least one of the optional first , the second and third doped dislocation shaping layer is in the range between 30 nm and 250 nm and more particularly between 20 nm and 80nm and in particular between 30 nm and 60 nm and in particular between 30 nm and 50 nm and in particular larger than 25 nm.7 . Method according to any of the preceding claims , wherein the step of the first etching process and / or the step of the second etching process is conducted until a distance to the optional first optionally doped dislocation shaping layer and / or third optionally doped dislocation shaping layer between 3 nm and 100 nm and more particular between 10 nm and 150 nm and more particular between 10 nm and 250 nm and more particularly between 2 nm and 250 nm and more particular between 30 nm and 150 nm and more particular between 0 nm and 100 nm .8 . Method according to any of the preceding claims , wherein a doping concentration in at least one of the optional first , the second and third doped dislocation shaping layer is in the range between lel 8 1 / cm3and 8el 8 1 / cm3; and / or wherein a dopant of the at least one of the optional first , the second and third doped dislocation shaping layer is Si .9 . Method according to any of the preceding claims , wherein during the step of depositing a semiconductor layer stack screw dislocations are generated extending through the second layer and at least partially through the second dislocation shaping layer, wherein a lateral size of the generated screw dislocations in the second dislocation shaping layer is reduced with increasing distance to the second layer .10 . Method according to any of the preceding claims , wherein a size of a screw dislocation extending through two adj acent doped layers of GaN with at least one of the dislocation shaping layer in between is reduced in the doped layer of GaN closer to the active layer .11 . Optoelectronic device comprising : a structured semiconductor stack based on a nitride material system, comprising an optional first layer of doped GaN, an optional first doped dislocation shaping layer , a second layer of doped GaN, a second dislocation shaping layer , a third layer of doped GaN, an active layer and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN, wherein a material of the optional first and the second dislocation shaping layer comprises one of AlxGaixN and InyAlxGai x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 ; further comprising mesa etched facets having an upper portion adj acent to the active layer and comprising a first dielectric material arranged upon, and an inclined lower portion and a bottom comprising a second dielectric material arranged upon,said second dielectric material being the same or different from the first dielectric material ; wherein the lower portion and / or the bottom comprises at least one screw dislocation extending from the facets in a direction facing away from the active layer ; said screw dislocation being substantially free of the first dielectric material and optionally containing an upper portion and a lower portion with a different diameter than the upper portion .12 . Optoelectronic device comprising : a structured semiconductor stack based on a nitride material system, comprising an optional first layer of GaN, an optional first dislocation shaping layer , a second layer of doped GaN, a second dislocation shaping layer , a third layer of doped GaN, an active layer and a doped semiconductor layer having a different conductivity type than the third layer of doped GaN, wherein a material of the optional first and the second dislocation shaping layer comprises one of AlxGaixN and InyAlxGai x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 ; further comprising mesa etched facets having an upper portion adj acent to the active layer and comprising a first dielectric material arranged on the upper portion, and an inclined lower portion comprising a second dielectric material arranged upon, said second dielectric material being different from the first dielectric material ; wherein lower end of the first dielectric material when seen from the third layer of doped GaN is at a level above a level of the second dislocation shaping layer , in particular between 2 nm to 200 nm above a level of the second dislocation shaping layer and in particular between 2 nm to 100 nm above a level of the second dislocation shaping layer and in particular less than 80 nm above a level of the second dislocation shaping layer .13 . Optoelectronic device according to claim 12 , wherein the second layer of doped GaN and the second dislocation shaping layercomprise a screw dislocation, wherein the lower end of the first dielectric material when seen from the third layer of doped GaN is at a level , at which the screw dislocation comprises a diameter smaller than a diameter of the screw dislocation in the second layer of doped GaN below the second dislocation shaping layer .14 . Optoelectronic device according to claim 12 or 13 , wherein the screw dislocation extends through the optional first and / or the second layer of doped GaN and the second doped dislocation shaping layer , wherein a portion with a smaller diameter is located in the second doped dislocation shaping layer and optionally within 10 nm and particularly within 50 nm of the optional first and / or the second layer of doped GaN adj acent to the second doped dislocation shaping layer .15 . Optoelectronic device according to any of claims 12 to 14 , further comprising : one or more GaN layers ; a third doped dislocation shaping layer on the one or more GaN layers ; wherein the optional first layer of doped GaN is arranged on the third doped dislocation shaping layer ; and wherein a material of the third dislocation shaping layer comprises one of AlxGaixN and InyAlxGai-x-yN with x between 0 . 02 and 0 . 5 and particularly between 0 . 02 and 0 . 20 ;16 . Optoelectronic device according to claim 15 , wherein a distance of the third screw dislocation shaping layer to an exposed surface optionally to a facet is in the range between 5 nm and 100 nm and more particular between 10 nm and 150 nm and more particular between 10 nm and 250 nm and more particular between 30 nm and 500 nm and more particular between 10 nm and 400 nm .17 . Optoelectronic device according to any of claims 12 to 16 , wherein facets of the inclined lower portion of the mesa etched semiconductor layer stack comprises material of the optional firstdoped dislocation shaping layer and the second doped dislocation shaping layer .18 . Optoelectronic device according to any of claims 12 to 17 , wherein the first dielectric material comprises one of A1OX, HfOxand Nb2Os , whereas the second dielectric material may optionally comprise SiO2 or SiN .19 . Optoelectronic device according to any of claims 12 to 18 , wherein the second dislocation shaping layers comprises a doping concentration that is larger, in particular up to 5 times larger than a doping concentration of the adj acent layers ; and / or wherein the first and third dislocation shaping layers comprises a doping concentration that is within 20 % and particularly within 10% and particularly within 5 % of a doping concentration of the adj acent doped GaN layer at the interfaces between the respective one of the optional first , the second and third dislocation shaping layers and the adj acent doped GaN layer .20 . Optoelectronic device according to any of claims 12 to 19 , wherein a thickness of at least one of the optional first , the second and the third dislocation shaping layers is in the range between 10 nm and 250 nm and more particularly between 20 nm and 40nm and in particular between 15 nm and 45 nm and in particular between 10 nm and 50 nm and in particular larger than 5 nm .

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