Device and method for analyzing interference variables of an electronic device

The device with ohmic damping elements and switching elements provides a precise method for analyzing interference variables, enhancing electromagnetic compatibility by enabling targeted interference suppression in electronic devices.

WO2025185974A1PCT designated stage Publication Date: 2025-09-11WURTH ELEKTRONIK EISOS
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Patent Information

Application Number
PCT/EP2025/054240
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-03-08
Filing Date
2025-02-18
Publication Date
2025-09-11

AI Technical Summary

Technical Problem

Existing devices lack a simple and precise method for analyzing interference variables of electronic devices, particularly in the frequency range of radio interference voltage, which is crucial for effective electromagnetic compatibility.

Method used

A device with a network simulation and analysis circuit featuring ohmic damping elements and switching elements that allow selective looping of resistive damping elements in series or parallel configurations, enabling precise analysis of interference variables by varying terminating impedance.

Benefits of technology

Enables accurate and targeted interference suppression by allowing independent determination of interference variables, facilitating effective radio interference suppression in electronic devices.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a device for analyzing interference variables of an electronic device, comprising at least one terminal (4L, 4N) for a device (2) to be analyzed, a network simulation (9) for decoupling interference voltages (UL unsym, UN unsym which can be traced back to the device and at least one analysis circuit (Ai) for connecting the at least one terminal (4L, 4N) to the network simulation (9). The at least one analysis circuit (A,) has at least one ohmic damping element (R,) and at least one switching element (S,). The switching element (S,) is designed to switch the analysis circuit (A,) between an active circuit (B), in which the at least one ohmic damping element (R,) is connected between the at least one terminal (4L, 4N) and the network simulation (9), and a passive circuit (A), in which the at least one ohmic damping element (Ri) is not connected between the at least one terminal (4L, 4N) and the network simulation (9). The invention also relates to a method for analyzing interference variables of an electronic device.
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Description

[0001] Device and method for analyzing disturbances of an electronic device

[0002] This patent application claims priority from German patent application DE 10 2024 202 219.5, the contents of which are incorporated herein by reference.

[0003] The invention relates to a device and a method for analyzing interference variables of an electronic device. The invention particularly relates to a device and a method for analyzing interference variables of the electronic device during interference suppression of the electronic device, particularly in the frequency range of radio interference voltage.

[0004] Electronic devices generate interference, particularly high-frequency interference, as a result of switching electrical currents. Conducted interference, commonly referred to as radio interference, propagates through power supply cables in the form of high-frequency interference voltages and currents. To ensure electromagnetic compatibility between electronic devices and with the power grid, such interference must be limited by using appropriate measures, such as filtering, to suppress interference in the devices.

[0005] It is an object of the present invention to improve a device for analyzing disturbances of an electronic device, in particular to provide a device that enables a simple and precise analysis of disturbances of an electronic device.

[0006] This object is achieved by a device having the features specified in claim 1. The device has at least one connection for a device to be analyzed, a network simulation for coupling out interference voltages attributable to the device, and at least one analysis circuit for connecting the at least one connection to the network simulation. The at least one analysis circuit has at least one ohmic damping element and at least one switching element. The switching element is designed to switch the analysis circuit between an active circuit, in which the at least one ohmic damping element is connected between the at least one connection and the network simulation, and a passive circuit, in which the at least one ohmic damping element is not connected between the at least one connection and the network simulation.The analysis circuit enables a selective looping of at least one resistive damping element between the network simulation and at least one connection for the device to be analyzed.

[0007] According to the invention, it was recognized that the selective insertion of the at least one ohmic damping element of the at least one analysis circuit enables a precise and accurate analysis of interference variables of an electronic device. The ohmic damping element changes the terminating impedance for the device. The electronic device can therefore be measured with different terminating impedances. In the passive circuit of the at least one analysis circuit, the respective at least one ohmic damping element does not interact with the interference emissions of the electronic device. In the active circuit of the at least one analysis circuit, the respective at least one ohmic damping element acts on the interference emissions of the electronic device.The interference emissions attributable to the electronic device, in particular interference voltages, are attenuated in the active circuit of the at least one analysis circuit by the at least one ohmic damping element connected between the at least one connection and the artificial network. The at least one ohmic damping element acts as a voltage divider for interference voltages attributable to the device in the active circuit of the respective analysis circuit. The selective variation of the terminating impedance enables the independent determination of different interference variables and / or different interference variable components. The device enables a simple, precise, and reproducible analysis of the interference variables of the electronic device. The knowledge about the interference variables of the electronic device obtained through the analysis enables targeted and precise interference suppression of the device using suitable measures such as filters.The device simplifies and improves radio interference suppression of electronic devices.

[0008] The at least one resistive damping element can be connected in the active circuit with respect to the at least one connection either in parallel or in series with the artificial network. The connection of the at least one resistive damping element between the at least one connection and the artificial network in the active circuit of the at least one analysis circuit is to be understood in particular such that the at least one resistive damping element is electrically coupled into the signal path between the at least one connection and the artificial network, i.e. in particular in parallel or series connection with the artificial network. Interference voltages of the electronic device to be tested can be specifically influenced via the at least one resistive damping element. It has been shown that both series and parallel connections of the at least one resistive damping element are suitable for this purpose.

[0009] It is possible to use multiple analysis circuits, with at least one resistive damping element in the respective active circuit being connected in series or parallel to the network simulation. It is also possible to combine series and parallel connections of resistive damping elements to form the network simulation for different analysis circuits in the respective active circuit. It is therefore possible for an resistive damping element of one analysis circuit in the respective active circuit to be connected in parallel to the network simulation, and an resistive damping element of another analysis circuit in the respective active circuit to be connected in series to the network simulation.Different analysis circuits and types of interposition of the at least one ohmic damping element between the network simulation and the at least one connection (in particular types of coupling the at least one ohmic damping element into the signal path) are possible and in particular can be combined.

[0010] Interference emissions from an electronic device arise from an interference source within the electronic device. The interference source is, in particular, a property inherent to the electronic device. To suppress interference in the device, it is therefore important to characterize its interference source. The variables characterizing the interference source of the device are referred to here and below as interference variables. The interference source can be described, in particular, as an (idealized) interference voltage source and an interference impedance. The interference voltage source and the interference impedance are exemplary interference variables. Using the device according to the invention, the interference voltage source and the interference impedance of an electronic device can be analyzed, preferably determined independently of one another.

[0011] The interference emissions of an electronic device can have different interference components. Examples of interference components are asymmetrical interference voltages, symmetrical interference voltages, and asymmetrical interference voltages. Asymmetrical interference voltages are interference voltages that occur between earth and a wire of a power system, in particular a phase conductor or a neutral conductor. Asymmetrical interference voltages are the sum of the asymmetrical interference voltages acting against earth from network wires connected to the device, for example, at least one phase conductor and / or a neutral conductor of the power system. Asymmetrical interference voltages are caused by common-mode interference. Symmetrical interference voltages are voltages between the different network wires of a power system, in particular between a phase conductor and a neutral conductor. Symmetrical interference voltages are caused by differential-mode interference.

[0012] Different interference components can, in particular, be assigned to different interference variable components. For example, symmetrical interference variables, in particular symmetrical interference voltage sources and / or symmetrical interference impedances, can be defined to describe differential-mode interference. For example, asymmetrical interference variables, in particular asymmetrical interference voltage sources and / or asymmetrical interference impedances, can be defined to describe common-mode interference. Using the device according to the invention, different interference variable components, in particular symmetrical and / or asymmetrical interference variables, of an electronic device can be analyzed, preferably determined independently of one another.

[0013] Electronic devices powered by alternating current operate in a technical frequency range. An example technical frequency range is between 16 Hz and 2 kHz. High-frequency interference voltages lie above the technical frequency range. For radio interference suppression of conducted interference, interference emissions with a frequency between 9 kHz and 200 MHz are analyzed in particular. The frequency range to be analyzed for the interference emissions can, for example, be between 9 kHz and 30 MHz. This frequency range is typically considered for interference suppression of low-voltage networks and telecommunications networks. The frequency range to be analyzed can, in particular, be between 150 kHz and 200 MHz, in particular between 150 kHz and 108 MHz, in particular between 150 kHz and 80 MHz, in particular between 150 kHz and 30 MHz, and in particular between 9 kHz and 30 MHz.These frequency ranges have proven suitable for suppressing interference in on-board power systems, for example, in motor vehicles, power grids with direct current or technical alternating current frequencies, and telecommunications networks. The device can be designed, in particular, to analyze interference in one of these frequency ranges or a sub-range thereof. For example, the network simulation can couple out interference voltages with frequencies in one of these frequency ranges or a sub-range thereof.

[0014] The at least one analysis circuit has at least one resistive damping element. The term resistive damping element is to be understood such that the damping element behaves essentially resistively in a frequency range to be analyzed. The at least one resistive damping element has, in particular, an impedance that is essentially frequency-independent over the frequency range to be analyzed. An absolute value of the impedance, in particular a real part of the impedance, of the at least one resistive damping element can, for example, change by a maximum of 50%, in particular by a maximum of 20%, in particular by a maximum of 10%, in particular by a maximum of 5%, in particular by a maximum of 2%, in particular by a maximum of 1%, over the frequency range to be analyzed.The at least one ohmic damping element has, in particular, an impedance whose real part is at least 30%, in particular at least 50%, in particular at least 80%, in particular at least 90%, in particular at least 95%, in particular at least 98%, in particular at least 99%, in particular at least 99.5%, in particular at least 99.9%, preferably substantially 100%, of the absolute value of the impedance. Preferably, the at least one ohmic damping element has a real-valued constant resistance in the frequency range to be analyzed. Particularly preferably, the at least one ohmic damping element has an ohmic resistance. In particular, the at least one ohmic damping element is designed as an ohmic resistance.

[0015] The at least one analysis circuit has an overall impedance, which is also referred to below as damping impedance. The damping impedance of the at least one analysis circuit can be provided in particular by the at least one ohmic damping element. In addition to the at least one ohmic damping element, the at least one analysis circuit can also have further electronic components, in particular electronic components with complex-valued impedances. Examples of further electronic components can be inductors, in particular chokes, and / or capacitances, in particular capacitors. The damping impedance of the at least one analysis circuit then results from the interaction of the at least one ohmic damping element and, if applicable, respective further electronic components.

[0016] The at least one analysis circuit has, in particular, active and / or passive components and connecting conductors. The term connecting conductor is to be understood as meaning that it connects active or passive components of the at least one analysis circuit to one another and / or to other parts of the device without otherwise having a significant impact on the interference emissions of the device to be analyzed. The connecting conductor is, in particular, designed as a wire, for example, as a copper wire. The connecting conductor has, in particular, a negligibly low impedance, in particular a negligibly low ohmic resistance. The at least one ohmic damping element is, in particular, an active or passive component, preferably a passive component. The at least one ohmic damping element is, in particular, an ohmic resistor. The at least one analysis circuit can have further active and / or passive components.For example, the at least one analysis circuit can comprise a passive component in the form of a choke and / or a capacitor. The at least one switching element can be designed, for example, as an active component, in particular as a switch or relay. However, the at least one switching element can also be designed as a passive component, for example, as a terminal for temporarily connecting the at least one resistive damping element.

[0017] The device has a network emulation for coupling out interference voltages attributable to the device. Network emulations for coupling out interference voltages are known. Network emulations are also referred to by the English term "Line Impedance Stabilization Network" (abbreviated to "LISN"). The person skilled in the art can select suitable network emulations for the device depending on the interference voltages to be analyzed. For example, the network emulation can be a V-network emulation, a T-network emulation, a delta network emulation and / or an on-board network emulation. For example, a passive network emulation, in particular a V-network emulation, is suitable. The network emulation can also have additional components. For example, the network emulation can have a switching matrix with which coupled-out interference voltages can be interconnected.Additionally or alternatively, the network simulation can include an amplifier system for amplifying extracted interference voltages. The switching matrix and the amplifier system can together form a selective amplifier, particularly for amplifying individual interference voltage components. Depending on the power supply, the network simulation can also include a line filter. The line filter can suppress interference present in the supply network. A network simulation with additional components is also referred to below as an extended network simulation.

[0018] A switching matrix and / or an amplifier system, in particular a selective amplifier, can also be provided externally to the network simulation.

[0019] The network simulation serves in particular to extract asymmetrical interference voltages. Further interference voltage components, in particular symmetrical and / or asymmetrical interference voltages, can be determined from the extracted asymmetrical interference voltages. The extracted interference voltages, in particular the extracted asymmetrical interference voltages, can be interconnected, for example, using a switching matrix to form further interference voltage components, in particular symmetrical and / or asymmetrical interference voltages. For example, the switching matrix can comprise circuits consisting of resistors, capacitors, chokes, and / or transformers. The network simulation is preferably a V-network simulation. V-network simulations are particularly suitable for separately extracting interference voltages, in particular asymmetrical interference voltages, assigned to different network wires.

[0020] In the frequency range under consideration, the artificial network represents, in particular, an essentially ohmic terminating impedance for the interference voltages to be extracted. For example, the interference voltage can have a measuring resistor, in particular an ohmic measuring resistor for the interference voltages to be extracted. The interference voltages to be extracted are measured, in particular, via the measuring resistor. The measuring resistor represents a first terminating impedance from the perspective of the device to be analyzed. In the active circuit of the at least one analysis circuit, the terminating impedance is changed by the at least one ohmic damping element. The measuring resistor of the artificial network and the at least one ohmic damping element act, in particular, as a voltage divider, in particular as an ohmic voltage divider, for the interference voltages to be extracted in the active circuit of the at least one analysis circuit.In addition to at least one measuring resistor, the network can comprise additional electronic components, particularly electronic components with complex-valued impedances. The total impedance of the network is also referred to below as the measuring impedance. Preferably, the measuring impedance essentially corresponds to the measuring resistor, especially in the frequency range under consideration.

[0021] The device has at least one connection for the device to be analyzed. The device can have multiple connections for the device to be analyzed. In particular, the device can have one connection for each network wire of the supply network. The supply network can be, for example, a direct current network or an alternating current network, in particular a single-phase alternating current network or a multi-phase alternating current network, for example a three-phase current network. For example, the device can have one connection for connecting an outer conductor and one connection for connecting a neutral conductor of a supply network to the device to be analyzed. The device can additionally have one connection for connecting a protective conductor of a supply network to the device to be analyzed. The device can also have multiple connections for different outer conductors.For example, the device can have three connections for the outer conductors of a three-phase network, in particular a three-phase alternating current network. The network simulation is preferably designed identically for the different connections, in particular for the respective network wires. Alternatively, in particular in the case of on-board network simulations, the network simulation can be constructed asymmetrically with respect to different connections. The at least one analysis circuit is preferably designed identically for different connections, in particular different network wires. In particular, the at least one analysis circuit can have at least one ohmic damping element per connection, in particular per network wire. The ohmic damping elements for different connections, in particular different network wires, can in particular have the same impedances, in particular the same ohmic resistances.This allows for symmetrical attenuation of different connections, in particular different network wires. However, it is also possible for the at least one analysis circuit to be designed differently for different connections, in particular different network wires. This allows for different, in particular selective, attenuation of individual connections, in particular individual network wires.

[0022] The at least one analysis circuit has at least one switching element for switching the analysis circuit between the active circuit and the passive circuit. By means of the at least one switching element, the at least one resistive damping element can be selectively looped between the network simulation and the at least one connection for the device. For example, the at least one switching element can be designed as a connection contact via which the at least one resistive damping element can be switched between the network simulation and the at least one connection. For example, the at least one resistive damping element can be temporarily connected to a contact of the switching element, in particular connected manually. The at least one switching element can also enable the connection of a bridging line for bridging the at least one resistive damping element in the passive position.Preferably, the at least one switching element is designed to switch between the active circuit and the passive circuit. For example, the at least one switching element can have at least one switching element.

[0023] A device according to claim 2 enables a particularly effective and flexible analysis of different devices. By connecting the network simulation and at least one resistive damping element in series in the respective active circuit, the terminating impedance is increased from the device's perspective. This has proven particularly suitable for analyzing interference impedances across a wide impedance range. For example, the device is particularly suitable for analyzing interference impedances that are between 0.05 and 20 times the measurement impedance of the network simulation and / or the damping impedance of at least one analysis circuit in the active circuit, in particular the resistance of the at least one resistive damping element.By appropriately selecting the damping impedance of the analysis circuit in the active circuit, in particular by appropriately selecting at least one resistive damping element, the analyzable impedance range for the interference impedance can be specifically adjusted. The device is particularly suitable for analyzing devices with typical interference impedances.

[0024] A device according to claim 3 enables a particularly efficient analysis of disturbance variables. The parallel connection can be implemented, for example, in that the at least one ohmic damping element in the active circuit of the respective analysis circuit is connected between the at least one connection for the device and ground. If there are multiple connections for the device, the at least one analysis circuit preferably has at least one ohmic damping element. The at least one ohmic damping element can be connected between the respective connection for the device and ground. Alternatively, the at least one ohmic damping element in the active circuit of the respective analysis circuit can also be connected in parallel in that the at least one ohmic damping element in the active circuit is connected between different connections for the device.For example, the at least one resistive damping element can be connected in the active circuit of the analysis circuit between the terminals for a phase conductor and a neutral conductor of a supply network. In particular, various terminals for the device, in particular terminals for a phase conductor and a neutral conductor of a supply network, are connected in the active circuit of the analysis circuit via the at least one resistive damping element.

[0025] The parallel connection of at least one resistive damping element to the network simulation is particularly suitable for the analysis of very low- and high-impedance interference sources. By connecting at least one resistive damping element to the network simulation in parallel, the terminating impedance for the device being analyzed in the respective active circuit is reduced. This particularly increases the analysis accuracy for very high-impedance and / or low-impedance interference sources. Very low-impedance interference sources are understood to mean, in particular, interference sources with interference impedances that are less than 0.05 times the measurement impedance of the network simulation and / or the damping impedance of the at least one analysis circuit in the active circuit, in particular the resistance of the at least one resistive damping element.Very high-impedance interference sources are understood to mean, in particular, interference sources with interference impedances that are greater than 20 times the measuring impedance of the network simulation and / or the damping impedance of the at least one analysis circuit in the active circuit, in particular the resistance of the at least one ohmic damping element.

[0026] For example, connecting at least one resistive damping element in parallel, in particular connecting the at least one resistive damping element between the at least one connection for the device and ground, enables reliable differentiation between interference voltages originating from very high- and / or very low-impedance interference sources. In the active circuit of the respective analysis circuit, the at least one resistive damping element connected in parallel to the network simulation reduces the terminating impedance for the device. The terminating impedance has essentially no effect on the coupling out of interference voltages originating from very low-impedance interference sources. For very low-impedance interference sources, the measured values ​​determined in the active circuit and the passive circuit of the respective analysis circuit are essentially the same.For very high-impedance interference sources, the damping impedance connected in series does not affect the interference voltage measurement. Reducing the termination impedance has a significant effect on the extracted interference voltages. For very high-impedance interference sources, the measured value determined in the active circuit is reduced compared to the measured value determined in the passive circuit by essentially the same factor as the termination impedance in the active position.

[0027] A device according to claim 4 is particularly efficient and economical. With the aid of the at least one capacitor, technical frequencies can be blocked, which simplifies the measurement of individual interference voltage components. Particularly advantageously, at least one analysis circuit, in which the at least one resistive damping element is connected in parallel to the network simulation, has the at least one capacitor. In the respective active circuit, the at least one capacitor can be connected in parallel to the network simulation, in particular together with the at least one resistive damping element. For example, the at least one capacitor and the at least one resistive damping element can be connected between the at least one connection for the device and ground.The at least one capacitor and the at least one resistive element can be connected between various terminals for the device, in particular between the terminals for a phase conductor and a neutral conductor of a power grid. For example, various terminals for the device, in particular terminals for a phase conductor and a neutral conductor of a power grid, can be connected via the at least one resistive damping element and the at least one capacitor connected in series therewith in the active circuit of the respective analysis circuit.

[0028] The device preferably has at least two analysis circuits. Different analysis circuits can be configured for different interpositions of the respective at least one resistive damping element in the respective active circuit. In particular, different analysis circuits can be configured for damping different interference voltage components, in particular for damping the asymmetrical or symmetrical interference voltage component. Multiple analysis circuits can each have resistive damping elements connected in parallel or in series with respect to the at least one connection of the network embedding. It is also possible to combine analysis circuits with resistive damping elements connected in series and in parallel in the device.For example, the at least one resistive damping element of at least one analysis circuit can be connected in series with respect to the at least one connection to the network simulation in the respective active circuit. The at least one resistive damping element of at least one other analysis circuit can be connected in parallel with the at least one connection to the network simulation in the respective active circuit. The combination of such analysis circuits enables the analysis of interference sources over a particularly wide impedance range.

[0029] A device according to claim 5 is structurally simple and efficient. The at least one bridging line enables easy decoupling of the at least one damping element in the passive circuit of the respective analysis circuit. In particular, a bridging line can be provided for each resistive damping element to bridge the respective resistive damping element. The at least one bridging line can in particular be switchable in parallel to the at least one resistive damping element. The at least one bridging line has a significantly lower impedance, in particular a significantly lower ohmic resistance, than the at least one resistive damping element, particularly for the interference voltage components to be analyzed.For example, a ratio of the absolute value of the impedance of the at least one ohmic damping element to the absolute value of the impedance of the respective bridging line, in particular a ratio of the ohmic resistance of the at least one ohmic damping element to the ohmic resistance of the respective bridging line, can be at least 10:1, in particular at least 100:1, in particular at least 1,000:1, in particular at least 10,000:1. Preferably, the bridging conductor has a negligibly low impedance, in particular a negligibly low ohmic resistance, in particular in comparison with the respective at least one ohmic damping element.

[0030] A device according to claim 6 is structurally simple and user-friendly. Switching between active and passive switching enables simple, selective insertion of the at least one ohmic resistor between the network emulation and the at least one terminal.

[0031] A device according to claim 7 is particularly efficient and user-friendly. Manual switching, in particular switching, of the at least one analysis circuit between active and passive switching is not required. The control unit is designed, in particular, for fully automatic switching, in particular switching, of the at least one analysis circuit between active and passive switching. The control unit can, in particular, make the settings of the device, in particular of the at least one analysis circuit, necessary for the analysis.

[0032] The control unit is preferably designed to control the network simulation. For example, the control unit can control a switching matrix of an extended network simulation in order to selectively decouple individual interference voltage components.

[0033] Particularly preferably, the control unit is designed to detect interference voltages extracted by the network simulation. The control unit can be connected to a signal output of the network simulation, in particular the extended network simulation. The control unit can be designed, in particular, to evaluate the detected interference voltages. Particularly preferably, the control unit is designed to fully automatically perform the analysis of the interference variables. The control unit can, in particular, be designed to determine interference variables and / or suitable interference suppression filters based on the detected and evaluated interference voltages.

[0034] A device according to claim 8 is efficient and precise. The at least two connections can be used in particular to connect different network wires of a supply network, in particular an outer conductor and / or a neutral conductor, to the device. The provision of at least one ohmic damping element per connection enables targeted damping of the respective connections, in particular the respective network wire. The ohmic damping elements of an analysis circuit assigned to different connections can be designed identically or differently. As a result, interference voltages assigned to different connections, in particular different network wires, can be attenuated identically or specifically differently. Particularly preferably, the ohmic damping elements of an analysis circuit assigned to different connections have the same impedance, in particular the same ohmic resistance.This enables symmetrical attenuation of different connections, especially different network wires.

[0035] A device according to claim 9 is particularly precise and versatile. The at least one choke allows for targeted attenuation of individual interference voltage components. Different interference voltage components can be specifically measured. Different interference variable components can be specifically analyzed, in particular quantified. For example, symmetrical and asymmetrical components of the interference voltage source and the interference impedance can be determined. This enables the targeted synthesis of filters for individual interference voltage components. The device can be specifically suppressed for individual interference voltage components.

[0036] The at least one choke can be connected in parallel or in series with the at least one resistive damping element in the active circuit. For example, the choke can be connected in parallel with the at least one resistive damping element in the active circuit. The at least one choke can be high-impedance for the interference voltage component to be attenuated and low-impedance for the interference voltage component not to be attenuated. The at least one resistive damping element essentially only acts on the interference voltage component to be attenuated.

[0037] It is also possible for the at least one choke in the active circuit to be connected in series with the at least one resistive damping element. For example, the choke can be high-impedance for the interference voltage component that is not to be damped and low-impedance for the interference voltage component that is to be damped. This has the advantage of suppressing the interference voltage component that is not to be damped. However, the high-impedance damping can lead to significant power losses, which can impair the measurement.

[0038] The at least one choke can be, for example, a common-mode choke and / or a differential-mode choke. Common-mode chokes attenuate the asymmetrical interference voltages resulting from common-mode interference significantly more effectively than symmetrical interference voltages. In particular, common-mode chokes essentially do not attenuate symmetrical interference voltages. Suitable common-mode chokes include, for example, current-compensated chokes. Differential-mode chokes attenuate symmetrical interference voltages resulting from differential-mode interference more effectively than asymmetrical interference voltages. In particular, differential-mode chokes essentially do not attenuate asymmetrical interference voltages. Suitable differential-mode chokes include, for example, storage chokes, in particular chokes with powder cores and / or air chokes. Air chokes, in particular, offer advantages at high frequencies and low inductance values.

[0039] For example, a common-mode choke can be connected in parallel to the at least one resistive damping element in the respective active circuit. The common-mode choke represents a low impedance for symmetrical interference voltages. The common-mode choke bridges the at least one resistive damping element for symmetrical interference voltages. The at least one resistive damping element is negligible for symmetrical interference voltages. For asymmetrical interference currents, the common-mode choke has a high impedance, so that asymmetrical interference currents essentially flow via the at least one resistive damping element. Therefore, essentially asymmetrical interference voltages are dropped across the at least one resistive damping element. An analysis circuit with a common-mode choke connected in parallel to the at least one resistive damping element in the active circuit is therefore suitable for the targeted attenuation of asymmetrical interference voltages.Accordingly, analysis circuits with a push-pull choke connected in parallel to at least one resistive damping element are suitable for the targeted damping of symmetrical interference voltages.

[0040] Preferably, the at least one choke is a broadband choke. The interference voltage components to be attenuated are preferably selectively attenuated across the entire frequency range to be analyzed.

[0041] Particularly preferably, the at least one choke has a high impedance for the interference voltage component to be attenuated by the respective analysis circuit, in particular symmetrical interference voltages and / or asymmetrical interference voltages. For example, the absolute value of the impedance of the choke for the interference voltage component to be analyzed is at least a factor of 3, in particular at least a factor of 5, in particular at least a factor of 10, in particular at least a factor of 20, greater than the absolute value of the impedance, in particular the ohmic resistance, of the at least one ohmic damping element. The higher absolute value of the impedance of the choke causes the interference voltage to be analyzed to be substantially attenuated by the at least one ohmic damping element.If, for example, the at least one ohmic damping element has an ohmic resistance of 150 £2, the choke has an absolute value of the impedance of at least 450 £2, in particular at least 750 £2, in particular at least 1500 £2, in particular at least 3000 £2 for the interference voltage component to be analyzed.

[0042] Preferably, the at least one choke has a low impedance for the interference voltage component that is not to be damped by the respective analysis circuit. For example, the absolute value of the impedance of the choke for the interference voltage component that is not to be damped by the respective analysis circuit is at least a factor of three, in particular at least a factor of five, in particular at least a factor of 10, in particular at least a factor of 20, smaller than the absolute value of the impedance, in particular the ohmic resistance, of the at least one ohmic damping element. The choke bridges the at least one ohmic damping element for the interference voltage component that is not to be damped by the respective analysis circuit. The analysis circuit essentially does not dampen the corresponding interference voltage component in the active position.For an ohmic damping element with an ohmic resistance of 150 Q, the choke has an absolute value of impedance of at most 50 Q, in particular at most 30 Q, in particular at most 15 Q, in particular at most 7.5 Q, in particular at most 1 Q, for the interference voltage component not to be damped.

[0043] A device according to claim 10 is particularly flexible and versatile. The at least two analysis circuits can effect different attenuation of the interference voltages, in particular of individual components of the interference voltages. For example, different analysis circuits, in particular different ohmic attenuation elements, can be designed to analyze different interferers, in particular different interference impedances. For example, at least one analysis circuit can have at least one ohmic attenuation element with a higher absolute impedance value in order to measure higher-ohmic interferers. Alternatively or additionally, at least one analysis circuit can be designed to connect the at least one ohmic attenuation element in series in the active circuit and at least one other analysis circuit can be designed to connect the at least one ohmic attenuation element in parallel in the active circuit.

[0044] Preferably, different analysis circuits can be switched independently from the passive circuit to the active circuit. This increases the flexibility of the device. Different analysis circuits can, in particular, be switched to the active circuit separately from one another. For example, one analysis circuit at a time can be switched to the active circuit for the targeted attenuation of individual interference voltage components. It is also possible to switch different analysis circuits to the active circuit simultaneously, so that several analysis circuits contribute to the attenuation, for example, to increasing the absolute value of the terminating impedance for the device. A device according to claim 11 enables a particularly precise analysis of different interference voltage components, in particular symmetrical interference voltages and / or asymmetrical interference voltages.The different interference voltage components can be measured independently of each other and the corresponding interference voltage quantities can be analyzed.

[0045] A device according to claim 12 is particularly versatile and flexible. The series-connected analysis circuits can be combined particularly easily. The attenuation of the interference voltages, especially of interference voltage components, can be adapted particularly flexibly. Various analysis circuits can be used individually and / or in combination to attenuate the interference voltages.

[0046] It is a further object of the invention to improve a method for analyzing disturbances of an electronic device, in particular to provide a method that enables an accurate and simple analysis of the disturbances of the electronic device.

[0047] This object is achieved by a method having the steps specified in claim 13. First, a device to be analyzed, a network simulation, and at least one ohmic damping element are provided. The device is connected to the network simulation. In a basic measurement step, at least one interference voltage attributable to the electronic device is decoupled and recorded by means of the network simulation. The method has at least one analysis measurement step, wherein at least one of the at least one damping element is connected between the network simulation and the device, and at least one interference voltage attributable to the device is decoupled and recorded by means of the network simulation. The interference voltages determined in the basic measurement step and the at least one analysis measurement step are evaluated to determine interference variables of the device.In at least one analysis measurement step, the termination impedance is changed from the device's perspective. This method enables simple and precise determination of individual disturbance variables, particularly the disturbance voltage amplitude and the disturbance impedance. In signal transmission technology, the disturbance voltage amplitude is also specified as the disturbance voltage level. The disturbance voltage level is the logarithm of the ratio of the measured disturbance voltage to a reference level under otherwise identical resistive conditions. This allows for a simple expression of relationships that can extend over several orders of magnitude.

[0048] The various measurement steps of the method can be performed in any order. In particular, the basic measurement step can be performed after at least one analysis measurement step.

[0049] In the basic measurement step, at least one resistive damping element is not connected between the network and the device. Interference voltages emanating from the device can be directly coupled and recorded via the network.

[0050] In the at least one analysis measurement step, the at least one resistive damping element is connected between the network simulation and the device, in particular in parallel or in series with the network simulation. The at least one resistive damping element is therefore coupled into a signal path between the device and the network simulation in the at least one analysis measurement step and thus influences the interference voltage returning to the device.

[0051] In particular, it is possible to perform multiple analysis measurement steps. In different analysis measurement steps, different resistive damping elements can be connected between the network simulation and the device, and / or at least one resistive damping element or individual resistive damping elements can be connected differently between the network simulation and the device, for example, in series or parallel to the network simulation.

[0052] The recorded interference voltages can be evaluated numerically, for example. For example, individual interference variables, such as the interference impedance and / or the amplitude or level of the interference voltage source, can be calculated numerically based on the detected interference voltages. Preferably, the recorded interference voltages are evaluated analytically to determine the interference variables. For example, an approximate calculation of the interference variables can be performed. For this purpose, the basic measurement step and / or at least one analysis measurement step can be approximated using suitable equivalent circuit diagrams in the evaluation. This enables simple and rapid determination of the interference variables.

[0053] The method can be carried out in particular using the device described above. To carry out the basic measuring step, the at least one analysis circuit can be switched to passive mode. To carry out the at least one analysis measuring step, at least one of the at least one analysis circuits can be switched to active mode. For example, at least one analysis circuit can be switched from passive mode to active mode to carry out the at least one analysis measuring step by a control unit of the device. The basic measuring step and the at least one analysis measuring step, in particular the respective detection of the coupled-out interference voltages, can be carried out by the control unit, in particular fully automatically. Additionally or alternatively, the evaluation of the interference voltages to determine the interference variables can be carried out by the control unit.

[0054] A method according to claim 14 is versatile and precise. The at least one choke enables targeted attenuation of individual interference voltage components, in particular symmetrical interference voltages and / or asymmetrical interference voltages, in the at least one analysis / measurement step. The method enables accurate and precise evaluation of individual interference voltage components.

[0055] A method according to claim 15 is particularly flexible and precise. In the at least two analysis measurement steps, different interference voltage components can be attenuated. Additionally or alternatively, different attenuations of the interference voltages can be performed in the at least two analysis measurement steps. For example, at least one analysis measurement step can be performed to attenuate symmetrical interference voltages and at least one analysis measurement step can be performed to attenuate asymmetrical interference voltages. The determined interference voltage components can be evaluated in the evaluation step to determine corresponding interference variables or interference variable components.

[0056] A method according to claim 16 enables a particularly precise analysis of low-impedance and / or high-impedance interference sources. The method is versatile. A method according to claim 17 enables efficient interference suppression of the electronic device. The determination of the filters based on the detected interference variables can be performed, for example, by a control unit of the device described above.

[0057] The arrangement of the at least one analysis circuit between the artificial network and the device to be tested was described above. In principle, it is also possible to integrate corresponding analysis circuits directly into the measuring cell of a artificial network. For example, at least one ohmic damping element, in particular at least one ohmic resistor, can be integrated into the measuring cell and selectively connected in series or parallel to a measuring resistor of the artificial network to carry out corresponding analysis measurement steps. In particular, it is possible to integrate several analysis circuits, each with at least one ohmic damping element for damping respective interference voltage components, into the measuring cell, in particular at least one analysis circuit for symmetrical interference voltage components and one for asymmetric and / or asymmetrical interference voltage components.The at least one resistive damping element can be coupled into the signal path, in particular between a measuring capacitor of the network simulation and the measuring resistor. Separate capacitors for filtering out technical frequencies are not required. However, analysis circuits integrated into the measuring cell of the network simulation can alter the frequency response of the measuring cell, which can affect the measurement accuracy.

[0058] Further features, advantages, and details of the invention will become apparent from the following exemplary embodiments and the accompanying figures. They show:

[0059] Fig. 1 is a schematic block diagram of an arrangement for analyzing disturbances of an electronic device with a device for analyzing disturbances of the electronic device,

[0060] Fig. 2 is a circuit diagram of a part of the arrangement according to Fig. 1, wherein analysis circuits of the device are shown in their respective passive circuit, Fig. 3 is the circuit diagram according to Fig. 2, wherein an analysis circuit for asymmetrical interference voltage components is shown in active circuit,

[0061] Fig. 4 shows the circuit diagram according to Fig. 2, showing an analysis circuit for symmetrical interference voltage components in active circuit,

[0062] Fig. 5 shows the circuit diagram according to Fig. 2, showing an analysis circuit for low and high-impedance interference impedances in active circuit,

[0063] Fig. 6 shows a schematic process flow for the analysis of disturbances of an electronic device,

[0064] Fig. 7 is an equivalent circuit diagram for carrying out a basic measurement step of the method according to Fig. 6,

[0065] Fig. 8 is an equivalent circuit diagram for carrying out an analysis measurement step for symmetrical interference voltage components in the method according to Fig. 6,

[0066] Fig. 9 shows a simplified equivalent circuit diagram for the analysis-measurement step according to Fig. 8,

[0067] Fig. 10 is an equivalent circuit diagram for carrying out an analysis measurement step for asymmetrical interference voltage components in the method according to Fig. 6,

[0068] Fig. 11 is a simplified equivalent circuit diagram for the analysis-measurement step according to Fig. 10,

[0069] Fig. 12 is an equivalent circuit diagram for carrying out a further analysis measurement step in the method according to Fig. 6,

[0070] Fig. 13 is a circuit diagram of part of an arrangement with an electronic device and a further embodiment of a device for analyzing disturbances of the electronic device, wherein analysis circuits of the device are shown in their respective passive circuit, Fig. 14 is an equivalent circuit diagram for carrying out an analysis measurement step for symmetrical disturbance voltage components with the arrangement according to Fig. 13,

[0071] Fig. 15 is an equivalent circuit diagram for carrying out an analysis measurement step for asymmetrical interference voltage components with the arrangement according to Fig. 13,

[0072] Fig. 16 is a circuit diagram of another embodiment of an analysis circuit for a device for analyzing disturbances of an electronic device, and

[0073] Fig. 17 shows a circuit diagram of a further embodiment of an analysis circuit for a device for analyzing disturbances of an electronic device.

[0074] An embodiment of a device 1 for analyzing disturbances of an electronic device 2 is described with reference to Figs. 1 to 5. Fig. 1 shows a block diagram of an arrangement for analyzing the disturbances of the electronic device 2, in which the electronic device 2 is connected to the device 1.

[0075] Device 2 is a device containing electronic components. Electronic devices in which current is switched generate interference. Such interference can affect electrical supply networks and other electronic consumers. Device 1 can be used to analyze the interference variables of device 2 that are relevant for the interference. Device 2 is also referred to as a "device under test" (DUT) or "equipment under test" (EUT). Device 1 can be used for any device 2. The details of device 2 are not important.

[0076] The device 1 has a mains connection 3 for connecting to a supply network.

[0077] The supply network is an alternating current network with a line conductor L, a neutral conductor N, and a grounding conductor or protective conductor PE. The device 1 has a device connection 4 for connecting the device 2. The device connection 4 provides connections for the various power lines of the supply network. In this regard, reference is made below to connections 4L for the line conductor L and 4N for the neutral conductor N (see Fig. 2).

[0078] The device 1 comprises an extended network simulation 5, an analysis unit 6, and a control unit 7. The supply network is connected via the extended network simulation 5. The analysis unit 6 is arranged between the extended network simulation 5 and the device connection 4, in particular the connections 4L, 4N for the network wires. The analysis unit 6 serves to connect the extended network simulation 5 to the device connection 4.

[0079] Extended network simulations are known. Here and in the following, extended network simulations are those that, in addition to a passive network simulation, have additional components, for example a network filter and / or measures for the separate extraction of different interference voltage components, in particular asymmetrical, symmetrical and / or asymmetrical interference voltages. A person skilled in the art can select a suitable extended network simulation for the network simulation 5. The illustrated embodiment shows an example of a suitable extended network simulation 5. The extended network simulation has a network filter 8, a network simulation 9, a switching matrix 10 and an amplifier system 11. The supply network is connected to the network filter 8 via the network connection 3. The network filter 8 suppresses any high-frequency interference that may be present in the supply network.

[0080] The actual network simulation 9 is arranged between the mains filter 8 and the analysis unit 6. The network simulation 9 is a passive network simulation, for example a passive V-network simulation. The network simulation 9 serves to provide a standardized measuring impedance on the mains voltage side for the device 2 under test. The network simulation 9 decouples interference voltages returning to the device 2. The network simulation 9 is connected to the device 2 via the analysis unit 6. The interference voltage components decoupled by the network simulation 9 are suitably interconnected by the switching matrix 10 so that the required interference voltage components are available for analysis and are amplified for further processing by the amplifier system 11. The amplified interference voltages are output to the control unit 7 for further evaluation.The switching matrix 10 and the amplifier system 11 can together form a selective amplifier, which can, in particular, selectively amplify one or more interference voltage components. The amplified interference voltages can also be coupled to an external measuring system 13 via a signal output 12. The control unit 7 and / or the external measuring system 13 can, for example, comprise an interference measuring receiver or a spectrum analyzer to analyze the interference voltages in a frequency-dependent manner.

[0081] The precise design of the extended network simulation 5 is not important. In further exemplary embodiments not shown, the device can also have only a passive network simulation 9, which can be connected to the device 2 via the analysis unit 6. Interference voltage components coupled out by means of the network simulation 9 can, for example, be coupled out to an external measuring system via a measuring connection of the device. Further components of the extended network simulation 5 are optional. For example, a switching matrix and / or an amplifier system can be provided as separate components that can be connected to the device, in particular to a measuring connection of the device, if necessary. For example, a switching matrix and / or an amplifier system can be part of an external measuring system and / or an external selective amplifier.

[0082] The control unit 7 is designed to control the analysis unit 6 and the extended network simulation 5, in particular the switching matrix 10. The control unit 7 switches the analysis circuits of the analysis unit 6 between the respective active and passive circuits. In addition, the control unit 7 is designed to control the extended network simulation 5, in particular the switching matrix 10, in order to extract various interference voltage components. The control unit 7 is further designed to evaluate the interference voltages extracted using the extended network simulation 5. Based on the evaluation, interference variables of the device 2 can be determined, in particular interference impedances and interference voltage sources. The control unit 7 is configured to calculate suitable filters for suppressing interference in the device 2 based on the determined interference variables.In the exemplary embodiment shown, the control unit 7 therefore enables a fully automated analysis of disturbances of the device 2. The design and functioning of the control unit is not essential for the analysis of the disturbances. In particular, it is not necessary for the control unit 7 to be part of the device 1. In other exemplary embodiments not shown, an external control device can be connected to the device. In yet other exemplary embodiments, no control unit is provided. The evaluation of the disturbance voltages can, for example, be carried out manually, for example by the measurement engineer evaluating the disturbance voltages with the aid of a suitable measuring system, for example a spectrum analyzer. The control of the analysis unit 6 and / or the extended artificial network 5 can also be carried out manually.In yet other embodiments not shown, control units with different functional scopes can be provided, for example only for evaluating the interference voltages or only for controlling the analysis unit.

[0083] The structure and functioning of the device 1, in particular of the analysis unit 6, are explained in more detail below with reference to Figs. 2 to 5. Figs. 2 to 5 show circuit diagrams of part of the arrangement according to Fig. 1. The circuit diagrams show the connection of the device 2 to the supply network via the analysis unit 6 and the network simulation 9. Further, optional components of the extended network simulation 5 are not shown in the circuit diagrams according to Figs. 2 to 5 for the sake of simplicity.

[0084] Device 2 is connected to the AC mains via the analysis unit 6 and the network emulation 9. For simplicity, the external supply network, the mains connection 3, and the mains filter 8 are represented here by a generalized mains supply component 14. The grounding of the respective components, in particular of device 2, is shown only schematically. In other embodiments, device 2 has no connections to ground, for example, in devices of protection class II.

[0085] In the illustrated embodiment, the network simulation 9 is a passive network simulation in the form of a V-network simulation. The network simulation 9 is designed identically for the outer conductor L and the neutral conductor N. An inductance I is connected in series with the respective network connection. A measuring capacitor CM and a measuring resistor RM are connected between the respective network wire and earth. The interference voltages are coupled out between the measuring capacitor CM and the measuring resistor RM. The interference voltages are measured via the measuring resistor RM. The network simulation 9 is designed to couple out asymmetrical interference voltage components Uunsym that occur between the respective network wire and earth. The network simulation 9 therefore serves to couple out the asymmetrical interference voltages related to the outer conductor L (U L un sym) and the neutral conductor N (U N un sym).

[0086] The extracted asymmetrical interference voltages UL un sym and U N un sym can be combined in the switching matrix 10 to decouple other interference voltage components. The asymmetrical interference voltages U L un sym and U N un sym are particularly symmetrical interference voltages U sy m and asymmetrical interference voltages U asy m can be combined. By means of the network simulation 9 and the downstream switching matrix 10, the following interference voltage components can be coupled out independently of one another: asymmetrical interference voltages U L un sym and U N un sym, symmetrical interference voltages Usym and asymmetrical interference voltages U aSym. In the illustrated embodiment, the switching matrix 10 is controlled by the control unit 7. However, the interconnection and decoupling of individual interference voltage components can also be done manually. In other embodiments, commercially available network simulations can also be used, which enable the decoupling of the various interference voltage components.

[0087] The above-described network 9 is particularly suitable for decoupling and analyzing interference voltages in a frequency range between 9 kHz and 200 MHz. For low-voltage and telecommunications networks, the decoupling and analysis can be performed particularly in a frequency range between 9 kHz and 30 MHz. In the case of on-board electrical systems, the decoupling and analysis can be performed particularly in a frequency range between 150 kHz and 200 MHz, in particular between 150 kHz and 108 MHz, and in particular between 150 kHz and 80 MHz.

[0088] The design of the artificial network 9 complies in particular with the standards CISPR 16-1-2 and EN 55016-1-2. The inductances I of the artificial network 9 can, for example, each be 50 pF. The measuring capacitors CM can, for example, each have a capacitance of 0.25 pF. The measuring resistors RM have, for example, an ohmic resistance of 50 Ω. For interference voltages in a frequency range to be tested, in particular between 9 kHz and 200 MHz, in particular between 9 kHz and 30 MHz, the artificial network 9 essentially represents an ohmic measuring resistor, in particular an ohmic measuring resistor of 50 Ω.

[0089] Depending on the application, other artificial network systems can also be used. The specific artificial network is not important in this regard. In particular, artificial network systems can be used according to one or more of the following standards: EN 55016-1-2, EN 55011, CISPR 16-1-2, MIL-STD 461G, EN 55025, CISPR 25, and ISO 11452-4.

[0090] The analysis unit 6 has three analysis circuits Ai, where i = 1, 2, 3. The analysis circuits Ai are delimited by dashed lines in Figures 2 to 5 for better differentiation. The analysis circuits Ai are connected in series between the network simulation 9 and the terminals 4L, 4N for the device 2. The analysis circuits Ai represent a connection between the network simulation 9 and the terminals 4L, 4N.

[0091] The analysis circuits Ai have, for each connection 4L, 4N, i.e., for each mains wire, an ohmic damping element in the form of an ohmic resistor Ri, where i = 1, 2, 3. In the illustrated embodiment, the analysis circuits Ai therefore each have an ohmic damping element Ri for the outer conductor L and the neutral conductor N. The ohmic damping elements Ri of an analysis circuit Ai each have the same ohmic resistance. Interference voltages can therefore be symmetrically damped by means of the ohmic damping elements on the respective mains wires. In other embodiments not shown, the ohmic damping elements Ri of an analysis circuit Ai can also have different resistors in order to enable different attenuation of the interference voltages on different mains wires.In other embodiments not shown, a different number of network wires and thus a different number of ohmic damping elements can be provided for each analysis circuit. The analysis circuits Ai each have switching elements in the form of switching elements Si, where i = 1, 2, 3. The analysis circuits Ai each have a switching element Si for each connection 4L, 4N, i.e., for each network wire. With the help of the switching elements Si, the respective analysis circuit Ai can be switched between an active circuit, in which the damping elements Ri are connected between the respective connection 4L, 4N and the network simulation 9, and a passive circuit, in which the ohmic damping elements Ri are not connected between the respective connection 4L, 4N and the network simulation 9. In Fig. 2, the analysis circuits Ai are each shown in the passive circuit (switching position A). In Fig.Figure 3 shows the analysis circuit Ai in active mode. Figure 4 shows the analysis circuit A2 in active mode. Figure 5 shows the analysis circuit A3 in active mode.

[0092] In the active circuit of the analysis circuit Ai, the switching elements Si are in switch position B. In the active circuit of the analysis circuit Ai, the ohmic damping elements Ri are connected in series with the simulation network 9 with respect to the respective connection 4L, 4N. In the passive circuit of the analysis circuit Ai, the switching elements Si are in switch position A. The analysis circuit Ai has bridging lines 15. In the passive circuit of the analysis circuit Ai, the ohmic damping elements Ri are bridged by the bridging lines 15. In the passive position of the analysis circuit Ai, the ohmic damping elements Ri are not connected between the simulation network 9 around the respective connection 4L, 4N.

[0093] The analysis circuit Ai includes a choke Di. The choke Di is connected in parallel to the resistive damping elements Ri in the active circuit and bridged by the bridging lines 15 in the passive circuit.

[0094] The choke Di is a broadband common-mode choke. The choke Di is, for example, a current-compensated choke. The choke Di has an impedance for asymmetrical interference currents whose absolute value is at least a factor of 3, in particular at least a factor of 5, in particular at least a factor of 10, in particular at least a factor of 20, greater than the resistance of the resistive damping elements Ri. For asymmetrical interference currents, the choke Di therefore represents a significantly higher impedance than the resistive damping elements Ri. For symmetrical interference currents, the choke Di has an impedance whose absolute value is at least a factor of 3, in particular at least a factor of 5, in particular at least a factor of 10, in particular at least a factor of 20, smaller than the resistance of the resistive damping elements Ri.For symmetrical interference currents, the choke Di therefore represents a significantly lower impedance than the resistive damping elements Ri. The choke Di bridges the resistive damping elements Ri for symmetrical interference currents. Symmetrical interference voltage components are therefore essentially not attenuated by the analysis circuit Ai in the active circuit. The analysis circuit Ai therefore leads to selective attenuation of asymmetrical interference voltage components in the active circuit. Asymmetrical interference currents flow primarily through the resistive damping elements Ri due to the higher impedance of the choke Di. For asymmetrical interference voltage components, the terminating impedance is increased by the resistive damping elements Ri. In the active circuit, the analysis circuit Ai acts as a voltage divider for asymmetrical interference voltage components.

[0095] In the active circuit of the analysis circuit A2, the switching elements S2 are in switch position B. In the active circuit of the analysis circuit A2, the ohmic damping elements R2 are connected in series with the embedding network 9 with respect to the respective connection 4L, 4N. In the passive circuit of the analysis circuit A2, the switching elements S2 are in switch position A. The analysis circuit A2 has bridging lines 15. In the passive circuit of the analysis circuit A2, the ohmic damping elements R2 are bridged by the bridging lines 15. In the passive position of the analysis circuit A2, the ohmic damping elements R2 are not connected between the embedding network 9 around the respective connection 4L, 4N.

[0096] The analysis circuit A2 includes a choke D2. In the active circuit, the choke D2 is connected in parallel with the resistive damping elements R2 and bridged by the jumper lines 15 in the passive circuit.

[0097] The choke D2 is a broadband push-pull choke. The choke D2 is, for example, a storage choke, in particular a powder core choke. For symmetrical interference currents, the choke D2 has an impedance whose absolute value is at least a factor of 3, in particular at least a factor of 5, in particular at least a factor of 10, in particular at least a factor of 20, greater than the resistance of the ohmic damping elements R2. For symmetrical interference currents, the choke D2 therefore represents a significantly higher impedance than the ohmic damping elements R2. For asymmetrical interference currents, the choke D2 has an impedance whose absolute value is at least a factor of 3, in particular at least a factor of 5, in particular at least a factor of 10, in particular at least a factor of 20, smaller than the resistance of the ohmic damping elements R2.For asymmetrical interference currents, choke D2 therefore presents a significantly lower impedance than the resistive damping elements R2. Choke D2 bypasses the resistive damping elements R2 for asymmetrical interference currents. Asymmetrical interference voltage components are therefore essentially not attenuated by analysis circuit A2 in the active circuit. Analysis circuit A2 therefore selectively attenuates symmetrical interference voltage components in the active circuit. Symmetrical interference currents flow primarily through the resistive damping elements R2 due to the higher impedance of choke D2. For symmetrical interference voltage components, the terminating impedance is increased by the resistive damping elements R2. In the active circuit, analysis circuit A2 acts as a voltage divider for symmetrical interference voltage components.

[0098] In the active circuit of the analysis circuit A3, the switching elements S3 are in switch position B. In the active circuit of the analysis circuit A3, the ohmic damping elements R3 are connected in parallel with the embedding network 9 with respect to the respective terminals 4L, 4N. In the passive circuit of the analysis circuit A3, the switching elements S3 are in switch position A. In the passive circuit, the ohmic damping elements R3 are not connected between the embedding network 9 and the respective terminals 4L, 4N.

[0099] The analysis circuit A3 has capacitors C3. In the active circuit, the capacitors C3 are connected in series with the resistive damping elements R3. In the active circuit, the resistive damping elements R3 are connected in parallel with the measuring resistors RM. In the active circuit, the analysis circuit A3 reduces the termination impedance for device 2. Reducing the termination impedance is advantageous for analyzing very high-impedance and / or very low-impedance interference sources. The resistive damping elements Ri can have impedances, particularly resistive resistances, within a wide impedance range. For example, the resistive damping elements Ri can have a resistance in a range from 10 £2 to 1000 £2, particularly from 20 £2 to 500 £2.

[0100] The ohmic damping elements Ri can, for example, have an ohmic resistance of 300 £2. An exemplary impedance of the choke Di has an absolute value of at least 900 £2, in particular of at least 1500 £2, in particular of at least 3000 £2, in particular of at least 6000 £2 for asymmetrical interference currents. For symmetrical interference currents, the choke Di has an absolute value of the impedance of at most 100 £2, in particular of at most 60 £2, in particular of at most 30 £2, in particular of at most 15 £2, in particular of at most 7.5 £2, in particular of at most 1 £2. The impedance of the analysis circuit Ai is negligible in the active circuit for symmetrical interference voltage components.

[0101] The ohmic damping elements R2 can, for example, have an ohmic resistance of 75 £2. An exemplary impedance of the choke D2 has an absolute value of at least 225 £2, in particular of at least 375 £2, in particular of at least 450 £2, in particular of at least 750 £2, in particular of at least 1500 £2, in particular of at least 3000 £2 for symmetrical interference currents. For asymmetrical interference currents, the choke D2 has an absolute value of the impedance of at most 25 £2, in particular of at most 20 £2, in particular of at most 15 £2, in particular of at most 7.5 £2, in particular of at most 1 £2. The impedance of the analysis circuit A2 is negligible in the active circuit for asymmetrical interference voltage components.

[0102] The ohmic attenuation elements R3 can have a resistance corresponding to the measuring resistors RM, for example, 50 µM. In the active circuit of the analysis circuit A3, the terminating impedance is halved from the perspective of device 2. The series-connected analysis circuits Ai can be switched independently of one another into the respective active circuit or passive circuit. To perform measurements, for example, one of the analysis circuits Ai can always be switched in the active circuit and the other analysis circuits Ai in the passive circuit. To perform a basic measurement, all analysis circuits Ai can be switched in the passive circuit. However, it is also possible to combine different active circuits Ai in the active position in order to attenuate different components of the interference voltages together.In the illustrated embodiment, the switching of the analysis circuits Ai using the switching elements Si is controlled by the control unit 7. In other embodiments not shown, the analysis circuits Ai can be manually switched from the passive mode to the active mode and back. For example, the switching elements Si can be switched manually.

[0103] Fig. 6 schematically shows the process flow of an analysis method 20 for analyzing disturbances in an electronic device. The analysis method 2 can be performed, for example, using the device 1 on the device 2. The analysis method is described below, first in general terms and then using a specific example.

[0104] In a provision step 21, a device to be analyzed, a network simulation, and at least one ohmic damping element are provided. The network simulation and the at least one ohmic damping element can be provided, for example, in the form of the device 1 described above.

[0105] In a connection step 22, the device to be analyzed is connected to the network emulation. For example, device 2 can be connected to device port 4 of device 1.

[0106] In a basic measurement step 23, interference voltages attributable to the electronic device 2 are extracted and detected by means of the network simulation. The basic measurement step 23 can, for example, be carried out using the device 1, wherein the analysis circuits Ai are each connected in passive mode. In addition to the basic measurement step 23, at least one analysis measurement step 24 takes place. In the exemplary embodiment shown, the at least one analysis measurement step 24 takes place after the basic measurement step 23. In general, the basic measurement step 23 and the at least one analysis measurement step 24 can take place in any order. In particular, the at least one analysis measurement step 24 can take place before the basic measurement step 23.

[0107] In the at least one analysis measurement step 24, at least one of the at least one damping element is connected between the network emulation and the device in a switching step 25. The switching step 25 can be performed, for example, by switching the respective analysis circuit Ai in the device 1 from the passive circuit to the active circuit. After the switching step 25, at least one interference voltage attributable to the electronic device is extracted by means of the network emulation and detected in a detection step 26.

[0108] By interposing at least one resistive damping element between the network and the device, the device's termination impedance changes. In the various measurement steps, the interference voltage is therefore measured with different termination impedances. The basic measurement step 23 and the at least one analysis measurement step 24 therefore represent independent measurements for interference voltages, which enable the independent determination of interference variables, in particular the interference voltage source and the interference impedance.

[0109] The analysis method 20 can comprise performing multiple analysis measurement steps 24, as represented by the repetition loop 27. Different analysis measurement steps can differ in the interposition of different resistive damping elements. Performing multiple analysis measurement steps 24 is particularly useful for determining different disturbance components independently of one another.

[0110] In at least one analysis measurement step 24, at least one of the at least one resistive damping element can be connected in series with the embedding network relative to the device. This increases the terminating impedance from the device's perspective. The at least one resistive damping element connected in series between the embedding network and the device acts as a voltage divider.

[0111] Preferably, at least one analysis measurement step 24 is performed with a common-mode choke connected in parallel to the at least one resistive damping element. The voltage divider resulting from the interposed resistive damping element acts only on asymmetrical interference voltage components. A further analysis measurement step 24 can, in particular, be performed with a differential-mode choke connected in parallel to the at least one resistive damping element. The resulting voltage divider acts only on the symmetrical interference voltage components. In this way, symmetrical and asymmetrical interference voltage components can be attenuated independently of one another in separate analysis measurement steps 24.

[0112] Optionally, a further analysis measurement step 24 can be performed, in which at least one resistive damping element is connected in parallel to the artificial network from the device's perspective. The parallel-connected damping element reduces the terminating impedance from the device's perspective. The reduction in the terminating impedance is advantageous for the analysis of high-impedance and / or low-impedance interference sources. For high-impedance interference sources, the at least one detected interference voltage remains essentially unchanged compared to the basic measurement step 23. For low-impedance interference voltage sources, the at least one detected interference voltage decreases relative to the at least one interference voltage detected in the basic measurement step 23 by the factor by which the terminating impedance is reduced due to the at least one resistive damping element connected in parallel to the artificial network.For high-impedance and / or low-impedance interference sources, it is advantageous to perform at least one analysis measurement step 24 with an ohmic damping element connected in parallel to the network simulation, in addition to analysis measurement steps 24 with ohmic damping elements connected in series. This allows, in particular, the accuracy of the measurement to be verified for high-impedance and / or low-impedance interference sources.

[0113] After performing the basic measurement step 23 and the at least one analysis measurement step 24, an evaluation step 28 follows. In the evaluation step 28, the interference voltage components determined in the basic measurement step 23 and the at least one analysis measurement step 24 are evaluated to determine the interference variables of the device. Due to the independent measurement performed on the basis of the at least one verification measurement step 24, both the interference impedance and the interference voltage amplitude of the device can be determined independently of one another. If multiple analysis measurement steps are performed, for example for symmetrical and asymmetrical interference voltage components, the respective symmetrical or asymmetrical components of the interference impedance and interference voltage amplitude can be determined independently of one another. The evaluation therefore enables a precise characterization of the interference source of the device.

[0114] The evaluation step 28 is followed by a filter synthesis step 29. Based on the detected interference variables, suitable filters are determined to suppress interference in the device. Particularly if asymmetric and symmetric components of the interference variables, especially the interference impedance and the interference voltage amplitude, have been determined, suitable filter measures can be determined to reliably attenuate the respective interference components. This method enables the precise and reproducible determination of suitable interference filters.

[0115] In the following, a concrete example of the analysis method 20 using the device 1 is described.

[0116] In provisioning step 21, device 2 and device 1 are provided. In connection step 22, device 1 is connected to the power grid via network connection 3. Device 2 is connected to device 1 via device connection 4.

[0117] To carry out the basic measurement step 23, the analysis circuits Ai are switched to the respective passive circuit.

[0118] Fig. 7 shows an equivalent circuit diagram for the measurement setup of the basic measurement step 23. The equivalent circuit diagram shows a schematic circuit arrangement for measuring the disturbances of device 2. Device 2 is shown schematically as an equivalent circuit with several disturbances. In the equivalent circuit for the device, its disturbances are represented as ideal disturbance voltage sources U s and their respective interference impedances Z s The disturbances are further divided into symmetrical and asymmetrical disturbance components. Therefore, the following disturbances are assigned to the device: symmetrical disturbance voltage source U s sy m, asymmetrical interference voltage source U s asy m, symmetrical interference impedance Z s sy m and asymmetric interference impedance Z s a sym . The symmetrical interference voltage values ​​U s sym and Z s sym are distributed between the two network wires L, N. Here and in the following, for the sake of easier assignment, the interference voltage sources and the interference voltage amplitudes attributable to them are denoted by the same symbol. For example, U s ' sym the symmetrical interference voltage source and its interference voltage amplitude.

[0119] In the equivalent circuit diagram, the network simulation 9 is shown in simplified form as an ohmic measuring resistor RM. The network simulation 9 extracts the asymmetrical interference voltages U unsym, U unsym. With the aid of the extended network simulation, in particular the switching matrix 10, the asymmetrical, symmetrical, and asymmetrical interference voltage components are extracted in the basic measurement step 23. The extracted interference voltage components are recorded using the control unit 7. Therefore, when performing the basic measurement step, the following interference voltage quantities are recorded: U L un sym (G), U N U nsym (G), Usym (G), and Uasym (G). The G in parentheses indicates the interference voltage terms recorded in the basic measurement step.

[0120] To perform the first analysis measurement step, the analysis circuit A2 is switched from passive to active mode. The analysis circuit A2 is in active mode.

[0121] The analysis circuit A2 is used to attenuate symmetrical interference voltage components. This allows the symmetrical interference components to be determined. For this purpose, the symmetrical interference voltage U is measured in the analysis measurement step 24. sym measured. The other interference voltage components can optionally also be extracted and recorded. When the analysis circuit A2 is activated, the interference voltage components are extracted and recorded by the control unit. The control unit 7 records the interference voltage components U L un sym (A2), U N unsym (A2), U sym (A2) and U asym (A2). The A2 in parentheses indicates that the noise components were obtained while the analysis circuit A2 was in active mode.

[0122] An equivalent circuit diagram for measuring the symmetrical interference voltage is shown in Fig. 8. The equivalent circuit diagram according to Fig. 8 is based on the equivalent circuit diagram for the basic measurement step 23 shown in Fig. 7. The analysis circuit A2 is shown in the active circuit between the device 2 and the network 9. In the active circuit, the analysis circuit A2 has a damping impedance ZA2, which results from the interposed ohmic damping elements R2 and the choke D2 connected in parallel. The damping impedance ZA2 is known.

[0123] The symmetrical interference voltage component U symis located between the two mains wires, i.e., between the outer conductor L and the neutral conductor N. For symmetrical interference voltage components, the choke D2 has a significantly higher impedance than the resistive damping elements R-2. The known damping impedance ZA2 therefore essentially corresponds to the resistance of the resistive damping elements R2.

[0124] Based on the basic measurement step 23 and the analysis measurement step 24 with the analysis circuit A2 in active circuit as well as the corresponding equivalent circuit diagrams, the symmetrical interference voltage source U s sy m and the symmetrical interference impedance Z s sy m can be determined numerically.

[0125] For the analytical determination of the symmetrical disturbances, the equivalent circuit shown in Fig. 8 can be simplified. The asymmetrical disturbance voltage source U s asym can be considered short-circuited and the asymmetrical interference impedance Zs asy m can be assumed to be negligible. This results in the simplified equivalent circuit shown in Fig. 9. From this, the following formulas can be used to determine the amplitude of the symmetrical interference voltage source U s sym and the symmetrical interference impedance Z s sym derive:

[0126] The determination of the symmetrical disturbances can be carried out subsequently in the evaluation step 28.

[0127] For a further analysis measurement step 24, the analysis circuit A2 is switched from active to passive mode. The analysis circuit Ai is switched from passive to active mode. The resistive damping elements Ri and the choke Di connected in parallel are connected between the embedding network 9 and the device 2.

[0128] The analysis circuit Ai is used to attenuate the asymmetrical interference voltage components. This allows the asymmetrical interference components to be determined. For this purpose, the asymmetrical interference voltage U is measured in the analysis measurement step 24. asy m. The other interference voltage components can also be optionally extracted and recorded. The interference voltage components are extracted and recorded by control unit 7. The following interference voltage components are recorded: U L un sym (Ai), U N un sym (Ai), U sy m (Ai) and U asy m (Ai). The Ai in parentheses indicates that the noise components were detected while the analysis circuit Ai was in the active position.

[0129] An equivalent circuit diagram for measuring the asymmetric interference voltage is shown in Fig. 10. The active connection of the analysis circuit Ai results in an effective damping impedance ZAi, which is due to the ohmic damping elements Ri and the choke Di connected in parallel. Based on the basic measurement step 23 and the analysis measurement step 24 with the analysis circuit Ai in active connection as well as the corresponding equivalent circuit diagrams, the amplitude of the asymmetric interference voltage source U can be determined from the detected interference voltages. s asy m and the asymmetrical interference impedance Z s asy m can be determined numerically.

[0130] For analytical calculation of the asymmetrical disturbances, the equivalent circuit can be simplified. For this purpose, the symmetrical disturbance voltage source U s sy m is assumed to be short-circuited. The symmetrical interference impedance Z s sym goes into the asymmetrical interference impedance Z s aS ym. The measuring impedance of the measuring resistors RM and the damping impedance ZAi are halved. From the sum of the asymmetrical interference voltage components U acting against earth, L unsym and U N un sym results in the asymmetrical interference voltage Uasym. This results in the simplified equivalent circuit in Fig. 11. From this, the following formulas for the asymmetrical interference voltage quantities can be derived:

[0131] The two measurement steps described above are sufficient to characterize the disturbances. As can be seen from the calculation examples above, measuring the following disturbance voltages is sufficient to determine the disturbances: U sy m (G), U aS ym (G), Usym (A2), and Uasym (Ai). Based on the determined disturbances, suitable filters can be determined to suppress the device's interference.

[0132] Particularly for very high- or low-impedance interference sources, a further analysis measurement step 24 can be performed. For this purpose, the analysis circuit Ai is switched to passive mode. Circuit A3 is switched from passive mode to active mode. The resistive damping elements R3 are connected in parallel with the embedding network 9 from the perspective of device 2. The terminating impedance for device 2 is reduced.

[0133] When the analysis circuit A3 is activated, the interference voltage components are extracted and detected by the control unit 7. The control unit 7 detects the interference voltage components U L unsym (A3), U N U nsym (A3), U S ym (A3) and Uasym (A3). A3 in parentheses indicates that the interference voltage components were obtained while the analysis circuit A3 was in the active mode. An equivalent circuit diagram for the active mode of the analysis circuit A3 is shown in Fig.

[0134] 12. Due to measurement inaccuracies, it is difficult to quantify very low- or very high-impedance interferers. Very low- and very high-impedance interferers cannot always be reliably distinguished using the interference voltages coupled out by the analysis circuits Ai and A2. However, for the suppression of very high- or very low-impedance interferers, their exact quantification is not required. Characterizing them as very high- or very low-impedance is sufficient. In the active circuit of the analysis circuit A3, the resistive damping elements R3 are connected in parallel with the embedding network 9. This reduces the terminating impedance from the perspective of device 2. For very low-impedance interferers, this essentially does not change the measured values ​​obtained. For very high-impedance interferers, the measured value obtained changes essentially by the factor by which the terminating impedance is reduced. The reduction factor k is calculated using the formula:

[0135] After identifying very high or very low impedance interferers, appropriate filtering measures can be taken.

[0136] The following is a concrete numerical example for the analysis of disturbances. The following disturbances are assumed at a measurement frequency of 150 kHz: Z sym 10 £2, Z S asym = 1000 £2, U s S ym = 1 Vrms and U s asym = 10 Vrms. The measuring resistors RM each have a resistance of 50 £2. The ohmic damping elements R2 of the analysis circuit A2 each have a resistance of 75 £2. The impedance of the choke D2 is assumed to be negligible (Z(Ü2) » R2), according to which the damping impedance ZA2 = 75 £2 for symmetrical interference voltage components. The ohmic damping elements Ri of the analysis circuit Ai each have a resistance of 300 £2. With an inductance of the choke Di of 1 mH, a damping impedance of ZAi = 148 £2 results at a measuring frequency of 150 kHz. The ohmic damping elements R3 each have a resistance of 50 £2. The capacitance of capacitors C3 should be large enough that their capacitive impedance at 150 kHz is negligibly small compared to R3. The measurements yield the following values: U sy m (G) = 833 mV, U asy m (G) = 242.6 mV, Usym (A2) = 370.5 mV and U asym (Ai) = 212.4 mV. Based on the above analytical equations, the following values ​​for the disturbances are approximately obtained: Z s sy m = 10.08 Q, Z S asym = 1012 Q, U s sym = 1.0 Vrms and U s aS ym = 10.11 Vrms. The method provides accurate and reliable values ​​for the disturbances being analyzed.

[0137] In the active circuit of the analysis circuit A3 one obtains the measuring devices U sy m (A3) = 741.1 mV and U a s ym (A3) = 122.8 mV. When compared with the value obtained in the basic measurement step, Usym is reduced to 86% of the symmetrical interference voltage amplitudes determined in the basic measurement step. This confirms the above analysis, according to which the symmetrical interference impedance is low (Z s sy m = 10.08 fi). For U a s ym(A3) a reduction to 51% of the asymmetrical interference voltage amplitude determined in the basic measurement step is obtained. This confirms the above analysis, according to which the asymmetrical interference voltage source is a high-impedance interference voltage source (Z s asy n= 1012 fi).

[0138] With reference to Figs. 13 to 15, a further embodiment of a device 1a for analyzing disturbance variables of the electronic device 2 and an exemplary procedure for this analysis are described. Components that have already been described with reference to the embodiment in the preceding figures bear the same reference numerals and will not be explained in detail again. Components that are functionally identical but structurally differently designed bear the corresponding reference numeral followed by an "a."

[0139] The circuit arrangement shown in Fig. 13 corresponds to the circuit arrangement shown in Fig. 2, i.e., details of the extended network simulation 5 and the control unit 7, as well as the power supply, are not shown. The device 1a differs from the device 1 only in the design of the analysis unit 6a.

[0140] The analysis unit 6a has three analysis circuits A4, A5, Ae, which are collectively designated Aj, where j = 4, 5, 6. The analysis circuits Aj have respective ohmic damping elements Rj, which are connected in parallel to the network emulation 9 in the respective active circuit with respect to the terminals 4L, 4N.

[0141] The ohmic damping elements Rj are ohmic resistors, in particular with a resistance of 50 Q. The ohmic damping elements Rj can be connected via respective switching elements Sj and capacitors Ci to supply lines that connect the network simulation 9 to the device terminals 4L, 4N by closing the respective switching elements Sj.

[0142] The analysis circuits Aj each have capacitors Cj, which are connected in series with the respective resistive damping elements Rj in the active circuit. The capacitors Cj attenuate the technical frequencies. For example, the capacitors Cj can each have a capacitance of 250 nF.

[0143] The analysis circuit A4 has a single resistive damping element R4, which is connected to terminals 4L and 4N in the active circuit via the respective switching elements S4 and capacitors C4. In the active circuit of the analysis circuit A4, the terminals 4L and 4N are therefore connected via the resistive damping element R4. In the active circuit, the analysis circuit A4 serves to attenuate the symmetrical interference voltage components.

[0144] The analysis circuit A5 has two resistive damping elements R5 connected in series with a choke D5. The coils of the choke D5 can each have an inductance of 150 pH, for example. The choke D5 has a high impedance for symmetrical interference voltage components and a low impedance for asymmetrical interference voltage components. Thus, the resistive damping elements R5 primarily act on asymmetrical interference voltage components. In the active circuit of the analysis circuit A5, the extracted interference voltage components are grounded via the resistive damping elements R5.

[0145] The analysis circuit Ae is essentially identical in design to the analysis circuit A5, except that a choke is omitted. The analysis circuit Ae therefore does not selectively target individual interference voltage components. The analysis circuit Ae attenuates asymmetrical interference voltage components.

[0146] The following describes a procedure for analyzing the disturbances of device 2 using the device 1a. First, a basic measurement step is carried out in which the asymmetrical disturbance voltages U L un s y m, Um Sy m and converted into asymmetric, symmetric, and asymmetric interference voltage components using the switching matrix 10. Therefore, the following interference voltage quantities are recorded in the basic measurement step: U L un s y m (G),

[0147] U us y m (G), Usym (G), and Uasym (G). The basic measurement step corresponds to the basic measurement step performed with device 1.

[0148] To determine the symmetrical disturbances, the analysis circuit A4 is activated in an analysis measurement step in which the switches S4 are closed. The disturbance voltage components U L un sym (A4),

[0149] U unsym (A4), Usym (A4) and Uasym (A4) are recorded.

[0150] For further evaluation of the symmetrical disturbances, the equivalent circuit shown in Figure 14 can be derived in the active circuit of the analysis circuit A4. The following applies:

[0151] Accordingly, the amplitudes of the symmetrical interference voltage source U s sy m and the symmetrical interference impedance Z s sy m as follows:

[0152] After the measurement has been completed, switches S4 are opened again and the analysis circuit A5 is deactivated. To determine the asymmetrical disturbance components, the analysis circuit As is activated in a further analysis measurement step by closing switches Ss. The following disturbance voltage values ​​are recorded using control unit 7: U L un - sym (A-flat), U Nunsym (As), Usym (As), and Uasym (As). To evaluate the asymmetrical disturbance components, the simplified equivalent circuit shown in Fig. 15 can be used when the analysis circuit As is activated. The amplitudes of the asymmetrical disturbance voltage source U S asym and the asymmetrical interference impedance Z s aS ym result in: where-, R R M' R 5

[0153] R M+ R 5 (H)

[0154] The analysis circuits A4 and As allow the symmetrical and asymmetrical disturbance components to be clearly determined through respective analysis and measurement steps. Thus, an analysis of the disturbances of device 2 is already possible using a device that only has the analysis circuits A4 and As. In addition, an analysis and measurement step can be performed using the analysis circuit Ae, for example, to quantify very low- or very high-impedance disturbances.

[0155] It is also possible to use the analysis circuit Ae instead of the analysis circuit As to determine the asymmetrical interference components. As explained, the analysis circuit Ae attenuates asymmetrical interference voltage components in its active circuit. With the aid of a selective amplifier formed by the switching matrix 10 and the amplifier system 11, the asymmetrical interference voltage Uasym (Ae) can be extracted even when the asymmetrical interference voltage components are attenuated in order to determine the asymmetrical interference variables. Since the analysis circuit Ae differs essentially only in the omission of the choke D5 from the analysis circuit A5, a corresponding equivalent circuit diagram as in Fig. 15 and corresponding formulas can be derived, whereby only R5 would have to be replaced by R6.By using a suitable selective amplifier, a complete characterization of the interference voltage sources and interference impedances can be performed with a device containing only the analysis circuits A4 and Ae. This has the advantage of eliminating the need for an analysis circuit with an expensive and heavy choke. This reduces the cost and size of the analysis unit.

[0156] As explained, resistive damping elements connected in parallel to the network simulation can be combined with chokes to selectively damp different interference voltage components. Figures 16 and 17 show further embodiments of analysis circuits A7 and As, respectively, in which chokes D7 and Ds are connected in parallel and in series with the respective resistive damping elements R7 and Rs, respectively. The analysis circuits A7 and As can be combined with the other analysis circuits of the previously described embodiments. For example, the analysis circuit A7 or As can be used instead of the analysis circuit A3.

Claims

Patent claims 1. Device for analyzing disturbances of an electronic device, comprising at least one connection (4L, 4N) for a device (2) to be analyzed, a network simulation (9) for coupling out at least one disturbance voltage (U L un sym, U unsym, Usym, Uasym) and at least one analysis circuit (Ai) for connecting the at least one terminal (4L, 4N) to the network simulation (9), wherein the at least one analysis circuit (Ai) — at least one resistive damping element (Ri) and — at least one switching element (Si) for switching the analysis circuit (Ai) between — an active circuit in which the at least one ohmic damping element (Ri) is connected between the at least one terminal (4L, 4N) and the network simulation (9), and — a passive circuit in which the at least one ohmic damping element (Ri) is not connected between the at least one terminal (4L, 4N) and the network simulation (9).

2. Device according to claim 1, characterized in that the at least one ohmic damping element (Ri, R2) in the respective active circuit is connected in series with the network simulation (9) with respect to the at least one terminal (4L, 4N).

3. Device according to at least one of the preceding claims, characterized in that the at least one ohmic damping element (R3; R4, Rs, Re; R7; Rs) in the respective active circuit is connected in parallel to the network simulation (9) with respect to the at least one terminal (4L, 4N).

4. Device according to one of the preceding claims, characterized in that the at least one analysis circuit (A3; A4, A5, Ae; A7; Ag) has at least one capacitor (C3; C4, C5, Ce; C7; Cs) which is connected in series with the at least one ohmic damping element (R3; R4, Rs, Re; R7; Rs) in the respective active circuit.

5. Device according to at least one of the preceding claims, characterized in that the at least one analysis circuit (Ai, A2) has at least one bridging line (15) for bridging the at least one ohmic damping element (Ri, R2) in the respective passive circuit.

6. Device according to at least one of the preceding claims, characterized in that the at least one switching element (Si) has at least one switching element for switching between the active circuit and the passive circuit.

7. Device according to at least one of the preceding claims, characterized by a control unit (7) for the controlled switching, in particular switching, of the at least one analysis circuit (Ai) between the active circuit and the passive circuit.

8. Device according to at least one of the preceding claims, characterized by at least two connections (4L, 4N) for the device to be tested (2), wherein the at least one analysis circuit (Ai) has at least one ohmic damping element (Ri) for each connection (4L, 4N), which is connected in the active circuit of the respective analysis circuit (Ai) between the network simulation (9) and the respective connection (4L, 4N).

9. Device according to at least one of the preceding claims, characterized in that that the at least one analysis circuit (Ai, A2; A5; A7; Ag) has at least one choke (Di, D2; D5; D7; Ds) which is connected in the active circuit in particular in parallel to the at least one ohmic damping element (Ri, R2; R5; R7; Rs).

10. Device according to at least one of the preceding claims, characterized by at least two analysis circuits (Ai).

11. Device according to claim 10, characterized in that the at least two analysis circuits (Ai, A2) have different types of chokes (Di, D2).

12. Device according to at least one of claims 10 or 11, characterized in that the at least two analysis circuits (Ai) are connected in series between the network simulation (9) and the at least one terminal (4L, 4N).

13. Method for analyzing disturbances of an electronic device, comprising the steps: Provide — a device to be analyzed (2), — a network simulation (9) and — at least one resistive damping element (Ri), connecting the device (2) to the network (9), Carrying out a basic measuring step (23), wherein at least one interference voltage (U L un sym, U unsym, Usym, Uasym) is decoupled and recorded by means of the network simulation (9), Carrying out at least one analysis measurement step (24), wherein in each case — at least one of the at least one damping element (Ri) is connected between the network simulation (9) and the device (2) and — at least one interference voltage (U L un sym, U N un - sym, Usym, Uasym) is decoupled and recorded by means of the network simulation (9), and Evaluating the interference voltages (U L un sym, U unsym, Usym, Uasym) for determining disturbance variables (Z s sy m, Z asym, U sym, U S asym) of the device (2).

14. The method according to claim 13, characterized in that in order to carry out at least one of the at least one analysis-measurement step (24), at least one choke (Di, D2) is connected between the network simulation (9) and the device (2) in parallel with the at least one damping element (Ri, R2).

15. Method according to at least one of claims 13 or 14, characterized in that at least two analysis measuring steps (24) are carried out, wherein different damping elements (Ri) and / or different chokes (Di, D2) connected in parallel to the at least one damping element (Ri, R2) are connected between the network simulation (9) and the device (2).

16. Method according to at least one of claims 13 to 15, characterized in that in order to carry out at least one of the at least one analysis measuring step (24), at least one of the at least one ohmic damping element (R3) is connected in parallel to the network simulation (9) with respect to the device (2).

17. Method according to at least one of claims 13 to 16, characterized in that filters for suppressing interference in the device (2) are determined on the basis of the determined interference variables.

Citation Information

Patent Citations

  • Device and method for analyzing disturbances of an electronic device

    DE102024202219A1

  • Electromagnetic interference wave measuring apparatus and electromagnetic interference wave evaluating system

    JP2014038016A

  • Conduction disturbing wave measurement device

    JP2017129503A

  • Signal Detector

    US20080116996A1