Semiconductor device and method for manufacturing semiconductor device

Abstract

Provided is a semiconductor device wherein noise that is produced in a transmission signal between semiconductor chips, or heat generation in a transmission part, is reduced in a system-in-package (SiP). This semiconductor device comprises a substrate 15, a plurality of semiconductors that are mounted on the substrate 15, and a plurality of wiring parts 20 that are provided on the substrate 15 or in the substrate 15. Each wiring part 20 has a conductor 21 that electrically connects each of the semiconductor chips to each other, and an insulator 22 that covers the conductor 21. In this semiconductor device, an air gap G is provided between adjacent wiring parts 20. In this method for manufacturing a semiconductor device, it is suitable to use, for example, a positive-type photosensitive insulating material as the insulator 22.

Description

Semiconductor device and method for manufacturing the same

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the semiconductor device, and more particularly to a semiconductor device using a system in package (SiP) in which multiple semiconductor chips are integrated in a single package, and a method for manufacturing the same.

[0002] Japanese Patent Application Laid-Open No. 2003-124222 discloses a semiconductor device to which a so-called SiP is applied, in which semiconductor chips with different functions are connected together within a package.

[0003] Special Publication No. 2021-512498

[0004] In a semiconductor device to which SiP is applied, the conductors that connect the semiconductor chips to each other are embedded in the substrate or the insulating resin that forms the wiring layer. In such a semiconductor device, it is desirable to reduce the intrusion of noise into the transmission signals that occurs as the processing speed of the semiconductor chip increases.

[0005] [1] One aspect of the present disclosure relates to a semiconductor device. The semiconductor device includes a substrate, a first semiconductor chip and a second semiconductor chip attached to the substrate, and a first wiring portion and a second wiring portion provided on or within the substrate. The first wiring portion includes a first conductor electrically connecting the first semiconductor chip and the second semiconductor chip and a first insulator covering the first conductor. The second wiring portion includes a second conductor electrically connecting the first semiconductor chip and the second semiconductor chip and a second insulator covering the second conductor. In this semiconductor device, an air gap is provided between the first wiring portion and the second wiring portion.

[0006] In a semiconductor device employing SiP, reducing the dielectric constant and dielectric loss of the resin material covering the conductor wiring can reduce noise intrusion into the transmission signal flowing through the conductor. However, significantly reducing the dielectric constant of the resin material is not easy. Therefore, in this semiconductor device, an air gap made of air with low dielectric constant and dielectric loss is provided between the first wiring section and the second wiring section. This reduces noise intrusion into the transmission signal in the wiring section connecting the semiconductor chips. Furthermore, providing an air gap between the first wiring section and the second wiring section can also suppress heat generation in each wiring section.

[0007] [2] In the semiconductor device of [1] above, it is preferable that the air gap extends along the first wiring portion and the second wiring portion. In this case, it is possible to further reduce the intrusion of noise into electrical signals in the wiring portion connecting the semiconductor chips. It is also possible to suppress heat generation in the wiring portion along the longitudinal direction.

[0008] [3] In the semiconductor device of [1] or [2] above, the first conductor may be provided on a mounting surface, and the first insulator may cover a region around the first conductor excluding a region in contact with the mounting surface. In this case, the conductor is surrounded by the mounting surface and the resin, and the conductor can be protected from corrosion due to external factors.

[0009] [4] In the semiconductor device according to any one of [1] to [3] above, the first conductor may be provided on a mounting surface, and the first insulator may have a cross section that flares outward from both sides in a direction away from the mounting surface. In this case, the conductor is surrounded by the mounting surface and the resin, and the conductor can be protected from corrosion due to external factors.

[0010] [5] In the semiconductor device according to any one of [1] to [4] above, the first wiring portion and the second wiring portion may be provided on a substrate. In this case, each wiring portion is provided on an interposer, which is the substrate, and the semiconductor device can have a so-called 2.5D package structure.

[0011] [6] In the semiconductor device according to any one of [1] to [4] above, the first wiring portion and the second wiring portion may be provided in a substrate. In this case, the semiconductor device may be configured such that each wiring portion is provided in an embedded interposer or a redistribution layer (RDL layer) in the substrate.

[0012] [7] In any of the semiconductor devices described in [1] to [6] above, the width of the air gap may be narrower than the width of the first wiring portion. In this case, the width of the space can be narrowed, allowing for miniaturization of the semiconductor device. The width of the air gap may be wider than the width of the first wiring portion. In this case, the dielectric constant around the conductor that forms the wiring can be reliably reduced, thereby reliably reducing the intrusion of noise into transmission signals in the wiring portion connecting semiconductor chips. Furthermore, heat generation in the wiring portion can also be reliably suppressed.

[0013] [8] Another aspect of the present disclosure relates to a method for manufacturing a semiconductor device. The method for manufacturing a semiconductor device includes the steps of preparing a first semiconductor chip, a second semiconductor chip, and a substrate; providing a first wiring portion and a second wiring portion on or within the substrate; and attaching the first semiconductor chip and the second semiconductor chip to the substrate. The first wiring portion includes a first conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a first insulator that covers the first conductor. The second wiring portion includes a second conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a second insulator that covers the second conductor. In this method for manufacturing a semiconductor device, an air gap is provided between the first wiring portion and the second wiring portion.

[0014] In this semiconductor device manufacturing method, an air gap made of air with low dielectric constant and dielectric loss is provided between the first wiring portion and the second wiring portion. This reduces the intrusion of noise into transmission signals in the wiring portion connecting the semiconductor chips. Furthermore, the provision of the air gap also reduces heat generation in the wiring portion.

[0015] [9] In the method for manufacturing a semiconductor device according to [8] above, the step of providing the first wiring portion and the second wiring portion may include the steps of forming a first conductor and a second conductor on a mounting surface of the substrate, forming an insulating film so as to cover the first conductor and the second conductor, and removing at least an intermediate portion of the insulating film located between the first wiring portion and the second wiring portion to form a first insulator, a second insulator, and an air gap. In this case, the wiring portion can be provided directly on the substrate or the like.

[0016]

[10] In the semiconductor device manufacturing method of [8] above, the step of providing the first wiring portion and the second wiring portion may include the steps of forming the first conductor and the second conductor on another substrate provided with a release layer, forming an insulating film to cover the first conductor and the second conductor, removing at least an intermediate portion of the insulating film located between the first wiring portion and the second wiring portion to form a first insulator, a second insulator, and an air gap, separating the other substrate from the wiring body including the first wiring portion and the second wiring portion with the air gap formed therebetween at the release layer, and attaching the wiring body to at least one of the substrate and the substrate. In this case, the wiring body including the wiring portion can be fabricated in advance, and the semiconductor device can be manufactured using the fabricated wiring body. This prevents a decrease in yield due to defects during the fabrication of the wiring body.

[0017]

[11] In the method for manufacturing a semiconductor device according to [9] or

[10] above, the substrate or another substrate is preferably a glass substrate or a light-transmitting substrate. In the step of forming an insulating film, the insulating film is formed so as to cover the first conductor and the second conductor with a photosensitive resin composition. Then, in the step of forming an air gap, the insulating film is exposed from the substrate side or the other substrate side toward the insulating film, followed by development to form the air gap. In this case, the conductor can be used as a mask to form the air gap. Furthermore, a configuration in which the periphery of the wiring portion is covered with resin can be easily formed.

[0018]

[12] In the method for manufacturing a semiconductor device according to any one of [9] to

[11] above, in the step of forming the air gap, the first insulator may have a flared shape with both sides widening in a direction away from the surface on which the first conductor is provided, by removing a middle portion thereof. In this case, the periphery of the wiring portion can be more reliably covered with resin.

[0019] According to the present disclosure, it is possible to reduce the intrusion of noise into transmission signals in a SiP.

[0020] Fig. 1 is a plan view showing a semiconductor device according to this embodiment. Fig. 2 is an enlarged view showing a region II including a wiring portion in the semiconductor device shown in Fig. 1. Fig. 3 is a cross-sectional view sequentially showing a method for forming the wiring portion shown in Fig. 2. Fig. 4 is a cross-sectional view showing an example of a semiconductor device according to this embodiment. Fig. 5 is a plan view and a cross-sectional view showing another example of a method for forming a wiring portion in the semiconductor device according to this embodiment.

[0021] Hereinafter, several embodiments of the present disclosure will be described in detail, with reference to the drawings as necessary. In the following description, identical or equivalent parts will be designated by the same reference numerals, and duplicate explanations will be omitted. Furthermore, positional relationships such as up, down, left, and right will be based on the positional relationships shown in the drawings unless otherwise specified. When terms such as "left," "right," "front," "back," "top," "bottom," "upper," and "lower" are used in the description and claims of this specification, these are intended for explanatory purposes and do not necessarily mean that these relative positions will always be the same. Furthermore, the dimensional ratios of the drawings are not limited to those shown in the drawings.

[0022] In this specification, the term "layer" or "film" encompasses not only a structure with a shape formed over the entire surface when observed in a plan view, but also a structure with a shape formed on a portion of the surface. In this specification, the term "process" includes not only an independent process, but also a process that cannot be clearly distinguished from other processes, as long as the intended effect of the process is achieved. A numerical range indicated using "to" indicates a range that includes the numerical values ​​before and after "to" as the minimum and maximum values, respectively.

[0023] (Configuration of Semiconductor Device) FIG. 1 is a cross-sectional view schematically illustrating an example of a semiconductor device according to this embodiment. As shown in FIG. 1, the semiconductor device 1 includes multiple semiconductor chips 10-13 (first semiconductor chip, second semiconductor chip), a substrate 15, and multiple wiring sections 20 (first wiring section, second wiring section). The semiconductor device 1 is formed as a system-in-package (SiP) in which the multiple semiconductor chips 10-13 are connected to each other within the package. In a SiP, each semiconductor chip is smaller than a system-on-chip (SoC), which facilitates improving the manufacturing yield of each semiconductor chip and, therefore, the yield of the semiconductor device as a whole. Furthermore, in a SiP, cutting-edge microprocessing only needs to be applied to the necessary semiconductor chips, which facilitates improving the manufacturing yield and facilitating rapid semiconductor device design. Furthermore, in a SiP, the individual semiconductor chips are separated, which also reduces heat generation from each semiconductor chip.

[0024] The semiconductor chips 10-13 are, for example, semiconductor chips such as LSI (Large Scale Integrated Circuit) chips and CMOS (Complementary Metal Oxide Semiconductor) sensors. The semiconductor chips 10-13 may have different functions, or some of the semiconductor chips may share the same functions. The semiconductor chips 10-13 are mounted on the surface 15a (mounting surface) of the substrate 15. The semiconductor chips 10-13 are electrically connected to each other by wiring portions 20. Note that while the example shown in FIG. 1 discloses an example in which four semiconductor chips 10-13 are mounted, the number of semiconductor chips mounted on the substrate 15 is not limited to this and may be two or more.

[0025] The substrate 15 is an interposer or a package substrate, and may be a glass substrate, a light-transmitting substrate (for example, a transparent plastic film), or the like.

[0026] The wiring section 20 is a wiring member that connects the semiconductor chips 10 to 13 to one another. As shown in FIG. 2 , each wiring section 20 includes a conductor 21 (first conductor, second conductor) that electrically connects the semiconductor chips 10 to 13 (e.g., the semiconductor chip 10 and the semiconductor chip 11) and an insulator 22 (first insulator, second insulator) that covers the conductor 21. The insulator 22 extends along the longitudinal direction so as to cover the entire circumferential direction of the conductor 21 (except for the portion that contacts the surface 15a). The conductor 21 is formed, for example, from a conductive metal such as copper. The insulator 22 is formed, for example, from an insulating resin composition such as a cured product of a photocurable resin composition (photosensitive resin composition). The insulator 22 may also be formed from a thermosetting resin composition. The insulator 22 is formed from a resin composition containing a curable resin composition and a curing agent. The dielectric constant Dk of the resin that constitutes the insulator 22 is, for example, 2.0 to 4.0. The dielectric constant referred to here is the dielectric constant at 10 GHz.

[0027] Furthermore, an air gap G is provided between adjacent wiring portions 20. That is, an area of ​​air (dielectric constant of approximately 1.0) having a dielectric constant Dk significantly lower than that of general insulating resin is provided between the wiring portions 20. The air gap G extends in the longitudinal direction along the wiring portions 20. The width of the air gap G (the width in the vertical direction in FIG. 2 ) is not particularly limited, but may be narrower than the width of each wiring portion 20, or may be 1 or less times the width of the wiring portion 20, or may be 0.5 or less times the width of the wiring portion 20. The width of the wiring portion 20 here refers to, for example, the width of the widest portion (the right portion in FIG. 2 ). The width of the air gap G may be wider than the width of the wiring portion 20.

[0028] When viewed in cross section, such wiring portion 20 may have an overall rectangular shape, or may have a flared shape that widens in the direction away from surface 15a of substrate 15 (see part (b) in FIG. 2). This shape allows insulator 22 of wiring portion 20 to more reliably surround and protect conductor 21. Although two (a pair of) wiring portions 20 are disclosed in FIG. 2, the number of wiring portions 20 connecting semiconductor chips together is not limited to this.

[0029] (Method of Manufacturing Semiconductor Device) Next, an example of a method of manufacturing the semiconductor device 1 will be described with reference to Figure 1 and Figure 3. Figure 3 is a cross-sectional view showing an example of a method of forming the wiring portion 20 in sequence.

[0030] The semiconductor device 1 can be manufactured, for example, through the following steps (a) to (c): (a) a step of preparing a first semiconductor chip, a second semiconductor chip, and a substrate; (b) a step of providing a first wiring portion and a second wiring portion on or within the substrate; and (c) a step of attaching the first semiconductor chip and the second semiconductor chip to the substrate.

[0031] [Step (a)] In step (a), the semiconductor chips 10-13 and the substrate 15 that constitute the semiconductor device 1 are prepared. The semiconductor chips 10-13 are, for example, semiconductor chips such as LSI chips and CMOS sensors. The semiconductor chips 10-13 may have different functions, or may share some functions. The substrate 15 is an interposer or a package substrate. The substrate 15 may be a glass substrate or a light-transmitting substrate, and is preferably a substrate with a UV light transmittance of 80% or more. Note that, when UV irradiation (exposure) is performed from below in step (b3) described later, the substrate 15 is preferably formed from a material that is transparent to UV light.

[0032] [Step (b)] In step (b), each wiring portion 20 is provided on or within the substrate 15. Step (b) may be performed before or after step (c). In step (b), the following steps (b1) to (b3) are performed. (b1) A step of forming each conductor on the surface (mounting surface) of the substrate. (b2) A step of forming an insulating film so as to cover each conductor. (b3) A step of removing at least intermediate portions of the insulating film located between each wiring portion to form air gaps.

[0033] In step (b1), as shown in part (a) of FIG. 3, conductors 21 used in each wiring section 20 are formed at predetermined locations on the surface 15a of the substrate 15. The conductors 21 are conductive members for electrically connecting the semiconductor chips 10 to 13 (described later) to one another when the semiconductor chips are mounted. The conductors 21 are formed on the substrate 15 using, for example, a semi-additive method using copper or the like. They may also be formed by other methods. The conductors 21 may also be formed within the substrate 15 (on a surface provided inside the substrate 15).

[0034] In step (b2), as shown in part (b) of Fig. 3, an insulating film 23 is formed to cover each conductor 21. The insulating film 23 is formed by applying an insulating material containing a photocurable resin composition onto the substrate 15 so that each conductor 21 is buried in the insulating material. At this stage, the insulating film 23 is in an uncured or semi-cured state. The insulating material used here may be a liquid material or a film-like material.

[0035] In step (b3), after the resin is applied, UV light is irradiated onto the insulating film 23 for UV exposure, as shown in part (c) of FIG. 3 . Because UV light is irradiated from below (i.e., from the light-transmitting substrate 15 side), the conductors 21 function as a mask, and the areas where the light is blocked by the conductors 21 are not exposed. If the photocurable resin composition is a positive resist material, the exposed areas become more soluble in a developer. The insulating film 23 is then developed with a developer. As a result, the resin composition (intermediate portions) between the conductors 21 is removed, forming air gaps G, as shown in part (d) of FIG. 3 . When exposure is performed using the conductors 21 as a mask, the exposure state may change from the side closer to the UV exposure source to the side farther away. Taking advantage of this phenomenon, in the example shown in parts (c) and (d) of FIG. 3 , the exposed portions of the insulating film 23 are removed so that the insulator 22 has a flared shape that widens on both sides in a direction away from the installation surface (surface 15a) on which the conductors 21 are provided.

[0036] In step (b3), UV exposure may be performed from above the insulating film 23. In this case, a separate mask may be prepared and placed on the insulating film 23, allowing exposure and development to be performed in the same manner as described above. In this case, either a positive or negative photosensitive material may be used. In this case, the shape of the insulator 22 may be tapered or inversely tapered (flared).

[0037] Through the above-described steps (b1) to (b3), each wiring portion 20 is formed to have a conductor 21 that electrically connects each of the semiconductor chips 10 to 13 with each other, and an insulator 22 that covers the conductor 21. In addition, an air gap G is provided between adjacent wiring portions 20. The width of the air gap G is not particularly limited, but may be narrower than the width of each wiring portion 20, or may be 1 time or less, or 0.5 times or less. In addition, the width of the air gap G may be larger than the width of each wiring portion 20, or may be 1.5 times or more, or may be 2 times or more.

[0038] [Step (c)] Step (c) is a step of mounting (attaching) each of the semiconductor chips 10 to 13 at a predetermined position on the substrate 15. At this time, the semiconductor chips 10 to 13 are mounted on the substrate 15 so that they are connected to each other by their respective wiring portions 20.

[0039] As described above, according to the semiconductor device and its manufacturing method of this embodiment, air gaps G made of air with low dielectric constant and dielectric loss can be easily provided between the wiring portions 20. This makes it possible to reduce the intrusion of noise into the transmission signals in the wiring portions 20 connecting the semiconductor chips 10 to 13. The air gaps also make it possible to suppress heat generation in the wiring portions 20.

[0040] In the semiconductor device 1 and its manufacturing method according to this embodiment, the air gap G extends along each wiring portion 20. This further reduces the intrusion of noise into the transmission signals in the wiring portion 20 connecting the semiconductor chips 10 to 13. Moreover, heat generation in the wiring portion 20 can be further suppressed along the longitudinal direction.

[0041] In the semiconductor device 1 and its manufacturing method according to this embodiment, the conductor 21 is provided on the installation surface, and the insulator 22 covers the entire area around the conductor 21 except for the area that contacts the installation surface. As a result, the conductor 21 is surrounded by the installation surface and the resin, and the conductor 21 can be protected from corrosion due to external factors.

[0042] In the semiconductor device 1 and its manufacturing method according to this embodiment, the conductor 21 is provided on the mounting surface, and the insulator 22 has a cross section that flares outward from both sides in a direction away from the mounting surface. This allows the conductor 21 to be covered by the substrate 15 and the resin, protecting the conductor 21 from corrosion caused by external factors.

[0043] In the semiconductor device 1 and its manufacturing method according to this embodiment, the width of the air gap G may be narrower than the width of each wiring portion 20. In this case, the width of the space can be narrowed, allowing the semiconductor device to be miniaturized. Conversely, the width of the air gap G may be wider than the width of each wiring portion 20. In this case, the dielectric constant and the like around the conductor 21 that forms the wiring can be reliably reduced, thereby reliably reducing the intrusion of noise into the transmission signals in the wiring portion 20 that connects the semiconductor chips 10 to 13. Heat generation in the wiring portion 20 can also be reliably suppressed.

[0044] Although the embodiments of the semiconductor device and the manufacturing method thereof according to the present disclosure have been described in detail above, the present invention is not limited to the above embodiments and can be applied to various embodiments and modifications. For example, the above description has been given using a simple example in which a wiring portion 20 is provided on a substrate 15. However, as shown in FIG. 4 , the above-described wiring structure may also be applied to a semiconductor device 1A having semiconductor chips 10 and 11, an interposer 16 on which the semiconductor chips 10 and 11 are mounted, a package substrate 17 to which the interposer 16 is attached, and multiple bumps 18. The interposer 16 is, for example, a transparent glass substrate or a transparent resin substrate. In such a semiconductor device 1A, a wiring portion 20 is provided on the interposer 16 to connect the semiconductor chips 10 and 11 to each other.

[0045] 1 and 2, the wiring section 20 is provided on the substrate 15, but this is not limiting. That is, an embedded interposer may be provided in the substrate 15, and the above-described structure of the wiring section 20 may be applied to this interposer. Also, a rewiring layer (RDL layer) may be provided in the substrate 15, and the structure of the wiring section 20 may be applied to this rewiring layer. In these cases, the wiring section 20 provided in the substrate connects semiconductor chips to each other via vias or the like. Even in this case, the air gap G can prevent noise from entering the transmission signal and suppress heat generation.

[0046] 1 and 2, the wiring portion 20 is provided directly on the substrate 15, but the method for forming the wiring portion 20 is not limited to this. For example, parts (a) to (f) of FIG. 5 are plan views and cross-sectional views showing another example of a method for forming a wiring portion in the semiconductor device according to this embodiment. Note that each cross-sectional view in FIG. 5 shows a cross section of each plan view at the position indicated by A-A in part (a) of FIG. 5. In this method, a wiring body 50 including a wiring portion is formed separately, and the wiring body 50 is attached to the substrate 15.

[0047] In this method, as shown in part (a) of Fig. 5, an ITO film 32 is formed on a glass substrate 30 (another substrate) via a temporary fixing material 31 (a release layer). A plurality of electrode pads 33 are formed on the ITO film 32. Thereafter, as shown in part (b) of Fig. 5, a resin layer 34 is formed on the ITO film 32, and via holes 35 (VIA) connected to the electrode pads 33 are formed.

[0048] Next, as shown in part (c) of FIG. 5 , a wiring layer 36 is formed on the resin layer 34, and conductors 37 (first conductor, second conductor) are also formed. The wiring layer 36 and the conductors 37 are the same conductor layer, formed of, for example, copper. Then, as shown in part (d) of FIG. 5 , a resin layer 38 (insulating film) is formed on the wiring layer 36, and intermediate portions between the conductors 37 are removed to form insulators 38a (first insulator, second insulator) covering the top surfaces of the conductors 37. The insulators 38a on the conductors 37 may be formed using the exposure and development method described above, or by other methods. The insulators 38a may also cover the side surfaces of the conductors 37. By forming such insulators 38a, an air gap G is formed between the wiring portion (corresponding to the wiring portion 20 described above) formed including the conductors 37 and the insulators 38a thereon. In the example of FIG. 5 , three wiring portions are formed.

[0049] Next, as shown in part (e) of FIG. 5 , wiring 39 connecting the conductor 37 and the via hole 35 is formed. Then, as shown in part (f) of FIG. 5 , another resin layer 40 is formed on the resin layer 38 and the insulator 38a. The resin layer 40 is formed so as to close the air gap G (like a lid). As a result, a wiring body 50 is formed, with multiple wiring portions and air gaps G provided between the wiring portions. Thereafter, the glass substrate 30 is separated from the wiring body 50 by the temporary fixing material 31. The wiring body is then attached to the substrate so that each wiring portion connects each semiconductor chip. Using this method, the semiconductor device 1 shown in FIG. 1 may be fabricated, or a semiconductor device having the above-mentioned wiring portions embedded therein may be fabricated.

[0050] 1, 1A...semiconductor device, 10 to 13...semiconductor chip, 15...substrate, 15a...surface (mounting surface), 20...wiring portion (first wiring portion, second wiring portion), 21, 37...conductor (first conductor, second conductor), 22, 38a...insulator (first insulator, second insulator), 23...insulating film, 30...glass substrate (another substrate), 31...temporary fixing material (peeling layer), 50...wiring body, G...air gap.

Claims

1. A semiconductor device comprising: a substrate; a first semiconductor chip and a second semiconductor chip attached to the substrate; and a first wiring portion and a second wiring portion provided on at least one of the substrate and the substrate, wherein the first wiring portion has a first conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a first insulator that covers the first conductor; the second wiring portion has a second conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a second insulator that covers the second conductor; and an air gap is provided between the first wiring portion and the second wiring portion.

2. The semiconductor device according to claim 1, wherein the air gap extends along the first wiring portion and the second wiring portion.

3. The semiconductor device according to claim 1 or 2, wherein the first conductor is provided on an installation surface, and the first insulator covers an area around the first conductor excluding an area in contact with the installation surface.

4. A semiconductor device according to any one of claims 1 to 3, wherein the first conductor is provided on an installation surface, and the first insulator has a cross section that flares out on both sides in a direction away from the installation surface.

5. The semiconductor device according to any one of claims 1 to 4, wherein the first wiring portion and the second wiring portion are provided on the substrate.

6. The semiconductor device according to any one of claims 1 to 4, wherein the first wiring portion and the second wiring portion are provided within the substrate.

7. The semiconductor device according to any one of claims 1 to 6, wherein the width of the air gap is narrower than the width of the first wiring portion.

8. A method for manufacturing a semiconductor device, comprising: a step of preparing a first semiconductor chip, a second semiconductor chip, and a substrate; a step of providing a first wiring portion and a second wiring portion on at least one of the substrate and within the substrate; and a step of attaching the first semiconductor chip and the second semiconductor chip to the substrate, wherein the first wiring portion has a first conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a first insulator that covers the first conductor, the second wiring portion has a second conductor that electrically connects the first semiconductor chip and the second semiconductor chip and a second insulator that covers the second conductor, and an air gap is provided between the first wiring portion and the second wiring portion.

9. A method for manufacturing a semiconductor device as described in claim 8, wherein the step of providing the first wiring portion and the second wiring portion comprises the steps of: forming the first conductor and the second conductor on the mounting surface of the substrate; forming an insulating film so as to cover the first conductor and the second conductor; and removing at least an intermediate portion of the insulating film located between the first wiring portion and the second wiring portion to form the first insulator, the second insulator, and the air gap.

10. The method for manufacturing a semiconductor device according to claim 8, wherein the step of providing the first wiring portion and the second wiring portion comprises the steps of: forming the first conductor and the second conductor on another substrate provided with a release layer; forming an insulating film so as to cover the first conductor and the second conductor; removing at least an intermediate portion of the insulating film located between the first wiring portion and the second wiring portion to form the first insulator, the second insulator, and the air gap; separating the other substrate at the release layer from a wiring body including the first wiring portion and the second wiring portion with the air gap formed therebetween; and attaching the wiring body to at least one of on and within the substrate.

11. A method for manufacturing a semiconductor device according to claim 9 or 10, wherein the substrate or the other substrate is a glass substrate or a light-transmitting substrate, the insulating film is formed in the step of forming the insulating film so as to cover the first conductor and the second conductor with a photosensitive resin composition, and the air gap is formed in the step of forming the air gap by exposing the insulating film from the substrate side or the other substrate side and then developing it.

12. A method for manufacturing a semiconductor device according to any one of claims 9 to 11, wherein in the step of forming the air gap, the intermediate portion is removed so that the first insulator has a flared shape with both sides widening in a direction away from the surface on which the first conductor is provided.

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