Radio frequency switch circuit, chip, and electronic device thereof

Abstract

The present invention provides a radio frequency switch circuit, a chip, and an electronic device thereof. The radio frequency switch circuit is formed by connecting n stages of switching transistor units in series, and the n stages of switching transistor units are divided into L switching transistor unit groups in a radio frequency current direction, wherein 1<L≤n; each stage of switching transistor unit comprises a switching transistor, a gate bias resistor, a bulk bias resistor, and a path resistor; the spacing between adjacent horizontal gates of each of switching transistors in each switching transistor unit group is less than the spacing between adjacent horizontal gates of each of switching transistors in the next switching transistor unit group. The radio frequency switch circuit design of the present invention can ensure more balanced voltage distribution among different switching transistors, thereby improving the power processing capability of the radio frequency switch circuit.

Description

RF Switch Circuit, Chip and Electronic Device thereof Technical Field

[0001] The present invention relates to the field of integrated circuit technology, and particularly to an RF switch circuit, a chip and an electronic device thereof. Background Art

[0002] In a wireless or mobile communication system, an RF switch circuit is often used for channel selection, and can realize wireless signal reception and transmission in the case of sharing an antenna. With the rapid development of 5G mobile networks, especially with the deployment of systems such as massive MIMO (Multiple-Input Multiple-Output), the RF devices in communication systems have become increasingly complex. The trend of integrating multiple standards in one device has further increased the performance requirements and demand for RF switches. At the same time, as the number of frequency bands, functions and modes required for the operation of devices such as mobile phones continues to increase, the space left for antennas in mobile systems will continue to shrink, thereby deteriorating the efficiency of the antennas and affecting the signal transmission quality of communication devices. Therefore, in order to meet the sensitivity requirements of receivers in complex environments and ensure better 5G communication signal quality, it is necessary to design an RF switch circuit with higher power handling capabilities.

[0003] The power handling capability of an RF switch circuit is closely related to the capacitance at its cut-off. If the parasitic capacitances of different switching transistors in the RF switch circuit are not designed properly, it will cause an unbalanced voltage distribution between different switching transistors, and further deteriorate the overall power handling capability of the RF switch circuit.

[0004] Therefore, it is necessary to optimize the parasitic capacitances of different switching transistors in the RF switch circuit to ensure that the RF switch circuit has higher power handling capabilities.

[0005] Summary of the Invention

[0006] The purpose of the present invention is to provide an RF switch circuit, a chip and an electronic device thereof to improve the power handling capability of the RF switch circuit.

[0007] To achieve the above object and other related objects, the present invention provides an RF switch circuit, which is composed of n-stage switching transistor units connected in series. The n-stage switching transistor units are divided into L switching transistor unit groups along the RF current direction, and 1 < L ≤ n. Each stage of the switching transistor unit includes a switching transistor, a gate bias resistor, a body bias resistor and a path resistor, where

[0008] The gate of each switching transistor is connected to the corresponding gate bias resistor, the drain and source are connected to the corresponding path resistor, and the body is connected to the corresponding body bias resistor; the gate bias resistors in each switching transistor unit are sequentially connected in series, and the ends thereof are connected to the gate bias voltage; the body bias resistors in each switching transistor unit are sequentially connected in series, and the ends thereof are connected to the body bias voltage;

[0009] The gate of each switching transistor includes a plurality of parallel horizontal gates, and the spacing between adjacent horizontal gates of the switching transistors in each switching transistor unit group is smaller than the spacing between adjacent horizontal gates of the switching transistors in the next switching transistor unit group.

[0010] Optionally, in the radio frequency switching circuit, the layout structure of each switching transistor is a finger-shaped structure.

[0011] Optionally, in the RF switching circuit, the distance between the horizontal gate of the switching transistor in each switching transistor unit group and the metal contact point of the adjacent source or drain is smaller than the distance between the horizontal gate of the switching transistor in the next switching transistor unit group and the metal contact point of the adjacent source or drain.

[0012] Optionally, in the RF switching circuit, a voltage difference introduced by the difference between the spacing between adjacent horizontal gates of the switching transistors in each switching transistor unit group and the spacing between adjacent horizontal gates of the switching transistors in the next switching transistor unit group balances the voltage difference formed by non-ideal factors in the switching transistors in the two switching transistor unit groups, wherein the non-ideal factors include parasitic capacitance between the gate and source of the switching transistor, parasitic capacitance between the gate and drain of the switching transistor, parasitic capacitance between the body and drain of the switching transistor, parasitic capacitance between the body and source of the switching transistor, and parasitic capacitance of the source and drain of the switching transistor to ground.

[0013] Optionally, in the RF switching circuit, the source of the switching transistor at each level is connected to the drain of the switching transistor in the switching transistor unit at the next level, the output end of the switching transistor unit at each level is the source of the transistor in the switching transistor unit at that level, and the input end of the switching transistor unit at each level is the drain of the transistor in the switching transistor unit at that level.

[0014] Optionally, in the radio frequency switch circuit, the lengths of the horizontal gates of all the switch transistors in the same switch transistor unit group are the same.

[0015] Optionally, in the radio frequency switching circuit, all switching transistors in the same switching transistor unit group have the same size.

[0016] Optionally, in the radio frequency switch circuit, the spacing between adjacent horizontal gates of all switch transistors in the same switch transistor unit group is the same.

[0017] In order to achieve the above-mentioned object and other related objects, the present invention also provides an integrated circuit chip, including the above-mentioned radio frequency switching circuit.

[0018] In order to achieve the above-mentioned object and other related objects, the present invention also provides an electronic device, including the above-mentioned radio frequency switching circuit.

[0019] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0020] In the radio frequency switching circuit provided by the present invention, the n-level switching transistor unit is divided into L switching transistor unit groups along the direction of the radio frequency current, and the spacing between adjacent horizontal gates of the switching transistors in each switching transistor unit group is smaller than the spacing between adjacent horizontal gates of the switching transistors in the next switching transistor unit group, so that the parasitic capacitance C of the switching transistors in different switching transistor unit groups is ds The relationship can be expressed as: C dsG1 >C dsG2 >C dsG3 >…>C dsGL , and then we can conclude that the voltage division relationship of the switch transistors in different switch transistor unit groups under ideal conditions is: V dsG1 <V dsG2 <V dsG3 <… <V dsGL The voltage-dividing relationship formed by this design can balance the uneven voltage distribution between different switching transistors caused by non-ideal factors, thereby obtaining an RF switching circuit with high power handling capability. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] FIG1 is a circuit diagram of a radio frequency switching circuit;

[0022] FIG2 is a circuit schematic diagram of the RF switch circuit in FIG1 including parasitic parameters;

[0023] FIG3 is a layout diagram corresponding to the switching transistor of the RF switching circuit in FIG1 ;

[0024] FIG4 is a circuit diagram of a radio frequency switching circuit according to an embodiment of the present invention;

[0025] FIG5 is a layout diagram corresponding to the switching transistor of the RF switching circuit in FIG4 ;

[0026] 6 is a comparison diagram of the drain-source voltage of a transistor according to an embodiment of the present invention and the drain-source voltage of a transistor according to the prior art;

[0027] In Figures 1 to 3, 011-horizontal gate, 012-active area, 0121-metal contact point, 013-vertical gate;

[0028] In Figures 4 to 6, 11 is a horizontal gate, 12 is an active area, 121 is a metal contact point, and 13 is a vertical gate. DETAILED DESCRIPTION

[0029] The following is a further detailed description of the RF switch circuit, chip, and electronic device proposed in the present invention, in conjunction with the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are all in a very simplified form and are not to exact scale, and are only used to facilitate and clearly illustrate the purpose of the embodiments of the present invention.

[0030] In the prior art, the method for improving the power handling capability of the RF switch circuit is generally the switching transistor stacking method. In this method, the RF switch circuit is formed by connecting multiple switching transistors in series. Its typical circuit is shown in Figure 1. The RF switch circuit consists of switching transistors M1, M2, ... and M n (n is a positive integer, and n>1) are formed in series, wherein the drain of the switching transistor M1 is connected to the signal input end of the RF switching circuit, and the switching transistor M n The source is connected to the signal output terminal of the RF switch circuit. The gate bias voltage V g Through each gate bias resistor R g Connected to the gate of each switching transistor respectively, the body bias voltage V b Through each body bias resistor R b Connected to the body of each switching transistor respectively. A path resistor R is connected in parallel between the drain and source of each switching transistor. ds FIG2 shows a conventional RF switch circuit structure including parasitic parameters, wherein V g and V b are the gate and body bias voltages of the switching transistor, V in is the input signal of the RF switching circuit. gs is the parasitic capacitance between the gate and source of the switching transistor; C gd is the parasitic capacitance between the gate and drain of the switching transistor; C bs is the parasitic capacitance between the body and source of the switching transistor; C bd is the parasitic capacitance between the body and drain of the switching transistor; C n is the parasitic capacitance of the source and drain of the nth switching transistor to ground; i dsis the source-drain current of the switching transistor; C ds The parasitic capacitance is the parasitic capacitance between the source and drain of the switching transistor (i.e., the source-drain parasitic capacitance). In actual RF switching circuits, no parasitic capacitance is designed. The parasitic capacitance is shown in FIG2 only to make the RF switching circuit easier to understand.

[0031] The voltage division of the switching transistor mainly depends on its source-drain parasitic capacitance C ds For the n series-connected switching transistors shown in FIG2 , the source-drain voltage of the first switching transistor (ie, transistor M1) can be simply expressed as Formula 1:

[0032] Among them, V in is the input signal of the RF switching circuit, Z ds1 is the source-drain capacitance impedance of the first switching transistor, Z dsn is the source-drain capacitance impedance of the nth switching transistor, C ds1 is the source-drain parasitic capacitance of the first switching transistor, C dsn is the source-drain parasitic capacitance of the nth switching transistor, ω=2πf, and f is the operating frequency of the RF switching circuit.

[0033] The source-drain parasitic capacitance of the switching transistor is related to its size. Therefore, for a design with n switching transistors of exactly the same size, the voltage division between different switching transistors should ideally be uniform. However, in practice, when the RF switching circuit is in the off state and there is V in At input, due to the parasitic capacitance C in Figure 2 gs 、C gd 、C bs 、C bd and C n The existence of will produce non-i ds The leakage current of the switch transistors causes the source-drain current of the switch transistors to decrease along the current direction, which in turn causes the voltage divider between the n switch transistors in series to decrease along the i ds The direction of the phenomenon of decreasing, that is, V ds1 >V ds2 >…>V dsn .

[0034] FIG3 is a layout diagram of the existing RF switch circuit corresponding to FIG1. n is the spacing between adjacent horizontal gates 011 (finger gates) in the nth switching transistor, d n W is the distance from the horizontal gate 011 to the metal contact point 0121 of the adjacent active area 012 (source or drain) in the nth switching transistor, nis the length of the (single) horizontal gate in the nth switching transistor. The gate of each switching transistor in the existing radio frequency switching circuit may include two vertical gates 013, and a plurality of horizontal gates 011 are arranged in parallel between the two vertical gates 013. The layout designs of different switching transistors in the existing radio frequency switching circuit are the same, that is: D1 = D2 = … = D n (1) d1 = d2 = … = d n (2) W1 = W2 = … = W n (3)

[0035] The above layout design will cause the phenomenon of uneven voltage distribution between different switching transistors when a high-power input is applied (that is, V ds1 > V ds2 > … > V dsn ), that is, the problem of uneven voltage distribution between different switching transistors caused by non-ideal factors (parasitic capacitances C gs , C gd , Cbs, C bd and C n ).

[0036] To improve the above problems, the present invention provides a radio frequency switching circuit, which can be seen in FIG. 4. The radio frequency switching circuit in FIG. 4 is composed of n-stage switching transistor units connected in series. The n-stage switching transistor units are divided into L switching transistor unit groups along the radio frequency current direction, and 1 < L ≤ n. Each of the switching transistor unit groups in this embodiment includes at least one switching transistor unit, that is, each of the switching transistor unit groups may include one switching transistor unit or may include a plurality of the switching transistor units.

[0037] In this embodiment, the number of switching transistor units included in each of the switching transistor unit groups may be the same or different. For example, in FIG. 4, the switching transistor unit group G1 includes the switching transistor unit U1, the switching transistor unit group G2 includes the switching transistor unit U2, the switching transistor unit group G3 includes the switching transistor units U3 and U4... The switching transistor unit group G L includes the switching transistor unit U (n-1) and the switching transistor unit U n .

[0038] sEach stage of the switching transistor unit may include a switching transistor, a gate bias resistor, a body bias resistor, and a path resistor. It should be noted that the switching transistor mentioned in this embodiment is preferably an NMOS switching transistor, but it may also be a PMOS switching transistor.

[0039] The gate of each switching transistor is respectively connected to the corresponding gate bias resistor R g The gate bias resistors in the switching transistor units at each level are connected in series, and their ends are connected to the gate bias voltage V g For example, the gate of the switching transistor M1 in FIG4 is connected to the gate bias resistor R g1 Connect the gate of the switching transistor M2 to the gate bias resistor R g2 Connection, and so on, the switching transistor M n The gate and gate bias resistor R gn Connect, R g1 、R g2 R gn After being connected in series, the ends of the gate bias voltage V g connect.

[0040] The source of each switching transistor is connected to the drain of the switching transistor in the next switching transistor unit, and the path resistor R ds Set between the drain and source of each switching transistor. For example, the drain of the switching transistor M1 in FIG4 is used as the input terminal, the source of the switching transistor M1 is connected to the drain of the switching transistor M2, and the path resistor R ds1 Set between the drain and source of the switching transistor M1; the source of the switching transistor M2 is connected to the drain of the switching transistor M3, and the path resistor R ds2 Set between the drain and source of the switching transistor M2, and so on. n-1 The source of the switching transistor M n The drain connection, the path resistance R dsn-1 Set the switching transistor M n-1 Between the drain and source of the switching transistor M n The source is used as the output terminal, and the path resistance R dsn Set the switching transistor M n In this embodiment, the output end of each switching transistor unit is the source of the transistor in the switching transistor unit of this level, and the input end of each switching transistor unit is the drain of the transistor in the switching transistor unit of this level.

[0041] The body of each switching transistor is respectively connected to the corresponding body bias resistor R b Connect the body bias resistor R in each stage of the switching transistor unit b After being connected in series, the end of the b For example, the body of the switching transistor M1 in FIG4 and the body bias resistor R b1Connect the body of the switching transistor M2 to the body bias resistor R b2 Connection, and so on, the switching transistor M n The body and body bias resistor R bn Connect, R b1 、R b2 ....R bn After being connected in series, the ends of the gate bias voltage V b connect.

[0042] In this embodiment, the layout structure of the switching transistor is preferably an interdigitated structure. The gate of each switching transistor may include multiple parallel horizontal gates and may also include at least one vertical gate. For example, in Figure 5, the gate of each switching transistor may include two vertical gates 13, with multiple horizontal gates 11 arranged in parallel between the two vertical gates 13. The area between two adjacent horizontal gates is an active area 12, and the two vertically adjacent active areas 12 are respectively a source region and a drain region.

[0043] In this embodiment, the spacing between adjacent horizontal gates 11 of the switching transistors in each switching transistor unit group is smaller than the spacing between adjacent horizontal gates 11 of the switching transistors in the next switching transistor unit group. The adjacent horizontal gates 11 refer to the longitudinally adjacent horizontal gates 11 in the same switching transistor. The same switching transistor has multiple horizontal gates 11, that is, there are multiple spacings between adjacent horizontal gates 11. In this embodiment, the spacing between all adjacent horizontal gates 11 in the same switching transistor is preferably the same. Furthermore, the spacing between adjacent horizontal gates 11 of all switching transistors in the same switching transistor unit group is preferably the same. The spacing between adjacent horizontal gates 11 of the switching transistors in the switching transistor unit group G1 of this embodiment is D G1 (That is, the spacing between all adjacent horizontal gates 11 in the switching transistor unit group G1 is D G1 ), the spacing between adjacent horizontal gates 11 of the switching transistors in the switching transistor unit group G2 is D G2 , and so on, the switching transistor unit group G L The distance between adjacent horizontal gates 11 of the switching transistor is D GL , and this embodiment preferably D G1 <D G2 <… <D GL For example, Table 1 shows example parameters of the switching transistor of the present invention.

[0044] Table 1:

[0045] The switching transistor unit group G1 in Table 1 includes a switching transistor M1, a switching transistor M2, and a switching transistor M3. G1The value is 0.07 μm; the switching transistor unit group G2 includes a switching transistor M2, and the D of the switching transistor unit group G2 G2 The value is 0.075μm; the switching transistor unit group G3 includes a switching transistor M3 and a switching transistor M4, and the D of the switching transistor unit group G3 G3 The value is 0.085 μm, that is, the spacing between adjacent horizontal gates of the switch transistor M3 and the switch transistor M4 is 0.085 μm; the switch transistor unit group G4 includes the switch transistor M5 and the switch transistor M6, and the D of the switch transistor unit group G4 G4 The value is 0.1μm; the switching transistor unit group G5 includes a switching transistor M7 and a switching transistor M8, and the D of the switching transistor unit group G5 G5 The value is 0.11 μm; the switching transistor unit group G6 includes a switching transistor M9 and a switching transistor M 10 , D of the switching transistor unit group G6 G6 The value is 0.12μm; the switching transistor unit group G7 includes a switching transistor M 11 and switching transistor M 12 , D of the switching transistor unit group G7 G7 The value is 0.13 μm; the switching transistor unit group G8 includes a switching transistor M 13 and switching transistor M 14 , D of the switching transistor unit group G8 G8 The value is 0.14μm; the switching transistor unit group G9 includes a switching transistor M 15 and switching transistor M 16 , D of the switching transistor unit group G9 G9 The value is 0.15μm. Figure 6 is a comparison chart of the source-drain voltage of the switching transistor corresponding to the example parameters of the switching transistor in Table 1 and the source-drain voltage of the switching transistor in the prior art. It can be found that the source-drain voltage of the switching transistor in the prior art (the spacing between adjacent horizontal gates of each switching transistor is designed to be 0.11μm) gradually decreases, while the source-drain voltage of the switching transistor of the present invention is relatively stable. That is, the RF switching circuit of the present invention can solve the problem of uneven voltage distribution between different switching transistors caused by non-ideal factors and can improve power handling capability.

[0046] In this embodiment, the length of a single horizontal gate 11 of the switch transistor in the switch transistor unit group G1 is W. G1 The length of a single horizontal gate 11 of the switching transistor in the switching transistor unit group G2 is W G2 , and so on, the switching transistor unit group G L The length of a single horizontal gate 11 of the switching transistor is W GLThe lengths of the single horizontal gates 11 of all the switch transistors in the same switch transistor unit group are preferably the same, and the total length of the horizontal gates of each switch transistor in the same switch transistor unit group is preferably the same (total horizontal gate length W 总 = the length of a single horizontal gate 11 multiplied by the number of horizontal gates 11 of a single transistor), and the total length of the horizontal gates of the switching transistors (single) in different switching transistor unit groups is also preferably the same.

[0047] Since D G1 <D G2 <… <D GL Therefore, the distance d from the switching transistor horizontal gate 11 to the metal contact point 121 of the adjacent source or drain of different switching transistor unit groups satisfies the following relationship: d G1 <d G2 <… <d GL The distance between the horizontal gate 11 of the switching transistor in the switching transistor unit group G1 and the metal contact point 121 of the adjacent source or drain is d G1 The distance between the horizontal gate 11 of the switching transistor in the switching transistor unit group G2 and the metal contact point 121 of the adjacent source or drain is d G2 , and so on, the switching transistor unit group G L The distance between the horizontal gate 11 of the switching transistor and the metal contact point 121 of the adjacent source or drain is d GL In this embodiment, the distances from all horizontal gates 11 in the same switching transistor unit group to the metal contact points 121 of adjacent sources or drains are preferably the same, and the sizes of all switching transistors in the same switching transistor unit group are preferably the same.

[0048] In this embodiment, the size of D determines the parasitic capacitance of the switch transistor. The smaller D is, the larger the parasitic capacitance of the switch transistor is, and the larger the parasitic capacitance of the switch transistor unit group is. For the D design of L switch transistor unit groups, the parasitic capacitance C between the switch transistors in the L switch transistor unit groups is ds The relationship can be expressed as: C dsG1 >C dsG2 >…>C dsGL , where C dsG1 is the parasitic capacitance of a single switching transistor in the switching transistor unit group G1, C dsG2 is the parasitic capacitance of a single switching transistor in the switching transistor unit group G2, C dsGL is the switching transistor unit group G L The parasitic capacitance of a single switching transistor in the circuit. According to Formula 1, the ideal voltage division relationship between the switching transistors in the L switching transistor unit group is: V dsG1 <V dsG2 <VdsG3 <… <V dsGL , where V dsG1 is the source-drain voltage of a single switching transistor in the switching transistor unit group G1, V dsG2 is the source-drain voltage of a single switching transistor in the switching transistor unit group G2, V dsGL is the switching transistor unit group G L The source-drain voltage of a single switching transistor in the circuit. Therefore, the voltage-dividing relationship formed by the above design can exactly balance the uneven voltage distribution between different switching transistors caused by non-ideal factors. That is, in actual conditions, the voltages between different switching transistors are basically equal and evenly distributed, thereby obtaining an RF switching circuit with high power handling capability.

[0049] In this embodiment, after determining the switching transistor units in each switching transistor unit group, the source-drain parasitic capacitance of the switching transistor in each switching transistor unit group can be adjusted to balance the uneven voltage distribution problem between different switching transistors caused by non-ideal factors. The circuit after adjusting the source-drain parasitic capacitance is the RF switching circuit of this embodiment. Since the size of the switching transistor affects the source-drain parasitic capacitance of the switching transistor, the source-drain parasitic capacitance of the switching transistor can be adjusted by adjusting the spacing between adjacent horizontal gates of the switching transistor. In the RF switching circuit after adjusting the source-drain parasitic capacitance (i.e., the RF switching circuit of this embodiment), the spacing between adjacent horizontal gates 11 of the switching transistor in each switching transistor unit group is smaller than the spacing between adjacent horizontal gates 11 of the switching transistor in the next switching transistor unit group.

[0050] The voltage difference introduced by the difference between the spacing between adjacent horizontal gates 11 of the switching transistors in each switching transistor unit group and the spacing between adjacent horizontal gates 11 of the switching transistors in the next switching transistor unit group will balance the voltage difference caused by non-ideal factors in the switching transistors of the two switching transistor unit groups. In this embodiment, the voltage difference caused by non-ideal factors in the switching transistors of two adjacent switching transistor unit groups can be obtained through simulation. For example, if the simulated voltage division of the switching transistor M1 in the switching transistor unit group G1 is 0.1V higher than the voltage division of the switching transistor M2 in the switching transistor unit group G2 (i.e., the voltage difference caused by non-ideal factors is 0.1V), then by adjusting the spacing between adjacent horizontal gates of the switching transistors in the switching transistor unit group G1 and the switching transistor unit group G2, the voltage difference introduced by the difference in spacing between adjacent horizontal gates of the switching transistors in the switching transistor unit group G1 and the switching transistor unit group G2 (i.e., the difference between the source-drain voltage of the switching transistor M1 and the source-drain voltage of the switching transistor M2 under ideal conditions) can be balanced by 0.1V, thereby making the voltage division of the switching transistor M1 in the switching transistor unit group G1 and the switching transistor M2 in the switching transistor unit group G2 the same. In this embodiment, it is preferred to simultaneously adjust the spacing between adjacent horizontal gates of the switching transistors in two adjacent switching transistor unit groups to balance (compensate for) the voltage difference caused by non-ideal factors on the switching transistors in the two switching transistor unit groups. In this embodiment, the area of ​​the RF switch circuit is preferably the same as the area of ​​the RF switch circuit in the prior art, that is, when adjusting the spacing between adjacent horizontal gates of the switch transistors in the switch transistor unit group, the sizes of the switch transistors in some of the switch transistor unit groups are reduced, and the sizes of the switch transistors in some of the switch transistor unit groups are increased, so as to ensure that the total area of ​​the RF switch circuit remains unchanged. In other embodiments, when adjusting the spacing between adjacent horizontal gates of the switch transistors in the switch transistor unit group, the sizes of all the switch transistors in the switch transistor unit group can be increased or decreased (relative to the sizes of the switch transistors in the prior art), as long as the voltage balance of different switch transistors is ensured, that is, the total area of ​​the RF switch circuit can also be changed.

[0051] In summary, the radio frequency switching circuit provided by the present invention divides the n-level switching transistor unit into L switching transistor unit groups along the direction of the radio frequency current, and each level of the switching transistor unit includes a switching transistor and a resistor (gate bias resistor, body bias resistor and path resistor), and the gate, body, source and drain of the switching transistor are all connected together through resistors, and the layout of each switching transistor is a finger-shaped structure. Different parasitic capacitances are designed for different switching transistor unit groups to ensure that the radio frequency switch has a more balanced voltage distribution between different switching transistors under high voltage conditions, thereby improving the power handling capacity of the radio frequency switching circuit and realizing a high-power handling capacity radio frequency switching circuit design. Moreover, the radio frequency switching circuit provided by the present invention has the beneficial effects of clever structural design, low production cost, and excellent working performance.

[0052] An embodiment of the present invention further provides an integrated circuit chip. This integrated circuit chip includes the radio frequency switching circuit provided in the above embodiment and is used in a radio frequency front-end module in a wireless communication system. Its function is to accurately switch and control the transmission path of radio frequency signals and enable corresponding radio frequency paths. The specific structure of the radio frequency switching circuit in this integrated circuit chip will not be described in detail here.

[0053] In addition, the RF switch circuit provided by the present invention can also be used in electronic devices as an important component of communication components. The electronic devices referred to here refer to computer devices that can be used in mobile environments and support multiple communication standards such as GSM, EDGE, TD-SCDMA, TDD-LTE, FDD-LTE, 5G, etc., including mobile phones, laptops, tablets, car computers, etc. In addition, the technical solutions provided by the present invention are also applicable to other communication component applications, such as communication base stations.

[0054] In addition, it is understood that although the present invention has been disclosed above with reference to preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or to modify it into an equivalent embodiment with equivalent changes. Therefore, any simple modification, equivalent change, and modification made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of protection of the technical solution of the present invention.

[0055] It should also be understood that the present invention is not limited to the specific methods, compounds, materials, manufacturing techniques, uses, and applications described herein, which may vary. It should also be understood that the terminology described herein is used only to describe specific embodiments and is not intended to limit the scope of the present invention. It should be noted that the singular forms "a," "an," and "the" as used herein and in the appended claims include plural references unless the context clearly indicates otherwise. Thus, for example, a reference to "a step" means a reference to one or more steps, and may include secondary steps. All conjunctions used should be understood in their broadest sense. Thus, the word "or" should be understood to have the definition of a logical "or," not a logical "exclusive or," unless the context clearly indicates otherwise. Structures described herein are to be understood to also refer to functional equivalents of that structure. Language that can be interpreted as approximating should be so interpreted unless the context clearly indicates otherwise.

Claims

1. A radio frequency switching circuit, characterized in that: It is composed of n - stage switching transistor units connected in series. The n - stage switching transistor units are divided into L groups of switching transistor units along the RF current direction, and 1 < L ≤ n. Each stage of the switching transistor unit includes a switching transistor, a gate bias resistor, a body bias resistor, and a path resistor. Among them, the gate of each switching transistor is respectively connected to its corresponding gate bias resistor, the drain and source are respectively connected to their corresponding path resistors, and the body is respectively connected to its corresponding body bias resistor; after the gate bias resistors in each stage of the switching transistor units are sequentially connected in series, their ends are connected to the gate bias voltage; after the body bias resistors in each stage of the switching transistor units are sequentially connected in series, their ends are connected to the body bias voltage; the gate of each switching transistor includes multiple horizontal gates arranged in parallel, and the distance between adjacent horizontal gates of the switching transistors in each switching transistor unit group is smaller than the distance between adjacent horizontal gates of the switching transistors in the next switching transistor unit group.

2. The radio frequency switching circuit according to claim 1, wherein: The layout structure of each switching transistor is a finger - like structure.

3. The radio frequency switching circuit according to claim 2, wherein: The distance between the horizontal gate of the switching transistor in each switching transistor unit group and the metal contact point of the adjacent source or drain is smaller than the distance between the horizontal gate of the switching transistor in the next switching transistor unit group and the metal contact point of the adjacent source or drain.

4. The radio frequency switching circuit according to claim 1, wherein: The voltage difference introduced by the difference in the distance between adjacent horizontal gates of the switching transistors in each switching transistor unit group and the next switching transistor unit group will balance the voltage difference formed by the switching transistors in these two switching transistor unit groups due to non - ideal factors. The non - ideal factors include the parasitic capacitance between the gate and source of the switching transistor, the parasitic capacitance between the gate and drain of the switching transistor, the parasitic capacitance between the body and drain of the switching transistor, the parasitic capacitance between the body and source of the switching transistor, and the parasitic capacitance of the source and drain of the switching transistor to the ground.

5. The radio frequency switching circuit according to claim 1, wherein: The source of each stage of the switching transistor is connected to the drain of the switching transistor in the next - stage switching transistor unit. The output end of each stage of the switching transistor unit is the source of the transistor in this stage of the switching transistor unit, and the input end of each stage of the switching transistor unit is the drain of the transistor in this stage of the switching transistor unit.

6. The radio frequency switching circuit according to claim 1, wherein: The lengths of the single horizontal gates of all the switching transistors in the same switching transistor unit group are the same.

7. The radio frequency switching circuit according to claim 1, wherein: The sizes of all the switching transistors in the same switching transistor unit group are the same.

8. The radio frequency switching circuit according to claim 1, wherein: The distances between adjacent horizontal gates of all the switching transistors in the same switching transistor unit group are the same.

9. An integrated circuit chip, characterized in that:

10. An electronic device, characterized in that: It includes the RF switch circuit according to any one of claims 1 to 8. It includes the RF switch circuit according to any one of claims 1 to 8.

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