Thermal via arrangement for printed circuit board and electronic device
By densifying the thermal via farm with bar vias, the thermal conductivity of PCBs is enhanced, addressing the limitations of current heat dissipation methods in higher layer count PCBs.
Patent Information
- Application Number
- PCT/SE2024/050261
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-03-22
- Publication Date
- 2025-09-25
AI Technical Summary
Current thermal solutions for printed circuit boards (PCBs) face limitations in heat dissipation due to the limited number of solder balls and thermal via stacks, especially in higher layer count PCBs, leading to restricted thermal conductivity and increased thermal resistance.
Densifying the thermal via farm by increasing the areal number density of thermally conductive vias in the PCB layers, particularly through the use of bar vias that connect to a denser thermal via farm, enhancing thermal conductivity and heat dissipation.
The densified thermal via farm improves heat transfer by reducing thermal resistance and increasing the overall thermal conductivity of the PCB, effectively managing heat dissipation from electronic components.
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Figure SE2024050261_25092025_PF_FP_ABST
Abstract
Description
[0001] THERMAL VIA ARRANGEMENT FOR PRINTED CIRCUIT BOARD AND ELECTRONIC DEVICE
[0002] Technical Field
[0003] Example embodiments of this disclosure relate to a printed circuit board, and an electronic device comprising an electronic component and a printed circuit board.
[0004] Background
[0005] Electronic components, such as integrated circuit dies, assembled on a printed circuit board (PCB) generate a certain amount of heat that needs to be dissipated to the ambient air. In most cases, the heat can be dissipated directly to a heat sink mounted on top of one or more components. However, in certain cases, a component may be placed in such a location or with the source of heat in such a position that this heat path to a directly mounted heat sink is not available, and the heat needs to be dissipated through the PCB. For example, this can be the result of the component being located between the PCB and an antenna board.
[0006] In such cases, there are several methods to dissipate the heat from the components. One of the more common methods is to use a thermal via farm. A via in a PCB can be an electrical connection between two or more layers of the PCB. However, vias in the thermal via farm can be used to conduct heat instead of electrical signals. Vias can be comprised of a number of thermal via stacks, where a thermal via refers to a via for conducting heat. The individual via stacks may built up by adding filled microvias between conductive layers in the PCB. By stacking them on top of each other, a conductive path for the heat to dissipate through the PCB can be created. The side of the PCB opposite to the electrical component or source of heat can then be connected to a heat sink.
[0007] Figure 1 illustrates an example of a cross section of an electronic device 100 including an electronic component 102 and a PCB 104 to which the electronic component 102 is mounted by a plurality of solder balls 106. The PCB 104 is made up of a plurality of layers, and each layer includes microvias, each microvia corresponding to one of the solder balls 106. For example, layer 108 (which may be referred to as a “core layer) includes microvias 110. The microvias 110 are arranged such that they form a stacked via through all of the layers of the PCB, and there is a stacked via under each of the solder balls 106. A copper layer 112 is provided on the bottom side of the PCB opposite to the electronic component 102, and a heat sink 114 is also attached to the bottom of the PCB 104 with a thermal interface material (TIM) layer 116 between the copper layer 112 and the heat sink 114. Thus, heat from the electronic component 102 may be transferred through the solder balls 106, via 110 stacks, copper layer 112 and TIM 116 to the heat sink 114. The component 102 may in some cases include other connections to the PCB, such as via further solder balls, for power and / or electronic signals, and these are not shown in Figure 1.
[0008] For some electronic components there are hot spots, which are areas that generate more heat than the rest of the component. In these cases, it is important to promote good spreading of the heat to ease the transport of heat away from the component. In a traditional ball gate array (BGA), a lid would be used to spread the heat, but this is not an option for a component cooled through the PCB, as in Figure 1 . One option is to use a coin, which is a large copper inlay in the PCB, but this comes with severe tolerance and manufacturing limitations.
[0009] Some electronic devices use thermal bars in the electronic component substrate. Thermal bars are oblong vias for spreading heat. The thermal bar may be placed under an integrated circuit and the heat is spread out over the bar area. The substrate is then mounted on a PCB and the heat is transferred to a via farm, coin or heat sink. Bar vias offer lower thermal resistance than thermal vias, as has been shown in Kakade et al, “Thermal improvement in 3d embedded modules using copper bar vias,” 53rd International Symposium on Microelectronics, IMAPS 2020, 5-8 October 2020. Some substrate manufacturers and PCB manufacturers offer bar vias for PCBs but with a limited number of layers, generally 3-6 layers. This is not enough for PCB that use higher layer counts, such as for example 16 layers.
[0010] Bar vias in PCBs have been used for various other purposes, such as shielding, as suggested in US10292259B2, or as capacitors, as suggested in US20100090308A1.
[0011] For current thermal solutions that use solder balls and thermal via stacks for back side cooling of electronic components, as in Figure 1 , the thermal conductivity (and thus the amount of heat that can be dissipated) is limited by the number of solder balls and corresponding vias, and the thickness of the PCB. This could be improved by having a denser thermal via farm, placing solder balls and thermal vias closer together to improve the thermal conductivity by lowering thermal resistance. However, in some cases, the spacing of the vias is limited by the mounted components’ BGA pitch, and adding additional vias inside the BGA area will have a very limited impact as there will be very low heat transfer to the added vias. Techniques are therefore sought after to improve heat dissipation through a PCB.
[0012] Summary
[0013] Examples of this disclosure may have certain advantages. For example, examples of this disclosure may densify a thermal via farm, and by densifying the thermal via farm the thermal resistance through the PCB will decrease.
[0014] One aspect of the present disclosure provides a printed circuit board comprising one or more first layers, one or more second layers, and one or more third layers between the one or more first layers and the one or more second layers. The one or more first layers include a plurality of first thermally conductive vias. The one or more second layers include a plurality of second thermally conductive vias. The one or more third layers include at least one third thermally conductive via. The at least one third thermally conductive via is in thermally conductive contact with at least one of the first thermally conductive vias and a plurality of the second thermally conductive vias. An areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias.
[0015] Another aspect of the present disclosure provides an electronic device comprising an electronic component, and a printed circuit board comprising one or more first layers, one or more second layers, and one or more third layers between the one or more first layers and the one or more second layers. The electronic component is attached to the PCB by a plurality of discrete thermally conductive portions. The one or more first layers include a plurality of first thermally conductive vias. The one or more second layers include a plurality of second thermally conductive vias. The one or more third layers include at least one third thermally conductive via, the at least one third thermally conductive via in thermally conductive contact with at least one of the first thermally conductive vias and a plurality of the second thermally conductive vias. Each of the first thermally conductive vias is in thermally conductive contact with one of the thermally conductive portions. An areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias.
[0016] Brief Description of the Drawings
[0017] For a better understanding of examples of the present disclosure, and to show more clearly how the examples may be carried into effect, reference will now be made, by way of example only, to the following drawings in which: Figure 1 illustrates an example of a cross section of an electronic device;
[0018] Figure 2 illustrates an example of a cross section of a printed circuit board according to examples of this disclosure;
[0019] Figure 3 illustrates another example of a cross section of a printed circuit board according to examples of this disclosure;
[0020] Figure 4 illustrates an example of a cross section of an electronic device according to examples of this disclosure; and
[0021] Figure 5 illustrates an example of a cross section of a printed circuit board according to examples of this disclosure.
[0022] Detailed Description
[0023] The following sets forth specific details, such as particular embodiments or examples for purposes of explanation and not limitation. It will be appreciated by one skilled in the art that other examples may be employed apart from these specific details.
[0024] Embodiments of this disclosure provide a PCB, and an electronic device including an electronic component and a PCB, in which the “densification” of a thermal via farm is possible. That is, for example, if the heat conducting vias connected to an electronic component have a first density, heat conducting vias in lower layers in the PCB may have a greater density and / or may be greater in number. One or more layers of the PCB may include vias, such as bar vias, that thermally connect the vias connected to the electronic component to the vias in the lower layers.
[0025] By using bar via(s) in this way, the heat transferred by the “initial” thermal via stack (i.e. connected to the electronic component, for example by solder balls) can be spread out by the bar via(s) before being transferred to the lower thermal via farm with a denser pitch. This may for example improve thermal conductivity and cooling for bottom-side cooled electronic components.
[0026] Figure 2 illustrates an example of a cross section of a printed circuit board 200 according to examples of this disclosure. The printed circuit board comprises one or more first layers 202, one or more second layers 204, and one or more third layers 206 between the one or more first layers and the one or more second layers. There may in some examples be metallization (not shown) on any of one or more the layers, for example for interconnecting electronic components such that signals may be exchanged between them. In the example shown there are three first layers 202, ten second layers 204 and one third layer 206, though in other examples there may be any positive integer number of first layers 202, any positive integer number of second layers 204, and any positive integer number of third layers 206. In this disclosure, a “layer” such as each of the layers 202, 204 and 206, comprises for example a layer of dielectric material in the PCB (thus a layer may for example be referred to as a “dielectric layer”) that may include one or more metal or thermally conductive vias. A layer may or may not include metallization or metal tracks or traces on its surface that may be used for example to electrically interconnect components and vias.
[0027] As shown in Figure 2, the one or more first layers 202 include a plurality of first thermally conductive vias 208, and the one or more second layers 204 include a plurality of second thermally conductive vias 210. The one or more third layers 206 (in this example, the single third layer 206) include at least one third thermally conductive via 212. The at least one third thermally conductive via 212 is in thermally conductive contact with at least one of the first thermally conductive vias 208 and a plurality of the second thermally conductive vias 210.
[0028] An areal number density of the second thermally conductive vias 210 is higher than an areal number density of the first thermally conductive vias 208. That is, for example, the number per unit area of the second thermally conductive vias 210 is higher than the number per unit area of the first thermally conductive vias 208. As a result, for example, the thermal via farm is “densified” from the first layers 202 to the second layers 204, with the at least one third thermally conductive via 212 in the third layer(s) 206 providing a thermal connection between the vias in the first layers 202 and the second layers 204. In some examples, therefore, the third thermally conductive via(s) 212 may be in thermally conductive contact with more of the second thermally conductive vias 210 than the first thermally conductive vias 208. In some examples, the at least one third thermally conductive via 212 may be a bar via.
[0029] Where it is specified that an areal number density of the second thermally conductive vias 210 is higher than an areal number density of the first thermally conductive vias 208, example alternative formulations of this feature include any one or more of the following, which can be used as an alternative:
[0030] • the spatial density of the second vias 210 is higher than the spatial density of the first vias 208;
[0031] • the density per unit area (or volume) of the second vias 210 is higher than the density per unit area (or volume) of the first vias 208; • the number per unit area (or volume) of the second vias 210 is higher than the number per unit area (or volume) of the first vias 208
[0032] • pitch (or distance) between vias is greater for the first vias 208 than for the second vias 210;
[0033] • the average pitch (or distance) between vias is greater for the first vias 208 than for the second vias 210;
[0034] • The at least one third via 212 is in thermally conductive contact with more second vias 210 than first vias 208.
[0035] In this disclosure, a thermal connection or being in thermally conductive contact are used interchangeably and means for example that heat can be transferred from the vias 208 in the first layers 202 to the vias 210 in the second layers 204. This may mean physical contact, such that for example the third thermally conductive via(s) 212 contact the at least one of the first thermally conductive vias 208 and the plurality of the second thermally conductive vias 210. In some examples, being in thermally conductive contact means that there is a metallic, solder and / or sinter based connection. In some examples, there may be multiple third vias 212, such as for example stacked third vias. In this case, the third thermally conductive vias 212 may as a whole contact the at least one of the first thermally conductive vias 208 and the plurality of the second thermally conductive vias 210, though this not be the case for individual vias. For example, an individual third via 212 could in some examples contact: the at least one of the first thermally conductive vias 208 and at least one other third via 212; the plurality of the second thermally conductive vias 210 and at least one other third via 212; or at least two other third vias 212.
[0036] Some examples of this disclosure may therefore provide a PCB that provides greater thermal conductivity (due to the larger number of vias) in the second layers 204 than in the first layers 202, where the number or density of the vias in the first layers 202 may be limited due to for example the number or density of connections (e.g. using solder balls) to one or more electronic components. It should be noted that any layer or via in this disclosure may be a single layer or via or may alternatively be formed of multiple stacked layers or vias.
[0037] In some examples, each of at least a subset of the first thermally conductive vias 208 may be in thermally conductive contact with a respective portion of a surface 214 of the printed circuit board. The respective portion of the surface 214 of the printed circuit board is for attachment to an electronic component. In some examples, each portion of the surface of the printed circuit board comprises an end of a respective one of the first thermally conductive vias. In other words, for example, the ends of the first vias 208 (e.g. pads) may be exposed on the surface of the PCB 200, and the exposed ends may be used for a solder ball connection to one or more electronic components for transferring heat away from the one or more electronic components. The ends of the first vias 208 opposite the exposed ends may thus for example be in thermally conductive contact with the at least one third via 212 in the third layer(s) 206.
[0038] In some examples, the one or more first layers 202 include a further first layer, wherein the further first layer includes a further first thermally conductive via that is in thermally conductive contact with a plurality of the first thermally conductive vias. Figure 3 illustrates a cross section of another example of an example of a cross section of a printed circuit board 300 according to examples of this disclosure, which shows this arrangement. As shown in Figure 3, the PCB 300 includes a further first layer 302, wherein the further first layer 302 includes a further first thermally conductive via 304 that is in thermally conductive contact with a plurality of the first thermally conductive vias 208. Thus, for example, the further first thermally conductive via 304 may transfer heat between first vias in the first layers 202, which may improve thermal conductivity in some cases, for example where one of the first vias 208 is connected to or near a hot spot of an electronic component. In such examples, the further first thermally conductive via 304 may improve thermal transfer of heat between the electronic component (e.g. the hot spot) and the lower layers of the PCB, such as for example the third layer(s) 206.
[0039] In a similar manner, the one or more second layers 204 may in some examples include a further second layer 306, as shown in Figure 3, wherein the further second layer 306 includes a further second thermally conductive via 308 that is in thermally conductive contact with a plurality of the second thermally conductive vias 210.
[0040] In some examples, each of one or more of the first thermally conductive vias, the second thermally conductive vias and / or the at least one third thermally conductive via comprises a metal via, that is, a via formed of a metal material such as copper. Additionally or alternatively, each via may be a filled via, for example a solid via formed of one material such as copper with no through hole, or a via with a through hole that is filled with a thermally conductive material.
[0041] In some examples, the one or more third layers include a plurality of third thermally conductive vias. There may be multiple third layers 206 in some examples, and thus as suggested above each third thermally conductive via 212 may be in thermally conductive contact with: at least one of the first thermally conductive vias 208 and at least one third thermally conductive via 212; a plurality of the second thermally conductive vias 210 and at least one third thermally conductive via 212; or a plurality of third thermally conductive vias 212. Alternatively, the multiple third vias 212 may be in the same third layer(s) 206, and may not directly contact each other. In this case, each third thermally conductive via 212 may be in thermally conductive contact with a respective at least one of the first thermally conductive vias 210 and a respective plurality of the second thermally conductive vias 212.
[0042] In some examples, the PCB 200 or 300 may include any other layers or parts. For example, the PCB 200 or 300 may include a copper layer, similar to the copper layer 112 shown in Figure 1 , on a surface of the PCB 200 or 300 opposite the surface 214; thermal interface material (TIM) similar to the TIM 116 shown in Figure 1 ; and / or a heat sink similar to the heat sink 114 shown in Figure 1 . This may also be the case for the PCB 500 described below with reference to Figure 5, or the PCB 200 in the electronic device 400 described below with reference to Figure 4.
[0043] Figure 4 illustrates an example of a cross section of an electronic device 400 according to examples of this disclosure. The electronic device 400 comprises at least one electronic component 402 and a printed circuit board (PCB), generally indicated as 200. The printed circuit board 200 comprises one or more first layers 202, one or more second layers 204, and one or more third layers 206 between the one or more first layers 202 and the one or more second layers 204. The electronic component 402 is attached to the PCB 200 by a plurality of discrete thermally conductive portions 404, which may be solder balls for example. The at least one electronic component 402 may comprise for example at least one integrated circuit (IC) die.
[0044] In the example shown in Figure 4, there are three first layers 202, ten second layers 204 and one third layer 206, though in other examples there may be any positive integer number of first layers 202, any positive integer number of second layers 204, and any positive integer number of third layers 206. As suggested above, the layers 202, 204 and 206 may in some examples be referred to as dielectric layers, each of which may or may not include metallization or metal tracks or traces on its surface that may be used for example to electrically interconnect components and vias.
[0045] The one or more first layers 202 include a plurality of first thermally conductive vias 208, and the one or more second layers 204 include a plurality of second thermally conductive vias 210. The one or more third layers 206 include at least one third thermally conductive via 212, the at least one third thermally conductive via in thermally conductive contact with at least one of the first thermally conductive vias 208 and a plurality of the second thermally conductive vias 210.
[0046] Each of the first thermally conductive vias 208 is in thermally conductive contact with one of the thermally conductive portions 404 (e.g. attached to it). An areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias.
[0047] In some examples, the PCB 200 in the electronic device 400 comprises any example of a PCB described herein, such as for example the PCB 200 or 300 described above, or any of the examples of a PCB described below.
[0048] In some examples, a PCB according to this disclosure may comprise multiple sections that provide benefits according to this disclosure. Figure 5 illustrates another example of a cross section of a PCB 500 according to examples of this disclosure. A first part 502 of the PCB 500 comprises multiple layers that include one or more first layers 504 (in this example, two first layers 504), one or more second layers 506 (in this example, one second layer 506), and one or more third layers 508 (in this example, one third layer 508) between the one or more first layers 504 and the one or more second layers 506.
[0049] The first part 502 may be arranged in a manner similar to the PCBs described above. Thus, for example, the one or more first layers 504 include a plurality of first thermally conductive vias 510, the one or more second layers 506 include a plurality of second thermally conductive vias 512, and the one or more third layers 506 include at least one third thermally conductive via 514. The at least one third thermally conductive via 514 is in thermally conductive contact with at least one of the first thermally conductive vias 510 (in this case, two of the three first vias 510) and a plurality of the second thermally conductive vias (in this example, three of the four second vias 512). As the third thermally conductive via 514 in this example is in thermally conductive contact with three of the four second vias 512, one of the first vias 510 leads into one of the second vias 512, and thus (at least for the first part 502 of the PCB) they are effectively the same via or the same stacked via.
[0050] An areal number density of the second thermally conductive vias 512 is higher than an areal number density of the first thermally conductive vias 510, and thus there may for example be densification of the vias from the first layer(s) 504 to the second layer(s) 506. The PCB 500 also includes a second part 516 that includes similar features to the first part 502, and / or to a PCB according to examples of this disclosure. For example, the second part 516 may achieve further densification of the vias. As such, the second part may include one or more first layers 506, in this example one third layer 506, which is also the third layer in the first part 502. The second part 516 also includes one or more second layers 518, and one or more third layers 520 (in this example, one third layer 520) between the one or more first layers 506 and the one or more second layers 518.
[0051] The one or more first layers 506 of the second part 516 include a plurality of first thermally conductive vias 512 (which are the second vias 512 of the first part 502). The one or more second layers 518 include a plurality of second thermally conductive vias 520, and the one or more third layers include at least one third thermally conductive via 522. The at least one third thermally conductive via 522 is in thermally conductive contact with at least one of the first thermally conductive vias 512 and a plurality of the second thermally conductive vias 520.
[0052] In the example shown in Figure 5, the third thermally conductive via 522 is in thermally conductive contact with all four of the first thermally conductive vias 512, and all five of the second thermally conductive vias 520. An areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias. Thus, further densification of the vias is achieved in the second part 516 of the PCB 500.
[0053] It should be noted that the above-mentioned examples illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative examples without departing from the scope of the appended statements. The word “comprising” does not exclude the presence of elements or steps other than those listed in a claim, “a” or “an” does not exclude a plurality, and a single processor or other unit may fulfil the functions of several units recited in the statements below. Where the terms, “first”, “second” etc. are used they are to be understood merely as labels for the convenient identification of a particular feature. In particular, they are not to be interpreted as describing the first or the second feature of a plurality of such features (i.e., the first or second of such features to occur in time or space) unless explicitly stated otherwise. Steps in the methods disclosed herein may be carried out in any order unless expressly otherwise stated. Any reference signs in the statements shall not be construed so as to limit their scope.
Claims
Claims1 . A printed circuit board (200, 300, 400, 500) comprising one or more first layers (202, 504), one or more second layers (204, 506), and one or more third layers (206, 508, 520) between the one or more first layers and the one or more second layers; wherein the one or more first layers include a plurality of first thermally conductive vias (208, 510), the one or more second layers include a plurality of second thermally conductive vias (210, 512, 520), and the one or more third layers include at least one third thermally conductive via (212, 514, 522), the at least one third thermally conductive via in thermally conductive contact with at least one of the first thermally conductive vias and a plurality of the second thermally conductive vias; and wherein an areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias.
2. The printed circuit board of claim 1 , wherein each of at least a subset of the first thermally conductive vias (208, 510) is in thermally conductive contact with a respective portion of a surface (214) of the printed circuit board, wherein the respective portion of the surface of the printed circuit board is for attachment to an electronic component (402).
3. The printed circuit board of claim 2, wherein each portion of the surface (214) of the printed circuit board comprises an end of a respective one of the first thermally conductive vias (208, 510).
4. The printed circuit board of any of claims 1 to 3, wherein each of the at least one third thermally conductive via (212, 514, 522) is in thermally conductive contact with more of the second thermally conductive vias (210, 512, 520) than the first thermally conductive vias (208, 510).
5. The printed circuit board of any of claims 1 to 4, wherein the at least one third thermally conductive via (212, 514, 522) contacts the at least one of the first thermally conductive vias (208, 510) and the plurality of the second thermally conductive vias (210, 512, 520).
6. The printed circuit board of any of claims 1 to 5, wherein: the one or more first layers (202, 504) include a further first layer (302), wherein the further first layer includes a further first thermally conductive via (304) that is in thermally conductive contact with a plurality of the first thermally conductive vias (208, 510); and / orthe one or more second layers (204, 506) include a further second layer (306), wherein the further second layer includes a further second thermally conductive via (308) that is in thermally conductive contact with a plurality of the second thermally conductive vias (210, 512, 520).
7. The printed circuit board of any of claims 1 to 6, wherein the least one third thermally conductive via (212, 514, 522) comprises a bar via.
8. The printed circuit board of any of claims 1 to 7, wherein each of one or more of the first thermally conductive vias (208, 510), the second thermally conductive vias (210, 512, 520) and / or the at least one third thermally conductive via (212, 514, 522) comprises a stacked via.
9. The printed circuit board of any of claims 1 to 8, wherein each of one or more of the first thermally conductive vias (208, 510), the second thermally conductive vias (210, 512, 520) and / or the at least one third thermally conductive via (212, 514, 522) comprises a metal via and / or a filled via.
10. The printed circuit board of any of claims 1 to 9, wherein the one or more third layers (206, 508, 520) include a plurality of third thermally conductive vias (212, 514, 522).11 . The printed circuit board of claim 10, wherein each third thermally conductive via (212, 514, 522) is in thermally conductive contact with a respective at least one of the first thermally conductive vias (208, 510) and a respective plurality of the second thermally conductive vias (210, 512, 520).
12. The printed circuit board of claim 10, wherein each third thermally conductive via (212, 514, 522) is in thermally conductive contact with: at least one of the first thermally conductive vias (208, 510) and at least one third thermally conductive via; a plurality of the second thermally conductive vias (210, 512, 520) and at least one third thermally conductive via; or a plurality of third thermally conductive vias.
13. An electronic device (400) comprising: at least one electronic component (402); anda printed circuit board (200, 300, 400, 500) comprising one or more first layers (202, 504), one or more second layers (204, 506), and one or more third layers (206, 508, 520) between the one or more first layers and the one or more second layers; wherein the at least one electronic component is attached to the printed circuit board by a plurality of discrete thermally conductive portions (404); wherein the one or more first layers include a plurality of first thermally conductive vias (208, 510), the one or more second layers include a plurality of second thermally conductive vias (210, 512, 520), and the one or more third layers include at least one third thermally conductive via (212, 514, 522), the at least one third thermally conductive via in thermally conductive contact with at least one of the first thermally conductive vias and a plurality of the second thermally conductive vias; wherein each of the first thermally conductive vias is in thermally conductive contact with one of the thermally conductive portions; and wherein an areal number density of the second thermally conductive vias is higher than an areal number density of the first thermally conductive vias.
14. The electronic device of claim 13, wherein each of the thermally conductive portions (404) is attached to a respective one of the first thermally conductive vias (208, 510).
15. The electronic device of claim 13 or 14, wherein each of the at least one third thermally conductive via (212, 514, 522) is in thermally conductive contact with more of the second thermally conductive vias (210, 512, 520) than the first thermally conductive vias (208, 510).
16. The electronic device of any of claims 13 to 15, wherein the at least one third thermally conductive via (212, 514, 522) contacts the at least one of the first thermally conductive vias (208, 510) and the plurality of the second thermally conductive vias (210, 512, 520).
17. The electronic device of any of claims 13 to 16, wherein: the one or more first layers (202, 504) include a further first layer (302), wherein the further first layer includes a further first thermally conductive via (304) that is in thermally conductive contact with a plurality of the first thermally conductive vias (208, 510); and / or the one or more second layers (204, 506) include a further second layer (306), wherein the further second layer includes a further second thermally conductive via (308) that is in thermally conductive contact with a plurality of the second thermally conductive vias (210, 512, 520).
18. The electronic device of any of claims 13 to 17, wherein the least one third thermally conductive via (212, 514, 522) comprises a bar via.
19. The electronic device of any of claims 13 to 18, wherein each of one or more of the first thermally conductive vias (208, 510), the second thermally conductive vias (210, 512, 520) and / or the at least one third thermally conductive via (212, 514, 522) comprises a stacked via.
20. The electronic device of any of claims 13 to 19, wherein each of one or more of the first thermally conductive vias (208, 510), the second thermally conductive vias (210, 512, 520) and / or the at least one third thermally conductive via (212, 514, 522) comprises a metal via and / or a filled via.21 . The electronic device of any of claims 13 to 20, wherein the one or more third layers (206, 508, 520) include a plurality of third thermally conductive vias (212, 514, 522).
22. The electronic device of claim 21 , wherein each third thermally conductive via (212, 514, 522) is in thermally conductive contact with a respective at least one of the first thermally conductive vias (208, 510) and a respective plurality of the second thermally conductive vias (210, 512, 520).
23. The electronic device of claim 21 , wherein each third thermally conductive via (212, 514, 522) is in thermally conductive contact with: at least one of the first thermally conductive vias (208, 510) and at least one third thermally conductive via; a plurality of the second thermally conductive vias (210, 512, 520) and at least one third thermally conductive via; or a plurality of third thermally conductive vias.
24. The electronic device of any of claims 13 to 23, wherein the at least one electronic component comprises at least one integrated circuit die.
25. The electronic device of any of claims 13 to 24, wherein each of the thermally conductive portions (404) comprises a solder ball.
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