High frequency power amplifier

Abstract

A high frequency power amplifier (100) comprises a plurality of unit amplifiers (4) mounted on a semiconductor substrate (1). The plurality of unit amplifiers (4) each have: a high frequency transistor (12) which has a plurality of gate fingers (9), at least one drain finger (8), and a plurality of source fingers (7); a gate bus line (13) which is connected to one end of each of the plurality of gate fingers (9); a drain bus line (14) which is connected to one end of the at least one drain finger (8); a gate bias circuit (20) which is connected to the gate bus line (13); and a bias terminal (21) which supplies a voltage to the gate bias circuit (20). The voltages supplied to the respective bias terminals (21) of the plurality of unit amplifiers (4) are the same or different.

Description

High-frequency power amplifier

[0001] The present disclosure relates to a high-frequency power amplifier used in a device that transmits high-frequency signals.

[0002] BACKGROUND ART In recent years, radio frequency power amplifiers using gallium nitride (GaN) transistors, which are characterized by high output and high efficiency, have been used in wireless communication base stations and the like used in microwave and millimeter wave bands.

[0003] In order to drive a GaN transistor, a bias circuit is required for the gate of the transistor. For example, Patent Document 1 discloses a radio frequency power amplifier in which one bias circuit for one amplifying transistor is provided on the same chip.

[0004] Furthermore, Patent Document 2 discloses an amplifier in which a two-stage amplifier and two corresponding bias circuits are provided on the same chip.

[0005] International Publication No. 2020 / 203507 International Publication No. 2022 / 075315

[0006] However, from a manufacturing perspective, GaN transistors have large variations in the quality of the epitaxial substrate and the dimensional accuracy of the process devices, making it difficult to maintain a constant threshold voltage. This means that the drain idle current varies depending on the transistor, particularly the gate finger position, within the semiconductor chip, resulting in variations in the drain idle current. This poses the problem of variations in the high-frequency characteristics of gain and distortion, which are typical characteristics of high-frequency power amplifiers.

[0007] In the technology of Patent Document 1, when the distance between gate fingers is long or when there are a large number of gate fingers, the distance between the leftmost gate finger and the rightmost gate finger becomes long, resulting in variations in the drain idle current of the transistor.

[0008] Furthermore, the technology of Patent Document 2 compensates for the drain idle current by providing a bias circuit to suppress changes in the characteristics of the amplifier due to thermal history, but this does not suppress variations in the drain idle current within the semiconductor chip, and has the same issues as Patent Document 1.

[0009] Therefore, an object of the present disclosure is to provide a radio frequency power amplifier that can suppress variations in radio frequency characteristics such as gain within a semiconductor chip and variations between radio frequency power amplification devices that use the radio frequency power amplifier.

[0010] In order to achieve the above object, a radio frequency power amplifier according to one embodiment of the present disclosure includes a semiconductor substrate and a plurality of unit amplifiers mounted on the semiconductor substrate, each of the plurality of unit amplifiers having a radio frequency transistor having a plurality of gate fingers, one or more drain fingers, and a plurality of source fingers, a gate bus line connected to one end of the plurality of gate fingers, a drain bus line connected to one end of the one or more drain fingers, a gate bias circuit connected to the gate bus line, and a bias terminal that supplies a voltage to the gate bias circuit, the same or different voltages are supplied to the bias terminals of each of the plurality of unit amplifiers, the gate bus lines of each of the plurality of unit amplifiers are all physically spaced apart from each other, and adjacent drain bus lines of each of the plurality of unit amplifiers are all connected to each other by drain bus connection wiring.

[0011] According to the radio frequency power amplifier according to the present disclosure, it is possible to suppress variations in radio frequency characteristics such as gain within a semiconductor chip, and variations between radio frequency power amplification devices using the radio frequency power amplifier.

[0012] FIG. 1 is a diagram illustrating an example of a radio frequency power amplifier according to a first embodiment. FIG. 2 is a diagram illustrating an example of a radio frequency power amplifier according to a second embodiment. FIG. 3 is a diagram illustrating a comparative example and an example of an example of a drain idle current of the radio frequency power amplifier according to the second embodiment. FIG. 4 is a diagram illustrating a comparative example and an example of an example of a junction temperature of the radio frequency power amplifier according to the third embodiment. FIG. 5 is a diagram illustrating an example of a gate bias circuit of a radio frequency power amplifier according to a fourth embodiment. FIG. 6 is an example of a plan view of a radio frequency transistor of the radio frequency power amplifier according to the fourth embodiment. FIG. 7 is an example of a plan view of the radio frequency power amplifier according to the fourth embodiment. FIG. 8 is a diagram illustrating an example of a gate bias circuit of a radio frequency power amplifier according to a fifth embodiment. FIG. 9 is an example of a plan view of a bias transistor of the radio frequency power amplifier according to the fifth embodiment. FIG. 10 is a diagram illustrating a comparative example and an example of an example of a drain idle current of the radio frequency power amplifier according to the fifth embodiment. FIG. 11 is an example of a plan view of a radio frequency power amplifier according to a sixth embodiment. FIG. 12 is a diagram illustrating an example of a radio frequency power amplifier according to the seventh embodiment.

[0013] Hereinafter, radio frequency power amplifiers according to embodiments will be described in detail with reference to the drawings. Each of the embodiments described below represents a specific example of the present disclosure. The numerical values, shapes, materials, components, component arrangements, and connection configurations shown in the following embodiments are merely examples and are not intended to limit the present disclosure. Furthermore, each drawing is not necessarily an exact illustration. In each drawing, substantially identical components are denoted by the same reference numerals, and redundant descriptions may be omitted or simplified. Furthermore, in this specification, "connection" refers to an electrical connection, and includes not only a case where two circuit elements are directly connected, but also a case where two circuit elements are indirectly connected with another circuit element inserted between them.

[0014] First Embodiment A radio frequency power amplifier according to a first embodiment will be described with reference to FIG.

[0015] 1 is a diagram showing an example of a radio frequency power amplifier 100 according to embodiment 1. The radio frequency power amplifier 100 includes a plurality of unit amplifiers 4 mounted on a semiconductor substrate 1.

[0016] The semiconductor substrate 1 is a substrate on which an amplifier for amplifying a high frequency signal is mounted, and in this embodiment, a plurality of unit amplifiers 4 (three in FIG. 1) are formed on the semiconductor substrate 1.

[0017] Each of the multiple unit amplifiers 4 is composed of a radio frequency (RF) transistor 12 having a multi-finger configuration with multiple gate fingers 9 (six in FIG. 1 ), one or more drain fingers 8 (three in FIG. 1 ), and multiple source fingers 7 (four in FIG. 1 ), a gate bus line 13 connected to one end of the multiple gate fingers 9, a drain bus line 14 connected to one end of one or more drain fingers 8, a gate bias circuit 20 (20a, 20b, 20c) connected to the gate bus line 13, and bias terminals 21 (21a, 21b, 21c) that supply voltage to the gate bias circuit 20. Note that in this specification and drawings, the radio frequency transistor may also be referred to as an RF transistor or RF Tr. Also, because three unit amplifiers 4 are formed in FIG. 1 , in order to distinguish between the three, the gate bias circuits 20 are referred to as 20a, 20b, and 20c, and the bias terminals 21 are referred to as 21a, 21b, and 21c. The bias terminals 21a, 21b, and 21c are supplied with the same or different voltages from an external power supply (not shown). The gate bias circuit 20a outputs a gate bias voltage VG1, the gate bias circuit 20b outputs a gate bias voltage VG2, and the gate bias circuit 20c outputs a gate bias voltage VG3.

[0018] In this specification and the drawings, the three components Na, Nb, and Nc may be represented by the reference numerals N, Na, Nb, and Nc, and may be referred to as the component N. This applies not only to the components 20 and 21, but also to the components 22 to 33 described below.

[0019] The gate bus lines 13 of the plurality of unit amplifiers 4 are all arranged so as to be physically spaced apart from one another. On the other hand, the drain bus lines 14 of the plurality of unit amplifiers 4 are connected to adjacent drain bus lines 14 by drain bus connection wiring 18 (two locations in FIG. 1 ).

[0020] It is also possible to provide a ground via 11 connected to the rear surface of the semiconductor substrate 1 in each of the plurality of source fingers 7, and connect the plurality of source fingers 7 to a ground potential.

[0021] High frequency signals are input to the gate bus lines 13 of the plurality of unit amplifiers 4 or to wiring patterns (not shown) connected to the gate bus lines 13. The input high frequency signals are amplified by the unit amplifiers 4 and then combined.

[0022] When laying out high-frequency transistors with large gate widths on a semiconductor substrate, it is common to subdivide the high-frequency transistor and set up units that do not cause characteristic variations or instability due to oscillation, forming a multiple-unit configuration. Here, these units are defined as unit amplifiers 4. Since each of the multiple unit amplifiers 4 has a gate bias circuit 20, it is possible to apply different gate bias voltages to the gate bus lines 13 of the multiple unit amplifiers 4, thereby individually adjusting the characteristics of the multiple unit amplifiers 4.

[0023] The high-frequency transistor 12 may be made of GaN, GaAs, LDMOS (Laterally Diffused Metal Oxide Semiconductor), or the like.

[0024] As described above, the radio frequency power amplifier 100 according to the first embodiment comprises a semiconductor substrate 1 and a plurality of unit amplifiers 4 mounted on the semiconductor substrate 1, each of the plurality of unit amplifiers 4 comprising a radio frequency transistor 12 having a plurality of gate fingers 9, one or more drain fingers 8, and a plurality of source fingers 7, a gate bus line 13 connected to one end of the plurality of gate fingers 9, a drain bus line 14 connected to one end of the one or more drain fingers 8, a gate bias circuit 20 connected to the gate bus line 13, and a bias terminal 21 for supplying a voltage to the gate bias circuit 20, the same or different voltages are supplied to the bias terminals 21 of each of the plurality of unit amplifiers 4, the gate bus lines 13 of each of the plurality of unit amplifiers 4 are all physically spaced apart from each other, and adjacent drain bus lines 14 of each of the plurality of unit amplifiers 4 are all connected to each other by drain bus connection wiring 18.

[0025] By providing a gate bias circuit 20 for each of the multiple unit amplifiers 4, it becomes possible to individually adjust the characteristics of the multiple unit amplifiers 4. In other words, the entire amplifier is made up of a collection of several unit amplifiers, and a gate bias circuit is provided for each unit amplifier to adjust the drain idle current and the drain current during amplification operation. This realizes a radio frequency power amplifier 100 that can suppress variations in radio frequency characteristics such as gain within a semiconductor substrate, and variations between radio frequency power amplifier devices that use the radio frequency power amplifier 100.

[0026] In the first embodiment, the number of unit amplifiers 4 is three, but the number is not limited to three.

[0027] Furthermore, although an example has been described in which the gate widths of the high frequency transistors 12 in the plurality of unit amplifiers 4 are the same, one or all may be different.

[0028] In the first embodiment, the unit amplifier 4 has been described as an example of a high-frequency transistor 12 having a multi-finger configuration with six gate fingers 9, three drain fingers 8, and four source fingers 7, but the present invention is not limited to this and may have a plurality of gate fingers 9, one or more drain fingers 8, and a plurality of source fingers 7. The number of the plurality of gate fingers 9 may be twice the number of the one or more drain fingers 8. Furthermore, the number of the plurality of source fingers 7 may be the number of the one or more drain fingers 8 plus one.

[0029] Second Embodiment A radio frequency power amplifier according to a second embodiment will be described with reference to FIGS. 2 and 3. FIG.

[0030] 2 is a diagram showing an example of a radio frequency power amplifier 200 according to embodiment 2. Compared to radio frequency power amplifier 100 according to embodiment 1 shown in FIG. 1 , radio frequency power amplifier 200 according to embodiment 2 further includes voltage control terminals 22 (22 a, 22 b, 22 c) connected to gate bias circuits 20 of unit amplifiers 4.

[0031] 3A and 3B are diagrams showing an example of a comparative example ( FIG. 3A ) and an example ( FIG. 3B ) of the drain idle current of the radio frequency power amplifier 200 according to embodiment 2. The drain idle current is defined as the drain current when no radio frequency signal is input to the multiple unit amplifiers 4 and the unit amplifiers 4 are in non-amplifying operation.

[0032] Hereinafter, a radio frequency power amplifier 200 according to the second embodiment will be described, focusing on the differences from the radio frequency power amplifier 100 according to the first embodiment.

[0033] In the first embodiment, the gate bias circuit 20 only had a bias terminal 21, but in the second embodiment, as shown in Fig. 2, a voltage control terminal 22 is further provided. The same voltage may be applied to the bias terminals 21 of the multiple unit amplifiers 4. The same or different voltages are applied to the voltage control terminals 22 of the multiple unit amplifiers 4 so that the drain idle currents of the RF transistors 12 of the multiple unit amplifiers 4 are constant. The voltage applied to the voltage control terminal 22 may be lower than the voltage applied to the bias terminal 21.

[0034] 3 shows the drain idle current characteristics of the RF transistor 12 with respect to the output voltage from the gate bias circuit 20 of the three unit amplifiers 4 shown in FIG. 2. The voltage applied to the voltage control terminal 22 is VGGi (i=1, 2, 3), and the output voltage from the gate bias circuit 20 is VGi (i=1, 2, 3). In this case, VGi is equivalent to the voltage applied to the gate bus line 13 of the RF transistor 12.

[0035] 3A shows, as a comparative example, the drain idle current when the three RF transistors 12 have different voltage-current characteristics, the same voltage (VGG1=VGG2=VGG3) is applied to the voltage control terminal 22, and the same output voltage (VG1=VG2=VG3) is output from the gate bias circuit 20. This assumes, for example, that the threshold voltages of the three RF transistors 12 are different. As shown in FIG. 3A, the drain idle currents of the RF transistors 12 vary, and as a result, the high-frequency characteristics, including the gain of the unit amplifier 4, vary and cannot operate uniformly.

[0036] On the other hand, Fig. 3B shows the drain idle current when different voltages are applied to the voltage control terminal 22 and different output voltages are output from the gate bias circuit 20 when the three RF transistors 12 have different voltage-current characteristics in this embodiment. As shown in Fig. 3B, the voltage VGGi applied to the voltage control terminal 22 is adjusted so that the drain idle currents of the RF transistors 12 are equal, and different output voltages VGi are output from the gate bias circuit 20. As a result, the high-frequency characteristics, including the gain of the unit amplifiers 4, are equalized, and uniform operation can be achieved.

[0037] As described above, the radio-frequency power amplifier 200 according to the second embodiment further includes a voltage control terminal 22 connected to the gate bias circuit 20, and adjusts the voltage applied to each of the voltage control terminals 22 so that the drain currents of the radio-frequency transistors 12 of each of the unit amplifiers 4 during non-amplification operation are equal.

[0038] By adopting such a configuration of the second embodiment, as a specific example of the effect of the second embodiment, the high frequency characteristics, including the gains, of the plurality of unit amplifiers 4 in the semiconductor substrate 1 are made equal, thereby realizing uniform operation and reducing variation in the characteristics of the high frequency power amplifier 200.

[0039] (Embodiment 3) A radio frequency power amplifier according to embodiment 3 will be described with reference to Fig. 2 and Fig. 4. The radio frequency power amplifier according to embodiment 3 has the same configuration as radio frequency power amplifier 200 according to embodiment 2. Fig. 4 shows an example of a comparative example (Fig. 4A) and an example (Fig. 4B) of the junction temperature of radio frequency power amplifier 200 according to embodiment 3.

[0040] Hereinafter, radio frequency power amplifier 200 according to the third embodiment will be described, focusing on the differences from radio frequency power amplifier 200 according to the second embodiment.

[0041] A voltage is applied to the voltage control terminal 22 to adjust the junction temperature during high frequency amplification operation of the RF transistors 12 of the multiple unit amplifiers 4. Here, the junction temperature is defined as the channel temperature of the RF transistor 12. Furthermore, during high frequency amplification operation, a high frequency signal is input to the multiple unit amplifiers 4 and amplification operation is performed.

[0042] 4 shows the junction temperatures of the RF transistors 12 and the output voltages VGi (i=1, 2, 3) from the gate bias circuits 20 of the three unit amplifiers 4 shown in FIG. 2. In this case, VGi is equivalent to the voltage applied to the gate bus line 13 of the RF transistor 12.

[0043] 4A shows, as a comparative example, the junction temperatures during high frequency amplification operation when the gate voltages VGi of the three RF transistors 12 (RF Tr1, RF Tr2, RF Tr3) are the same. During high frequency amplification operation, the junction temperature of the central RF transistor 12 (RF Tr2) is higher than the junction temperatures of the two outer RF transistors 12 (RF Tr1 and RF Tr3). This is because the central RF transistor 12 (RF Tr2) is affected not only by its own heat generation but also by the heat generated by the two outer RF transistors 12 (RF Tr1 and RF Tr3). As a result, the high frequency characteristics, including the gain, of the multiple unit amplifiers 4 vary, preventing them from operating uniformly.

[0044] On the other hand, Figure 4(B) shows the junction temperature when the VGi of the three RF transistors 12 is made different in this embodiment. As shown in Figure 4(B), the output voltage VGi from the gate bias circuit 20 is adjusted so that the junction temperatures of the three RF transistors 12 (RF Tr1, RF Tr2, RF Tr3) are constant. Specifically, the VGi of the two outer RF transistors 12 (RF Tr1 and RF Tr3) is set higher than the VGi of the central RF transistor 12 (RF Tr2). As a result, the high-frequency characteristics, including the gain, of the unit amplifiers 4 become equal, allowing them to operate uniformly.

[0045] As described above, the radio frequency power amplifier 200 according to the third embodiment further includes a voltage control terminal 22 connected to the gate bias circuit 20, and adjusts the voltage applied to each of the voltage control terminals 22 so that the junction temperatures of the radio frequency transistors 12 of each of the unit amplifiers 4 during amplification operation are equalized.

[0046] By adopting the configuration of the third embodiment, the high frequency characteristics, including the gain, of the multiple unit amplifiers 4 within the semiconductor substrate 1 become equal, thereby realizing uniform operation, and it is expected that the variation in the characteristics of the high frequency power amplifier 200 will be reduced and the characteristics will be stabilized.

[0047] Fourth Embodiment A radio frequency power amplifier according to a fourth embodiment will be described with reference to FIGS. 5, 6 and 7. FIG.

[0048] Fig. 5 is a diagram showing an example of a gate bias circuit 20 of a radio frequency power amplifier 200 according to embodiment 4. Fig. 6 is a diagram showing an example of a plan view of a radio frequency transistor 12 of the radio frequency power amplifier 200 according to embodiment 4. Fig. 7 is a diagram showing an example of a plan view of the radio frequency power amplifier 200 according to embodiment 4.

[0049] 5 , one end of a first resistor 24 is connected to a bias terminal 21, one end of a second resistor 25 is connected to a voltage control terminal 22, and the other end of the first resistor 24 is connected to the other end of the second resistor 25. The connection point between the first resistor 24 and the second resistor 25 is connected to the gate bus line 13 of the RF transistor 12.

[0050] The first resistor 24 and the second resistor 25 are formed on the semiconductor substrate 1. The first resistor 24 and the second resistor 25 may be either a metal resistor or a semiconductor resistor.

[0051] The RF transistor 12 shown in FIG. 6 is composed of one or more source fingers 7, one or more gate fingers 9, one or more drain fingers 8, a gate bus line 13 connecting the one or more gate fingers 9 in common, and a drain bus line 14 connecting the one or more drain fingers 8 in common.

[0052] The source fingers 7 of the RF transistor 12 are connected to one or more ground vias 11. The ground vias 11 penetrate the semiconductor substrate 1 and provide electrical continuity between the ground terminals on the top and bottom surfaces of the semiconductor substrate 1.

[0053] As an example, the gate length of the gate finger 9 of the RF transistor 12 is 350 μm, and the number of fingers is six, but the present invention is not limited to this.

[0054] In the radio frequency power amplifier 200 shown in Fig. 7, three unit amplifiers 4 are arranged in parallel. The RF transistors 12 of the three unit amplifiers 4 are the same as those in the plan view shown in Fig. 6. The drain bus lines 14 of the three unit amplifiers 4 are connected by drain bus connection wiring 18. The gate bias circuit 20 (20a, 20b, 20c) is placed on the left side of the RF transistor 12 and is connected to the gate bus line 13. In the gate bias circuit 20 (20a, 20b, 20c), a first resistor 24 (24a, 24b, 24c) and a second resistor 25 (25a, 25b, 25c) are arranged in parallel.

[0055] The gate bias circuit 20 may be located on the right side of the RF transistor 12 or below it.

[0056] As described above, in the radio-frequency power amplifier 200 according to the fourth embodiment, the gate bias circuit 20 is formed on the semiconductor substrate 1 and has the first resistor 24 and the second resistor 25 connected in series, one end of the first resistor 24 is connected to the bias terminal 21, one end of the second resistor is connected to the voltage control terminal 22, and the connection point between the other end of the first resistor 24 and the other end of the second resistor 25 is connected to the gate bus line 13.

[0057] Fifth Embodiment A radio frequency power amplifier 200 according to a fifth embodiment will be described with reference to FIGS. 8, 9, and 10. FIG. 8 is a diagram showing an example of a gate bias circuit 20 of the radio frequency power amplifier 200 according to the fifth embodiment. FIG. 9 is a diagram showing an example of a plan view of a bias transistor 23 of the radio frequency power amplifier 200 according to the fifth embodiment. FIG. 10 is a diagram showing an example of a comparative example (FIG. 10A) and an example (FIG. 10B) of the drain idle current of the radio frequency power amplifier 200 according to the fifth embodiment. The radio frequency power amplifier 200 according to the fifth embodiment corresponds to another example of the gate bias circuit 20 in the radio frequency power amplifier 200 according to the fourth embodiment.

[0058] 8, one end of a first resistor 24 is connected to a bias terminal 21, and one end of a second resistor 25 and the gate of a bias transistor 23 are connected to a voltage control terminal 22. The other end of the second resistor 25 is connected to the source of the bias transistor 23. The other end of the first resistor 24 is connected to the drain of the bias transistor 23. The connection point between the other end of the first resistor 24 and the drain of the bias transistor 23 is connected to the gate bus line 13 of the RF transistor 12. The first resistor 24, the second resistor 25, and the bias transistor 23 are formed on a semiconductor substrate 1. The first resistor 24 and the second resistor 25 may be either metal resistors or semiconductor resistors.

[0059] The bias transistor 23 in Figure 9 is composed of two source fingers 7a, two gate fingers 9a, one drain finger 8a, a gate bus line 13a connecting the two gate fingers 9a in common, and a source bus line 15 connecting the two source fingers 7a in common. While Figure 9 illustrates an example of two source fingers 7a, two gate fingers 9a, and one drain finger 8a, this is not limiting. The number of gate fingers 9a may be twice the number of drain fingers 8a. Furthermore, the number of source fingers 7a may be the number of drain fingers 8a plus one.

[0060] The gate length of the gate finger 9 a of the biasing transistor 23 is, for example, 50 μm, but is not limited to this, and may be different from or the same as the gate length of the gate finger 9 of the RF transistor 12 shown in FIG.

[0061] 10A and 10B are diagrams showing an example of a comparative example (FIG. 10A) and an example (FIG. 10B) of the drain idle current of the radio frequency power amplifier 200 according to the fifth embodiment. FIG. 10 shows the drain idle current characteristics of the RF transistor 12 with respect to the voltage applied to the voltage control terminal 22 of the three unit amplifiers 4 shown in FIG. 2. The voltage applied to the voltage control terminal 22 is designated as VGGi (i=1, 2, 3).

[0062] 10A shows, as a comparative example, the drain idle current when the same voltage (VGG1=VGG2=VGG3) is applied to the voltage control terminal 22 when three RF transistors 12 (RF Tr1, RF Tr2, RF Tr3) have different voltage-current characteristics. This assumes, for example, that the threshold voltages of the three RF transistors 12 are different. As shown in FIG. 10A, the drain idle current of each RF transistor 12 varies, and as a result, the high-frequency characteristics, including the gain of the unit amplifier 4, vary and cannot operate uniformly.

[0063] 10B shows the drain idle current when the gate bias circuit 20 shown in FIGS. 8 and 9 is used in the present embodiment where the three RF transistors 12 have different voltage-current characteristics. As shown in FIG. 10B, because the gate bias circuit 20 serves as a threshold voltage compensation circuit for the RF transistors 12, the variation in the drain idle current is reduced even when the same voltage (VGG1=VGG2=VGG3) is applied to the voltage control terminal 22. As a result, the high-frequency characteristics, including the gain of the unit amplifiers 4, become equal, and uniform operation can be achieved.

[0064] As described above, in the radio frequency power amplifier 200 according to the fifth embodiment, the gate bias circuit 20 further includes the bias transistor 23 formed on the semiconductor substrate 1, the voltage control terminal 22 is connected to the gate of the bias transistor 23, the other end of the first resistor 24 is connected to the drain of the bias transistor 23, and the other end of the second resistor 25 is connected to the source of the bias transistor 23.

[0065] By adopting such a configuration as in the fifth embodiment, the high frequency characteristics, including the gain, of the plurality of unit amplifiers 4 in the semiconductor substrate 1 become equal, thereby realizing uniform operation and reducing variations in the characteristics of the high frequency power amplifier 200.

[0066] Sixth Embodiment A radio frequency power amplifier according to a sixth embodiment will be described with reference to FIG.

[0067] The radio frequency power amplifier 200 according to the sixth embodiment corresponds to an example of the plan view of the radio frequency power amplifier 200 according to the fifth embodiment.

[0068] 11 is a diagram showing an example of a plan view of a radio frequency power amplifier 200 according to embodiment 6. The radio frequency power amplifier 200 has three unit amplifiers 4 arranged in parallel. The RF transistors 12 of the three unit amplifiers 4 are the same as those shown in the plan view of FIG. 6. The drain bus lines 14 of the three unit amplifiers 4 are connected by drain bus connecting wiring 18.

[0069] The gate bias circuit 20 is the same as the circuit diagram shown in Fig. 8 and is connected to the gate bus line 13. The bias transistors 23 (23a, 23b, 23c) are the same as those shown in the plan view of Fig. 9. The gate bias circuit 20 is composed of two source fingers 7a, two gate fingers 9a, one drain finger 8a, a gate bus line 13a connecting the two gate fingers 9a in common, and a source bus line 15 connecting the two source fingers 7 in common.

[0070] The bias transistor 23 of the gate bias circuit 20 is arranged in the area between two lines (dashed lines in Figure 11) drawn along one end and the other end of the source fingers 7 of the RF transistors 12 of the multiple unit amplifiers 4 in the direction in which the multiple unit amplifiers 4 are arranged.

[0071] By arranging the bias transistor 23 in the vicinity of the RF transistor 12, the difference in threshold voltage between the bias transistor 23 and the RF transistor 12 becomes smaller, and the bias transistor 23 functions more effectively as a threshold voltage compensation circuit for the RF transistor 12.

[0072] As described above, in the radio-frequency power amplifier according to the sixth embodiment, when two lines are drawn along one end and the other end of the source fingers 7 of the radio-frequency transistors 12 of the unit amplifiers 4 in the direction in which the unit amplifiers 4 are arranged, the bias transistors 23 of the unit amplifiers 4 are arranged in the area sandwiched between the two lines.

[0073] By adopting such a configuration of the sixth embodiment, the high frequency characteristics, including the gain, of the plurality of unit amplifiers 4 in the semiconductor substrate 1 become equal, thereby realizing uniform operation and reducing variations in the characteristics of the high frequency power amplifier 200.

[0074] Seventh Embodiment A radio frequency power amplifier according to a seventh embodiment will be described with reference to FIG.

[0075] 12 is a diagram showing an example of a radio frequency power amplifier 300 according to embodiment 7. Hereinafter, radio frequency power amplifier 300 according to embodiment 7 will be described, focusing on the differences from radio frequency power amplifier 200 according to embodiment 2.

[0076] In the second embodiment, there is one gate bias circuit 20 per unit amplifier 4, but in the seventh embodiment, there are two gate bias circuits per unit amplifier 4. The respective gate bias circuits are referred to as first gate bias circuits 28 (28a, 28b, 28c) and second gate bias circuits 29 (29a, 29b, 29c).

[0077] The first gate bias circuit 28 and the second gate bias circuit 29 are connected to the switch circuits 26 (26a, 26b, 26c). The switch circuits 26 are connected to the gate bus lines 13.

[0078] The switch circuit 26 is provided with switching terminals 27 (27a, 27b, 27c), and selects either a first gate bias circuit 28 or a second gate bias circuit 29 according to the voltage applied to the switching terminal 27.

[0079] The first gate bias circuit 28 includes first bias terminals 30 (30a, 30b, 30c) and first voltage control terminals 31 (31a, 31b, 31c).

[0080] The second gate bias circuit 29 includes second bias terminals 32 (32a, 32b, 32c) and second voltage control terminals 33 (33a, 33b, 33c).

[0081] It is desirable that the output voltages from the first gate bias circuit 28 and the second gate bias circuit 29 to the gate bus line 13 of the RF transistor 12 are different. For example, the first gate bias circuit 28 is biased so that the RF transistor 12 operates in class AB, and the second gate bias circuit 29 is biased so that the RF transistor 12 operates in class C. Setting them in this way increases the degree of freedom in the operating conditions of the high-frequency power amplifier 300.

[0082] As described above, in the radio-frequency power amplifier 300 according to the seventh embodiment, each of the plurality of unit amplifiers 4 has a plurality of gate bias circuits, for example, the first gate bias circuit 28 and the second gate bias circuit 29, and the plurality of gate bias circuits are each connected to one end of the switch circuit 26, the other end of which is connected to the gate bus line 13 of the radio-frequency transistor 12, and one of the plurality of gate bias circuits is selected by the switch circuit 26.

[0083] By adopting such a configuration of the seventh embodiment, it is possible to switch the output power of the high frequency power amplifier 300 or change the operating class of the amplifier.

[0084] While the radio frequency power amplifier according to the present disclosure has been described above based on the embodiments, the present disclosure is not limited to these embodiments. As long as they do not deviate from the gist of the present disclosure, various modifications conceivable by those skilled in the art to the present embodiments and other forms constructed by combining some of the components of the embodiments are also included within the scope of the present disclosure.

[0085] A radio frequency power amplifier according to the present disclosure can be used as an amplifier provided in a wireless communication base station used in the microwave band or millimeter wave band.

[0086] REFERENCE SIGNS LIST 1 semiconductor substrate 4 unit amplifier 7, 7a source finger 8, 8a drain finger 9, 9a gate finger 11 ground via 12 radio frequency (RF) transistor 13, 13a gate bus line 14 drain bus line 15 source bus line 18 drain bus connection wiring 20, 20a, 20b, 20c gate bias circuit 21, 21a, 21b, 21c bias terminal 22, 22a, 22b, 22c voltage control terminal 23, 23a, 23b, 23c bias transistor 24, 24a, 24b, 24c first resistor 25, 25a, 25b, 25c second resistor 26, 26a, 26b, 26c switch circuit 27, 27a, 27b, 27c switching terminal 28, 28a, 28b, 28c First gate bias circuit 29, 29a, 29b, 29c Second gate bias circuit 30, 30a, 30b, 30c First bias terminal 31, 31a, 31b, 31c First voltage control terminal 32, 32a, 32b, 32c Second bias terminal 33, 33a, 33b, 33c Second voltage control terminal 100, 200, 300 High frequency power amplifier

Claims

1. A radio frequency power amplifier comprising: a semiconductor substrate; and a plurality of unit amplifiers mounted on the semiconductor substrate, each of the plurality of unit amplifiers comprising: a radio frequency transistor having a plurality of gate fingers, one or more drain fingers, and a plurality of source fingers; a gate bus line connected to one end of the plurality of gate fingers; a drain bus line connected to one end of the one or more drain fingers; a gate bias circuit connected to the gate bus line; and a bias terminal for supplying a voltage to the gate bias circuit, wherein the same or different voltages are supplied to the bias terminals of each of the plurality of unit amplifiers; the gate bus lines of each of the plurality of unit amplifiers are all physically spaced apart from each other; and adjacent drain bus lines of each of the plurality of unit amplifiers are all connected by drain bus connection wiring.

2. The radio frequency power amplifier according to claim 1, further comprising a voltage control terminal connected to said gate bias circuit, and adjusting the voltage applied to said voltage control terminal so that the drain currents of the radio frequency transistors in each of said plurality of unit amplifiers when in non-amplifying operation are equal.

3. The radio frequency power amplifier according to claim 1, further comprising a voltage control terminal connected to said gate bias circuit, and adjusting the voltage applied to said voltage control terminal so that the junction temperatures of the radio frequency transistors in each of said unit amplifiers during amplification operations are equalized.

4. The radio frequency power amplifier according to claim 2 or 3, wherein the gate bias circuit is formed on the semiconductor substrate and has a first resistor and a second resistor connected in series, one end of the first resistor is connected to the bias terminal, one end of the second resistor is connected to the voltage control terminal, and the connection point between the other end of the first resistor and the other end of the second resistor is connected to the gate bus line.

5. A radio frequency power amplifier according to claim 2 or 3, wherein the gate bias circuit is formed on the semiconductor substrate and has a first resistor and a second resistor connected in series, one end of the first resistor is connected to the bias terminal, and one end of the second resistor is connected to the voltage control terminal, the gate bias circuit further has a bias transistor formed on the semiconductor substrate, the voltage control terminal is connected to the gate of the bias transistor, the other end of the first resistor is connected to the drain of the bias transistor, and the other end of the second resistor is connected to the source of the bias transistor.

6. A radio frequency power amplifier according to claim 5, wherein when two lines are drawn along one end and the other end of the source fingers of the radio frequency transistors of the unit amplifiers in the direction in which the unit amplifiers are arranged, the bias transistors of the unit amplifiers are arranged in an area sandwiched between two lines.

7. A radio frequency power amplifier according to claim 2 or 3, wherein each of said plurality of unit amplifiers has a plurality of said gate bias circuits, each of said plurality of gate bias circuits being connected to one end of a switch circuit, the other end of said switch circuit being connected to said gate bus line of said radio frequency transistor, and said switch circuit selecting one of said plurality of gate bias circuits.

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