Control system and control method

Abstract

A control system (100) comprises an influence determination circuit (13) and a control circuit (a CPU (11) and a system control circuit (14)). The influence determination circuit (13) determines whether or not the influence of power restoration of a target circuit (2) that is connected to a power supply (VDD) is permitted at least in an operation of a prescribed circuit (1) that is connected to the power supply (VDD). When the influence determination circuit (13) determines that the influence is not permitted, the control circuit changes operation states of: the prescribed circuit (1); and the target circuit (2) and / or a circuit other than the prescribed circuit (1) connected to the power supply (VDD).

Description

Control system and control method

[0001] The present disclosure relates to a control system and a control method.

[0002] For example, Patent Document 1 discloses a semiconductor circuit including a circuit connected to a power supply wiring, a determination means for determining whether a voltage drop in the power supply wiring affects the operation of the circuit, and a power supply voltage control means for changing and controlling the power supply voltage value based on the determination result of the determination means.

[0003] Japanese Patent Application Laid-Open No. 2021-166036

[0004] However, the technology disclosed in Patent Document 1 has the problem that it takes a long time to restore power to the target circuit because it is necessary to wait until the change in power supply voltage value is complete when restoring power to the circuit (target circuit).

[0005] Therefore, the present disclosure provides a control system and the like that can easily speed up the restoration of power to a target circuit.

[0006] The control system of the present disclosure comprises an influence determination circuit that determines whether the influence of the restoration of power supply on a target circuit connected to a power supply is acceptable for the operation of at least a specified circuit connected to the power supply, and a control circuit that, when the influence determination circuit determines that the influence is unacceptable, changes the operating state of the specified circuit and at least one of the target circuit and circuits connected to the power supply other than the specified circuit.

[0007] The control system according to the present disclosure includes a control circuit that changes the operating state of at least one of a specified circuit connected to the power supply and a circuit other than the target circuit and the specified circuit connected to the power supply when power is restored to the target circuit connected to the power supply.

[0008] The control method disclosed herein determines whether the impact of power restoration on a target circuit connected to a power source is acceptable for at least the operation of a specified circuit connected to the power source, and if it is determined that the impact is unacceptable, changes the operating state of at least one of the specified circuit and circuits connected to the power source other than the target circuit and the specified circuit.

[0009] A control system according to an aspect of the present disclosure has the advantage of being able to easily speed up power restoration of a target circuit.

[0010] Fig. 1 is a block diagram showing an overview of a control system according to a first embodiment. Fig. 2 is a sequence diagram showing an example of operation of the control system according to the first embodiment. Fig. 3 is a diagram showing an example of data referred to by the control system according to the first embodiment. Fig. 4 is a block diagram showing an overview of a control system according to a second embodiment. Fig. 5 is a sequence diagram showing an example of operation of the control system according to the second embodiment. Fig. 6 is a diagram showing an example of data referred to by the control system according to the second embodiment.

[0011] The first and second embodiments will be specifically described below with reference to the drawings.

[0012] Note that the first and second embodiments described below are either comprehensive or specific examples. The numerical values, shapes, materials, components, component placement and connection configurations, steps, and step order shown in the first and second embodiments are merely examples and are not intended to limit the present disclosure.

[0013] (First embodiment) A control system according to a first embodiment will be described below.

[0014] <1. Configuration> First, the configuration of a control system 100 according to the first embodiment will be described with reference to Fig. 1. Fig. 1 is a block diagram showing an outline of the control system 100 according to the first embodiment. The control system 100 is a system for controlling a predetermined circuit 1 and a target circuit 2 connected to a power supply VDD, and in particular a system for controlling the predetermined circuit 1 and the target circuit 2 when the power supply of the target circuit 2 is restored. In the embodiment, the control system 100 is used in a manufacturing process for semiconductor chips such as LSIs (Large-Scale Integrated circuits).

[0015] The power supply VDD supplies a power supply voltage to the predetermined circuit 1 and the target circuit 2. The power supply VDD is generated by, for example, a voltage regulator connected to an external power supply.

[0016] The predetermined circuit 1 is a circuit that is directly connected to the power supply VDD, and is a circuit that is connected to the power supply VDD. In other words, the predetermined circuit 1 is a circuit that operates by receiving power from the power supply VDD at least while it is controlling the target circuit 2. The predetermined circuit 1 is mounted on, for example, a semiconductor chip.

[0017] The target circuit 2 is a circuit connected to the power supply VDD via a power switch, and is a circuit that is subject to power restoration. Here, power restoration refers to the state in which the target circuit 2 changes from a state in which it is cut off from the power supply VDD to a state in which it receives power from the power supply VDD when the power switch connected to the target circuit 2 is turned on. The target circuit 2 is mounted on, for example, a semiconductor chip.

[0018] In the embodiment, the target circuit 2 is at least one of a first circuit 21 and a second circuit 22 .

[0019] The first circuit 21 includes a processor such as a DSP (Digital Signal Processor) and is a circuit that executes data science processing such as AI (Artificial Intelligence) processing. The first circuit 21 is not limited to AI processing, and may be any circuit that executes a predetermined process. The first circuit 21 is connected to a power supply VDD via a power switch 31. Therefore, when the power switch 31 is on, the first circuit 21 enters a power-on state in which power is supplied from the power supply VDD, and when the power switch 31 is off, the first circuit 21 enters a power-off state in which power is cut off from the power supply VDD. In addition, when the first circuit 21 is in a power-on state, it can be switched between an active state and a stopped state under the control of a system control circuit 14 (described later).

[0020] Like the first circuit 21, the second circuit 22 includes a processor such as a DSP and is a circuit that executes data science processing, such as AI processing. The second circuit 22 is not limited to AI processing, and may be any circuit that executes a predetermined process. The second circuit 22 executes a process different from that executed by the first circuit 21. The second circuit 22 is connected to the power supply VDD via a power switch 32. Therefore, when the power switch 32 is on, the second circuit 22 is in a power-on state where power is supplied from the power supply VDD, and when the power switch 32 is off, the second circuit 22 is in a power-off state where power is cut off from the power supply VDD. In the power-on state, the second circuit 22 is controlled by the system control circuit 14 (described later) to switch between an active state and a stopped state.

[0021] 1, the first circuit 21 is represented as “DSP1” and the second circuit 22 is represented as “DSP2.” The target circuit 2 may be a single circuit, or may be one or more of three or more circuits.

[0022] The predetermined circuit 1 includes a CPU (Central Processing Unit) 11, a prediction circuit 12, an influence determination circuit 13, a system control circuit 14, and a shutdown control circuit 15. The CPU 11, the prediction circuit 12, the influence determination circuit 13, and the system control circuit 14 form a control system 100. In the embodiment, the CPU 11 and the system control circuit 14 form the control circuit of the control system 100. The control system 100 may include the shutdown control circuit 15 as a component.

[0023] The CPU 11 is the main processor of the predetermined circuit 1, and executes various processes, such as controlling the operation of the target circuit 2, in cooperation with the system control circuit 14. For example, the CPU 11 executes a process of switching the first circuit 21 between an active state and a stopped state in cooperation with the system control circuit 14. Also, for example, the CPU 11 executes a process of switching the second circuit 22 between an active state and a stopped state in cooperation with the system control circuit 14.

[0024] Also, for example, when the CPU 11 determines that the power supply of the target circuit 2 needs to be restored, it executes a process of notifying the prediction circuit 12 of the power supply restoration mode by sending a signal indicating this to the prediction circuit 12.

[0025] Furthermore, for example, the CPU 11 executes a process of notifying the influence determination circuit 13 of the current processing mode by transmitting a signal indicating the current processing mode to the influence determination circuit 13. Here, the processing mode indicates the state of the target circuit 2 and the state of the CPU 11. The state of the target circuit 2 is either operating or stopped. The CPU 11 is either operating or operating at a speed slower than the normal processing speed.

[0026] The CPU 11 may be configured, for example, as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).

[0027] The prediction circuit 12 executes a process for predicting a voltage drop of the power supply VDD due to the restoration of power to the target circuit 2. Here, the voltage drop of the power supply VDD occurs due to a noise accompanying this inrush current, that is, rush current noise, which occurs when the target circuit 2 starts charging after the power supply is restored to the target circuit 2.

[0028] 3B, which will be described later, and by referring to this data, the prediction circuit 12 predicts the amount of voltage drop of the power supply VDD due to rush current noise according to the type of power supply restoration. In the embodiment, there are three types of power supply restoration: restoration of only the first circuit 21, restoration of only the second circuit 22, and restoration of both the first circuit 21 and the second circuit 22. The prediction circuit 12 also notifies the influence determination circuit 13 of the prediction result by transmitting a signal indicating the prediction result to the influence determination circuit 13.

[0029] The influence determination circuit 13 executes a process for determining whether or not the influence of the restoration of power supply to the target circuit 2 connected to the power supply VDD is acceptable on at least the operation of the predetermined circuit 1 connected to the power supply VDD. Here, the expression "the influence of the restoration of power supply to the target circuit 2 is acceptable on the operation of the predetermined circuit 1" means that the internal voltage supplied to the predetermined circuit 1 does not fall below the lower limit voltage of the predetermined circuit 1 due to a voltage drop in the power supply VDD caused by the restoration of power supply to the target circuit 2. The lower limit voltage of the operation means the minimum voltage required for the predetermined circuit 1 to operate.

[0030] In the embodiment, the influence determination circuit 13 determines whether or not the above-mentioned influence is acceptable based on the prediction result of the prediction circuit 12. The influence determination circuit 13 also determines whether or not the above-mentioned influence is acceptable based on the operating state of the predetermined circuit 1 when power is restored to the target circuit 2 (i.e., the current processing mode). Specifically, the influence determination circuit 13 has data such as that shown in (d) of FIG. 3 (described later), and by referring to this data, determines for each type of processing mode whether the internal voltage after the voltage drop predicted by the prediction circuit 12 will fall below the lower limit operating voltage of the predetermined circuit 1. The influence determination circuit 13 also notifies the system control circuit 14 of the determination result by transmitting a signal indicating the determination result to the system control circuit 14.

[0031] The system control circuit 14 executes processing to control the operation of the target circuit 2 in cooperation with the CPU 11. In the embodiment, the system control circuit 14 switches the first circuit 21 between a conducting state and a cut-off state by sending a signal to the cut-off control circuit 15 instructing it to turn on or off the power switch 31. The system control circuit 14 also switches the second circuit 22 between a conducting state and a cut-off state by sending a signal to the cut-off control circuit 15 instructing it to turn on or off the power switch 32. The system control circuit 14 also switches the first circuit 21 between an operating state and a stopped state by sending a signal to the first circuit 21 in a conducting state. The system control circuit 14 also switches the second circuit 22 between an operating state and a stopped state by sending a signal to the second circuit 22 in a conducting state.

[0032] In the embodiment, the system control circuit 14 works in cooperation with the CPU 11 to execute a process of changing the operating state of at least one of the specified circuit 1, the target circuit 2, and circuits connected to the power supply VDD other than the specified circuit 1 (hereinafter also referred to as "non-target circuits"), when the impact determination circuit 13 determines that the above impact is not acceptable.

[0033] Specifically, for example, when the target circuit 2 is the first circuit 21, the system control circuit 14 changes the operating state of at least one of the predetermined circuit 1 (here, the CPU 11) and the second circuit 22, which is a non-target circuit, to prevent the predetermined circuit 1 from being affected (i.e., to prevent the internal voltage from falling below the lower limit operating voltage of the predetermined circuit 1). Furthermore, when the target circuit 2 is the second circuit 22, the system control circuit 14 changes the operating state of at least one of the predetermined circuit 1 and the first circuit 21, which is a non-target circuit, to prevent the predetermined circuit 1 from being affected. Furthermore, when the target circuit 2 is both the first circuit 21 and the second circuit 22, the system control circuit 14 changes the operating state of the predetermined circuit 1 to prevent the predetermined circuit 1 from being affected.

[0034] The shutdown control circuit 15 controls the power switches 31 and 32 based on a signal from the system control circuit 14. Specifically, when the shutdown control circuit 15 receives a signal instructing it to turn on the power switch 31, it turns on the power switch 31. Furthermore, when the shutdown control circuit 15 receives a signal instructing it to turn off the power switch 31, it turns off the power switch 31. Furthermore, when the shutdown control circuit 15 receives a signal instructing it to turn on the power switch 32, it turns on the power switch 32. Furthermore, when the shutdown control circuit 15 receives a signal instructing it to turn off the power switch 32, it turns off the power switch 32.

[0035] 2. Operation Next, an operation example of the control system 100 according to the first embodiment will be described with reference to Fig. 2 and Fig. 3. Fig. 2 is a sequence diagram showing an operation example of the control system 100 according to the first embodiment. Fig. 3 is a diagram showing an example of data referenced by the control system 100 according to the first embodiment.

[0036] 3A shows data referenced by the CPU 11, indicating the type of power restoration for the target circuit 2. FIG. 3B shows data referenced by the prediction circuit 12, indicating a predicted value for the amount of voltage drop due to rush current noise that occurs when power is restored. FIG. 3C shows data referenced by the influence determination circuit 13, indicating the processing mode, in other words, the type of operating state of the predetermined circuit 1 (here, the CPU 11) and the target circuit 2. FIG. 3D shows data referenced by the influence determination circuit 13, indicating the internal voltage and the lower limit operating voltage for each processing mode.

[0037] <2-1. First Operation Example> First, a description will be given of a first operation example of the control system 100. The first operation example is an operation example when the power supply of the first circuit 21 is restored, that is, an operation example when the first circuit 21 is the target circuit 2.

[0038] When the CPU 11 determines that the power supply of the first circuit 21 needs to be restored, it notifies the prediction circuit 12 of the power supply restoration mode (step S101). Here, the CPU 11 notifies the prediction circuit 12 of "power supply restoration mode 1" because the power supply of only the first circuit 21 is restored by referring to the data shown in FIG. 3(a).

[0039] The prediction circuit 12 predicts a voltage drop of the power supply VDD due to power restoration of the target circuit 2 according to the type of power restoration mode received from the CPU 11 (step S102). Here, the prediction circuit 12 predicts that a voltage drop of 50 mV of the power supply VDD will occur in "power restoration mode 1" by referring to the data shown in FIG. 3B. Then, the prediction circuit 12 notifies the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop of the power supply VDD (step S103).

[0040] At this time, the CPU 11 also notifies the influence determination circuit 13 of the current processing mode (step S104). Here, by referring to the data shown in FIG. 3C, the CPU 11 determines that the first circuit 21 is in a stopped state, the second circuit 22 is in an operating state, and the CPU 11 is in an operating state, and therefore notifies the influence determination circuit 13 of "processing mode 2." Note that step S104 may be executed before steps S102 and S103, or may be executed simultaneously with steps S102 and S103.

[0041] The influence determination circuit 13 determines whether the influence of the restoration of power to the target circuit 2 on the operation of the predetermined circuit 1 is acceptable based on the type of current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12 (step S105). Here, by referring to the data shown in FIG. 3D, the influence determination circuit 13 determines that the current processing mode is "processing mode 2" and therefore the internal voltage is 930 mV. Then, because the amount of voltage drop of the power supply VDD is 50 mV, the influence determination circuit 13 determines that the internal voltage after the voltage drop is 880 (= 930 - 50) mV, which is below the lower operating voltage limit of 900 mV, i.e., the above-mentioned influence is unacceptable.

[0042] Furthermore, the influence determination circuit 13 determines that if the current processing mode is "processing mode 1," the internal voltage after the voltage drop will be 930 (=980-50) mV, which does not fall below the lower operating voltage limit of 900 mV, meaning that the above influence is permissible. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "processing mode 1" (step S106).

[0043] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the predetermined circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the second circuit 22, which is the non-target circuit, to switch it to a stopped state, thereby shifting the current processing mode from "processing mode 2" to "processing mode 1." Thereafter, the system control circuit 14 notifies the shutdown control circuit 15 of an instruction to restore power to the target circuit 2 (here, the first circuit 21) (step S108).

[0044] The shutdown control circuit 15 switches on the power switch 31 based on an instruction from the system control circuit 14, thereby switching the target circuit 2 (here, the first circuit 21) to a conducting state (step S109). As a result, an inrush current is generated to charge the first circuit 21, and a voltage drop occurs in the power supply VDD due to rush current noise associated with this inrush current. However, because the processing mode of the CPU 11 has been changed to "processing mode 1," the internal voltage after the voltage drop does not fall below the lower limit operating voltage, and the operation of the predetermined circuit 1 is not affected.

[0045] Here, the shutdown control circuit 15 stores in advance in memory the time required to charge the first circuit 21, so when that time has elapsed since the power switch 31 was turned on, it notifies the system control circuit 14 that charging is complete (step S110).

[0046] When the system control circuit 14 receives a notification of charging completion from the shutdown control circuit 15, it cooperates with the CPU 11 to control the non-target circuit (here, the second circuit 22) that is currently in a stopped state to switch it to an operating state, thereby restoring the operating state of the non-target circuit to its original state (step S111). This causes the processing mode of the CPU 11 to return from "processing mode 1" to its original "processing mode 2." That is, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to its pre-change operating state after a predetermined time has elapsed since the power supply of the target circuit 2 was restored. Then, in cooperation with the CPU 11, the system control circuit 14 controls the target circuit 2 (here, the first circuit 21) that is currently in a stopped state to switch it to an operating state, thereby starting up the target circuit 2 (step S112).

[0047] <2-2. Second Operation Example> Next, a description will be given of a second operation example of the control system 100. The second operation example is an operation example when the power supply of the second circuit 22 is restored, that is, an operation example when the second circuit 22 is the target circuit 2.

[0048] When the CPU 11 determines that the power supply of the second circuit 22 needs to be restored, the CPU 11 notifies the prediction circuit 12 of the power supply restoration mode (step S101). Here, the CPU 11 notifies the prediction circuit 12 of "power supply restoration mode 2" because the power supply of only the second circuit 22 is restored by referring to the data shown in FIG. 3A.

[0049] The prediction circuit 12 predicts a voltage drop of the power supply VDD due to power restoration of the target circuit 2 according to the type of power restoration mode received from the CPU 11 (step S102). Here, the prediction circuit 12 predicts that a voltage drop of 60 mV of the power supply VDD will occur in "power restoration mode 2" by referring to the data shown in FIG. 3B. Then, the prediction circuit 12 notifies the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop of the power supply VDD (step S103).

[0050] At this time, the CPU 11 also notifies the influence determination circuit 13 of the current processing mode (step S104). Here, by referring to the data shown in FIG. 3C, the CPU 11 determines that the first circuit 21 is in an operating state, the second circuit 22 is in a stopped state, and the CPU 11 is in an operating state, and therefore notifies the influence determination circuit 13 of "processing mode 3." Note that step S104 may be executed before steps S102 and S103, or may be executed simultaneously with steps S102 and S103.

[0051] The influence determination circuit 13 determines whether the influence of the restoration of power to the target circuit 2 on the operation of the predetermined circuit 1 is acceptable based on the type of current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12 (step S105). Here, by referring to the data shown in FIG. 3D, the influence determination circuit 13 determines that the current processing mode is "processing mode 3" and therefore the internal voltage is 940 mV. Then, because the amount of voltage drop of the power supply VDD is 60 mV, the influence determination circuit 13 determines that the internal voltage after the voltage drop is 880 (= 940 - 60) mV, which is below the lower operating voltage limit of 900 mV, i.e., the above-mentioned influence is unacceptable.

[0052] Furthermore, the influence determination circuit 13 determines that if the current processing mode is "processing mode 1," the internal voltage after the voltage drop will be 920 (=980-60) mV, which does not fall below the lower operating voltage limit of 900 mV, meaning that the above influence is permissible. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "processing mode 1" (step S106).

[0053] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the predetermined circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the first circuit 21, which is the non-target circuit, to switch it to a stopped state, thereby shifting the current processing mode from "processing mode 3" to "processing mode 1." Thereafter, the system control circuit 14 notifies the shutdown control circuit 15 of an instruction to restore power to the target circuit 2 (here, the second circuit 22) (step S108).

[0054] The shutdown control circuit 15 switches on the power switch 32 based on an instruction from the system control circuit 14, thereby switching the target circuit 2 (here, the second circuit 22) to a conducting state (step S109). As a result, an inrush current is generated to charge the second circuit 22, and a voltage drop occurs in the power supply VDD due to rush current noise associated with this inrush current. However, because the processing mode of the CPU 11 has been changed to "processing mode 1," the internal voltage after the voltage drop does not fall below the lower limit operating voltage, and the operation of the predetermined circuit 1 is not affected.

[0055] Here, the shutdown control circuit 15 has the time required to charge the second circuit 22 stored in memory in advance, so when that time has elapsed since the power switch 32 was turned on, it notifies the system control circuit 14 that charging is complete (step S110).

[0056] When the system control circuit 14 receives a notification of charging completion from the shutdown control circuit 15, it cooperates with the CPU 11 to control the non-target circuit (here, the first circuit 21) that is currently in a stopped state to switch it to an operating state, thereby restoring the operating state of the non-target circuit to its original state (step S111). This causes the processing mode of the CPU 11 to return from "processing mode 1" to its original "processing mode 3." That is, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to its pre-change operating state after a predetermined time has elapsed since the power supply of the target circuit 2 was restored. Then, in cooperation with the CPU 11, the system control circuit 14 controls the target circuit 2 (here, the second circuit 22) that is currently in a stopped state to switch it to an operating state, thereby starting up the target circuit 2 (step S112).

[0057] <2-3. Third Operation Example> Next, a description will be given of a third operation example of the control system 100. The third operation example is an operation example in which the power supply of both the first circuit 21 and the second circuit 22 is restored, that is, an operation example in which both the first circuit 21 and the second circuit 22 are the target circuits 2.

[0058] When the CPU 11 determines that the power supply of the first circuit 21 and the second circuit 22 needs to be restored, the CPU 11 notifies the prediction circuit 12 of the power supply restoration mode (step S101). Here, the CPU 11 notifies the prediction circuit 12 of "power supply restoration mode 3" because the power supply of only the second circuit 22 is restored by referring to the data shown in FIG. 3A.

[0059] The prediction circuit 12 predicts a voltage drop of the power supply VDD due to power restoration of the target circuit 2 according to the type of power restoration mode received from the CPU 11 (step S102). Here, the prediction circuit 12 predicts that a voltage drop of 90 mV of the power supply VDD will occur in "power restoration mode 3" by referring to the data shown in FIG. 3B. Then, the prediction circuit 12 notifies the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop of the power supply VDD (step S103).

[0060] At this time, the CPU 11 also notifies the influence determination circuit 13 of the current processing mode (step S104). Here, by referring to the data shown in FIG. 3C, the CPU 11 determines that the first circuit 21 is in a stopped state, the second circuit 22 is in a stopped state, and the CPU 11 is in an operating state, and therefore notifies the influence determination circuit 13 of "processing mode 1." Note that step S104 may be executed before steps S102 and S103, or may be executed simultaneously with steps S102 and S103.

[0061] The influence determination circuit 13 determines whether the influence of the restoration of power to the target circuit 2 on the operation of the predetermined circuit 1 is acceptable based on the type of current processing mode received from the CPU 11 and the amount of voltage drop of the power supply VDD received from the prediction circuit 12 (step S105). Here, by referring to the data shown in FIG. 3(d), the influence determination circuit 13 determines that the current processing mode is "processing mode 1" and therefore the internal voltage is 980 mV. Then, because the amount of voltage drop of the power supply VDD is 90 mV, the influence determination circuit 13 determines that the internal voltage after the voltage drop is 890 (= 980 - 90) mV, which is below the lower operating voltage limit of 900 mV, i.e., the above influence is unacceptable.

[0062] Furthermore, the influence determination circuit 13 determines that if the current processing mode is "processing mode 4", the internal voltage after the voltage drop will be 910 (=1000-90) mV, which does not fall below the lower operating voltage limit of 900 mV, meaning that the above influence is permissible. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "processing mode 4" (step S106).

[0063] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the predetermined circuit 1 and the non-target circuit (step S107). Here, the system control circuit 14 controls the predetermined circuit 1 (here, the CPU 11) to switch it to a low-speed operating state, thereby transitioning the current processing mode from "processing mode 1" to "processing mode 4." In other words, the control circuit (CPU 11 and system control circuit 14) changes the operating speed of the predetermined circuit 1 (here, the CPU 11) depending on the degree of voltage drop in the power supply VDD. Thereafter, the system control circuit 14 notifies the shutdown control circuit 15 of an instruction to restore power to the target circuit 2 (here, the first circuit 21 and the second circuit 22) (step S108).

[0064] The shutdown control circuit 15 switches on the power switches 31 and 32 based on an instruction from the system control circuit 14, thereby switching the target circuit 2 (here, the first circuit 21 and the second circuit 22) to a conducting state (step S109). As a result, an inrush current is generated to charge the first circuit 21 and the second circuit 22, and a voltage drop occurs in the power supply VDD due to rush current noise associated with this inrush current. However, because the processing mode of the CPU 11 has been changed to "processing mode 4," the internal voltage after the voltage drop does not fall below the lower limit operating voltage, and the operation of the predetermined circuit 1 is not affected.

[0065] Here, the shutoff control circuit 15 has the time required to charge each of the first circuit 21 and the second circuit 22 pre-stored in memory, so when that time has elapsed since the power switches 31 and 32 were turned on, it notifies the system control circuit 14 that charging is complete (step S110).

[0066] When the system control circuit 14 receives a notification of charging completion from the shutdown control circuit 15, it cooperates with the CPU 11 to control the CPU 11 from the low-speed operating state to switch it to the operating state, thereby restoring the operating state of the CPU 11 to its original state (step S111). This causes the processing mode of the CPU 11 to return from "processing mode 4" to its original "processing mode 1." That is, the control circuits (CPU 11 and system control circuit 14) return the changed operating state to the operating state before the change when a predetermined time has elapsed since the power supply of the target circuit 2 was restored. Then, the system control circuit 14 cooperates with the CPU 11 to control the target circuit 2 (here, the first circuit 21 and the second circuit 22) from the stopped state to switch it to the operating state, thereby starting up the target circuit 2 (step S112).

[0067] 3. Advantages The advantages of the control system 100 according to the first embodiment will be described below. First, the problems with the technology disclosed in Patent Document 1 will be described. The technology disclosed in Patent Document 1 avoids the impact on the operation of the target circuit by changing the power supply voltage value when it is determined that a voltage drop in the power supply wiring will affect the operation of the target circuit. However, the technology disclosed in Patent Document 1 has the problem that when restoring power to the target circuit, it must wait until the change in the power supply voltage value is complete, which increases the time required for power restoration.

[0068] In order to maximize the power reduction effect of switching the target circuit to the cutoff state, it is effective to switch the target circuit to the cutoff state frequently over a long period of time. However, with the technology disclosed in Patent Document 1, as described above, it takes a long time to restore power to the target circuit, which results in the need to shorten the period in which the target circuit is in the cutoff state and reduce the frequency at which the target circuit is switched to the cutoff state, which tends to consume unnecessary power.

[0069] In contrast, the control system 100 according to the first embodiment does not suppress rush current noise but changes the operating state of the circuit to avoid the effect on the predetermined circuit 1 of power restoration of the target circuit 2, thereby eliminating the need to change the power supply voltage value as in the technology disclosed in Patent Document 1, and thus has the advantage of facilitating faster power restoration of the target circuit 2. As a result, compared to the technology disclosed in Patent Document 1, the control system 100 according to the first embodiment has the advantage of eliminating the need to shorten the period in which the target circuit 2 is in the cutoff state and reducing the frequency at which the target circuit 2 is switched to the cutoff state, thereby eliminating unnecessary power consumption.

[0070] Another possible method for avoiding the influence of the restoration of power to the target circuit 2 on the predetermined circuit 1 is to suppress rush current noise by gradually turning on the power switches 31 and 32. In contrast, in the control system 100 according to the first embodiment, the influence of the restoration of power to the target circuit 2 on the predetermined circuit 1 can be avoided without suppressing rush current noise, so there is no need to gradually turn on the power switches 31 and 32, and it is easy to speed up the restoration of power to the target circuit 2.

[0071] In the control system 100 according to the first embodiment, it takes time to return the changed operating state to the original operating state, but this time is shorter than the time required to change the power supply voltage value as described above and the time required to turn on the power switches 31 and 32 in stages, and therefore has almost no effect on speeding up the restoration of power to the target circuit 2.

[0072] Second Embodiment A control system according to a second embodiment will be described below.

[0073] <1. Configuration> First, the configuration of a control system 100A according to the second embodiment will be described with reference to Fig. 4. Fig. 4 is a block diagram showing an overview of the control system 100A according to the second embodiment. The control system 100A according to the second embodiment differs from the control system 100 according to the first embodiment in that the predetermined circuit 1 further includes a process monitor 16 and a voltage monitor 17. Below, descriptions of points common to the control system 100 according to the first embodiment will be omitted as appropriate.

[0074] The process monitor 16 monitors process corners in the manufacturing process of semiconductor chips. Here, the process corner refers to variations in the electrical characteristics of semiconductor chips due to manufacturing variations in semiconductor chips. Since the operating frequency changes depending on the process corner, the process monitor 16 monitors the process corner by monitoring the operating frequency. In the embodiment, the process monitor 16 monitors whether the process corner is one of three types: "Fast," "Typical," or "Slow." The monitoring results of the process monitor 16 are referenced by the prediction circuit 12 and the influence determination circuit 13.

[0075] The voltage monitor 17 monitors the internal voltage supplied from the power supply VDD to the predetermined circuit 1. The monitoring result of the voltage monitor 17 is referred to by the influence determination circuit 13 as an actual measurement value of the internal voltage.

[0076] 2. Operation Next, an operation example of the control system 100A according to the second embodiment will be described with reference to Fig. 5 and Fig. 6. Fig. 5 is a sequence diagram showing an operation example of the control system 100A according to the second embodiment. Fig. 6 is a diagram showing an example of data referenced by the control system 100A according to the second embodiment.

[0077] 6A shows data referenced by the CPU 11 indicating the type of power restoration for the target circuit 2. FIG. 6B shows data referenced by the prediction circuit 12 indicating the amount of voltage drop due to rush current noise generated when power is restored for each process corner. FIG. 6B shows only data in "power restoration mode 1." FIG. 6C shows data referenced by the influence determination circuit 13 indicating the type of processing mode. FIG. 6D shows data referenced by the influence determination circuit 13 indicating the lower limit operating voltage for each process. FIG. 6E shows data referenced by the influence determination circuit 13 indicating an example of an actual measurement value of the internal voltage measured by the voltage monitor 17 for each process. Note that FIG. 6E does not show the actual measurement values ​​of the internal voltage measured by the voltage monitor 17 for each of "processing mode 3" and "processing mode 4."

[0078] An example of the operation of the control system 100A when the first circuit 21 is the target circuit 2 will be described below.

[0079] When the CPU 11 determines that the power supply of the first circuit 21 needs to be restored, it notifies the prediction circuit 12 of the power supply restoration mode (step S201). Here, the CPU 11 notifies the prediction circuit 12 of "power supply restoration mode 1" because the power supply of only the first circuit 21 is restored by referring to the data shown in FIG. 6(a).

[0080] The prediction circuit 12 reads the monitoring results of the process monitor 16 to read the process corner (step S202). Then, the prediction circuit 12 predicts a voltage drop of the power supply VDD due to power restoration of the target circuit 2 based on the process corner read from the process monitor 16 and the type of power restoration mode received from the CPU 11 (step S203). For example, by referring to the data shown in FIG. 6B, if the process corner is "Typical," the prediction circuit 12 predicts that a voltage drop of 48 mV of the power supply VDD will occur in "Power Restoration Mode 1." Also, for example, if the process corner is "Fast," the prediction circuit 12 predicts that a voltage drop of 50 mV of the power supply VDD will occur in "Power Restoration Mode 1." Then, the prediction circuit 12 notifies the influence determination circuit 13 of the prediction result, i.e., the amount of voltage drop of the power supply VDD (step S204).

[0081] At this time, the CPU 11 also notifies the influence determination circuit 13 of the current processing mode (step S205). Here, by referring to the data shown in FIG. 6C, the CPU 11 determines that the first circuit 21 is in a stopped state, the second circuit 22 is in an operating state, and the CPU 11 is in an operating state, and therefore notifies the influence determination circuit 13 of "processing mode 2." Note that step S205 may be executed before steps S202 to S204, or may be executed simultaneously with steps S202 to S204.

[0082] The influence determination circuit 13 reads the monitoring results of the process monitor 16 to determine the process corner (step S206). The influence determination circuit 13 also reads the monitoring results of the voltage monitor 17 to determine the actual measured value of the internal voltage (step S207). Note that steps S206 and S207 may be performed in reverse order or simultaneously. Also, steps S206 and S207 may be performed before step S205.

[0083] Next, the impact determination circuit 13 determines whether the impact of the restoration of power to the target circuit 2 on the operation of the specified circuit 1 is acceptable based on the process corner read from the process monitor 16, the actual measured value of the internal voltage read from the voltage monitor 17, the type of current processing mode received from the CPU 11, and the amount of voltage drop of the power supply VDD received from the prediction circuit 12 (step S208).

[0084] First, the influence determination circuit 13 determines the lower limit operating voltage according to the process corner by referring to the data shown in (d) of Fig. 6. For example, if the process corner is "Typical", the influence determination circuit 13 determines that the lower limit operating voltage is 890 mV, and if the process corner is "Fast", the influence determination circuit 13 determines that the lower limit operating voltage is 885 mV.

[0085] Here, the actual measured value of the internal voltage changes depending on the current processing mode and process corner, as shown in (e) of Figure 6. For example, if the current processing mode is "Processing Mode 2" and the process corner is "Typical," the actual measured value of the internal voltage is 940 mV. Also, for example, if the current processing mode is "Processing Mode 2" and the process corner is "Fast," the actual measured value of the internal voltage is 930 mV.

[0086] Then, for example, when the current processing mode is "processing mode 2" and the process corner is "typical," the impact determination circuit 13 determines that the actual measured value of the internal voltage is 940 mV and the voltage drop of the power supply VDD is 48 mV, so that the internal voltage after the voltage drop is 892 (= 940 - 48) mV, which exceeds the lower operating voltage limit of 890 mV, i.e., the above impact is acceptable.

[0087] On the other hand, if the current processing mode is "processing mode 2" and the process corner is "Fast," for example, the effect determination circuit 13 determines that the internal voltage after the voltage drop is 880 (=930-50) mV, which is below the lower operating voltage limit of 885 mV, since the actual measured value of the internal voltage is 930 mV and the voltage drop of the power supply VDD is 50 mV, and therefore determines that the above-mentioned effect is not permissible. In the following description, it is assumed that the process corner is "Fast."

[0088] Here, the influence determination circuit 13 determines that if the current processing mode is "processing mode 1", the internal voltage after the voltage drop will be 930 (=980-50) mV, which does not fall below the lower operating voltage limit of 885 mV, meaning that the above influence is permissible. Therefore, the influence determination circuit 13 notifies the system control circuit 14 of the determination result indicating that the current processing mode needs to be changed to "processing mode 1" (step S209).

[0089] Based on the determination result received from the influence determination circuit 13, the system control circuit 14, in cooperation with the CPU 11, changes the operating state of at least one of the predetermined circuit 1 and the non-target circuit (step S210). Here, the system control circuit 14 controls the second circuit 22, which is the non-target circuit, to switch it to a stopped state, thereby shifting the current processing mode from "processing mode 2" to "processing mode 1." Thereafter, the system control circuit 14 notifies the shutdown control circuit 15 of an instruction to restore power to the target circuit 2 (here, the first circuit 21) (step S211).

[0090] The shutdown control circuit 15 switches on the power switch 31 based on an instruction from the system control circuit 14, thereby switching the target circuit 2 (here, the first circuit 21) to a conducting state (step S212). This generates an inrush current to charge the first circuit 21, and a voltage drop occurs in the power supply VDD due to rush current noise associated with this inrush current. However, because the processing mode of the CPU 11 has been changed to "processing mode 1," the internal voltage after the voltage drop does not fall below the lower limit operating voltage, and the operation of the predetermined circuit 1 is not affected.

[0091] Here, the shutdown control circuit 15 has the time required to charge the first circuit 21 stored in advance in its memory, so when that time has elapsed since the power switch 31 was turned on, it notifies the system control circuit 14 that charging is complete (step S213).

[0092] When the system control circuit 14 receives a notification of charging completion from the shutdown control circuit 15, it cooperates with the CPU 11 to control the non-target circuit (here, the second circuit 22) that is currently in a stopped state to switch it to an operating state, thereby restoring the operating state of the non-target circuit to its original state (step S214). This causes the processing mode of the CPU 11 to return from "processing mode 1" to its original "processing mode 2." That is, the control circuit (CPU 11 and system control circuit 14) restores the changed operating state to its pre-change operating state after a predetermined time has elapsed since the power supply of the target circuit 2 was restored. Then, in cooperation with the CPU 11, the system control circuit 14 controls the target circuit 2 (here, the first circuit 21) that is currently in a stopped state to switch it to an operating state, thereby starting up the target circuit 2 (step S215).

[0093] As described above, the control system 100A according to the second embodiment further refers to the manufacturing process of the semiconductor chip and the actual measured value of the voltage supplied to the specified circuit 1, and therefore has the advantage of being able to accurately determine whether the effect of the restoration of power to the target circuit 2 is acceptable in the operation of the specified circuit 1.

[0094] In the second embodiment, the influence determination circuit 13 may refer to at least one of the process corner and the actual measurement value of the internal voltage. In other words, the influence determination circuit 13 may determine whether or not the influence of the restoration of power to the target circuit 2 on the operation of the predetermined circuit 1 is acceptable, based on at least one of information related to the manufacturing process of the semiconductor chip and information related to the voltage supplied to the predetermined circuit 1.

[0095] (Other Embodiments) As described above, a control system according to one or more aspects of the present disclosure has been described based on the first and second embodiments, but the present disclosure is not limited to these first and second embodiments. As long as it does not deviate from the spirit of the present disclosure, various modifications that a person skilled in the art can make to the first and second embodiments, or forms constructed by combining components of different embodiments, may also be included within the scope of one or more aspects of the present disclosure.

[0096] For example, in the first embodiment, the control system 100 may be configured to include only a control circuit (the CPU 11 and the system control circuit 14). That is, the control system 100 may be configured to include a control circuit that changes the operating state of at least one of the predetermined circuit 1 connected to the power supply VDD and the circuits other than the target circuit 2 and the predetermined circuit 1 that are connected to the power supply VDD when power is restored to the target circuit 2 connected to the power supply VDD.

[0097] For example, the present disclosure can be realized not only as a control system, but also as a control method including steps (processing) performed by components that make up the control system.

[0098] 2 , the control method is a method executed by a control system, for example, as shown in FIG. 2 , the control method determines whether or not the influence of the power restoration of a target circuit 2 connected to the power supply VDD is acceptable for the operation of at least a predetermined circuit 1 connected to the power supply VDD (step S105), and if it is determined that the influence is unacceptable, changes the operating state of at least one of the predetermined circuit 1 and circuits connected to the power supply VDD other than the target circuit 2 and the predetermined circuit 1 (step S107).

[0099] Furthermore, the control method may be a method of changing the operating state of at least one of a specified circuit 1 connected to the power supply VDD and a circuit other than the target circuit 2 and the specified circuit 1 connected to the power supply VDD when the power supply of the target circuit 2 connected to the power supply VDD is restored, for example.

[0100] For example, the present disclosure can be realized as a program for causing a computer (processor) to execute steps included in the control method. The processor may be one or more. Furthermore, the present disclosure can be realized as a non-transitory computer-readable recording medium, such as a CD-ROM, on which the program is recorded.

[0101] For example, when the present disclosure is realized as a program (software), each step is performed by running the program using hardware resources such as a computer's CPU, memory, input / output circuitry, etc. In other words, each step is performed by the CPU acquiring data from memory or input / output circuitry, etc., performing calculations on the data, and outputting the calculation results to memory or input / output circuitry, etc.

[0102] In the first and second embodiments, each component included in the control system may be configured with dedicated hardware, or may be realized by executing a software program suitable for each component. Each component may be realized by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0103] Some or all of the functions of the control systems according to the first and second embodiments are typically realized as an LSI, which is an integrated circuit. These may be individually integrated into one chip, or some or all of them may be integrated into one chip. Furthermore, the integrated circuit is not limited to an LSI, and may be realized by a dedicated circuit or a general-purpose processor. An FPGA that can be programmed after LSI manufacture, or a reconfigurable processor that can reconfigure the connections and settings of circuit cells within an LSI, may also be used.

[0104] (Additional Note) The above description of the first and second embodiments discloses the following techniques.

[0105] (Technology 1) A control system comprising: an influence determination circuit that determines whether an influence caused by the restoration of power supply to a target circuit connected to a power supply is acceptable for the operation of at least a predetermined circuit connected to the power supply; and a control circuit that, when the influence determination circuit determines that the influence is unacceptable, changes the operating state of the predetermined circuit and at least one of the target circuit and a circuit other than the predetermined circuit that is connected to the power supply.

[0106] This has the advantage that, rather than suppressing rush current noise, the impact on a specific circuit caused by the restoration of power to the target circuit can be avoided by changing the operating state of the circuit, making it easier to speed up the restoration of power to the target circuit.

[0107] (Technology 2) The control system described in Technology 1 further includes a prediction circuit that predicts a voltage drop of the power supply due to the power supply restoration of the target circuit, and the influence determination circuit determines whether the influence is acceptable based on the prediction result of the prediction circuit.

[0108] This has the advantage that it is easy to accurately determine whether the above-mentioned influence is acceptable in the operation of a specified circuit, since it determines whether the above-mentioned influence is acceptable depending on the predicted degree of voltage drop of the power supply.

[0109] (Technology 3) The control system according to Technology 2, wherein the control circuit changes the operating speed of the predetermined circuit in accordance with the degree of voltage drop of the power supply.

[0110] This has the advantage that it is easy to minimize the degree of change in the operating speed of a predetermined circuit.

[0111] (Technology 4) A control system described in any one of technologies 1 to 3, wherein the influence determination circuit determines whether the influence is acceptable based on the operating state of the specified circuit when the power supply of the target circuit is restored.

[0112] This has the advantage that the operating state of the target circuit etc. does not need to be changed depending on the operating state of a predetermined circuit when the power supply of the target circuit is restored, making it easier to reduce the impact on the application.

[0113] (Technology 5) A control system described in any one of Technologies 1 to 4, wherein the control circuit returns the changed operating state to the operating state before the change when a predetermined time has elapsed since the power supply of the target circuit was restored.

[0114] This has the advantage that the changed operating state is returned to the operating state before the change, allowing the predetermined circuit and the target circuit to perform the operation that was originally planned.

[0115] (Technology 6) A control system according to any one of technologies 1 to 5, wherein the target circuit is mounted on a semiconductor chip, and the influence determination circuit determines whether the influence is acceptable based on at least one of information relating to the manufacturing process of the semiconductor chip and information relating to the voltage supplied to the specified circuit.

[0116] This has the advantage that, by further referring to at least one of the aspects of the manufacturing process of the semiconductor chip and the actual measured value of the voltage supplied to the specified circuit, it is easier to accurately determine whether the above-mentioned influence is acceptable in the operation of the specified circuit.

[0117] (Technology 7) A control system comprising: a control circuit that changes the operating state of at least one of a predetermined circuit connected to a power supply and a circuit other than the target circuit and the predetermined circuit connected to the power supply when power is restored to the target circuit.

[0118] This has the advantage that, rather than suppressing rush current noise, the impact on a specific circuit caused by the restoration of power to the target circuit can be avoided by changing the operating state of the circuit, making it easier to speed up the restoration of power to the target circuit.

[0119] (Technology 8) A control method that determines whether or not an effect of power restoration on a target circuit connected to a power source is acceptable for the operation of at least a specified circuit connected to the power source, and if it is determined that the effect is unacceptable, changes the operating state of at least one of the specified circuit and a circuit connected to the power source other than the target circuit and the specified circuit.

[0120] This has the advantage that, rather than suppressing rush current noise, the impact on a specific circuit caused by the restoration of power to the target circuit can be avoided by changing the operating state of the circuit, making it easier to speed up the restoration of power to the target circuit.

[0121] The present disclosure can be applied to, for example, circuits used in the manufacturing process of semiconductor chips.

[0122] 100, 100A Control system 1 Predetermined circuit 11 CPU (control circuit) 12 Prediction circuit 13 Influence determination circuit 14 System control circuit (control circuit) 15 Shut-off control circuit 16 Process monitor 17 Voltage monitor 2 Target circuit 21 First circuit 22 Second circuit 31, 32 Power switch VDD Power supply

Claims

1. A control system comprising: an influence determination circuit that determines whether the influence of the restoration of power supply to a target circuit connected to a power supply is acceptable for the operation of at least a specified circuit connected to the power supply; and a control circuit that, when the influence determination circuit determines that the influence is unacceptable, changes the operating state of the specified circuit and at least one of the target circuit and a circuit other than the specified circuit that is connected to the power supply.

2. The control system according to claim 1, further comprising a prediction circuit that predicts a voltage drop in the power supply due to the restoration of power to the target circuit, and the influence determination circuit determines whether or not the influence is acceptable based on the prediction result of the prediction circuit.

3. The control system according to claim 2, wherein the control circuit changes the operating speed of the predetermined circuit in accordance with the degree of voltage drop of the power supply.

4. A control system according to any one of claims 1 to 3, wherein the influence determination circuit determines whether or not the influence is acceptable based on the operating state of the specified circuit when the power supply of the target circuit is restored.

5. A control system according to any one of claims 1 to 4, wherein the control circuit returns the changed operating state to the operating state before the change when a predetermined time has elapsed since the power supply of the target circuit is restored.

6. A control system according to any one of claims 1 to 5, wherein the target circuit is mounted on a semiconductor chip, and the influence determination circuit determines whether or not the influence is acceptable based on at least one of information relating to the manufacturing process of the semiconductor chip and information relating to the voltage of the power supply.

7. A control system comprising: a control circuit that, when power is restored to a target circuit connected to a power source, changes the operating state of at least one of a predetermined circuit connected to the power source, and the target circuit and a circuit other than the predetermined circuit that is connected to the power source.

8. A control method comprising determining whether or not the effect of power restoration on a target circuit connected to a power source is acceptable for the operation of at least a specified circuit connected to the power source, and if it is determined that the effect is unacceptable, changing the operating state of at least one of the specified circuit and a circuit other than the target circuit and the specified circuit connected to the power source.

Images