Semiconductor device, power conversion device, and air conditioning device

Abstract

A semiconductor device (50) comprises: semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f); a first conductor pattern (51) electrically connected to first electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f); a second conductor pattern (52) disposed adjacent to the first conductor pattern (51) separated by a space; and conductors (55) electrically connecting second electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) and the second conductor pattern (52). In the semiconductor device (50), resistors (59) having a relative permittivity lower than that of a sealing material (58) are disposed between the first conductor pattern (51) and the second conductor pattern (52) facing each other or between the first conductor pattern (51) and the first conductors (55) facing each other.

Description

Semiconductor device, power conversion device, and air conditioning device

[0001] The present disclosure relates to a semiconductor device, a power conversion device, and an air conditioning device.

[0002] 2. Description of the Related Art Conventionally, semiconductor devices having a structure for suppressing ringing that occurs during switching have been known. The semiconductor device disclosed in Patent Document 1 suppresses ringing by using a snubber circuit.

[0003] In the semiconductor device disclosed in Patent Document 1, a snubber substrate including a snubber circuit is arranged so as to overlap at least one of a positive conductor pattern on which a positive power semiconductor element is mounted, a negative conductor pattern to which a negative electrode of a negative power semiconductor element is connected, and an AC electrode pattern on which a negative power semiconductor element is mounted and to which a negative electrode of a positive power semiconductor element is connected.

[0004] Patent No. 6513303

[0005] However, a semiconductor device having a snubber circuit as in Patent Document 1 requires space for arranging the resistor and capacitor that make up the snubber circuit, and in order to secure the space, a semiconductor device having a snubber circuit inevitably increases in size in the plane direction or the direction perpendicular to the plane of the substrate.

[0006] An object of the present disclosure is to suppress ringing during switching while suppressing an increase in device size.

[0007] The first aspect relates to a semiconductor device, comprising: semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d); a first conductor pattern (51, 251) electrically connected to first electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d); a second conductor pattern (52, 252) arranged adjacent to the first conductor pattern (51, 251) with a gap therebetween; a conductor (55, 255) that electrically connects a second electrode of each of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) to the second conductor pattern (52, 252) and faces the first conductor pattern (51, 251); and the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d), the first conductor pattern (51, 251), the second conductor pattern (52, 252), and the conductor (55, 255). and a sealing material (58) that covers the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d), and when the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are unipolar transistors, the first electrode is one of a drain electrode and a source electrode, and the second electrode is the other of the drain electrode and the source electrode, and when the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are bipolar transistors. In this case, the first electrode is one of a collector electrode and an emitter electrode, the second electrode is the other of the collector electrode and the emitter electrode, and a resistor (59, 259) having a lower dielectric constant than the sealing material (58) is arranged between the opposing first conductor pattern (51, 251) and the opposing second conductor pattern (52, 252) or between the opposing first conductor pattern (51, 251) and the opposing conductor (55, 255).

[0008] In the first aspect, the resistor (59, 259) is disposed in an empty space, such as between the first conductor pattern (51, 251) and the second conductor pattern (52, 252), so no additional space is required for disposing the resistor (59, 259). Furthermore, the resistance of the resistor (59, 259) dissipates ringing energy as heat energy, thereby suppressing ringing during switching. Therefore, the semiconductor device (50, 250) can suppress ringing during switching while preventing the device from becoming large.

[0009] In the second aspect, in the first aspect, the resistor (59, 259) is arranged in contact with the surface of the first conductor pattern (51, 251), the surface of the second conductor pattern (52, 252), or the surface of the conductor (55, 255).

[0010] In the second aspect, the resistor (59, 259) can be easily arranged even if the distance between the first conductor pattern (51, 251) and the second conductor pattern (52, 252) or the distance between the first conductor pattern (51, 251) and the conductor (55, 255) is narrowed. In the semiconductor device (50, 250), the first conductor pattern (51, 251), the second conductor pattern (52, 252), and the conductor (55, 255) can be arranged compactly, which makes it possible to suppress ringing during switching while preventing the device from becoming large.

[0011] A third aspect is the second aspect, wherein the resistor (59, 259) is in the form of a thin film.

[0012] In the third aspect, since the resistor is in the form of a thin film, the peripheral structure of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) is hardly enlarged, and the semiconductor device (50, 250) can be prevented from becoming large in size.

[0013] A fourth aspect is any one of the first to third aspects, wherein when the resistor (59, 259) is arranged between the first conductor pattern (51, 251) and the second conductor pattern (52, 252), the area of ​​the part of the first conductor pattern (51, 251) facing the resistor (59, 259) between the first conductor pattern (51, 251) and the second conductor pattern (52, 252) or the area of ​​the part of the second conductor pattern facing the resistor (59, 259) The area of ​​the portion of the first conductor pattern (51, 251) facing the resistor (59, 259) between the first conductor pattern (51, 251) and the conductor (55, 255) or the area of ​​the portion of the conductor (55, 255) facing the resistor (59, 259) between the first conductor pattern (51, 251) and the conductor (55, 255) when the resistor (59, 259) is disposed between the first conductor pattern (51, 251) and the conductor (55, 255) is defined as S [mm ２ ] and the resistivity of the resistor (59, 259) is ρ [Ω·m], the following equation is satisfied: ρ / S≧0.01.

[0014] In the fourth aspect, an appropriate resistance value can be obtained even if the thickness of the resistor (59, 259) is reduced. The semiconductor device (50, 250) can effectively suppress ringing while preventing the device from becoming large.

[0015] A fifth aspect is any one of the first to fourth aspects, wherein the resistor (59, 259) is made of polysilicon.

[0016] In the fifth aspect, the resistor (59, 259) can be easily configured. The semiconductor device (50, 250) can suppress ringing with a simple configuration.

[0017] A sixth aspect is the second aspect, wherein the thermal conductivity of the resistor (59, 259) is higher than the thermal conductivity of the sealing material (58).

[0018] In the sixth aspect, the semiconductor device (50, 250) improves heat dissipation from the portion where the resistor (59, 259) is disposed.

[0019] A seventh aspect is a power converter (10) including a semiconductor device (50, 250) according to any one of the first to sixth aspects.

[0020] An eighth aspect is an air conditioner (1) including the power converter (10) of the seventh aspect.

[0021] FIG. 1 is a piping diagram of an air conditioner having a semiconductor device according to an exemplary embodiment. FIG. 2 is a schematic diagram showing a circuit of a power conversion device of the air conditioner. FIG. 3 is a cross-sectional view of the semiconductor device. FIG. 4 is a schematic diagram showing a part of the planar structure of the semiconductor device. FIG. 5 is a schematic diagram showing an equivalent circuit of a switching leg including the semiconductor device. FIG. 6 is a drain-source voltage waveform. FIG. 7 is a cross-sectional view of a semiconductor device according to a modified example. FIG. 8 is a schematic diagram showing a part of the planar structure of a semiconductor device according to a modified example.

[0022] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. Note that the present disclosure is not limited to the embodiments shown below, and various modifications are possible within the scope of the technical concept of the present disclosure. Since the drawings are intended to conceptually explain the present disclosure, dimensions, ratios, or numbers may be exaggerated or simplified as necessary to facilitate understanding.

[0023] (1) Configuration of Air Conditioning Apparatus FIG. 1 is a piping diagram of an air conditioner (1) having a semiconductor device (50) according to this embodiment. The air conditioner (1) is an air conditioner that cools and heats a room. As shown in FIG. 1, the air conditioner (1) includes a power conversion device (10), a control unit (40), and a refrigerant circuit (110). The semiconductor device (50) is applied to the power conversion device (10).

[0024] The refrigerant circuit (110) is a closed circuit filled with refrigerant and includes a compressor (120), a four-way switching valve (130), an outdoor heat exchanger (140), an expansion valve (150), and an indoor heat exchanger (160).

[0025] Various types of compressors can be used as the compressor (120). The compressor (120) is, for example, a scroll compressor or a rotary compressor. The compressor (120) includes a motor (30). The motor (30) is, for example, an interior permanent magnet motor (IPM motor). The motor (30) is operated by receiving three-phase AC power supplied from the power conversion device (10).

[0026] The outdoor heat exchanger (140) is a heat exchanger that exchanges heat between outdoor air and a refrigerant. The indoor heat exchanger (160) is a heat exchanger that exchanges heat between indoor air and a refrigerant. The expansion valve (150) is an electronic expansion valve.

[0027] The four-way selector valve (130) is a valve having first to fourth ports. The four-way selector valve (130) can be switched between a first state (shown by solid lines in FIG. 1 ) and a second state (shown by dashed lines in FIG. 1 ). In the first state, the four-way selector valve (130) communicates between the first port and the third port and between the second port and the fourth port. In the second state, the four-way selector valve (130) communicates between the first port and the fourth port and between the second port and the third port.

[0028] In the refrigerant circuit (110), the discharge port of the compressor (120) is connected to a first port of a four-way switching valve (130), and the suction port is connected to a second port of the four-way switching valve (130). In the refrigerant circuit (110), an outdoor heat exchanger (140), an expansion valve (150), and an indoor heat exchanger (160) are arranged in this order from the third port to the fourth port of the four-way switching valve (130). When switching between cooling operation and heating operation, the air conditioner (1) switches the four-way switching valve (130).

[0029] The control unit (40) is electrically connected to the power converter (10). The control unit (40) outputs a control signal to the power converter (10) to control the power converter (10). The control unit (40) controls the motor (30) via the power converter (10).

[0030] The power converter (10) adjusts the power supplied to the motor (30) based on a control signal from the control unit (40).

[0031] (2) Configuration of the Power Converter Fig. 2 shows a schematic diagram of the configuration of the power converter (10). The power converter (10) includes a resistor (59) and other components, which will be described later. However, the resistor (59) and other components are omitted from Fig. 2 for the sake of simplicity.

[0032] As shown in Fig. 2, the power conversion device (10) includes a converter circuit (11), a DC link unit (12), and an inverter circuit (13). The power conversion device (10) converts a power supply voltage supplied from a single-phase AC power supply (20) into a predetermined AC voltage. The power conversion device (10) supplies the AC voltage obtained by the conversion to a motor (30). Note that the AC power supply (20) may be three-phase instead of single-phase.

[0033] The converter circuit (11) includes four diodes (D1, D2, D3, D4) connected in a bridge configuration. The converter circuit (11) is connected to an AC power supply (20) via a reactor (17). The converter circuit (11) full-wave rectifies the power supply voltage. The reactor (17) may be provided in the DC link section (12) between the converter circuit (11) and the capacitor (18) instead of between the AC power supply (20) and the converter circuit (11).

[0034] The DC link unit (12) includes a capacitor (18). The capacitor (18) is connected to the output node of the converter circuit (11).

[0035] The inverter circuit (13) has six semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) and six free wheel diodes (15a, 15b, 15c, 15d, 15e, 15f). The semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) function as switching elements. Hereinafter, the six semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) may be referred to as the first semiconductor element (14a), the second semiconductor element (14b), the third semiconductor element (14c), the fourth semiconductor element (14d), the fifth semiconductor element (14e), and the sixth semiconductor element (14f), and the six free wheel diodes (15a, 15b, 15c, 15d, 15e, 15f) may be referred to as the first free wheel diode (15a), the second free wheel diode (15b), the third free wheel diode (15c), the fourth free wheel diode (15d), the fifth free wheel diode (15e), and the sixth free wheel diode (15f). When there is no need to distinguish between them, they are simply referred to as semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) and freewheeling diodes (15a, 15b, 15c, 15d, 15e, 15f).

[0036] The semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) are bridge-connected to one another. As a result, the inverter circuit (13) has three switching legs. Each switching leg is formed by connecting two semiconductor elements in series. Specifically, each switching leg is formed by the first semiconductor element (14a) and the fourth semiconductor element (14d), the second semiconductor element (14b) and the fifth semiconductor element (14e), and the third semiconductor element (14c) and the sixth semiconductor element (14f).

[0037] In each of the three switching legs, a midpoint between the upper arm semiconductor elements (14a, 14b, 14c) and the lower arm semiconductor elements (14d, 14e, 14f) is connected to a coil (not shown) of each phase (u-phase, v-phase, w-phase) of the motor (30). Specifically, a midpoint between the first semiconductor element (14a) and the fourth semiconductor element (14d) is connected to the u-phase, a midpoint between the second semiconductor element (14b) and the fifth semiconductor element (14e) is connected to the v-phase, and a midpoint between the third semiconductor element (14c) and the sixth semiconductor element (14f) is connected to the w-phase.

[0038] The freewheeling diodes (15a, 15b, 15c, 15d, 15e, 15f) are connected in anti-parallel to the respective semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f).

[0039] In this embodiment, the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) are unipolar transistors. More specifically, the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) are MOSFETs. The freewheeling diodes (15a, 15b, 15c, 15d, 15e, 15f) are parasitic diodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f).

[0040] The control unit (40) outputs, as a control signal, a PWM signal for switching (turning on and off) the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f). Upon receiving the PWM signal, the power conversion device (10) supplies voltage to the gate electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) at a set duty ratio, thereby switching the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f).

[0041] (3) Configuration of the Semiconductor Device The semiconductor device (50) according to this embodiment will be described in detail with reference to FIGS. 3 to 5. The semiconductor device (50) is configured to target the semiconductor elements (14a, 14b, 14c) of the upper arms of the respective switching legs. Note that the following description will be made using the semiconductor device (50) including the first semiconductor element (14a) as an example. The semiconductor device including the second semiconductor element (14b) and the semiconductor device including the third semiconductor element (14c) have the same configuration.

[0042] The switching leg including the first semiconductor element (14a) comprises a semiconductor device (50) including the first semiconductor element (14a), a first conductor pattern (51), a second conductor pattern (52), a first conductor (55), a sealing material (58), and a resistor (59). The switching leg also comprises a fourth semiconductor element (14d), a third conductor pattern (53), a fourth conductor pattern (54), a second conductor (56), and a third conductor (57). The switching leg is mounted on a substrate (60). In the following description, the direction perpendicular to the surface of the substrate (60) is referred to as the up-down direction. This does not limit the orientation in which the semiconductor device (50) is actually arranged.

[0043] As shown in Fig. 3, the first semiconductor element (14a) is a vertical MOSFET. The source electrode (14aS) of the first semiconductor element (14a) is formed on the upper surface of the chip, and the drain electrode (14aD) of the first semiconductor element (14a) is formed on the lower surface of the chip. As shown in Fig. 4, a gate electrode (14aG) serving as a control electrode is provided on the upper surface of the first semiconductor element (14a).

[0044] Although detailed illustration is omitted, the fourth semiconductor element (14d) is a vertical MOSFET like the first semiconductor element (14a). A source electrode (14dS) of the fourth semiconductor element (14d) is formed on the upper surface of the chip, and a drain electrode (14dD) of the fourth semiconductor element (14d) is formed on the lower surface of the chip. A gate electrode (14dG) serving as a control electrode is provided on the upper surface of the fourth semiconductor element (14d).

[0045] The first conductor pattern 51 is electrically connected to the drain electrode 14aD of the first semiconductor element 14a. As shown in Fig. 3, the drain electrode 14aD is mounted on the upper surface of the first conductor pattern 51 by soldering or the like, and is electrically connected to the first conductor pattern 51. The drain electrode 14aD of the first semiconductor element 14a is an example of a first electrode.

[0046] The second conductor pattern (52) is electrically connected to the source electrode (14aS) of the first semiconductor element (14a). The source electrode (14aS) is electrically connected to the second conductor pattern (52) via the first conductor (55). The second conductor pattern (52) corresponds to the midpoint between the first semiconductor element (14a) and the fourth semiconductor element (14d). The second conductor pattern (52) has a terminal (52a) for electrical connection to the motor (30). The source electrode (14aS) of the first semiconductor element (14a) is an example of a second electrode.

[0047] The second conductor pattern 52 is disposed adjacent to and spaced apart from the first conductor pattern 51. The side surface 51 a of the first conductor pattern 51 and the side surface 52 b of the second conductor pattern 52 face each other in the in-plane direction of the substrate 60. The distance between the side surface 51 a of the first conductor pattern 51 and the side surface 52 b of the second conductor pattern 52 is not particularly limited, but is, for example, 1 mm.

[0048] 4, the third conductor pattern 53 is electrically connected to the drain electrode 14dD of the fourth semiconductor element 14d. The drain electrode 14dD is mounted on the upper surface of the third conductor pattern 53 by soldering or the like, and is electrically connected to the third conductor pattern 53.

[0049] The fourth conductor pattern (54) is electrically connected to the source electrode (14dS) of the fourth semiconductor element (14d). The source electrode (14dS) is electrically connected to the fourth conductor pattern (54) via the second conductor (56).

[0050] The first conductor (55) extends across the gap between the first conductor pattern (51) and the second conductor pattern (52). The first conductor (55) faces the upper surface (51b) of the first conductor pattern (51) in a direction perpendicular to the surface of the substrate (60). The distance between the upper surface (51b) of the first conductor pattern (51) and the first conductor (55) is slightly greater than the thickness of the chip constituting the first semiconductor element (14a). The first conductor (55) is, for example, an aluminum wire.

[0051] The second conductor 56 extends across the gap between the third conductor pattern 53 and the fourth conductor pattern 54. The second conductor 56 is, for example, an aluminum wire.

[0052] The third conductor (57) electrically connects the second conductor pattern (52) and the third conductor pattern (53). The third conductor (57) electrically connects the source electrode (14aS) of the first semiconductor element (14a) and the drain electrode of the fourth semiconductor element (14d). The third conductor (57) is, for example, an aluminum wire.

[0053] The sealing material 58 covers and seals the first semiconductor element 14a, the fourth semiconductor element 14d, the first conductor pattern 51, the second conductor pattern 52, the third conductor pattern 53, the fourth conductor pattern 54, the first conductor 55, the second conductor 56, the third conductor 57, and the resistor 59. The sealing material 58 is, for example, an epoxy resin or a gel.

[0054] The resistor (59) is disposed between the opposing first conductor pattern (51) and second conductor pattern (52) and between the opposing first conductor pattern (51) and first conductor (55). As shown in Fig. 3, the resistor (59) is disposed in contact with the surface of the first conductor pattern (51), the surface of the second conductor pattern (52), and the surface of the first conductor (55). The resistor (59) is a separate member from the sealing material (58).

[0055] The resistor (59) includes a first resistor portion (59a), a second resistor portion (59b), a third resistor portion (59c), and a fourth resistor portion (59d). The first resistor portion (59a) is located on the side surface (51a) of the first conductor pattern (51) facing the second conductor pattern (52) and is disposed over the entire side surface (51a). The second resistor portion (59b) is located on the side surface (52b) of the second conductor pattern (52) facing the first conductor pattern (51) and is disposed over the entire side surface (52b). The third resistor portion (59c) is located on a portion of the upper surface (51b) of the first conductor pattern (51) that is continuous with the side surface (51a) and extends along the side surface (51a). The fourth resistor portion (59d) is located on the lower surface of the first conductor (55) and extends along the first conductor (55). The corners between the side surface (51a) and the top surface (51b) of the first conductor pattern (51) are covered with the first resistor portion (59a) and the third resistor portion (59c).

[0056] The resistor (59) is made of a material having a lower dielectric constant and a higher thermal conductivity than the sealing material (58). The resistor (59) is made of, for example, polysilicon. The resistor (59) is in the form of a thin film. The thickness of each of the resistive portions (59a, 59b, 59c, 59d) of the resistor (59) is, for example, approximately several tens of micrometers to several hundreds of micrometers.

[0057] The resistor (59) is formed after the first semiconductor element (14a) and the fourth semiconductor element (14d) are mounted and the first conductor (55), the second conductor (56), and the third conductor (57) are connected together. The resistor (59) is formed by applying a coating material to the surface of the first conductor pattern (51), the surface of the second conductor pattern, and the surface of the first conductor (55) using an applicator.

[0058] In this embodiment, the resistor (59) is not disposed on the third conductor pattern (53), the fourth conductor pattern (54), and the second conductor (56).

[0059] 5 shows an equivalent circuit of the semiconductor device (50). A first parasitic inductance (L1) formed by the second conductor pattern (52) and a second parasitic inductance (L2) formed by the third conductor pattern (53) are connected in series between the source of the first semiconductor element (14a) and the drain of the fourth semiconductor element (14d). A specific circuit (16) composed of a resistor and a capacitor is connected in parallel between the drain and source of the first semiconductor element (14a) by a resistor (59). Two specific circuits (16) are formed: a first specific circuit (16a) and a second specific circuit (16b).

[0060] The first specified circuit (16a) is a circuit configured with a resistor (59) between the first conductor pattern (51) and the second conductor pattern (52). The first specified circuit (16a) has a first resistor (R1), a second resistor (R2), and a first capacitor (C1). The first capacitor (C1) corresponds to the stray capacitance formed between the first conductor pattern (51) and the second conductor pattern (52). In other words, the first specified circuit (16a) is a circuit in which the first resistor (R1) and the second resistor (R2) are connected in series with respect to the stray capacitance formed between the first conductor pattern (51) and the second conductor pattern (52).

[0061] The value of the first resistance (R1) is determined by the resistivity ρ [Ω·m] of the resistor (59), the thickness d [mm] of the first resistance portion (59a), and the area S [mm ２ If the resistance value is 10 Ω or more, the ringing suppression effect can be obtained, so the resistance value R is determined by the following: R = ρ × (d × 10 －３ / S x 10 －６ )≧10 (A) holds true.

[0062] The thickness direction of the first resistor portion (59a) is the direction in which the first conductor pattern (51) and the second conductor pattern (52) face each other.

[0063] The area of ​​the first resistor portion (59a) corresponds to the area of ​​a portion of the first conductor pattern (51) facing the resistor (59) between the first conductor pattern (51) and the second conductor pattern (52) when the resistor (59) is disposed between the first conductor pattern (51) and the second conductor pattern (52) (hereinafter referred to as the first area). Specifically, the first area is the area of ​​a portion of the first conductor pattern (51) overlapping with the first resistor portion (59a) when the first resistor portion (59a) is viewed from the second conductor pattern (52) side toward the first conductor pattern (51) side. In this embodiment, the first area corresponds to the area of ​​the side surface (51a) of the first conductor pattern (51).

[0064] When the resistor is arranged so as to fill the space between the opposing first conductor pattern (51) and second conductor pattern (52), the thickness d of the first resistor portion (59a) is maximized, and the resistivity required to satisfy the above-mentioned relational expression is minimized. In this case, the thickness d is equal to the distance between the first conductor pattern (51) and the second conductor pattern (52). This distance is approximately 1 mm at most, from the viewpoint of miniaturization of the module. When d = 1 mm, which is the maximum condition for the thickness d, is substituted into the above-mentioned relational expression, the following is obtained: ρ [Ω m] / S [mm ２ ] ≧ 0.01 (B) holds. This relational expression (B) indicates the lower limit of resistivity for satisfying a resistance value of 10Ω or more even when d is the maximum. When d is not the maximum, a resistivity equal to or higher than this lower limit is required.

[0065] The value of the second resistance (R2) is determined by the resistivity of the resistor (59), the thickness of the second resistance portion (59b), and the area of ​​the second resistance portion (59b). The method for determining the value of the second resistance (R2) is the same as that for the first resistance (R1). The area of ​​the second resistance portion (59b) corresponds to the area of ​​the portion of the second conductor pattern (52) facing the first conductor pattern (51) between the first conductor pattern (51) and the second conductor pattern (52) when the resistor (59) is disposed between the first conductor pattern (51) and the second conductor pattern (52) (hereinafter referred to as the second area). Specifically, the second area is the area of ​​the portion of the second conductor pattern (52) overlapping with the second resistance portion (59b) when viewing the second resistance portion (59b) from the first conductor pattern (51) side toward the second conductor pattern (52) side. In this embodiment, the second area corresponds to the area of ​​the side surface (52b) of the second conductor pattern (52).

[0066] When the resistor (59) is arranged to fill the space between the opposing first conductor patterns (51) and the second conductor patterns (52), and the thickness d of the first resistor portion (59a) is at its maximum, the resistance of the first specified circuit (16a) is either the first resistance (R1) or the second resistance (R2). Similarly, when the resistor (59) is not in contact with the first conductor pattern (51) or the second conductor pattern (52) but is located between the first conductor pattern (51) and the second conductor pattern (52), the resistance of the first specified circuit (16a) is either the first resistance (R1) or the second resistance (R2). In these cases, it is sufficient to consider relational expression (B) for only one of the resistances.

[0067] The first capacitor (C1) is formed between the first conductor pattern (51) and the second conductor pattern (52) even when the resistor (59) is not disposed. The capacitance of the first capacitor (C1) changes when the resistor (59) is disposed. Because the relative dielectric constant of the resistor (59) is smaller than the relative dielectric constant of the sealing material (58), the capacitance of the first capacitor (C1) is smaller when the resistor (59) is disposed than when the resistor (59) is not disposed. The capacitance of the first capacitor (C1) is determined by the relative dielectric constant of the resistor (59), the relative dielectric constant of the sealing material (58), the distance between the side surface (51a) of the first conductor pattern (51) and the side surface (52b) of the second conductor pattern (52), the thickness of the first resistor portion (59a), the thickness of the second resistor portion (59b), and the first area or the second area.

[0068] The second specifying circuit (16b) is a circuit configured with a resistor (59) between the first conductor pattern (51) and the first conductor (55). The second specifying circuit (16b) has a third resistor (R3), a fourth resistor (R4), and a second capacitor (C2). The second capacitor (C2) corresponds to the stray capacitance formed between the first conductor pattern (51) and the first conductor (55). In other words, the second specifying circuit (16b) is a circuit in which the third resistor (R3) and the fourth resistor (R4) are connected in series with respect to the stray capacitance formed between the first conductor pattern (51) and the first conductor (55).

[0069] The value of the third resistor (R3) is determined by the resistivity of the resistor (59), the thickness of the third resistor portion (59c), and the area of ​​the third resistor (R3).

[0070] The thickness direction of the third resistor portion (59c) is the direction in which the first conductor pattern (51) and the first conductor (55) face each other.

[0071] The area of ​​the third resistance portion (59c) corresponds to the area of ​​a portion of the first conductor pattern (51) facing the first conductor (55) between the first conductor pattern (51) and the first conductor (55) when the resistor (59) is disposed between the first conductor pattern (51) and the first conductor (55) (hereinafter referred to as the third area). Specifically, when the third resistance portion (59c) faces the first conductor (55), the third area is the area of ​​a portion of the first conductor pattern (51) overlapping with the third resistance portion (59c) when the third resistance portion (59c) is viewed from the first conductor (55) side toward the first conductor pattern (51). In this embodiment, the third area corresponds to the area of ​​a portion of the upper surface (51b) of the first conductor pattern (51) that is in contact with the third resistance portion (59c).

[0072] The value of the fourth resistor (R4) is determined by the resistivity of the resistor (59), the thickness of the fourth resistor portion (59d), and the area of ​​the fourth resistor portion (59d).

[0073] The thickness direction of the fourth resistor (59d) is the direction in which the first conductor pattern (51) and the first conductor (55) face each other.

[0074] The area of ​​the fourth resistance portion (59d) corresponds to the area of ​​a portion of the first conductor (55) facing the first conductor pattern (51) between the first conductor pattern (51) and the first conductor (55) when the resistor (59) is disposed between the first conductor pattern (51) and the first conductor (55) (hereinafter referred to as the fourth area). Specifically, the fourth area is the area of ​​a portion of the first conductor (55) overlapping with the fourth resistance portion (59d) when the fourth resistance portion (59d) is viewed from the first conductor pattern (51) side toward the first conductor (55) side in the direction perpendicular to the surface of the first conductor pattern (51). When the first conductor (55) is a wire with a circular cross section, the fourth area is half the area of ​​the first conductor (55) on the first conductor pattern (51) side of the entire surface area of ​​the portion of the first conductor (55) facing the fourth resistance portion (59d).

[0075] Similar to the first resistor (R1) and the second resistor (R2), the third resistor (R3) and the fourth resistor (R4) may also satisfy the relational expression (B).

[0076] When the resistor (59) is arranged so as to fill the space between the first conductor pattern (51) and the first conductor (55), the resistance of the second specific circuit (16b) becomes either the third resistor (R3) or the fourth resistor (R4). In this case, it is sufficient to consider the relational expression (B) for only one of the resistors.

[0077] The second capacitor (C2) is formed between the first conductor pattern (51) and the first conductor (55) even when the resistor (59) is not disposed. The capacitance of the second capacitor (C2) changes when the resistor (59) is disposed. Specifically, the capacitance of the second capacitor (C2) is smaller when the resistor (59) is disposed than when the resistor (59) is not disposed. The capacitance of the second capacitor (C2) is determined by the relative dielectric constant of the resistor (59), the relative dielectric constant of the sealing material (58), the distance between the upper surface (51b) of the first conductor pattern (51) and the first conductor (55), the thickness of the third resistor portion (59c), the thickness of the fourth resistor portion (59d), and the third or fourth area.

[0078] (4) Switching Voltage As shown in Figure 5, when parasitic inductances (L1, L2) and stray capacitances (C1, C2) are formed, ringing is likely to occur due to LC resonance between the parasitic inductances (L1, L2) and stray capacitances (C1, C2) when the first semiconductor element (14a) is switched. In particular, when the first semiconductor element (14a) is switched at high speed, ringing is likely to occur because the spikes in the drain-source voltage of the first semiconductor element (14a) become high. If the noise level caused by ringing during switching is high, it may adversely affect the operation of other devices.

[0079] The dashed line in Figure 6 represents the result of a simulation of the voltage waveform of the first semiconductor element (14a) of a semiconductor device that does not include the resistor (59). Because the resistor (59) is not provided, the first resistor (R1), second resistor (R2), third resistor (R3), and fourth resistor (R4) in Figure 5 do not exist. Furthermore, the capacitances of the first capacitor (C1) and the second capacitor are larger than when the resistor (59) is provided.

[0080] As shown in FIG. 6, it can be seen that a semiconductor device without a resistor (59) generates ringing with a relatively large amplitude after switching.

[0081] 6 shows the results of simulation of the voltage waveform of the first semiconductor element (14a) of the semiconductor device (50) provided with the resistor (59) as in the present embodiment. It can be seen that ringing is suppressed in the semiconductor device (50).

[0082] In the semiconductor device (50), the ringing energy is consumed as heat energy by the first resistor (R1), the second resistor (R2), the third resistor (R3), and the fourth resistor (R4). Furthermore, since the resistor (59) has a lower dielectric constant than the sealing material (58), the capacitance of the first capacitor (C1) and the capacitance of the second capacitor are smaller than when the resistor (59) is not provided. As a result, the semiconductor device (50) can suppress ringing during switching.

[0083] (5) Effects of the Embodiment The semiconductor device (50) according to this embodiment includes a first conductor pattern (51) electrically connected to the drain electrodes of the semiconductor elements (14a, 14b, 14c) of the upper arm, a second conductor pattern (52) arranged adjacent to the first conductor pattern (51) at a distance from the first conductor pattern (51), and a first conductor (55) electrically connecting the source electrodes of the semiconductor elements (14a, 14b, 14c) to the second conductor pattern (52) and facing the first conductor pattern (51). The semiconductor device (50) includes resistors (59) having a lower dielectric constant than the sealing material (58) arranged between the opposing first conductor pattern (51) and the second conductor pattern (52) and between the opposing first conductor pattern (51) and the first conductor (55). In the semiconductor device (50), the resistor (59) is disposed in an empty space, such as between the opposing first conductor pattern (51) and the second conductor pattern (52), eliminating the need for additional space for the resistor (59). In the semiconductor device (50), the resistor (59) connects resistance in series to the stray capacitance between the first conductor pattern (51) and the second conductor pattern (52) and the stray capacitance between the first conductor pattern (51) and the conductor (55). The resistance caused by the resistor (59) dissipates ringing energy as heat energy. Furthermore, in the semiconductor device (50), the resistor (59) reduces the stray capacitance between the first conductor pattern (51) and the second conductor pattern (52) and the stray capacitance between the first conductor pattern (51) and the first conductor (55). Therefore, the semiconductor device (50) can suppress ringing during switching while minimizing device size.

[0084] In this embodiment, the resistor (59) is arranged in contact with the surface of the first conductor pattern (51), the surface of the second conductor pattern (52), or the surface of the first conductor (55). In the semiconductor device (50), the resistor (59) can be easily arranged even if the distance between the first conductor pattern (51) and the second conductor pattern (52) and the distance between the first conductor pattern (51) and the conductor (55) are narrowed. In the semiconductor device (50), the first conductor pattern (51), the second conductor pattern (52), and the conductor (55) can be arranged compactly, which makes it possible to suppress ringing during switching while preventing the device from becoming large.

[0085] In this embodiment, the resistor (59) has a thin film shape. In the semiconductor device (50), even if the resistor (59) is provided, the peripheral structure of the semiconductor elements (14a, 14b, 14c) is hardly enlarged. Therefore, the semiconductor device (50) can be prevented from becoming large in size.

[0086] In this embodiment, the resistor (59) has any one of the first area, the second area, the third area, and the fourth area set to S [mm ２ ] and the resistivity of the resistor (59) is ρ [Ω·m], the formula ρ / S ≧ 0.01 is satisfied. If this formula is satisfied, the resistance value of the resistor (59) will be appropriate even if the thickness of the resistor (59) is relatively thin. Since the resistor (59) can be made thin in the semiconductor device (50), ringing can be effectively suppressed while preventing the device from becoming large.

[0087] In this embodiment, the resistor 59 is made of polysilicon, which allows for easy configuration of the resistor 59. The semiconductor device 50 can suppress ringing with a simple configuration.

[0088] (6) Modifications Figures 7 and 8 show modifications of the semiconductor device according to this embodiment. Figures 7 and 8 show a switching leg semiconductor device (250) including a first semiconductor element (214a). Semiconductor devices including a second semiconductor element and a third semiconductor element also have similar configurations.

[0089] As shown in FIG. 7 , the first semiconductor element (214a) is a lateral MOSFET. The drain electrode (214aD), source electrode (214aS), and gate electrode (214aG) of the first semiconductor element (214a) are all formed on the upper surface of the first semiconductor element (214a). The fourth semiconductor element (214d) is also a lateral MOSFET, like the first semiconductor element (214a). The drain electrode (214dD), source electrode (214dS), and gate electrode (214dG) of the fourth semiconductor element (214d) are all formed on the upper surface of the fourth semiconductor element (214d).

[0090] The switching leg including the first semiconductor element (214a) comprises a semiconductor device (250) including the first semiconductor element (214a), a first conductor pattern (251), a second conductor pattern (252), a first conductor (255), an encapsulant (58), and a resistor (259). The switching leg also comprises a fourth semiconductor element (214d), a third conductor pattern (253), a second conductor (256), a third conductor (257), and a fourth conductor (258). The switching leg is mounted on a substrate (60).

[0091] The first conductor pattern (251) is a portion on which the first semiconductor element (214a) is mounted. The first conductor pattern (251) is electrically connected to the source electrode (214aS) of the first semiconductor element (214a). The source electrode (214aS) is electrically connected to the first conductor pattern (251) via the second conductor (256). The first conductor pattern (251) is also electrically connected to the drain electrode (214dD) of the fourth semiconductor element (214d). The drain electrode (214dD) is electrically connected to the first conductor pattern (251) via the fourth conductor (258). The first conductor pattern (251) corresponds to the midpoint between the first semiconductor element (214a) and the fourth semiconductor element (214d). The source electrode (214aS) of the first semiconductor element (214a) is an example of a first electrode.

[0092] The second conductor pattern 252 is electrically connected to the drain electrode 214aD of the first semiconductor element 214a. The drain electrode 214aD is electrically connected to the second conductor pattern 252 via the first conductor 255. The drain electrode 214aD of the first semiconductor element 214a is an example of a second electrode.

[0093] The second conductor pattern (252) is disposed adjacent to and spaced apart from the first conductor pattern (251). A side surface (251a) of the first conductor pattern (251) and a side surface (252b) of the second conductor pattern (252) face each other in the in-plane direction of the substrate (60).

[0094] The third conductor pattern 253 is a portion on which the fourth semiconductor element 214d is mounted. The third conductor pattern 253 is electrically connected to a source electrode 214dS of the fourth semiconductor element 214d. The source electrode 214dS is electrically connected to the third conductor pattern 253 via a third conductor 257.

[0095] The first conductor (255) extends across the gap between the first conductor pattern (251) and the second conductor pattern (252). The first conductor (255) faces the upper surface (251b) of the first conductor pattern (251) in a direction perpendicular to the surface of the substrate (60). The first conductor (255) is, for example, an aluminum wire.

[0096] The second conductor 256 is disposed within the first conductor pattern 251. The second conductor 256 is, for example, an aluminum wire.

[0097] The third conductor 257 is disposed within the range of the third conductor pattern 253. The third conductor 257 is, for example, an aluminum wire.

[0098] The fourth conductor 258 extends across the gap between the first conductor pattern 251 and the third conductor pattern 253. The fourth conductor 258 is, for example, an aluminum wire.

[0099] The sealing material 58 covers and seals the first semiconductor element 214a, the fourth semiconductor element 214d, the first conductor pattern 251, the second conductor pattern 252, the third conductor pattern 253, the first conductor 255, the second conductor 256, the third conductor 257, the fourth conductor 258, and the resistor 259. The sealing material 58 is, for example, a resin.

[0100] The resistor (259) is disposed between the opposing first conductor pattern (251) and the opposing second conductor pattern (252) and between the opposing first conductor pattern (251) and the opposing first conductor (255). As shown in Fig. 7, the resistor (259) is disposed in contact with the surface of the first conductor pattern (251), the surface of the second conductor pattern (252), and the surface of the first conductor (255). The material and shape of the resistor (259) are the same as those in the above-described embodiment, and therefore detailed description thereof will be omitted.

[0101] In the configuration of the modified example, a specific circuit composed of a resistor and a capacitor is formed between the drain and source of the first semiconductor element (214a) by the resistor (259). This makes it possible to suppress ringing during switching while preventing the device from becoming large in size, even in the semiconductor device (250) of the modified example.

[0102] (7) Other Embodiments The semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) may be configured as unipolar transistors other than MOSFETs, such as JFETs, HFETs, or HEMTs. In this case, the first electrode electrically connected to the first conductor pattern (51, 251) is one of the drain and source electrodes, and the second electrode electrically connected to the second conductor pattern (52, 252) is the other of the drain and source electrodes. When the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are unipolar transistors, the control electrode is the gate electrode. Furthermore, the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) may be configured as bipolar transistors, such as IGBTs or HBTs. In this case, the first electrode electrically connected to the first conductor pattern (51, 251) is one of the collector electrode and the emitter electrode, and the second electrode electrically connected to the second conductor pattern (52, 252) is the other of the collector electrode and the emitter electrode. If the semiconductor element (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) is a bipolar transistor, the control electrode is a gate electrode or a base electrode.

[0103] The resistors (59, 259) may be provided only either between the opposing portions of the first conductor pattern (51, 251) and the second conductor pattern (52, 252) or between the opposing portions of the first conductor pattern (51, 251) and the first conductor (55, 255). For example, the arrangement of the resistors (59, 259) may be selected from the following patterns: - Arranged only on the surface of the first conductor pattern (51, 251), and not arranged on the surface of the second conductor pattern (52, 252) or the surface of the first conductor (55, 255). - Arranged only on the surface of the second conductor pattern (52, 252), and not arranged on the surface of the first conductor pattern (51, 251) or the surface of the first conductor (55, 255). - Arranged only on the surface of the first conductor (55,255), and not on the surface of the first conductor pattern (51,251) or the surface of the second conductor pattern (52,252). - Arranged on the surface of the first conductor pattern (51,251) and the surface of the second conductor pattern (52,252), and not on the surface of the first conductor (55,255). - Arranged on the surfaces of the second conductor pattern (52,252) and the first conductor (55,255), and not on the surface of the first conductor pattern (51,251). - Arranged on the surface of the first conductor pattern (51,251) and the surface of the first conductor (55,255), and not on the surface of the second conductor pattern (52,252).

[0104] Ringing during switching is caused by LC resonance due to parasitic inductance and stray capacitance. Ringing can be suppressed by including resistance due to the resistor (59, 259) in only one location of the LC resonance path. When the resistor (59, 259) is provided only in the second conductor pattern (52, 252), the area S in the relational expression (B) is the second area. When the resistor (59, 259) is provided only in the first conductor (55, 255), the area S in the relational expression (B) is the fourth area.

[0105] The resistor (59, 259) does not have to face the entire side surface (51 a, 251 a) of the first conductor pattern (51, 251), the entire side surface (52 b, 252 b) of the second conductor pattern (52, 252), or the entire first conductor (55, 255). For example, the resistor (59, 259) may be arranged to face only half of the side surface (51 a, 251 a) of the first conductor pattern (51, 251). In this case, the first area is half the area of ​​the side surface (51 a, 251 a) of the first conductor pattern (51, 251).

[0106] The resistor (59, 259) may be spaced apart from the surface of the first conductor pattern (51, 251), the surface of the second conductor pattern (52, 252), and the surface of the first conductor (55, 255). Alternatively, the resistor (59, 259) may be in contact with the surface of the first conductor (55, 255) while being spaced apart from the surface of the first conductor pattern (51, 251) and the surface of the second conductor pattern (52, 252).

[0107] The resistor (59, 259) does not have to be in the form of a thin film. For example, as shown in Figures 4 and 7, the resistor (59, 259) may be filled entirely between the opposing first conductor patterns (51, 251) and the opposing second conductor patterns (52, 252) and between the opposing first conductor patterns (51, 251) and the opposing first conductors (55, 255).

[0108] The material of the resistor (59, 259) does not necessarily have to have a higher thermal conductivity than the sealing material (58) as long as it has a lower dielectric constant than the sealing material (58). When the resistors (59, 259) are arranged in multiple locations, some of the resistors (59, 259) may be made of a material with a higher thermal conductivity than the sealing material (58), and the other resistors (59, 259) may be made of a material with a thermal conductivity equal to or lower than that of the sealing material (58).

[0109] The resistors (59, 259) do not have to be made of polysilicon. When resistors (59, 259) are arranged in multiple locations, some of the resistors (59, 259) may be made of polysilicon, and other resistors (59, 259) may be made of a different material.

[0110] The semiconductor device (50, 250) may be configured for the semiconductor elements (14d, 14e, 14f, 214d) constituting the lower arm. For example, a resistor may be disposed between the opposing third conductor pattern (53) and the opposing fourth conductor pattern (54) or between the opposing third conductor pattern (53) and the opposing second conductor (56). Alternatively, the semiconductor device (50, 250) may be configured for all of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d).

[0111] Although the embodiments and modifications have been described above, it will be understood that various modifications in form and details are possible without departing from the spirit and scope of the claims. Furthermore, the above embodiments, modifications, and other embodiments may be combined or substituted as appropriate as long as the functionality of the subject matter of the present disclosure is not impaired.

[0112] The above-mentioned descriptions such as "first," "second," "third," etc. are used to distinguish the words to which these descriptions are attached, and do not limit the number or order of the words.

[0113] As described above, the present disclosure is useful for semiconductor devices.

[0114] 1 Air conditioning device 10 Power conversion device 14a First semiconductor element (semiconductor element) 14aD Drain electrode (first electrode) 14aS Source electrode (second electrode) 14b Second semiconductor element (semiconductor element) 14c Third semiconductor element (semiconductor element) 50 Semiconductor device 51 First conductor pattern 52 Second conductor pattern 55 First conductor 58 Sealing material 59 Resistor 214a First semiconductor element (semiconductor element) 214aD Drain electrode (second electrode) 214aS Source electrode (first electrode) 214b Second semiconductor element (semiconductor element) 214c Third semiconductor element (semiconductor element) 250 Semiconductor device 251 First conductor pattern 252 Second conductor pattern 255 First conductor 259 Resistor

Claims

1. Semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d); a first conductor pattern (51, 251) electrically connected to first electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d); a second conductor pattern (52, 252) arranged adjacent to the first conductor pattern (51, 251) with a gap therebetween; and a conductor (55, 255) electrically connecting second electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) to the second conductor pattern (52, 252) and facing the first conductor pattern (51, 251). a sealing material (58) that covers the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d), the first conductor pattern (51, 251), the second conductor pattern (52, 252), and the conductors (55, 255), wherein when the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are unipolar transistors, the first electrode is one of a drain electrode and a source electrode, and the second electrode is the other of the drain electrode and the source electrode, and when the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are bipolar transistors, the first electrode is one of a collector electrode and an emitter electrode, and the second electrode is the other of the collector electrode and the emitter electrode, A semiconductor device in which a resistor (59, 259) having a lower dielectric constant than the sealing material (58) is arranged between the opposing first conductor pattern (51, 251) and the opposing second conductor pattern (52, 252) or between the opposing first conductor pattern (51, 251) and the opposing conductor (55, 255).

2. A semiconductor device according to claim 1, wherein the resistor (59, 259) is arranged in contact with the surface of the first conductor pattern (51, 251), the surface of the second conductor pattern (52, 252), or the surface of the conductor (55, 255).

3. A semiconductor device according to claim 2, wherein the resistor (59, 259) is in the form of a thin film.

4. In the semiconductor device according to any one of claims 1 to 3, when the resistor (59, 259) is arranged between the first conductor pattern (51, 251) and the second conductor pattern (52, 252), the area of ​​the part of the first conductor pattern (51, 251) facing the resistor (59, 259) or the area of ​​the part of the second conductor pattern (52, 252) facing the resistor (59, 259) between the first conductor pattern (51, 251) and the second conductor pattern (52, 252) is When the resistor (59, 259) is disposed between the first conductor pattern (51, 251) and the conductor (55, 255), the area of ​​the portion of the first conductor pattern (51, 251) facing the resistor (59, 259) or the area of ​​the portion of the conductor (55, 255) facing the resistor (59, 259) between the first conductor pattern (51, 251) and the conductor (55, 255) is defined as S [mm ２ ] and the resistivity of the resistor (59, 259) is ρ [Ω·m], the semiconductor device satisfies the formula ρ / S≧0.

01.

5. A semiconductor device according to any one of claims 1 to 4, wherein the resistor (59, 259) is made of polysilicon.

6. A semiconductor device according to claim 2, wherein the thermal conductivity of the resistor (59, 259) is higher than the thermal conductivity of the sealing material (58).

7. A power conversion device comprising the semiconductor device (50, 250) according to any one of claims 1 to 6.

8. An air conditioner equipped with the power conversion device (10) according to claim 7.

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