Linear temperature drift trimming circuit, voltage generation apparatus, and electronic device

Abstract

A linear temperature drift trimming circuit (100), a voltage generation apparatus, and an electronic device. The linear temperature drift trimming circuit (100) comprises a current adjustment module (20), used for adjusting a magnitude and a direction of at least one received input current (Iin), summing adjusted input currents (Iin), and outputting a summed current (Itrim). Each input current (Iin) is a high temperature linear current (IHT) or a low temperature linear current (ILT). The magnitude of the high temperature linear current (IHT) is positively correlated with the magnitude of the temperature (T), and the magnitude of the low temperature linear current (ILT) is negatively correlated with the magnitude of the temperature (T). The output summed current (Itrim) is adjustable along with the direction and magnitude of a change of the temperature (T), and has high flexibility of use and degree of controllability.

Description

Folded line temperature drift calibration circuit, voltage generating device and electronic equipment TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of integrated circuits, and particularly relates to a folded line temperature drift calibration circuit, a voltage generating device and an electronic equipment. BACKGROUND

[0002] The temperature drift characteristic, i.e. temperature coefficient, of a voltage reference is usually one of the most important performances, especially in high-precision systems. For example, for a 12-bit system with an operating temperature range of 25℃ to 65℃, in order to make the error contributed by the voltage reference less than 0.5LSB, the temperature drift performance needs to be within 3ppm / ℃. Due to the process deviation in the chip manufacturing process and the device mismatch, the temperature coefficient distribution range of the chip is very wide, thus the yield is reduced and it is difficult to achieve the expected performance.

[0003] Currently, trimming technology is usually used to reduce the temperature drift of a voltage reference chip. The most common technology includes single-point calibration, etc. Since single-point calibration only adjusts the first-order term of the temperature coefficient, after calibration, the temperature drift of the reference chip can generally be within 20ppm / ℃. In order to further reduce the temperature coefficient, high-order calibration is usually used to reduce the high-order error of the reference voltage. Common high-order calibration includes exponential compensation, etc., which has certain limitations, such as flexibility and controllability during calibration, etc. SUMMARY

[0004] According to an aspect of the present disclosure, a folded line temperature drift calibration circuit is provided, which comprises a current adjustment module configured to adjust the size and direction of at least one input current received and sum each adjusted input current to output a summed current, wherein each input current is a high-temperature folded line current or a low-temperature folded line current, the size of the high-temperature folded line current is positively correlated with the size of the temperature, and the size of the low-temperature folded line current is negatively correlated with the size of the temperature.

[0005] In a possible implementation, the current adjustment module comprises at least one current adjustment unit, each current adjustment unit comprising a first adjustment transistor, a second adjustment transistor, a third adjustment transistor, a first adjustment current mirror, and a second adjustment current mirror, wherein a gate of the first adjustment transistor, a drain of the first adjustment transistor, a gate of the second adjustment transistor, and a control end of the first adjustment current mirror are connected, for receiving the input current; a source of the third adjustment transistor and a first end of the second adjustment current mirror are used for receiving a power supply voltage; a drain of the second adjustment transistor is connected to a drain of the third adjustment transistor, a gate of the third adjustment transistor, and a control end of the second adjustment current mirror; a second end of the first adjustment current mirror and a second end of the second adjustment current mirror are connected to an output end of the current adjustment module, and the output end of the current adjustment module is used for outputting the sum current.

[0006] In a possible implementation, the first adjustment current mirror comprises a plurality of PMOS transistors, and in the first adjustment current mirror, a source of each PMOS transistor is connected as a first end of the current mirror, a drain of each PMOS transistor is connected as a second end of the current mirror, and a gate of each PMOS transistor is connected as a control end of the current mirror; the second adjustment current mirror comprises a plurality of NMOS transistors, and in the second adjustment current mirror, a source of each NMOS transistor is connected as a first end of the current mirror, a drain of each NMOS transistor is connected as a second end of the current mirror, and a gate of each NMOS transistor is connected as a control end of the current mirror; and a number of transistors in the first adjustment current mirror and the second adjustment current mirror is adjustable, and a direction and a size of a change of the sum current output by the current adjustment module with temperature are realized by adjusting the number of transistors in the first adjustment current mirror and the second adjustment current mirror.

[0007] In a possible implementation, the current adjustment module comprises at least one current source module, wherein the current source module is used for generating the input current, a zero-point temperature of the current source module is adjustable, and a current output by the current source module at the zero-point temperature is zero.

[0008] In a possible implementation, the current source module comprises a first basic current source, a second basic current source, a third basic current source, and a fourth basic current source, wherein a positive terminal of the first basic current source, a negative terminal of the second basic current source, a positive terminal of the third basic current source, and a negative terminal of the fourth basic current source are connected to serve as an output terminal of the first basic current source module, to output the high-temperature fold line current or the low-temperature fold line current, a negative terminal of the first basic current source and a negative terminal of the third basic current source are used to receive a power supply voltage, and a positive terminal of the second basic current source and a positive terminal of the fourth basic current source are grounded, wherein the input current is represented as Iin = I01 - I02 + I03 - I04, Iin represents the input current, I01 represents the current of the first basic current source, I02 represents the current of the second basic current source, I03 represents the current of the third basic current source, and I04 represents the current of the fourth basic current source.

[0009] In a possible implementation, the first basic current source and the second basic current source are programmable current sources, the current sizes of which are programmable and independent of temperature, wherein if the current source module is used to generate a high-temperature fold line current, the third basic current source is a PTAT current source, the fourth basic current source is a CTAT current source, and when the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module decreases, or when the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero point temperature of the current source module increases.

[0010] In a possible implementation, if the current source module is used to generate a low-temperature fold line current, the third basic current source is a CTAT current source, the fourth basic current source is a PTAT current source, and when the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module increases, or when the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero point temperature of the current source module decreases.

[0011] According to an aspect of the present disclosure, a voltage generating device is provided, which comprises: a voltage generating circuit configured to generate a target voltage; and a fold line temperature drift calibration circuit connected to the voltage generating circuit, configured to output a sum current to calibrate the voltage generating circuit, so that the voltage generating circuit outputs a calibrated target voltage.

[0012] In a possible implementation, the voltage generating circuit comprises a bandgap reference circuit and a Zener reference circuit.

[0013] According to an aspect of the present disclosure, an electronic device is provided, which comprises the broken line temperature drift calibration circuit or the voltage generating device.

[0014] The zero point temperature of the first current source module and the second current source module of the embodiments of the present disclosure is adjustable, and the direction and size of the summation current output by the current summer are adjustable, thus having higher flexibility and controllability.

[0015] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, but not limiting the present disclosure. Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0016] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the present disclosure and, together with the specification, serve to explain the technical solutions of the present disclosure.

[0017] FIG. 1 shows a block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure.

[0018] FIG. 2a shows a schematic diagram of the relationship between the size of the high-temperature broken line current and the size of the temperature according to an embodiment of the present disclosure.

[0019] FIG. 2b shows a schematic diagram of the relationship between the size of the low-temperature broken line current and the size of the temperature according to an embodiment of the present disclosure.

[0020] FIGS. 3a, 3b, 3c, 3d, 3e and 3f show schematic diagrams of summation currents according to embodiments of the present disclosure.

[0021] FIG. 4 shows a block diagram of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure.

[0022] FIG. 5 shows a schematic diagram of a current adjustment unit and a current source module according to an embodiment of the present disclosure.

[0023] FIG. 6 shows a schematic diagram of the circuit structure of a broken line temperature drift calibration circuit according to an embodiment of the present disclosure.

[0024] FIG. 7 shows a block diagram of a voltage generating device according to an embodiment of the present disclosure.

[0025] FIGS. 8a and 8b respectively show schematic diagrams of voltage generating devices composed of a bandgap reference circuit and a Zener reference circuit.

[0026] FIG. 9 respectively shows voltage schematic diagrams calibrated by the broken line temperature drift calibration circuit 100 according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0027] Various exemplary embodiments, features, and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numbers in different drawings represent the same or similar elements. Although various aspects of embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0028] In the description of the present disclosure, it needs to be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0029] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "multiple" is two or more, unless otherwise explicitly specified and limited.

[0030] In the present disclosure, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the present disclosure can be understood according to the specific circumstances.

[0031] The term "exemplary" herein means "serving as an example, an implementation, or an illustration". Any embodiment described herein as "exemplary" is not necessarily to be construed as being superior to or better than other embodiments.

[0032] The term "and / or" herein is only a description of the association relationship between the associated objects, which means that there can be three relationships, for example, A and / or B can mean that A exists alone, A and B exist together, and B exists alone. In addition, the term "at least one" herein means any one of the plurality or any combination of at least two of the plurality, for example, including at least one of A, B and C can mean including any one or more elements selected from the set consisting of A, B and C.

[0033] In addition, for a better understanding of the present disclosure, numerous specific details are given in the following detailed description. It will be understood by those skilled in the art that the present disclosure can be implemented without certain specific details. In some examples, methods, means, elements and circuits well known to those skilled in the art are not described in detail in order to highlight the main ideas of the present disclosure.

[0034] Referring to FIG. 1, FIG. 1 shows a block diagram of a fold line temperature drift calibration circuit according to an embodiment of the present disclosure.

[0035] As shown in FIG. 1, the circuit comprises:

[0036] The current adjustment module 20 is configured to adjust the size and direction of the received at least one input current Iin, and sum each adjusted input current Iin, and output a summed current Itrim, wherein each input current Iin is a high-temperature fold line current or a low-temperature fold line current, the size of the high-temperature fold line current is positively correlated with the size of the temperature (T), and the size of the low-temperature fold line current is negatively correlated with the size of the temperature.

[0037] The embodiment of the present disclosure can realize the adjustable direction and size of the output summed current Itrim with temperature change through the current adjustment module 20, and therefore has higher use flexibility and controllability. The high flexibility is reflected in that there are enough adjustable degrees of freedom in the calibration circuit to adapt to different shapes of temperature drift curves, and the controllability is reflected in that when affected by process deviation and mismatch, it will not introduce too much additional error. When the fold line temperature drift calibration circuit of the present disclosure is applied to a reference voltage generation chip or other voltage generation circuit, the summed current Itrim provided by the fold line temperature drift calibration circuit of the present disclosure can realize efficient voltage calibration, can effectively reduce the temperature drift coefficient of the reference chip, and improve the reliability and stability of the calibrated circuit (such as a reference voltage generation chip or other voltage generation circuit).

[0038] The embodiment of the present disclosure does not limit the specific implementation of the current adjustment module 20, and those skilled in the art can implement it according to actual conditions and needs using a suitable technical solution, as long as the corresponding function can be realized.

[0039] The embodiment of the present disclosure does not limit the specific positive correlation between the size of the high-temperature fold line current IHT and the size of the temperature, and does not limit the specific negative correlation between the size of the low-temperature fold line current ILT and the size of the temperature. Those skilled in the art can set it according to actual conditions and needs, for example, the positive correlation and the positive correlation can be proportional or approximately proportional (fold line), or can be a curve or other form.

[0040] Please refer to FIG. 2a, which shows a schematic diagram of the relationship between the magnitude of the high-temperature fold line current and the magnitude of the temperature according to an embodiment of the present disclosure.

[0041] For example, as shown in FIG. 2a, the magnitude of the high-temperature fold line current IHT has a positive proportional (positive slope) relationship with the magnitude of the temperature according to an embodiment of the present disclosure, and the high-temperature fold line current IHT can achieve arbitrary adjustment of the magnitude of the zero point temperature (also referred to as the inflection point temperature) of the high-temperature fold line current IHT, for example, the temperature T1 of the inflection point A of the high-temperature fold line current IHT can be adjusted to the left (less than T1) and to the right (greater than T1).

[0042] Please refer to FIG. 2b, which shows a schematic diagram of the relationship between the magnitude of the low-temperature fold line current and the magnitude of the temperature according to an embodiment of the present disclosure.

[0043] For example, as shown in FIG. 2b, the magnitude of the low-temperature fold line current ILT has an inverse proportional (negative slope) relationship with the magnitude of the temperature according to an embodiment of the present disclosure, and the low-temperature fold line current ILT can achieve arbitrary adjustment of the magnitude of the zero point temperature (also referred to as the inflection point temperature) of the low-temperature fold line current ILT, for example, the temperature T2 of the inflection point B of the low-temperature fold line current ILT can be adjusted to the left (less than T2) and to the right (greater than T2).

[0044] The direction of the change of the sum current Itrim with the temperature in an embodiment of the present disclosure can refer to the increase or decrease of the temperature, and the specific implementation manner of the direction and magnitude of the change of the sum current Itrim with the temperature output by the current adjustment module 20 in an embodiment of the present disclosure is not limited, and can be set according to actual conditions and needs by a person skilled in the art, for example, the proportionality coefficient of the high-temperature fold line current IHT and the low-temperature fold line current ILT can be adjusted to achieve the adjustment of the direction (for example, the positive and negative of the proportionality coefficient respectively correspond to the increase with the temperature and the decrease with the temperature) and the magnitude (for example, the absolute value of the proportionality coefficient is greater than 1 or less than 1, which respectively corresponds to increasing the amplitude of the increase with the temperature or decreasing the amplitude of the increase with the temperature), of course, other technical means other than the proportionality coefficient can also be used for adjustment, and the preferred implementation manner will be exemplarily introduced below.

[0045] Please refer to FIG. 3a, FIG. 3b, FIG. 3c, FIG. 3d, FIG. 3e, and FIG. 3f, which show schematic diagrams of the sum current according to an embodiment of the present disclosure.

[0046] As shown in FIG. 3a, FIG. 3b, FIG. 3c, FIG. 3d, FIG. 3e, FIG. 3f, the embodiment of the present disclosure can adjust the zero point temperature of the high-temperature fold line current IHT and the low-temperature fold line current ILT, and adjust the direction and size of the sum current Itrim with temperature, thereby obtaining various forms of the sum current. Of course, FIG. 3a, FIG. 3b, FIG. 3c, FIG. 3d, FIG. 3e, FIG. 3f only show some examples, and the embodiment of the present disclosure is not limited thereto.

[0047] Please refer to FIG. 4, which shows a block diagram of the fold line temperature drift calibration circuit according to the embodiment of the present disclosure.

[0048] For example, as shown in FIG. 4, the current adjustment module 20 includes at least one current adjustment unit 210 and at least one current source module 10, wherein the current source module 10 is used to generate the input current Iin, the zero point temperature of the current source module 10 is adjustable, and the current output by the current source module 10 at the zero point temperature is zero. The current adjustment unit 210 is used to adjust the size and direction of the received input current Iin, and the output ends of each current adjustment unit 210 are connected to serve as the output end of the current adjustment module 20, and output the sum current Itrim.

[0049] The embodiment of the present disclosure does not limit the specific implementation of the current adjustment unit 210 and the current source module 10, and those skilled in the art can use appropriate technical solutions to achieve it according to actual conditions and needs, as long as the corresponding functions can be realized.

[0050] Please refer to FIG. 5, which shows a schematic diagram of the current adjustment unit and the current source module according to the embodiment of the present disclosure.

[0051] For example, as shown in FIG. 5, the current adjustment unit 210 can include a first adjustment transistor M01, a second adjustment transistor M02, a third adjustment transistor M03, a first adjustment current mirror 211, and a second adjustment current mirror 212, wherein,

[0052] The gate of the first adjustment transistor M01, the drain of the first adjustment transistor M01, the gate of the second adjustment transistor M02, and the control end of the first adjustment current mirror 211 are connected, and are used to receive the input current Iin (here, the output current of the current source module 10),

[0053] The source of the third adjustment transistor M03 and the first end of the second adjustment current mirror 212 are used to receive the power supply voltage,

[0054] The drain of the second adjustment transistor M02 is connected to the drain of the third adjustment transistor M03, the gate of the third adjustment transistor M03, and the control end of the second adjustment current mirror 212.

[0055] The second end of the first adjusting current mirror 211 and the second end of the second adjusting current mirror 212 are connected to the output end of the current adjusting module 20,

[0056] The output end of the current adjusting module 20 is used to output the sum current.

[0057] Exemplarily, the first adjusting current mirror includes a plurality of PMOS transistors, and in the first adjusting current mirror, the source of each PMOS transistor is connected as the first end of the current mirror, the drain of each PMOS transistor is connected as the second end of the current mirror, and the gate of each PMOS transistor is connected as the control end of the current mirror,

[0058] The second adjusting current mirror includes a plurality of NMOS transistors, and in the second adjusting current mirror, the source of each NMOS transistor is connected as the first end of the current mirror, the drain of each NMOS transistor is connected as the second end of the current mirror, and the gate of each NMOS transistor is connected as the control end of the current mirror,

[0059] The number of each transistor in the first adjusting current mirror and the second adjusting current mirror can be adjusted,

[0060] The direction and size of the change of the sum current output by the current adjusting module with temperature are realized by adjusting the number of each transistor in the first adjusting current mirror and the second adjusting current mirror.

[0061] Exemplarily, as shown in FIG. 5, the current source module 10 can include a first basic current source I01, a second basic current source I02, a third basic current source I03, and a fourth basic current source I04, wherein,

[0062] The positive end of the first basic current source I01, the negative end of the second basic current source I02, the positive end of the third basic current source I03, and the negative end of the fourth basic current source I04 are connected as the output end of the first basic current source I01 module 10 to output the high-temperature broken-line current or the low-temperature broken-line current,

[0063] The negative end of the first basic current source I01 and the negative end of the third basic current source I03 are used to receive a power supply voltage,

[0064] The positive end of the second basic current source I02 and the positive end of the fourth basic current source I04 are grounded,

[0065] Exemplarily, the input current Iin can be:

[0066] Iin=I01-I02+I03-I04, wherein Iin represents the input current, I01 represents the current of the first basic current source I01, I02 represents the current of the second basic current source I02, I03 represents the current of the third basic current source I03, and I04 represents the current of the fourth basic current source I04.

[0067] In the embodiments of the present disclosure, an electronic fuse EFUSE can be arranged in the first basic current source I01 and the second basic current source I02, for example, the number of current mirrors in the first basic current source I01 and the second basic current source I02 is controlled by the electronic fuse EFUSE to adjust the current size, so as to adjust the zero temperature. Of course, the embodiments of the present disclosure do not limit the specific implementation of each current source, and do not limit the specific implementation of current adjustment. Those skilled in the art can use appropriate technical means to achieve it according to actual conditions and needs.

[0068] It should be noted that the input current Iin of the embodiments of the present disclosure can be generated by the current source module 10 or input from the outside, and the embodiments of the present disclosure do not limit it.

[0069] For example, the first basic current source I01 and the second basic current source I02 are programmable current sources, the current size of which can be programmed and is independent of temperature.

[0070] For example, if the current source module 10 is used to generate a high-temperature piecewise current IHT, then:

[0071] The third basic current source is a PTAT current source, and the fourth basic current source is a CTAT current source,

[0072] When the difference between the current of the first basic current source I01 and the current of the second basic current source I02 increases, the zero temperature of the current source module 10 decreases, or

[0073] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero temperature of the current source module 10 increases.

[0074] For example, if the current source module 10 is used to generate a low-temperature piecewise current ILT, then:

[0075] The third basic current source is a CTAT current source, and the fourth basic current source is a PTAT current source,

[0076] When the difference between the current of the first basic current source I01 and the current of the second basic current source I02 increases, the zero temperature of the current source module 10 increases, or

[0077] When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero point temperature of the current source module 10 decreases.

[0078] The number of the current adjustment units 210 and the number of the current source modules 10 are not limited in the embodiments of the present disclosure. As an example, the broken-line temperature drift calibration circuit can include only one current adjustment unit 210, which adjusts the size and direction of the externally input input current Iin, and outputs the adjusted input current Iin as the summed current Itrim. Of course, the broken-line temperature drift calibration circuit can include one current source module 10 and one current adjustment unit 210, or multiple current source modules 10 and multiple current adjustment units 210. If one current source module 10 and one current adjustment unit 210 are regarded as one component, the broken-line temperature drift calibration circuit can include one or more components. In each component, the input current Iin is generated by the current source module 10 and input to the current adjustment unit 210, which adjusts the size and direction of the input current Iin. The output ends of the current adjustment units 210 in each component are connected to each other to realize the summation operation of the adjusted input currents Iin and output the summed current Itrim.

[0079] The broken-line temperature drift calibration circuit including two current source modules 10 and two current adjustment units 210 is exemplarily introduced below. For ease of description, the names and labels of devices are adaptively changed in the example.

[0080] Please refer to FIG. 6, which shows a circuit structure schematic diagram of the broken-line temperature drift calibration circuit according to the embodiments of the present disclosure.

[0081] In a possible implementation, as shown in FIG. 6, the first current source module 10 can include a first current source I1, a second current source I2, a third current source I3, and a fourth current source I4, wherein,

[0082] The anode end of the first current source I1, the cathode end of the second current source I2, the anode end of the third current source I3, and the cathode end of the fourth current source I4 are connected to each other as the output end of the first current source module 10 to output the high-temperature broken-line current IHT,

[0083] The cathode end of the first current source I1 and the cathode end of the third current source I3 are used to receive a power supply voltage,

[0084] The anode end of the second current source I2 and the anode end of the fourth current source I4 are grounded.

[0085] In a possible implementation, the high-temperature broken-line current IHT can be expressed as:

[0086] IHT = I1 - I2 + I3 - I4, IHT represents the high-temperature fold line current IHT, I1 represents the current of the first current source I1, I2 represents the current of the second current source I2, I3 represents the current of the third current source I3, and I4 represents the current of the fourth current source I4.

[0087] In a possible implementation, the first current source I1 and the second current source I2 can be programmable current sources, i.e., the first current source I1 and the second current source I2 in this example are respectively the first basic current source I01 and the second basic current source I02 mentioned above, wherein,

[0088] When the difference (I1-I2) between the current of the first current source I1 and the current of the second current source I2 increases, the zero-point temperature of the first current source module 10 decreases, or

[0089] When the difference (I1-I2) between the current of the first current source I1 and the current of the second current source I2 decreases, the zero-point temperature of the first current source module 10 increases.

[0090] The embodiments of the present disclosure can set an electronic fuse EFUSE in the first current source I1 and the second current source I2, for example, adjust the current size by controlling the number of current mirrors in the first current source I1 and the second current source I2 through the electronic fuse EFUSE, so as to realize the adjustment of the zero-point temperature. Of course, the embodiments of the present disclosure do not limit the specific implementation of each current source, and do not limit the specific implementation of current adjustment. Those skilled in the art can adopt appropriate technical means according to actual conditions and needs.

[0091] In a possible implementation, as shown in FIG. 6, the second current source module 10' can include a fifth current source I5, a sixth current source I6, a seventh current source I7, and an eighth current source I8, wherein,

[0092] The positive electrode end of the fifth current source I5, the negative electrode end of the sixth current source I6, the positive electrode end of the seventh current source I7, and the negative electrode end of the eighth current source I8 are connected as the output end of the fifth current source I5 module to output the low-temperature fold line current ILT,

[0093] The negative electrode end of the fifth current source I5 and the negative electrode end of the seventh current source I7 are used to receive a power supply voltage,

[0094] The positive electrode end of the sixth current source I6 and the positive electrode end of the eighth current source I8 are grounded.

[0095] In a possible implementation, the low-temperature fold line current ILT is represented as:

[0096] ILT = I5 - I6 + I7 - I8, ILT represents the low-temperature fold line current ILT, I5 represents the current of the fifth current source I5, I6 represents the current of the sixth current source I6, I7 represents the current of the seventh current source I7, and I8 represents the current of the eighth current source I8.

[0097] In a possible implementation, the seventh current source I7 and the eighth current source I8 can be programmable current sources, that is, the seventh current source I7 and the eighth current source I8 in this example are respectively the first basic current source I01 and the second basic current source I02 mentioned above, wherein,

[0098] When the difference between the currents of the seventh current source I7 and the eighth current source I8 increases, the zero-point temperature of the second current source module 10' increases, or

[0099] When the difference between the currents of the seventh current source I7 and the eighth current source I8 decreases, the zero-point temperature of the second current source module 10' decreases.

[0100] Similarly, the embodiments of the present disclosure can set an electronic fuse EFUSE in the seventh current source I7 and the eighth current source I8, for example, adjust the current size by controlling the number of current mirrors in the seventh current source I7 and the eighth current source I8 through the electronic fuse EFUSE, so as to realize the adjustment of the zero-point temperature. Of course, the embodiments of the present disclosure do not limit the specific implementation of each current source, and do not limit the specific implementation of current adjustment. Those skilled in the art can adopt appropriate technical means according to actual conditions and needs.

[0101] For example, the third current source I3 and the sixth current source I6 are PTAT current sources, and the fourth current source I4 and the fifth current source I5 are CTAT current sources.

[0102] In a possible implementation, as shown in FIG. 6, the first current adjustment unit 210 can include a first transistor M1, a second transistor M2, a third transistor M3, a first current mirror 310, and a second current mirror 320. The second current adjustment unit 210' can include a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, a third current mirror 330, and a fourth current mirror 340, wherein,

[0103] The gate of the first transistor M1, the drain of the first transistor M1, the gate of the second transistor M2, and the control end of the first current mirror 310 are all connected to the output end of the first current source module 10, for receiving the high-temperature fold line current IHT,

[0104] The source of the third transistor M3 and the first end of the second current mirror 320 are used to receive a power supply voltage.

[0105] The drain of the second transistor M2 is connected to the drain of the third transistor M3, the gate of the third transistor M3 and the control terminal of the second current mirror 320.

[0106] The second end of the first current mirror 310 and the second end of the second current mirror 320 are connected to the output end of the current adjustment module 20.

[0107] The gate of the fifth transistor M5, the drain of the sixth transistor M6, the gate of the sixth transistor M6 and the control end of the third current mirror 330 are all connected to the output end of the second current source module 10' for receiving the low-temperature broken line current ILT.

[0108] The source of the fourth transistor M4 and the first end of the fourth current mirror 340 are used to receive a power supply voltage.

[0109] The drain of the fifth transistor M5 is connected to the drain of the fourth transistor M4, the gate of the fourth transistor M4 and the control terminal of the fourth current mirror 340.

[0110] The second end of the third current mirror 330 and the second end of the fourth current mirror 340 are connected to the output end of the current adjustment module 20.

[0111] The source of the first transistor M1, the source of the second transistor M2, the first end of the first current mirror 310, the source of the fifth transistor M5, the source of the sixth transistor M6, and the first end of the third current mirror 330 are all grounded.

[0112] The output terminal of the current adjustment module 20 is used to output the summed current Itrim.

[0113] In one possible implementation, as shown in FIG6 , the first current mirror 310 (MB1 to MBn) and the third current mirror 330 (MC1 to MCn) each include a plurality of PMOS transistors. In the first current mirror 310 or the third current mirror 330 , the source of each PMOS transistor is connected as a first end of the current mirror, the drain of each PMOS transistor is connected as a second end of the current mirror, and the gate of each PMOS transistor is connected as a control end of the current mirror.

[0114] In a possible implementation, as shown in FIG. 6, the second current mirror 320 (MA1-MAn) and the fourth current mirror 340 each include a plurality of NMOS transistors (MD1-MDn), and in the second current mirror 320 or the fourth current mirror 340, the sources of the NMOS transistors are connected as the first end of the current mirror, the drains of the NMOS transistors are connected as the second end of the current mirror, and the gates of the NMOS transistors are connected as the control end of the current mirror.

[0115] In a possible implementation, the number of transistors in the first current mirror 310, the second current mirror 320, the third current mirror 330, and the fourth current mirror 340 can be adjusted.

[0116] In a possible implementation, the direction and size of the change of the sum current Itrim output by the current adjustment module 20 with temperature are achieved by adjusting the number of transistors in the first current mirror 310, the second current mirror 320, the third current mirror 330, and the fourth current mirror 340.

[0117] In a possible implementation, for example, an electronic fuse EFUSE is arranged in the first current mirror 310, the second current mirror 320, the third current mirror 330, and the fourth current mirror 340, and the size (number of transistors) of each current mirror is controlled by the electronic fuse EFUSE.

[0118] Compared with the prior art, the embodiments of the present disclosure have more calibration degrees of freedom, can adapt to different shapes of temperature drift curves, and ensure sufficient stability without introducing too much additional error.

[0119] FIG. 7 shows a block diagram of a voltage generation apparatus according to an embodiment of the present disclosure.

[0120] As shown in FIG. 7, the apparatus includes:

[0121] a voltage generation circuit 200 configured to generate a target voltage Vout;

[0122] The broken-line temperature drift calibration circuit 100 is connected to the voltage generation circuit 200, and is configured to output a sum current Itrim to calibrate the voltage generation circuit 200, so that the voltage generation circuit 200 outputs a calibrated target voltage Vout.

[0123] When the broken-line temperature drift calibration circuit 100 of the present disclosure is applied to the voltage generation circuit 200, the sum current Itrim provided by the broken-line temperature drift calibration circuit 100 of the present disclosure can achieve efficient voltage calibration, can effectively reduce the temperature drift coefficient of the voltage generation circuit 200, and improve the reliability and stability of the voltage generation circuit 200.

[0124] The specific type and implementation of the voltage generating circuit 200 is not limited in the embodiments of the present disclosure, and a person skilled in the art can select the voltage generating circuit 200 to be calibrated according to actual conditions and needs. In a possible implementation, the voltage generating circuit 200 can include a bandgap reference circuit, a Zener reference circuit, etc.

[0125] Please refer to FIG. 8a and FIG. 8b, which respectively show schematic diagrams of voltage generating devices composed of a bandgap reference circuit and a Zener reference circuit.

[0126] In one example, as shown in FIG. 8a, the bandgap reference circuit includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first bandgap triode Q1, a second bandgap triode Q2, a first bandgap MOS transistor M11, and a first operational amplifier A1, wherein,

[0127] The source of the first bandgap MOS transistor M11 is configured to receive a power supply voltage, the gate of the first bandgap MOS transistor M11 is connected to the output of the first operational amplifier A1, and the drain of the first bandgap MOS transistor M11 and the first end of the fifth resistor R5 are connected to each other as an output of the bandgap reference circuit, configured to output the target voltage Vout (i.e., a bandgap voltage),

[0128] The second end of the fifth resistor R5 is connected to the first end of the third resistor R3, the first end of the fourth resistor R4, and the output of the broken line temperature drift calibration circuit 100, configured to receive the sum current Itrim,

[0129] The second end of the third resistor R3 is connected to the negative input of the first operational amplifier A1, the base and the collector of the first bandgap triode Q1, and the second end of the fourth resistor R4 is connected to the positive input of the first operational amplifier A1 and the first end of the second resistor R2,

[0130] The second end of the second resistor R2 is connected to the base and the collector of the second bandgap triode Q2,

[0131] The emitter of the first bandgap triode Q1, the emitter of the second bandgap triode Q2, and the first end of the first resistor R1 are connected to each other, and the second end of the first resistor R1 is grounded.

[0132] For example, as shown in FIG. 8a, the sum current Itrim is injected from point A and generates a calibration voltage on the fifth resistor R5, and the generated target voltage Vout can be expressed as: Vout = VBE + a*ΔVBE + Itrim*R5, where VBE represents the base-emitter voltage of the first bandgap transistor Q1, a represents a preset parameter, ΔVBE represents the difference between the base-emitter voltages of the first bandgap transistor Q1 and the second bandgap transistor Q2, and Vout represents the target voltage Vout.

[0133] In one example, as shown in FIG. 8b, the Zener reference circuit can include a first Zener reference resistor R11, a second Zener reference resistor R12, a first Zener reference transistor Q11, a first Zener diode Z1, and a first Zener reference current source I11, wherein,

[0134] The anode of the first Zener reference current source I11 is configured to receive a power supply voltage, and the cathode of the first Zener reference current source I11 is connected to a first end of the first Zener reference resistor R11 and a cathode of the first Zener diode Z1,

[0135] A second end of the first Zener reference resistor R11 and a first end of the second Zener reference resistor R12 are connected and configured to receive the sum current Itrim and output the target voltage Vout (reference voltage),

[0136] A second end of the second Zener reference resistor R12 is connected to a base and a collector of the first Zener reference transistor Q11,

[0137] An emitter of the first Zener reference transistor Q11 and an anode of the first Zener diode Z1 are grounded.

[0138] For example, as shown in FIG. 8b, the sum current Itrim is injected from point B and generates a calibration voltage on the first Zener reference resistor R11 and the second Zener reference resistor R12, and the generated target voltage Vout can be expressed as where Vout represents the target voltage Vout, b and c represent preset parameters, Vz represents the voltage of the first Zener diode, VBE represents the base-emitter voltage of the first Zener reference transistor Q11, and R1 and R2 represent the resistance values of the first Zener reference resistor R11 and the second Zener reference resistor R12, respectively. The last term in the two expressions is the fold line calibration voltage VTRIM generated by the design of the present application, and the remaining terms can be reference voltages without compensation or with first-order calibration.

[0139] Referring to FIG. 9, FIG. 9 shows voltage diagrams for calibration using the fold line temperature drift calibration circuit 100 according to an embodiment of the present disclosure.

[0140] In FIG. 9, (a) is the reference voltage without the fold line calibration; (b) is the fold line calibration voltage VTRIM used, which can set the high and low temperature inflection points at the same temperature as shown in the upper half of (b), or separate the high and low temperature inflection points as shown in the lower half of (b); (c) is the reference voltage after the fold line calibration. Generally speaking, the voltage reference with the high and low temperature inflection point separation type fold line calibration can obtain a lower temperature coefficient than the inflection point merging type, because it divides the overall temperature into three segments, but the inflection point merging is simpler in calibration implementation. The specific selection can be determined according to the reference voltage curve shape without the fold line calibration, and the selection of the inflection point temperature should be such that the voltage error in each temperature segment is similar. It can be seen that the embodiments of the present disclosure provide sufficient degrees of freedom to achieve this goal. At the same time, since the temperature of the fold line inflection point and the direction and strength of the fold line current can be controlled by the EFUSE, the errors caused by the process and mismatch can be ignored.

[0141] According to an aspect of the present disclosure, an electronic device is provided, which includes the fold line temperature drift calibration circuit 100, or the voltage generation apparatus.

[0142] The above has described the embodiments of the present disclosure, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes are obvious to those skilled in the art without departing from the scope and spirit of the described embodiments. The selection of the terms used herein is intended to best explain the principles, practical application, or improvement of the technology in the market of the embodiments, or to enable other ordinary skilled persons in the art to understand the embodiments disclosed herein.

Claims

1. A broken line temperature drift calibration circuit, characterized in that: The circuit comprises: A current adjustment module is used to adjust the magnitude and direction of at least one received input current, sum the adjusted input currents, and output the summed current, wherein each input current is a high-temperature broken line current or a low-temperature broken line current, the magnitude of the high-temperature broken line current is positively correlated with the magnitude of the temperature, and the magnitude of the low-temperature broken line current is negatively correlated with the magnitude of the temperature.

2. The circuit according to claim 1, wherein: The current adjustment module includes at least one current adjustment unit, each current adjustment unit includes a first adjustment transistor, a second adjustment transistor, a third adjustment transistor, a first adjustment current mirror, and a second adjustment current mirror, wherein: The gate of the first adjustment transistor, the drain of the first adjustment transistor, the gate of the second adjustment transistor and the control end of the first adjustment current mirror are connected to receive the input current. The source of the third adjustment transistor and the first end of the second adjustment current mirror are used to receive a power supply voltage. The drain of the second adjustment transistor is connected to the drain of the third adjustment transistor, the gate of the third adjustment transistor and the control terminal of the second adjustment current mirror. The second end of the first adjustment current mirror and the second end of the second adjustment current mirror are connected to the output end of the current adjustment module. The output end of the current adjustment module is used to output the summed current.

3. The circuit according to claim 2, characterized in that The first adjustment current mirror includes a plurality of PMOS transistors, wherein: the sources of the PMOS transistors are connected as a first end of the current mirror, the drains of the PMOS transistors are connected as a second end of the current mirror, and the gates of the PMOS transistors are connected as a control end of the current mirror. The second adjustment current mirror includes a plurality of NMOS transistors. In the second adjustment current mirror, the sources of the NMOS transistors are connected as a first end of the current mirror, the drains of the NMOS transistors are connected as a second end of the current mirror, and the gates of the NMOS transistors are connected as a control end of the current mirror. The number of transistors in the first adjustment current mirror and the second adjustment current mirror is adjustable. The direction and magnitude of the summed current output by the current adjustment module changing with temperature are achieved by adjusting the number of transistors in the first adjustment current mirror and the second adjustment current mirror.

4. The circuit according to claim 2, characterized in that The current adjustment module includes at least one current source module, wherein the current source module is used to generate the input current, the zero point temperature of the current source module is adjustable, and the current output by the current source module at the zero point temperature is zero.

5. The circuit according to claim 4, characterized in that The current source module includes a first basic current source, a second basic current source, a third basic current source, and a fourth basic current source, wherein: The positive terminal of the first basic current source, the negative terminal of the second basic current source, the positive terminal of the third basic current source, and the negative terminal of the fourth basic current source are connected as the output terminal of the first basic current source module to output the high-temperature broken line current or the low-temperature broken line current. The negative terminal of the first basic current source and the negative terminal of the third basic current source are used to receive a power supply voltage. The positive terminal of the second basic current source and the positive terminal of the fourth basic current source are grounded. Wherein, the input current is expressed as: Iin=I01-I02+I03-I04, where Iin represents the input current, I01 represents the current of the first basic current source, I02 represents the current of the second basic current source, I03 represents the current of the third basic current source, and I04 represents the current of the fourth basic current source.

6. The circuit according to claim 5, characterized in that The first basic current source and the second basic current source are programmable current sources, the current magnitudes of which are programmable and independent of temperature. If the current source module is used to generate a high-temperature broken-line current, then: The third basic current source is a PTAT current source, and the fourth basic current source is a CTAT current source. When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module decreases, or When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module increases.

7. The circuit according to claim 5, characterized in that If the current source module is used to generate a low-temperature broken-line current, then: The third basic current source is a CTAT current source, and the fourth basic current source is a PTAT current source. When the difference between the current of the first basic current source and the current of the second basic current source increases, the zero point temperature of the current source module increases, or When the difference between the current of the first basic current source and the current of the second basic current source decreases, the zero-point temperature of the current source module decreases.

8. A voltage generating device, characterized in that: The device comprises: a voltage generating circuit, for generating a target voltage; The broken line temperature drift calibration circuit according to any one of claims 1 to 7, connected to the voltage generating circuit, is configured to output a summed current to calibrate the voltage generating circuit so that the voltage generating circuit outputs a calibrated target voltage.

9. The device according to claim 8, characterized in that The voltage generating circuit includes a bandgap reference circuit and a Zener reference circuit.

10. An electronic device, characterized in that: The electronic device includes the broken line temperature drift calibration circuit according to any one of claims 1 to 7, or the voltage generating device according to claim 8 or 9.

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