Converter and method for controlling a converter

Abstract

The present disclosure relates to a converter comprising a first and second power converter, a series connection of a first, second and third capacitor unit, an inverter circuit and a first and second rectifier circuit. The first power converter is connected with the first capacitor unit. The second power converter is connected with the second capacitor unit. The third capacitor unit is electrically connected with the first capacitor unit and the second capacitor unit. A series connection of a first and second controllable switch unit of the inverter circuit is connected in parallel with the third capacitor unit. The inverter circuit is electrically connected with a primary winding of a transformer. A first secondary winding of the transformer is connected via the first rectifier circuit to the first capacitor unit. A second secondary winding of the transformer is connected via the second rectifier circuit to the second capacitor unit.

Description

[0001] CONVERTER AND METHOD FOR CONTROLLING A CONVERTER

[0002] TECHNICAL FIELD

[0003] The present disclosure relates to a converter and a method for controlling a converter.

[0004] BACKGROUND

[0005] Solar energy may be translated into electrical energy by solar photovoltaic (PV) panels, e.g. PV arrays. The electrical energy translated from solar energy is in the form of direct current (DC) energy. Eventually, the DC electric energy is delivered to alternating current (AC) power systems by means of power electronic conversion systems. Consumption and loads may use the electrical energy in the form of AC energy. Examples of loads may comprise home appliances, industry motors, etc.

[0006] SUMMARY

[0007] A power converter system for converting DC power to AC power may comprise two stages. A first stage may comprise or be a DC-to-DC power converter stage. That is, one level of DC voltage or current may be converted to a lower or greater level of DC voltage or current. For example, a DC voltage or current may be converted to a lower or greater DC voltage or current (i.e. voltage or current of lower or higher level), respectively. The second stage may comprise or be a DC-to-AC power converter stage, which may be referred to as inverter stage. That is, DC power may be converted to AC power. For example, a DC voltage or current may be converted to an AC voltage or current, respectively. Optionally, the power converter system may be bidirectional. In this case, the second stage may be configured to be an AC-to-DC power converter stage. That is, AC power may be converted to DC power.

[0008] In case a PV system, such as a PV array or PV panel, are electrically connected to a DC-to-DC power converter stage, the DC- to-DC converter stage may be configured to boost an input DC voltage provided by the PV array or panel to a value higher at the output of the DC-to-DC converter stage. The terms “solar PV” and, thus, “solar PV system” may be used as synonyms for the terms “PV” and “PV system”, respectively.

[0009] In view of the above, this disclosure aims to provide a converter for a DC-to-DC conversion that is improved with regard to at least one of losses of semiconductor switches used in the converter for controlling the converter, costs and size. An objective of this disclosure is to provide such a converter that allows guaranteeing a maximum energy being harvested from a PV system, when the converter is directly connected with the PV system for converting the DC voltage provided by the PV system.

[0010] These and other objectives are achieved by the solution of this disclosure as described in the independent claims. Advantageous implementations are further defined in the dependent claims.

[0011] Herein, the terms “electrically connect” and “connect” are used as synonyms. The term “controlled semiconductor switch” may be used as a synonym for the term “controllable semiconductor switch”. The term “controllable semiconductor switch” means a semiconductor switch comprising a control terminal, such as a transistor, a thyristor, triac etc. The controllable semiconductor switch may be controlled via the control terminal to switch between the conducting state (i.e. on-state) and the non-conducting state (i.e. off-state). Herein, controllable semiconductor switches may be power semiconductor transistors, such as an insulated- gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). Using MOSFET instead of IGBTS for the controllable semiconductor switches has the following advantages: The operation speed of a MOSFET is faster than the operation speed of a similar rated IGBT. Power losses of a MOSFET are lower than power losses of a similar rated IGBT. IGBTs and MOSFETs allow to switch high current and voltages.

[0012] Herein, controllable semiconductor switches may be transistors. A controllable semiconductor switch being a transistor may be an insulated-gate bipolar transistor (IGBT), a field-effect transistor (FET), a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistors (BJT) or a junction gate field-effect transistor (JFET). Optionally, a controllable semiconductor switch may be a semiconductor switch with a diode associated to it. For example, a controllable semiconductor switch may be a transistor, such as an IGBT, with a diode connected in anti-parallel to the transistor. That is, in case a controllable semiconductor switch is a transistor, optionally a diode is connected in anti-parallel to the transistor. For example, a controllable semiconductor switch may be a transistor, such as a MOSFET, comprising an intrinsic body diode. The diode and intrinsic body diode are examples of an “uncontrollable semiconductor switch”, which may be referred to as “uncontrolled semiconductor switch”. The term “bidirectional semiconductor switch” means a semiconductor switch that allows a bidirectional current flow, that is a current flow in two directions. The term “unidirectional semiconductor switch” means a semiconductor switch that allows a unidirectional current flow, that is a current flow in one direction.

[0013] The term “uncontrollable semiconductor switch” means a semiconductor switch without a control terminal that allows a unidirectional current flow, that is a current flow in one direction. Examples of an “uncontrollable semiconductor switch” are a diode (may be referred to as “p-n semiconductor diode”), a pin diode, a Schottky diode, an intrinsic body diode of a respective device / transistor etc.

[0014] A first aspect of this disclosure provides a converter. The converter comprises a first, second, third and fourth terminal for receiving DC voltages. The converter comprises a first and second power converter each comprising a first, second and third terminal and one or more controllable semiconductor switches for controlling a conversion of a voltage at the first terminal to a further voltage of lower or higher level at the second and third terminal. The converter comprises a series connection of a first, second and third capacitor unit. The converter comprises an inverter circuit comprising a series connection of a first and second controllable switch unit each comprising a controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series. The converter comprises a transformer comprising a primary winding, a first secondary winding and a second secondary winding that are galvanically isolated from each other. The converter comprises a first and second rectifier circuit. The first terminal of the first power converter is electrically connected with the second terminal of the converter. The second and third terminal of the first power converter are electrically connected with a first and second terminal of the first capacitor unit, respectively. The first terminal of the converter is electrically connected with the first terminal of the first capacitor unit. The first terminal of the second power converter is electrically connected with the third terminal of the converter. The second and third terminal of the second power converter are electrically connected with a first and second terminal of the second capacitor unit, respectively. The fourth terminal of the converter is electrically connected with the second terminal of the second capacitor unit. A first and second terminal of the third capacitor unit are electrically connected with the second terminal of the first capacitor unit and the first terminal of the second capacitor unit, respectively. A first end of the series connection of the first and second controllable switch unit of the inverter circuit is electrically connected with the first terminal of the third capacitor unit and a second end of the series connection of the first and second controllable switch unit of the inverter circuit is electrically connected with the second terminal of the third capacitor unit. The inverter circuit is electrically connected with the primary winding of the transformer. The first secondary winding of the transformer is electrically connected via the first rectifier circuit to the first capacitor unit. The second secondary winding of the transformer is electrically connected via the second rectifier circuit to the second capacitor unit.

[0015] The inverter circuit, transformer, first rectifier circuit and second rectifier circuit allow maintaining an electrical energy balance between the first capacitor unit, second capacitor unit and third capacitor unit. In other words, these circuit are configured to counter any imbalance from input sources connected to the converter. Any imbalance in voltage sources connected to the converter may result in imbalance in the energy stored in the capacitor units. In case of an imbalanced source scenario, the first, second and third capacitor unit may be unequally charged creating an unequal voltage distribution among the series connected capacitor units. The inverter circuit, transformer, first rectifier circuit and second rectifier circuit of the converter allow balancing the electrical energies between the capacitor units by exchanging unequal energy between the first and second capacitor unit. Thus, the inverter circuit, transformer, first rectifier circuit and second rectifier circuit may be referred to as “balancer circuit”.

[0016] The third capacitor unit allows the first and second capacitor unit to be rated for lower voltage and / or lower current, because the series connection of the first capacitor unit, second capacitor unit and third capacitor unit splits a voltage (e.g. DC load voltage) into several lower voltage levels. This allows reducing costs and size of the converter.

[0017] The converter allows, due to its structure a partial power processing for power conversion. In a partial power processing, a majority of the power from the source (feeding the converter) is directed to the load side (which provides power to a load when the load is connected to the converter) without any switching, while a small portion of the power is processed by means of the first power converter and second power converter of the converter. In this case, the first and second power converter may be partial power converters. The term “partially rated power converter” may be used as a synonym for the term “partial power converter”. The converter can maintain the voltage at the first capacitor unit, second capacitor unit and third capacitor unit at a predefined level as well as maintain the maximum power point tracking (MPPT) point of an input to the first, second, third and fourth terminals of the converter. At all input variations of voltage sources connectable to the first, second, third and fourth terminal of the converter, the first and second power converter operate a smaller portion of the total power, and therefore, may be implemented using low voltage and / or low current semiconductor devices, such as low voltage and / or low current controllable semiconductor switches. Such low voltage and / or low current semiconductor devices are lower in costs compared to semiconductor devices rated for higher voltage and / or higher current. Low voltage and / or low current semiconductor devices can be switched faster and at high frequencies compared to semiconductor devices rated for higher voltage and / or higher current. Therefore, size of passive elements (such as inductors and capacitors) used in the power converters can be reduced considerably. These devices dissipate lower losses resulting lower cooling and heatsink requirements. As a result, the converter of the first aspect is improved with regard to costs and size. In addition, the converter is improved with regard to losses of semiconductor switches used in the converter for controlling the converter. Thus, the converter allows a scalability for higher voltage applications without compromising efficiency and cost.

[0018] The terms “converter circuit”, “converter device” or “converter module” may be used as a synonym for the term “converter”. The components of the converter may be arranged in a housing of the converter.

[0019] The converter may be a DC-to-DC converter. Optionally, the converter may be a DC-to-DC converter stage that feeds an DC- to-AC converter stage (i.e. an inverter stage). The converter may be configured to boost DC voltage(s) received at the first, second, third and fourth terminals of the converter, i.e. convert a received DC voltage to a voltage of higher level. The converter of the first aspect being a DC-to-DC converter stage and a DC-to-AC converter stage being fed by the converter may interface a PV system and a grid. That is, they may be used to convert the DC voltage / direct current provided by the PV system to an AC voltage / altemating current for the grid. The term “DC link capacitor unit” may be used for referring to a capacitor unit. The first capacitor unit, second capacitor unit and third capacitor unit electrically connected in series may form a DC link.

[0020] The first and third terminal may be configured to be electrically connected with a first voltage source and the second and fourth terminal may be configured to be electrically connected with a second voltage source. The first and second voltage source may be a first and second PV system, the PV system comprising or being one or more PV panels and / or PV arrays. The first and second voltage sources may be a first and second battery, optional rechargeable batteries. The term “battery energy storage (BES)” may be used as a synonym for the term “battery”. The converter of the first aspect allows providing a low loss MPPT operation. This allows an increase of an extraction of energy from energy sources, e.g. solar PV energy from PV systems, that may be connected to the first, second, third and fourth terminals of the converter.

[0021] Herein, a voltage at the first terminal of a power converter (e.g. first or second power converter) means a voltage between the first terminal of the power converter and a further terminal, e.g. a terminal of the converter. That is, the voltage at the first terminal of the first power converter means the voltage between the second and fourth terminal of the converter (the first terminal of the first power converter is electrically connected with the second terminal of the converter). Accordingly, the voltage at the first terminal of the second power converter means the voltage between the third and first terminal of the converter (the first terminal of the second power converter is electrically connected with the third terminal of the converter).

[0022] Herein, a voltage at the second and third terminal of a power converter (e.g. first or second power converter) means a voltage between the second and third terminal of the power converter.

[0023] In an implementation form of the first aspect, the converter comprises one or more additional first power converters with the first terminal being electrically connected to a respective further terminal of the converter and the second and third terminal being electrically connected to the first and second terminal of the first capacitor unit, respectively. In addition or alternatively, the converter may comprise one or more additional second power converters with the first terminal being electrically connected to a respective further terminal of the converter and the second and third terminal being electrically connected to the first and second terminal of the second capacitor unit, respectively.

[0024] This allows, connecting additional voltage sources to the converter. Therefore, the converter may be used for more than two voltage sources in order to provide a voltage and / or current conversion for the multiple voltage sources. Each of the one or more additional first power converters may be implemented like the first power converter. Thus, the description of the first power converter is correspondingly valid for the one or more additional first power converters. Each of the one or more additional second power converters may be implemented like the second power converter. Thus, the description of the second power converter is correspondingly valid for the one or more additional second power converters.

[0025] In an implementation form of the first aspect, each of the first and second power converter is a partial power converter.

[0026] This allows using low voltage and / or low current semiconductor switches as the controllable semiconductor switches of the first and second power convert.

[0027] In an implementation form of the first aspect, the converter is unidirectional and each of the first, second, third and fourth terminal of the converter is an input terminal. Alternatively, the converter may be bidirectional.

[0028] In case the converter is bidirectional, rechargeable batteries may be connected to the converter. For example, a first rechargeable battery may be connected to the first and third terminal of the converter and a second rechargeable battery may be connected to the second and fourth terminal of the converter. This allows converting by the converter a DC voltage provided by the first and second battery to a voltage of lower or higher level and charging by the converter the first and second rechargeable battery.

[0029] In an implementation form of the first aspect, the converter comprises a fifth and sixth terminal that are configured to be electrically connected with an electrical load. The fifth terminal is electrically connected with the first terminal of the first capacitor unit, and the sixth terminal is electrically connected with the second terminal of the second capacitor unit. The electrical load may be for example a converter stage, such as a DC-to-AC converter stage. The electrical load may be an electrical equipment that is configured to be electrically supplied with DC power, e.g. DC voltage or DC current.

[0030] In an implementation form of the first aspect, a capacitor unit of the first, second and third capacitor unit comprises a capacitor or multiple capacitors electrically connected in series. In case of multiple capacitors, capacitors rated for lower voltage and / or lower current may be used. This allows reducing costs and size of the converter. The multiple capacitors may be for example two capacitors electrically connected in series. For example, multiple capacitor of the third capacitor unit enables the use of further low voltage and / or low current devices to be used in the converter. This allows to reduce further the cost and increase system efficiency.

[0031] In an implementation form of the first aspect, the inverter circuit comprises a resonant circuit comprising a capacitor and an inductor, and the resonant circuit is electrically connected between the primary winding of the transformer and a midpoint between the first controllable switch unit and the second controllable switch unit. The resonant circuit allows a high-efficiency switching operation of the controllable switch units. For example, soft switching of the controllable switch units may be performed. For this, the controllable switch units may be configured to be switched with a switching frequency that is smaller than or equal to a resonant frequency of the resonant circuit.

[0032] In an implementation form of the first aspect, a controllable switch unit of the first and second controllable switch unit comprises one controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series. Using multiple controllable semiconductor switches allows using low voltage and / or low current devices for implementing the controllable semiconductor switches.

[0033] In an implementation form of the first aspect, a ratio between the primary winding, the first secondary winding and the third secondary winding of the transformer is a 1 : 1 : 1 ratio. Alternatively, each of a ratio between the primary winding and the first secondary winding and a ration between the primary winding and the second secondary winding may be a n: 1 ratio, wherein n is an integer greater than one.

[0034] The n: 1 ratio allows low voltage and / or low current devices to be used in the first and second power converter. For example, in case of n equaling to two (n = 2), l / 4lhof the rated semiconductor devices may be used in the first and second power converter. The greater the integer n, the lower can be the voltage ratings of the first and second power converter and vice versa.

[0035] In an implementation form of the first aspect, a rectifier circuit of the first and second rectifier circuit comprises a series connection of two semiconductor switches. A midpoint between the two semiconductor switches of the rectifier circuit may be electrically connected with the first secondary winding or the second secondary winding, respectively, and the two semiconductor switches of the rectifier circuit may be two controllable semiconductor switches or two uncontrollable semiconductor switches.

[0036] In an implementation form of the first aspect, the rectifier circuit comprise a second series connection of two semiconductor switches electrically connected in parallel to the series connection of two semiconductor switches. The midpoint between the two semiconductor switches of the series connection of two semiconductor switches of the rectifier circuit may be electrically connected with a first end of the first secondary winding or the second secondary winding, respectively. A midpoint between the two semiconductor switches of the second series connection of two semiconductor switches of the rectifier circuit may be electrically connected with a second end of the first secondary winding or the second secondary winding, respectively. In an implementation form of the first aspect, the inverter circuit comprises a second series connection of the first and second controllable switch unit, and the second series connection of the first and second controllable switch unit is electrically connected in parallel to the series connection of the first and second controllable switch unit.

[0037] In an implementation form of the first aspect, the converter is configured to control the semiconductor switches (i.e. controllable semiconductor switches) of the power converters of the converter by performing a maximum power point tracking (MPPT) algorithm.

[0038] Herein, controlling the controllable semiconductor switches means controlling switching of the controllable semiconductor switches.

[0039] Performing the MPPT algorithm for controlling the controllable semiconductor switches of the first and second power converter allows harvesting a maximum energy from electrical sources, e.g. voltage sources, that may be connected to the first, second, third and fourth terminal of the converter. Such electrical sources may be PV systems, such as PV panels or PV arrays. For example, the first, second, third and fourth terminal of the converter may be connected to PV systems, such as PV panels or PV arrays. In this case, performing the MPPT algorithm for controlling the switches of the first and second power converter allows ensuring that the PV systems produce the maximum available energy.

[0040] The present disclosure is not limited to a specific type of MPPT algorithm. Thus, any known MPPT algorithm may be used.

[0041] The converter may be a MPPT-DC-to-DC converter. The converter may be configured to employ the MPPT algorithm to draw the most power possible from a photovoltaic (PV) system. The maximum power point (MPP) is the voltage at which a PV system may generate its maximum power.

[0042] In an implementation form of the first aspect, the converter is configured to control the first controllable switch unit and the second controllable switch unit of the inverter circuit such that at any time only one of the first controllable switch unit and the second controllable switch unit is in the conducting state.

[0043] The converter is configured to control the first controllable switch unit and the second controllable switch unit of the inverter circuit using a duty cycle of 50%. Especially, the converter is configured to control the first controllable switch unit and the second controllable switch unit of the inverter circuit such that they are operated in complimentary with 50% duty cycle. In case the inverter circuit comprises a resonant circuit, the first controllable switch unit and second controllable switch unit may be operated in complimentary with 50% duty cycle in order to excite the resonant circuit of the circuit.

[0044] In an implementation form of the first aspect, the converter is configured to control the first controllable switch unit and the second controllable switch unit of the inverter circuit with a frequency that is smaller than or equal to a resonant frequency of the resonant circuit. This allows a high-efficiency switching operation. The frequency (i.e. switching frequency) being equal or similar to the resonant frequency allows soft switching of the controllable switch units. The frequency (switching frequency) being slightly lower than the resonant frequency allows maintaining soft switching for wider operating conditions.

[0045] In order to achieve the converter according to the first aspect of the disclosure, some or all of the implementation forms and optional features of the first aspect, as described above, may be combined with each other. A second aspect of this disclosure provides a method for controlling a converter according to the first aspect of this disclosure. The method comprises controlling the semiconductor switches of the power converters of the converter by performing a maximum power point tracking (MPPT) algorithm.

[0046] In an implementation form of the second aspect, the method comprises controlling the first controllable switch unit and the second controllable switch unit of the inverter circuit such that at any time only one of the first controllable switch unit and the second controllable switch unit is in the conducting state.

[0047] The method may comprise controlling the first controllable switch unit and the second controllable switch unit of the inverter circuit using a duty cycle of 50%. Especially, the method comprises controlling the first controllable switch unit and the second controllable switch unit of the inverter circuit such that they are operated in complimentary with 50% duty cycle. In case the inverter circuit comprises a resonant circuit, the first controllable switch unit and second controllable switch unit may be operated in complimentary with 50% duty cycle in order to excite the resonant circuit of the circuit.

[0048] In an implementation form of the second aspect, the inverter circuit comprises a resonant circuit comprising a capacitor and an inductor, and the resonant circuit is electrically connected between the primary winding of the transformer and a midpoint between the first controllable switch unit and the second controllable switch unit. The method may comprise controlling the first controllable switch unit and the second controllable switch unit of the inverter circuit with a frequency that is smaller than or equal to a resonant frequency of the resonant circuit. The frequency (i.e. switching frequency) being equal or similar to the resonant frequency allows soft switching of the controllable switch units. The frequency (switching frequency) being slightly lower than the resonant frequency allows maintaining soft switching for wider operating conditions.

[0049] The above description of the converter according to the first aspect is correspondingly valid for the method of the second aspect. The converter of the first aspect may be configured to perform the method of the second aspect.

[0050] The method of the second aspect and its implementation forms and optional features achieve the same advantages as the converter of the first aspect and its respective implementation forms and respective optional features.

[0051] In order to achieve the method according to the second aspect of the disclosure, some or all of the implementation forms and optional features of the second aspect, as described above, may be combined with each other.

[0052] The converter of the first aspect and method of the second aspect allow a low cost MPPT DC-to-DC conversion. With regard to string inverters for interfacing a PV system (e.g. a PV array) to a grid, each string inverter comprising the converter of the first aspect as a DC-to-DC converter stage and an DC-to-AC converter stage, the converter of the first aspect and method of the second aspect enable having a string level optimization, rather than multiple strings to be maintained at one MPPT. The converter of the first aspect and method of the second aspect allows extension of PV strings, BES integration or any combination of both.

[0053] With the converter of the first aspect and method of the second aspect, it is possible to improve the efficiency, power density and the cost of a MPPT DC / DC converter, e.g. when used for PV systems. Moreover, a high electrical efficiency can be achieved as lower voltage semiconductor devices can be used and by means of the integration of control and driving circuits in close proximity to switching power cells thereby minimizing delays and latencies in the control loop.

[0054] All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

[0055] BRIEF DESCRIPTION OF DRAWINGS

[0056] The above described aspects and implementation forms will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which:

[0057] FIG. 1 shows an example of a converter of this disclosure.

[0058] FIG. 2 shows an example of an implementation form of the converter of FIG. 1.

[0059] FIG. 3 a) shows an example of an implementation form of a power converter of the converter of FIG. 1 or 2.

[0060] FIG. 3 b) shows an example of an implementation form of a power converter of the converter of FIG. 1 or 2.

[0061] FIG. 4 a) shows an example of an implementation form of a power converter of the converter of FIG. 1 or 2.

[0062] FIG. 4 b) shows an example of an implementation form of a power converter of the converter of FIG. 1 or 2.

[0063] FIG. 5 shows an example of an implementation form of the converter of FIG. 1.

[0064] FIG. 6 shows an example of an implementation form of the converter of FIG. 1.

[0065] FIG. 7 shows an example of an implementation form of the converter of FIG. 1.

[0066] Same elements shown in the Figures (FIGs) are labeled with the same reference sign, and may be implemented likewise.

[0067] DETAILED DESCRIPTION OF EMBODIMENTS

[0068] FIG. 1 shows an example of a converter of this disclosure. The converter of FIG. 1 is an example of the converter of the first aspect. Thus, the description of the converter of the first aspect is correspondingly valid for the converter of FIG. 1.

[0069] The converter 1 comprises a first terminal Tl, second terminal T2, third terminal T3 and fourth terminal T4 for receiving DC voltages. As shown in FIG. 1, the first and third terminal Tl, T3 may be configured to be electrically connected with a first voltage source 100 and the second and fourth terminal T2, T4 may be configured to be electrically connected with a second voltage source 200. The converter 1 comprises a first power converter 21 and second power converter 22. Each power converter of the first and second power converter 21 , 22 comprises a first terminal X, second terminal Y 1 and third terminal Y2 and one or more controllable semiconductor switches (not shown in FIG. 1) for controlling a conversion of a voltage at the first terminal X to a further voltage of lower or higher level at the second and third terminal Yl, Y2. FIGs 3 a), 3 b), 4 a), 4 b), 5, 6 and 7 show examples of implementation forms of the first and second power converter 21, 22. The converter 1 comprises a series connection of a first capacitor unit Cl, second capacitor unit C2 and third capacitor unit C3. The converter 1 comprises an inverter circuit 30. The inverter circuit 30 comprises a series connection of a first and second controllable switch unit 31, 32 each comprising a controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series (not shown in FIG. 1). FIGs 5, 6 and 7 show examples of implementation forms of the inverter circuit 30. The converter 1 comprises a transformer 40. The transformer 40 comprises a primary winding 41, a first secondary winding 42a and a second secondary winding 42b that are galvanically isolated from each other. This is exemplarily shown in FIGs. 5, 6 and 7. The converter 1 comprises a first rectifier circuit 51 and second rectifier circuit 52.

[0070] As shown in FIG. 1, the first terminal X of the first power converter 21 is electrically connected with the second terminal T2 of the converter 1. The second and third terminal Y1 , Y2 of the first power converter 21 are electrically connected with a first and second terminal of the first capacitor unit Cl , respectively. The first terminal T1 of the converter 1 is electrically connected with the first terminal of the first capacitor unit Cl. The first terminal X of the second power converter 22 is electrically connected with the third terminal T3 of the converter 1. The second and third terminal Yl, Y2 of the second power converter 22 are electrically connected with a first and second terminal of the second capacitor unit C2, respectively. The fourth terminal T4 of the converter 1 is electrically connected with the second terminal of the second capacitor unit C2. A first and second terminal of the third capacitor unit C3 are electrically connected with the second terminal of the first capacitor unit Cl and the first terminal of the second capacitor unit C2, respectively. A first end of the series connection of the first and second controllable switch unit 31, 32 of the inverter circuit 30 is electrically connected with the first terminal of the third capacitor unit C3 and a second end of the series connection of the first and second controllable switch unit 31, 32 of the inverter circuit 30 is electrically connected with the second terminal of the third capacitor unit C3 (not shown in FIG. 1 , exemplarily shown in FIGs 5, 6 and 7). That is, the series connection of the first and second controllable switch unit 31, 32 of the inverter circuit 30 is connected in parallel with the third capacitor unit. The inverter circuit 30 is electrically connected with the primary winding 41 of the transformer 40 (not shown in FIG. 1, exemplarily shown in FIGs 5, 6 and 7). The first secondary winding 42a of the transformer 40 is electrically connected via the first rectifier circuit 51 to the first capacitor unit Cl (not shown in FIG. 1, exemplarily shown in FIGs 5, 6 and 7). The second secondary winding 42b of the transformer 40 is electrically connected via the second rectifier circuit 52 to the second capacitor unit C2 (not shown in FIG. 1, exemplarily shown in FIGs 5, 6 and 7). Due to the transformer 40, the inverter circuit 30, the first rectifier circuit 51 and the second rectifier circuit 52 are galvanically isolated from each other.

[0071] The first and second power converter 21, 22 may be connected to the series connection of the first, second and third capacitor unit Cl, C2, C3 in such a way that each power converter is configured to process up to the voltage of the respective capacitor unit to which it is connected in parallel. That is, the first power converter 21 may be configured to process up to the voltage of the first capacitor unit C 1 , and the second power converter 22 may be configured to process up to the voltage of the second capacitor unit C2. For example, components of the first power converter 21 may be rated for the voltage level of the first capacitor unit C 1 and process a voltage variation up to the voltage level of the first capacitor unit C 1. Components of the second power converter 22 may be rated for the voltage level of the second capacitor unit C2 and process a voltage variation up to the voltage level of the second capacitor unit C2. The galvanic isolation (provided by the transformer 40) between the inverter circuit 30, the first rectifier circuit 51 and the second rectifier circuit 52 provides the flexibility of choosing a voltage range for each series capacitor branch, i.e. for each of the first capacitor unit Cl, second capacitor unit C2 and third capacitor unit C3.

[0072] In a typical application scenario both voltage sources 100 and 200 may provide similar power (e.g. the two voltage sources are two close strings in a big solar PV park being designed to generate similar power). In such a scenario the inverter circuit 30 may transfer some of the electrical energy stored in the third capacitor unit C3 to the first and second capacitor unit C 1 , C2 via the transformer 40 and the first and second rectifier circuit 51, 52. The inverter circuit 30, transformer 40 and first and second rectifier circuit 51, 52 are configured to maintain the voltage levels of the first, second and third capacitor unit Cl, C2, C3. The series connection of first, second and third capacitor unit Cl, C2, C3 allows a high load voltage (e.g. high load DC voltage) to be split in to several low voltage levels allowing to use low voltage rated semiconductor devices for implementing the converter 1. Such low voltage rated semiconductor devices are cost effective and can operate in high frequencies without compromising efficiencies. Furthermore, high integration of these components is possible to make the overall construction very high-power density.

[0073] Each of the first power converter 21 and second power converter 22 of the converter 1 may be a partial power converter. The converter 1 may be unidirectional and each of the first, second, third and fourth terminal T1 , T2, T3, T4 of the converter 1 may be an input terminal. As shown in FIG. 1, the converter 1 may comprise a fifth terminal T5 and sixth terminal T6 that are configured to be electrically connected with an electrical load 300. The fifth terminal T5 is electrically connected with the first terminal of the first capacitor unit C 1 and, thus, with the first terminal T1 of the converter 1. The sixth terminal T6 is electrically connected with the second terminal of the second capacitor unit C2 and, thus, with the fourth terminal T4 of the converter 1.

[0074] For example, the converter 1 may be a DC-to-DC converter and the load 300 may be an DC-to-AC converter. In this case, the first and second voltage sources 100, 200 may be PV systems, such as PV panel(s) and / or PV array(s). Optionally, the sources 100, 200 may be two close strings in a PV park that are designed to generate similar DC power. The converter 1 being a DC- to-DC converter and the load 300 being a DC-to-AC converter may be used for converting DC power, e.g. DC voltage and / or direct current, provided by the first and second voltage sources 100, 200, e.g. PV systems, to AC power, e.g. AC voltage and / or alternating current, and provide the AC power to the grid. Optionally, the load 300 may be a DC load.

[0075] Alternatively, the converter is bidirectional. An example of an implementation form of the converter being bidirectional is shown in FIG. 7. In this case, the first and second voltage sources 100, 200 may be rechargeable battery energy storages (BES) and the load 300 may be configured to use electrical energy from the BES 100, 200 (power flow from the terminals Tl, T2, T3, T4 to the terminals T5, T6 of the converter 1 ) and charge the BES 100, 200 with electrical energy (power flow from the terminals T5, T6 to the terminals Tl, T2, T3, T4 of the converter 1). Thus, the converter 1 being bidirectional supports discharging and charging of BES 100, 200.

[0076] The converter 1 may be configured to control the semiconductor switches (i.e. controllable semiconductor switches) of the power converters 21, 22 of the converter 1 by performing a maximum power point tracking (MPPT) algorithm. The converter 1 may be configured to control the first controllable switch unit 31 and the second controllable switch unit 32 of the inverter circuit 30 such that at any time only one of the first controllable switch unit 31 and the second controllable switch unit 32 is in the conducting state. For example, the converter 1 is configured to control the first controllable switch unit 31 and the second controllable switch unit 32 of the inverter circuit 30 using a duty cycle of 50%.

[0077] Optionally, the inverter circuit comprises a resonant circuit comprising a capacitor Cr and an inductor Lr, and the resonant circuit is electrically connected between the primary winding 41 of the transformer 40 and a midpoint (node) between the first controllable switch unit 31 and the second controllable switch unit 32 of the inverter circuit 30 (not shown in FIG. 1 , exemplarily shown in FIGs 5, 6 and 7). In the aforementioned case, the converter 1 may be configured to control the first controllable switch unit 31 and the second controllable switch unit 32 of the inverter circuit 30 with a frequency that is smaller than or equal to a resonant frequency of the resonant circuit.

[0078] For the aforementioned control function(s), the converter 1 may comprise a control unit (not shown in FIG. 1). The control unit may comprise or correspond to a processor, microprocessor, controller, microcontroller, field programmable gate array (FPGA), application specific integrated circuit (ASIC) or any combination of the aforementioned components. The control unit is configured to provide control signals, such as pulse width modulated (PWM) signals, to controllable semiconductor switches of the first and second power converter 21, 22, especially to the control terminal of the controllable semiconductor switches. The control unit is configured to provide control signals, such as pulse width modulated (PWM) signals, to controllable semiconductor switches of the first and second controllable switch units 31, 32 of the inverter circuit 30, especially to the control terminal of the controllable semiconductor switches.

[0079] A capacitor unit of the first capacitor unit Cl, second capacitor unit C2 and third capacitor units C3 may comprise or be a capacitor. For example, each of the first, second and third capacitor unit Cl, C2, C3 may comprise or be a capacitor. Alternatively, a capacitor unit of the first capacitor unit Cl, second capacitor unit C2 and third capacitor unit C3 may comprise or be multiple capacitors (e.g. two capacitors) electrically connected in series. Optionally, each of the first capacitor unit Cl, second capacitor unit C2 and third capacitor unit C3 may comprise or be multiple capacitors (e.g. two capacitors) electrically connected in series. For example, the first and second capacitor unit Cl, C2 may comprise or be a capacitor and the third capacitor unit may comprise or be multiple capacitors (e.g. two capacitors) connected in series, as shown in FIG. 1. The number of capacitors of the first capacitor unit Cl and the second capacitor unit C2 may depend on the implementation form of the first power converter 21 and second power converter 22, respectively. Optionally, the first and second power converter 21, 22 may be implemented by the same power converter type. The power converters of the converter 1 may be implemented the same way. Optionally, at least one power converter of the converter 1 may be implemented differently. As outlined already above, examples of implementation forms of the power converter of the converter 1 are shown in FIGs 3 a), 3 b), 4 a), 4 b), 5, 6 and 7.

[0080] For further information on the converter 1 reference is made to FIGs 2, 3 a), 3 b), 4 a), 4 b), 5, 6 and 7.

[0081] FIG. 2 shows an example of an implementation form of the converter of FIG. 1. The converter 1 of FIG. 2 corresponds to the converter 1 of FIG. 1. Thus, the description of the converter 1 of FIG. 1 is correspondingly valid for the converter 1 of FIG. 2 and in the following mainly a difference, especially an optional feature, of the converter 1 of FIG. 2 with regard to the converter 1 of FIG. 1 is described.

[0082] As shown in FIG. 2, the converter 1 comprises one or more additional first power converters 21a with the first terminal X of the additional first power converter 21a being electrically connected to a respective further terminal Ta of the converter 1 and the second and third terminal Y1 , Y2 being electrically connected to the first and second terminal of the first capacitor unit C 1 , respectively. According to FIG. 2 one additional first power converter 21a is shown. This is only by way of example and, thus, more than one additional first power converter 21a may be provided. The converter 1 comprises one or more additional second power converters 22a with the first terminal X of the additional second power converter being electrically connected to a respective further terminal Tb of the converter 1 and the second and third terminal Yl, Y2 being electrically connected to the first and second terminal of the second capacitor unit C2, respectively. According to FIG. 2 one additional second power converter 22a is shown. This is only by way of example and, thus, more than one additional second power converter 22a may be provided. Providing additional first and second power converters 21a, 22a allows connecting additional voltage sources 101, 201 to the converter 1. For example, a voltage source 201 may be connected with the further terminal Ta and the fourth terminal T4 of the converter 1, and a voltage source 101 may be connected with the further terminal Tb and the first terminal T1 of the converter 1.

[0083] The one or more additional first power converters 21a are implemented in line with the first power converter 21. Thus, a description of the first power converter 21 , such as a description of the structure and control of the first power converter 21 , is correspondingly valid for the one or more additional first power converters 21a. The one or more additional second power converters 22a are implemented in line with the second power converter 22. Thus, a description of the second power converter 22, such as a description of the structure and control of the second power converter 22, is correspondingly valid for the one or more additional second power converters 22a. The description with regard to the sources 100, 200 is correspondingly valid for the sources 101, 201.

[0084] The implementation form of FIG. 2 allows connecting multiple 2n voltage sources, such as PV systems and / or BES to the converter 1 , wherein n is an integer that is greater than one (n > 1 ). The number of power converters 21 , 22, 21 a, 22a equals to the number of voltage sources that may be connected to the converter 1. In case n equals 1 (n = 1 ), the converter corresponds to the implementation form of FIG. 1 for two voltage sources.

[0085] FIGs 3 a), 3 b), 4 a) and 4 b) each show an example of an implementation form of a power converter of the converter of FIG. 1 or 2. The implementation of the controllable semiconductor switches of the power converters of FIGs 3 a), 3 b), 4 a) and 4 b) is only by way of example and, thus, may be implemented by a different controllable semiconductor switch type, such as a different transistor type, compared to the type shown in the respective Figure. The number of capacitors of the respective capacitor unit Cl, C2 may be different compared to the shown number.

[0086] As shown in FIG. 3 a), the power converter 21 , 22 may comprise an inductor L 1 and two controllable semiconductor switches

[0087] 51, S2. In the example of FIG. 3 a) the two switches SI, S2 are two IGBTs, wherein a diode is connected in anti-parallel to each IGBT. As shown in FIG. 3 a), a first terminal of the inductor LI is connected with the first terminal X of the power converter 21, 22. A first terminal of the switch SI (e.g. the emitter terminal of the IGBT SI) is connected with the second terminal of the inductor LI and a second terminal of the switch SI (e.g. the collector terminal of the IGBT SI) is connected with the second terminal Y1 of the power converter 21, 22. A first terminal of the switch S2 (e.g. the emitter terminal of the IGBT S2) is connected with the third terminal Y2 of the power converter 21, 22. A second terminal of the switch S2 (e.g. the collector terminal of the IGBT S2) is connected with the second terminal of the inductor LI . The third terminal of the controllable semiconductor switches SI, S2 are the control terminals (e.g. gate terminal of the IGBT) via which the controllable semiconductor switches SI, S2 may be controlled with control signals, such as PWM signals.

[0088] As shown in FIG. 3 b), the power converter 21, 22 may have the structure of the power converter 21, 22 of FIG. 3 a) and additionally may comprise a bidirectional semiconductor switch that is formed by two controllable semiconductor switches S3 and S4 (e.g. two IGBTs, wherein a diode is connected in anti-parallel to each IGBT). The bidirectional switch may be connected between the second terminal of the inductor LI and a fourth terminal Y3 of the power converter 21, 22. The fourth terminal Y3 may be connected with a node between two capacitors of a respective capacitor unit Cl, C2.

[0089] As shown in FIG. 4 a) the power converter 21, 22 may comprise an inductor LI, four controllable semiconductor switches SI,

[0090] 52, S3, S4 (e.g. four IGBTs) and a capacitor C4. A first terminal of the inductor LI is connected with the first terminal X of the power converter 21, 22. A second terminal of the inductor LI may be connected with a first terminal of a first switch SI (e.g. emitter terminal of IGBT SI) and a second terminal of a second switch S2 (e.g. collector terminal of IGBT S2). The second terminal of the first switch SI (e.g. collector terminal of IGBT SI) is connected with a first terminal of the capacitor C4 and the first terminal of the second switch S2 (e.g. emitter terminal of IGBT S2) is connected with a second terminal of the capacitor C4. The third switch S3 (e.g. IGBT S3) is connected between the first terminal of the capacitor C4 and the second terminal Y1 of the power converter 21, 22, as shown in FIG. 4 a). The fourth switch S4 (e.g. IGBT S4) is connected between the second terminal of the capacitor C4 and the third terminal Y2 of the power converter 21 , 22, as shown in FIG. 4 a).

[0091] As shown in FIG. 4 b), the power converter 21, 22 may have the structure of the power converter 21, 22 of FIG. 4 a), wherein the capacitor C4 may be replaced by a fifth and sixth controllable semiconductor switch S5, S6 (e.g. IGBTs S5, S6). The fifth switch S5 (e.g. IGBT S5) is connected between the second terminal of the first switch SI and a fourth terminal Y3 of the power converter 21, 22, as shown in FIG. 4 b). The sixth switch S6 (e.g. IGBT S6) is connected between the first terminal of the second switch S2 and the fourth terminal Y3 of the power converter 21, 22, as shown in FIG. 4 b). The fourth terminal Y3 may be connected with a node between two capacitors of a respective capacitor unit Cl, C2.

[0092] Each of FIGs 5, 6 and 7 shows an example of an implementation form of the converter of FIG. 1.

[0093] The converter of FIG. 5 corresponds to the converter of FIG. 1. Thus, the description of the converter of FIG. 1 is correspondingly valid for the converter of FIG. 5 and in the following mainly the implementation of the power converters 21, 22, the inverter circuit 30, the transformer 40 and the first and second rectifier circuit 51, 52 of the converter 1 of FIG. 5 are described.

[0094] As shown in FIG. 5 , each of the first and second power converter 21 , 22 may comprise an inductor L 1 , a controllable semiconductor switch SI and a uncontrollable semiconductor switch DI . The inductor LI is connected between the first terminal X of the power converter and a node, the uncontrollable semiconductor switch DI is connected between the node and the second terminal Y1 of the power converter, and the controllable semiconductor switch SI is connected between the node and the third terminal Y2 of the power converter, as shown in FIG. 5. The power converter 21, 22 of FIG. 5 have a 2-level boost topology. Due to the structure of the converter 1 of FIG. 5, semiconductor switches with 1 / 3 of semiconductor blocking voltage ratings to voltage across the series connection of the first capacitor unit Cl, second capacitor unit C2 and third capacitor unit C3 (e.g. to the full DC link) may be used. According to the example of FIG. 5, the controllable semiconductor switch SI is an IGBT with a diode connected in antiparallel to the IGBT, and the uncontrollable semiconductor switch DI is a diode. This is only by way of example. Thus, the controllable semiconductor switch SI may be implemented by a different controllable semiconductor switch type, e.g. different transistor type, and / or the uncontrollable semiconductor switch DI may be implemented by a different uncontrollable semiconductor switch type. The power converters 21, 22 are not limited to the implementation form shown in FIG. 5. That is, the power converters 21, 22 may be differently implemented, e.g. according to an implementation form of FIGs 3 a), 3 b), 4 a) and 4 b).

[0095] As shown in FIG. 5, each controllable switch unit of the first and second controllable switch unit 31, 32 of the inverter circuit 30 may comprises or be a controllable semiconductor switch S2, S3, respectively. According to FIG. 5, the controllable semiconductor switches S2, S3 are IGBTS with a diode connected in antiparallel to the respective IGBT. This is only by way of example and, thus, the controllable semiconductor switch S2, S3 may be implemented by a different controllable semiconductor switch type, e.g. different transistor type. Optionally, at least one of the first and second controllable switch unit 31 , 32 comprise more than one controllable semiconductor switch, i.e. multiple controllable semiconductor switches connected in series (not shown in FIG. 5 ). In other words, a controllable switch unit of the first and second controllable switch unit 31, 32 may comprise or be one controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series. The node between the first controllable switch unit 31 and the second controllable switch unit 32 may be connected with the primary winding 41 of the transformer 40 (not shown in FIG. 5). Alternatively, as shown in FIG. 5, the node between the first controllable switch unit 31 and the second controllable switch unit 32 may be connected via a resonant circuit with the primary winding 41 of the transformer 40. That is, the resonant circuit comprising the capacitor Cr and Lr is optional. In other words, optionally the inverter circuit 30 comprises a resonant circuit comprising a capacitor Cr and an inductor Lr, wherein the resonant circuit is electrically connected between the primary winding 41 of the transformer 40 and a midpoint (node) between the first controllable switch unit 31 and the second controllable switch unit 32.

[0096] As shown in FIG. 5, the transformer 40 may comprise the primary winding 41, the first secondary winding 42a and the second secondary winding 42b that are galvanically isolated from each other. The first secondary winding 42a of the transformer 40 is electrically connected via the first rectifier circuit 51 to the first capacitor unit C 1. The second secondary winding 42b of the transformer 40 is electrically connected via the second rectifier circuit 52 to the second capacitor unit C2. According to the example of FIG. 5, each of a ratio between the primary winding 41 and the first secondary winding 42a and a ration between the primary winding 41 and the second secondary winding 42b may be a n:l ratio, wherein n is an integer greater than or equal to one (n > 1). This is shown in FIG. 5. In case n equals to one (n = 1), the ratio between the primary winding 41, the first secondary winding 42a and the third secondary winding 42b of the transformer is a 1:1:1 ratio. This is only by way of example.

[0097] As shown in FIG. 5, each of the first and second rectifier circuit 51, 52 may comprise or be a series connection of two semiconductor switches D2, D3. A midpoint between the two semiconductor switches D2, D3 of the rectifier circuit 51 or 52 may be electrically connected with the first secondary winding 42a or the second secondary winding 42b, respectively. According to FIG. 5, the two semiconductor switches D2, D3 of the first and second rectifier 51, 52 are uncontrollable semiconductor switches in the form of diodes. Alternatively, any other uncontrollable semiconductor switch type may be used. Thus, the rectifier circuits 51, 52 shown in FIG. 5 are passive rectifier circuits. Alternatively, the two semiconductor switches D2, D3 of the first and second rectifier circuit may be two controllable semiconductor switches, as shown in FIG. 7.

[0098] According to FIG. 5, each of the first, second and third capacitor unit Cl, C2, C3 comprises or is a series connection of two capacitors. This is only by way of example. Thus, at least one of the first, second and third capacitor unit Cl, C2, C3 may comprise or be one capacitor or more than two capacitors connected in series. As shown in FIG. 5, a first end of the first secondary winding 42a of the transformer 40 may be connected with the first rectifier circuit 51 and a second end of the first secondary winding 42a may be connected with the first capacitor unit Cl, wherein the first rectifier circuit 51 is connected in parallel with the first capacitor unit Cl . That is, the second end of the first secondary winding 42a of the transformer 40 may be connected with the first capacitor unit Cl and the first end of the first secondary winding 42a may be connected via the first rectifier circuit 51 with the first capacitor unit C 1. Especially, the second end of the first secondary winding 42a of the transformer 40 may be connected with a node (midpoint) between the two capacitors of the first capacitor unit Cl and the first end of the first secondary winding 42a may be connected with a node (midpoint) between the two semiconductor switches D2, D3 of the first rectifier circuit 51. This is valid, irrespective of whether the semiconductor switches D2, D3 of the first rectifier circuit 51 are uncontrollable switches (e.g. diodes), as shown in FIG. 5, or controllable switches (e.g. transistors), as shown in FIG. 7.

[0099] As shown in FIG. 5, a first end of the second secondary winding 42b of the transformer 40 may be connected with the second rectifier circuit 52 and a second end of the second secondary winding 42b may be connected with the second capacitor unit C2, wherein the second rectifier circuit 52 is connected in parallel with the second capacitor unit C2. That is, the second end of the second secondary winding 42b of the transformer 40 may be connected with the second capacitor unit C2 and the first end of the second secondary winding 42b may be connected via the second rectifier circuit 52 with the second capacitor unit C2. Especially, the second end of the second secondary winding 42b of the transformer 40 may be connected with a node (midpoint) between the two capacitors of the second capacitor unit C2 and the first end of the second secondary winding 42b may be connected with a node (midpoint) between the two semiconductor switches D2, D3 of the second rectifier circuit 52. This is valid, irrespective of whether the semiconductor switches D2, D3 of the second rectifier circuit 52 are uncontrollable switches (e.g. diodes), as shown in FIG. 5, or controllable switches (e.g. transistors), as shown in FIG. 7.

[0100] The implementation form of the rectifier circuits 51, 52 shown in FIG. 5 are only by way of example. Alternatively, at least one or both of them may be implemented as shown in FIGs 6 and 7.

[0101] On the top left of FIG. 5, an example of a control unit 400 of the converter 1 is shown, which may be part of the converter 1. The control unit 400 may be configured to control the controllable semiconductor switches of the converter 1, especially the switch SI of the power converters 21, 22 and the switches S2, S3 of the first and second controllable switch unit 31, 32 of the inverter circuit 30. In case, the rectifier circuits 51, 52 comprise controllable semiconductor switches (exemplarily shown in FIG. 7), the control unit 400 may be configured to control them. Especially, the control unit 400 may be configured to control controllable semiconductor switches of the rectifier circuits 51, 52 such that they provide a rectifying function. As shown in FIG. 5 , for this, the control unit 400 may obtain for example a current II at the first terminal X of the first power converter 21 , a current 12 at the first terminal X of the second power converter 22, a voltage VI of the first capacitor unit Cl, a voltage V2 of the second capacitor unit C2 and a voltage V3 of the third capacitor unit C3. The control unit 400 may provide control signals, e.g. PWM control signals, “21 - SI”, “22 - SI”, “31” and “32” for controlling the switch SI of the first power converter 21, the switch SI of the second power converter 22, the first controllable switch unit 31 of the rectifier circuit 30 and the second controllable switch unit 32 of the inverter circuit 30, respectively.

[0102] Controlling a controllable switch unit comprising one controllable semiconductor switch or multiple controllable semiconductor switches connected in series to switch to the conducting state (on-state) or non-conducting state (off-state) comprises controlling the one or multiple controllable semiconductor switches to switch to the conducting state (on-state) or non-conducting state (off-state), respectively.

[0103] The implementation form of FIG. 5 is an example of the converter 1 being unidirectional. That is, there may be a power flow from the terminals Tl, T2, T3, T4 to the terminals T5, T6 of the converter and, thus, from the voltage sources 100, 200 to the load 300.

[0104] The capacitor units Cl, C2, C3, power converters 21, 22, inverter circuit 30, and rectifier circuits 51, 52 may be differently implemented, as exemplarily shown in FIGs 6 and 7. The different implementation forms of the power converters 21, 22, inverter circuit 30 and rectifier circuits 51, 52 may be combined in any way with each other. That is, the implementation form of the capacitor units Cl, C2, C3, power converters 21, 22, inverter circuit 30, transformer 40 and rectifier circuits 51, 52 may be independent of each other. For example, the implementation form of the power converters 21, 22 and inverter circuit 30 of FIG. 5 may be combined with the implementation form of the rectifier circuits 51, 52 of FIG. 6.

[0105] The converter of FIG. 6 corresponds to the converter of FIG. 5. Thus, the description of the converter of FIG. 5 is correspondingly valid for the converter of FIG. 6 and in the following mainly difference(s), especially optional feature(s), of the converter of FIG. 6 with regard to the converter of FIG. 5 is described.

[0106] As shown in FIG. 6, the inverter circuit 30 may comprises a second series connection SC2 of the first and second controllable switch unit 31, 32. The above description with regard to the first and second controllable switch unit 31, 32 is correspondingly valid for the optional second series connection SC2 of the first and second controllable switch unit 31, 32. As shown in FIG. 6, the second series connection SC2 of the first and second controllable switch unit 31, 32 is electrically connected in parallel to the series connection of the first and second controllable switch unit 31, 32. The series connection of the first and second controllable switch unit 31, 32 (with which the first transformer winding 41 of the transformer is connected, optionally via the resonant circuit) may be referred to as “first series connection of the first and second controllable switch unit”. The series connection of the first and second controllable switch unit 31 , 32 of the inverter circuit 30 of FIG. 5 forms a half-bridge. That is, the inverter circuit 30 of FIG. 5 may be a half-bridge inverter circuit. The series connection of the first and second controllable switch unit 31, 32 and the second series connection of the first and second controllable switch unit 31 , 32 of the inverter circuit 30 of FIG. 6 form a full-bridge. That is, the inverter circuit 30 of FIG. 6 may be a full-bridge inverter circuit.

[0107] As shown in FIG. 6, the first rectifier circuit 51 may comprise a second series connection of two semiconductor switches D4, D5 electrically connected in parallel to the series connection of two semiconductor switches D2, D3. The above description with regard to the series connection of two semiconductor switches D2, D3 of the first rectifier circuit 51 is correspondingly valid for the optional second series connection of two semiconductor switches D4, D5. The midpoint between the two semiconductor switches D2, D3 of the series connection of two semiconductor switches D2, D3 of the first rectifier circuit 51 may be electrically connected with the first end of the first secondary winding 42a. A midpoint between the two semiconductor switches D4, D5 of the second series connection of two semiconductor switches D4, D5 of the first rectifier circuit 51 may be electrically connected with the second end of the first secondary winding 42a.

[0108] As shown in FIG. 6, the second rectifier circuit 52 may comprise a second series connection of two semiconductor switches D4, D5 electrically connected in parallel to the series connection of two semiconductor switches D2, D3. The above description with regard to the series connection of two semiconductor switches D2, D3 of the second rectifier circuit 52 is correspondingly valid for the optional second series connection of two semiconductor switches D4, D5. The midpoint between the two semiconductor switches D2, D3 of the series connection of two semiconductor switches D2, D3 of the second rectifier circuit 52 may be electrically connected with the first end of the second secondary winding 42b. A midpoint between the two semiconductor switches D4, D5 of the second series connection of two semiconductor switches D4, D5 of the second rectifier circuit 52 may be electrically connected with the second end of the second secondary winding 42b.

[0109] According to the implementation form of FIG. 6, the switches D2, D3, D4, D5 of the first and second rectifier circuit 51, 52 are uncontrollable semiconductor switches (e.g. diodes). Optionally, the switches D2, D3, D4, D5 of at least one of the first and second rectifier circuit 51, 52 may be controllable semiconductor switches (e.g. transistors).

[0110] The series connection of the two semiconductor switches D2, D3 of the first and second rectifier circuit 51, 52 of FIG. 5 forms a half-bridge. That is, the first and second rectifier circuit 51, 52 may be a half-bridge rectifier circuits. The series connection of the two semiconductor switches D2, D3 and the second series connection of the two semiconductor switches D4, D5 of the first and second rectifier circuit 51, 52 of FIG. 6 form a full-bridge. That is, the first and second rectifier circuit 51, 52 of FIG. 6 may be a full-bridge rectifier circuits.

[0111] As shown in FIG. 6, each of the first, second and third capacitor unit Cl, C2, C3 comprises or is a capacitor. This is only by way of example. Thus, at least one of the first, second and third capacitor unit C 1 , C2, C3 may comprise or be multiple capacitors connected in series.

[0112] Optionally one of the inverter circuit 30 and the rectifier circuits 51, 52 of the converter of FIG. 6 may be implemented as shown in FIG. 5.

[0113] The converter of FIG. 7 corresponds to the converter of FIG. 5. Thus, the description of the converter of FIG. 5 is correspondingly valid for the converter of FIG. 7 and in the following mainly difference(s) of the converter of FIG. 7 with regard to the converter of FIG. 5 is described.

[0114] As shown in FIG. 7, the converter 1 of FIG. 7 differs from the converter 1 of FIG. 5 in that in each power converter of the first and second power converter 21, 22 the uncontrollable semiconductor switch DI is replaced by a controllable semiconductor switch S2. According to the example ofFIG. 7, the controllable semiconductor switches SI, S2 ofthe power converters 21, 22 are IGBTs with a diode connected in antiparallel to each IGBT. This is only by way of example. Thus, the controllable semiconductor switches may be implemented by a different controllable semiconductor switch type, e.g. different transistor type.

[0115] In addition, the converter of FIG. 7 differs from the converter of FIG. 5 in that the semiconductor switches of the first and second rectifier circuit 51, 52 are controllable semiconductor switches S5, S6. According to the example of FIG. 7, the controllable semiconductor switches S5, S6 of the first and second rectifier circuit 51, 52 are IGBTs with a diode connected in antiparallel to each IGBT. This is only by way of example. Thus, the controllable semiconductor switches may be implemented by a different controllable semiconductor switch type, e.g. different transistor type.

[0116] Optionally, the inverter circuit 30 of the converter of FIG. 7 may be implemented in line with the inverter circuit 30 of the converter of FIG. 6. Optionally, at least one of the first and second rectifier circuit 51, 52 may have a full-bridge structure of controllable semiconductor switches. Such a full-bridge structure is shown in FIG. 6 with uncontrollable semiconductor switches, which may be replaced by controllable semiconductor switches.

[0117] The implementation form of FIG. 7 allows a bidirectional power flow over the converter 1. Thus, the converter 1 of FIG. 7 is an example of a bidirectional converter. As a result, the first and second voltage sources 100, 200 may be rechargeable battery energy storages (BES) and the load 300 may be configured to use electrical energy from the BES 100, 200 (power flow from the terminals Tl, T2, T3, T4 to the terminals T5, T6 of the converter 1) and charge the BES 100, 200 with electrical energy (power flow from the terminals T5, T6 to the terminals Tl, T2, T3, T4 of the converter 1).

[0118] The present disclosure has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed matter, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word “comprising” does not exclude other elements or steps and the indefinite article “a” or “an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

CLAIMS1. A converter ( 1 ) comprising : a first, second, third and fourth terminal (T1 , T2, T3, T4) for receiving DC voltages, a first and second power converter (21 , 22) each comprising a first, second and third terminal (X, Y1 , Y2) and one or more controllable semiconductor switches for controlling a conversion of a voltage at the first terminal (X) to a further voltage of lower or higher level at the second and third terminal (Y1 , Y2), a series connection of a first, second and third capacitor unit (Cl, C2, C3), an inverter circuit (30) comprising a series connection of a first and second controllable switch unit (31, 32) each comprising a controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series, a transformer (40) comprising a primary winding (41 ), a first secondary winding (42a) and a second secondary winding (42b) that are galvanically isolated from each other, and a first and second rectifier circuit (51 , 52); wherein the first terminal (X) of the first power converter (21) is electrically connected with the second terminal (T2) of the converter (1 ), the second and third terminal (Y1 , Y2) of the first power converter (21) are electrically connected with a first and second terminal of the first capacitor unit (C 1 ), respectively, the first terminal (Tl) of the converter (1) is electrically connected with the first terminal of the first capacitor unit (Cl), the first terminal (X) of the second power converter (22) is electrically connected with the third terminal (T3) of the converter (1 ), the second and third terminal (Yl, Y2) of the second power converter (22) are electrically connected with a first and second terminal of the second capacitor unit (C2), respectively, the fourth terminal (T4) of the converter (1) is electrically connected with the second terminal of the second capacitor unit (C2), a first and second terminal of the third capacitor unit (C3) are electrically connected with the second terminal of the first capacitor unit (Cl) and the first terminal of the second capacitor unit (C2), respectively, a first end of the series connection of the first and second controllable switch unit (31 , 32) of the inverter circuit (30) is electrically connected with the first terminal of the third capacitor unit (C3) and a second end of the series connection of the first and second controllable switch unit (31, 32) of the inverter circuit (30) is electrically connected with the second terminal of the third capacitor unit (C3), the inverter circuit (30) is electrically connected with the primary winding (41 ) of the transformer (40), the first secondary winding (42a) of the transformer (40) is electrically connected via the first rectifier circuit (51 ) to the first capacitor unit (C 1 ), and the second secondary winding (42b) of the transformer (40) is electrically connected via the second rectifier circuit (52) to the second capacitor unit (C2).

2. The converter (1) according to claim 1, comprising: one or more additional first power converters (21, 21a) with the first terminal (X) being electrically connected to a respective further terminal (Ta) of the converter (1) and the second and third terminal (Yl, Y2) being electrically connected to the first and second terminal of the first capacitor unit (C 1 ), respectively, and / or one or more additional second power converters (22, 22a) with the first terminal (X) being electrically connected to a respective further terminal (Tb) of the converter (1) and the second and third terminal (Yl, Y2) being electrically connected to the first and second terminal of the second capacitor unit (C2), respectively.

3. The converter (1) according to any one of the previous claims, wherein each of the first and second power converter (21 , 22) is a partial power converter.

4. The converter (1) according to any one of the previous claims, wherein the converter (1) is unidirectional and each of the first, second, third and fourth terminal (Tl, T2, T3, T4) of the converter (1 ) is an input terminal, or the converter (1 ) is bidirectional.

5. The converter (1) according to any one of the previous claims, wherein the converter (1 ) comprises a fifth and sixth terminal (T5, T6) that are configured to be electrically connected with an electrical load (300), the fifth terminal (T5) is electrically connected with the first terminal of the first capacitor unit (Cl), and the sixth terminal (T6) is electrically connected with the second terminal of the second capacitor unit (C2).

6. The converter (1) according to any one of the previous claims, wherein a capacitor unit of the first, second and third capacitor unit (C 1 , C2, C3) comprises a capacitor (C 11 ) or multiple capacitors (Cl 1, C12) electrically connected in series.

7. The converter (1 ) according to any one of the previous claims, wherein the inverter circuit (30) comprises a resonant circuit comprising a capacitor (Cr) and an inductor (Lr), and the resonant circuit is electrically connected between the primary winding (41) of the transformer (40) and a midpoint between the first controllable switch unit (31) and the second controllable switch unit (32).

8. The converter (1) according to any one of the previous claims, wherein a controllable switch unit of the first and second controllable switch unit (31, 32) comprises one controllable semiconductor switch or multiple controllable semiconductor switches electrically connected in series.

9. The converter (1) according to any one of the previous claims, wherein a ratio between the primary winding (41), the first secondary winding (42a) and the third secondary winding (42b) of the transformer (40) is a 1 : 1 : 1 ratio, or each of a ratio between the primary winding (41) and the first secondary winding (42a) and a ration between the primary winding (41) and the second secondary winding (42a) is a n: 1 ratio, wherein n is an integer greater than one.

10. The converter (1) according to any one of the previous claims, wherein a rectifier circuit of the first and second rectifier circuit (51 , 52) comprises a series connection of two semiconductor switches, a midpoint between the two semiconductor switches of the rectifier circuit is electrically connected with the first secondary winding (42a) or the second secondary winding (42b), respectively, and the two semiconductor switches of the rectifier circuit are two controllable semiconductor switches (S5, S6) or two uncontrollable semiconductor switches (D2, D3).

11. The converter (1) according to claim 10, wherein the rectifier circuit comprise a second series connection of two semiconductor switches electrically connected in parallel to the series connection of two semiconductor switches,the midpoint between the two semiconductor switches of the series connection of two semiconductor switches of the rectifier circuit is electrically connected with a first end of the first secondary winding (42a) or the second secondary winding (42b), respectively, and a midpoint between the two semiconductor switches of the second series connection of two semiconductor switches of the rectifier circuit is electrically connected with a second end of the first secondary winding (42a) or the second secondary winding (42b), respectively.

12. The converter (1) according to any one of the previous claims, wherein the inverter circuit (30) comprises a second series connection (SC2) of the first and second controllable switch unit (31, 32), and the second series connection (SC2) of the first and second controllable switch unit (31 , 32) is electrically connected in parallel to the series connection of the first and second controllable switch unit (31, 32).

13. The converter ( 1 ) according to any one of the previous claims, wherein the converter (1) is configured to control the semiconductor switches of the power converters (21, 22) of the converter (1) by performing a maximum power point tracking, MPPT, algorithm.

14. The converter (1) according to any one of the previous claims, wherein the converter (1) is configured to control the first controllable switch unit (31) and the second controllable switch unit (32) of the inverter circuit (30) such that at any time only one of the first controllable switch unit (31) and the second controllable switch unit (32) is in the conducting state.

15. The converter ( 1 ) according to any one of the previous claims when depending on claim 7, wherein the converter (1) is configured to control the first controllable switch unit (31) and the second controllable switch unit (32) of the inverter circuit (30) with a frequency that is smaller than or equal to a resonant frequency of the resonant circuit.

16. A method for controlling a converter (1) according to any one of claims 1 to 15, wherein the method comprises: controlling the semiconductor switches of the power converters (21, 22) of the converter (1) by performing a maximum power point tracking, MPPT, algorithm.

17. The method according to claim 16, wherein the method comprises: controlling the first controllable switch unit (31) and the second controllable switch unit (32) of the inverter circuit (30) such that at any time only one of the first controllable switch unit (31) and the second controllable switch unit (32) is in the conducting state.

18. The method according to claim 16 or 17, wherein the inverter circuit (30) comprises a resonant circuit comprising a capacitor (Cr) and an inductor (Lr), and the resonant circuit is electrically connected between the primary winding (41) of the transformer (40) and a midpoint between the first controllable switch unit (31) and the second controllable switch unit (32), wherein the method comprises: controlling the first controllable switch unit (31) and the second controllable switch unit (32) of the inverter circuit (30) with a frequency that is smaller than or equal to a resonant frequency of the resonant circuit.

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