MEMS microphone

Abstract

A MEMS microphone according to an embodiment of the present invention comprises: a first substrate; a second substrate laminated on the first substrate; a solder-resist layer provided on a part of the top surface of the second substrate and the bottom surface of the first substrate; a housing arranged on top of the second substrate and having a receiving space; a MEMS structure disposed in the receiving space on top of the second substrate; and an upper plated layer disposed between the second substrate, housing, and the MEMS structure, wherein the upper plated layer may comprise a first plated layer, and a second plated layer stacked thereon and made of material different than that of the first plated layer.

Description

MEMS Microphone

[0001] The present invention relates to a MEMS microphone, and more specifically, to a MEMS microphone in which electrodes are formed through electroless plating rather than electrolytic plating.

[0002] Typically, audio devices use electrodes to vibrate a diaphragm to generate sound. Recent technological advancements have led to significant advancements in the audio device field. These devices are increasingly used in diverse applications, including portable terminals and hearing aids. As the devices they are used in become slimmer, the devices themselves are also becoming smaller.

[0003] Additionally, microphones utilizing MEMS (Micro Electro Mechanical Systems), a semiconductor technology, have recently been developed and used. MEMS is a technology that enables the manufacturing of tiny mechanical components on the surface of silicon wafers. These MEMS microphones can be categorized into electrostatic and piezoelectric types, including the common condenser type.

[0004] Recently, electronic devices such as mobile communication terminals, tablet PCs, and MP3 players are becoming increasingly miniaturized. Consequently, the components of these devices are also becoming smaller. Therefore, Micro Electro Mechanical System (MEMS) technology is needed to overcome the physical limitations of these components.

[0005] The technical problem to be solved by the present invention is to provide a MEMS microphone having a uniform plating thickness and a simplified process by performing electroless plating on a substrate.

[0006] In order to solve the above technical problem, a MEMS microphone according to an embodiment of the present invention includes a first substrate; a second substrate laminated on the first substrate; a solder resist layer formed on a portion of an upper surface of the second substrate and a lower surface of the first substrate; a housing disposed on the second substrate and having an accommodation space formed therein; a MEMS structure disposed on the second substrate and within the accommodation space; and an upper plating layer disposed between the second substrate, the housing, and the MEMS structure, wherein the upper plating layer may include a first plating layer and a second plating layer laminated on the first plating layer and made of a different material from the first plating layer.

[0007] The MEMS microphone according to embodiments of the present invention has the following effects.

[0008] First, since the plating process is performed on the substrate unit through electroless plating, the plating thickness is uniformly applied across the entire substrate unit area, thereby improving electrical connection stability. In particular, in the case of electrolytic plating, there is a problem that the uniformity of the plating thickness decreases due to the plating thickness being thicker in areas with high current density, such as electrode wiring or the outer surface, compared to other areas, resulting in lower product reliability. This has the effect of solving this problem.

[0009] Furthermore, since the electrolytic plating method eliminates the need for electrolytic electrode wiring, not only does it enhance the design freedom of the board unit, but it also allows for pad pitch control, enabling fine pitch designs. Furthermore, since short-circuiting problems, such as short circuits through electrode wiring that occur in the electrolytic plating method, are eliminated, the electrical connection stability is enhanced.

[0010] In addition, in the case of electroplating, since the plating process is performed before laminating the first and second substrates, there is a problem that plating occurs in unnecessary areas, and accordingly, the time and material cost of the plating process are excessively consumed, and this has the effect of solving this.

[0011] FIG. 1 is a side view illustrating the structure of a MEMS microphone according to an embodiment of the present invention.

[0012] FIG. 2 is a side view illustrating the structure of a MEMS microphone according to another embodiment of the present invention.

[0013] FIG. 3 is a drawing illustrating a substrate manufacturing process of a MEMS microphone according to an embodiment of the present invention.

[0014] Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to the attached drawings.

[0015] However, the technical idea of ​​the present invention is not limited to some of the embodiments described, but can be implemented in various different forms, and within the scope of the technical idea of ​​the present invention, one or more of the components between the embodiments can be selectively combined or substituted for use.

[0016] In addition, terms (including technical and scientific terms) used in the embodiments of the present invention may be interpreted as having a meaning that can be generally understood by a person of ordinary skill in the technical field to which the present invention belongs, unless explicitly and specifically defined and described, and terms that are commonly used, such as terms defined in a dictionary, may be interpreted in consideration of the contextual meaning of the relevant technology.

[0017] Additionally, the terms used in the embodiments of the present invention are intended to describe the embodiments and are not intended to limit the present invention.

[0018] In this specification, the singular may also include the plural unless specifically stated otherwise in the phrase, and when it is described as “A and / or at least one (or more) of B, C”, it may include one or more of all combinations that can be combined with A, B, C.

[0019] Additionally, in describing components of embodiments of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are only intended to distinguish the components from other components, and are not intended to limit the nature, order, or sequence of the components.

[0020] And, when a component is described as being 'connected', 'coupled', or 'connected' to another component, it may include not only cases where the component is 'connected', 'coupled', or 'connected' directly to the other component, but also cases where the component is 'connected', 'coupled', or 'connected' by another component between the component and the other component.

[0021] Additionally, when described as being formed or arranged "above" or "below" each component, "above" or "below" includes not only cases where the two components are in direct contact with each other, but also cases where one or more other components are formed or arranged between the two components. Furthermore, when expressed as "above" or "below," the meaning may include not only the upward direction but also the downward direction based on one component.

[0022] Variations according to the present embodiment may include some components of each embodiment and some components of other embodiments. That is, a variation may include one embodiment among various embodiments, but may omit some components and include some components of the corresponding other embodiment. Or, the opposite may be true. The features, structures, effects, etc. described in the embodiments are included in at least one embodiment and are not necessarily limited to just one embodiment. Furthermore, the features, structures, effects, etc. exemplified in each embodiment may be combined or modified in other embodiments by a person having ordinary skill in the art to which the embodiments pertain. Therefore, the contents related to such combinations and modifications should be construed as being included within the scope of the embodiments.

[0023] FIG. 1 is a side view illustrating the structure of a MEMS microphone according to an embodiment of the present invention.

[0024] Referring to FIG. 1, a MEMS microphone (1000) according to an embodiment of the present invention may include a first substrate (100), a second substrate (200), a solder resist layer, an adhesive layer (300), a MEMS structure (400), a housing (500), a signal processing element (620), a capacitor (610), and a plating layer.

[0025] The first substrate (100) is placed at the bottom of the MEMS microphone (1000) and is a substrate on which a circuit can be formed in a plate shape. The first substrate (100) is a flexible substrate and may be a COF (Chip on Film) substrate or a flexible printed circuit board (FPCB). A COF (Chip on Film) substrate is a substrate formed by forming a circuit or mounting a chip or other element on a base film, and is a thin substrate compared to other substrates because it has a film shape. By using a COF substrate as the substrate of the MEMS microphone (1000), the thickness can be reduced compared to when using a conventional rigid substrate.

[0026] The first substrate (100) is a COF substrate and may include a 2-metal COF substrate. The 2-metal COF may be formed in a structure in which metal layers are laminated on the upper and lower surfaces of the base film so that circuits can be formed on both sides of the base film or devices can be mounted.

[0027] The first substrate (100) may include a via hole. In this case, the first substrate (100) may connect circuits or elements formed on both sides through a metal layer (e.g., a via) formed in the via hole. Here, the via hole may be a micro via hole and may be configured with a size of 25 um or less. Compared to a single-sided COF, the degree of integration can be increased, the degree of freedom during packaging is improved, and a fine pitch is possible by arranging circuits or elements on both sides. When only a rigid substrate is used, the basic thickness is thick during design, making it difficult to apply a fine pitch, but when a COF substrate is used, it is significantly thinner than the substrate, making it possible to apply a fine pitch, so the size of the MEMS microphone (1000) package can be reduced by more than 50%.

[0028] A flexible printed circuit board (FPCB) is a flexible circuit board that is also flexible and thinner than a general PCB board, so the thickness can be reduced by using a flexible printed circuit board as the board of the MEMS microphone (1000). In addition, other types of flexible boards can be included.

[0029] The first substrate (100) may include an acoustic hole (110). The cross-sectional area of ​​the acoustic hole (110) may be circular, but is not limited thereto. A MEMS structure (400) may be arranged on the upper portion of the acoustic hole (110) formed in the first substrate (100).

[0030] The first substrate (100) may be electrically connected to a signal processing element (620) and a capacitor (610). A metal layer may be formed on the first substrate (100) to be electrically connected to the signal processing element (620) and the capacitor (610). Here, the metal layer may include a plurality of pads, a plurality of connection circuits, and a plurality of vias. The pads may vertically overlap with the vias and contact them, or may contact an external substrate or element. The connection circuits may connect between pads arranged on the same layer or on the upper or lower surface. The vias may be formed in via holes penetrating a base film or an insulating layer. Hereinafter, to help understanding the description, the pads formed on the first substrate (100) are referred to as pads (120).

[0031] Pads and connection circuits of the same or different shapes may be formed on the upper and lower surfaces of the first substrate (100). A plurality of pads and connection circuits may be formed on the upper and lower surfaces of the first substrate (100). The pads may include an upper pad (120) disposed on the upper surface of the first substrate (100) and a lower pad (130) disposed on the lower surface of the first substrate (100). In this case, the upper pad (120) is a pad to which a signal processing element (620) and a capacitor (610) can be electrically connected, and the lower pad (130) is a pad to which an external element can be electrically connected.

[0032] In this case, a plurality of upper pads (120) formed on the upper surface of the first substrate (100) can be electrically connected to a plurality of lower pads (130) formed on the lower surface of the first substrate (100). The upper pads (120) can be electrically connected to the lower pads (130) through vias. In addition, the plurality of upper pads (120) can be arranged at the same position as the plurality of lower pads (130) or can be arranged at different positions. That is, there is no limitation on the arrangement as long as the upper pads (120) are electrically connected to the lower pads (130).

[0033] A connection circuit may be arranged on the upper and lower surfaces of the first substrate (100). The connection circuit may be a pattern circuit for electrically connecting the upper pad (120) and the lower pad (130). The connection circuit may have a pattern shape designed to allow the upper pad (120) and the lower pad (130) to be arranged at different positions. In this case, the signal processing element (620) and the capacitor (610) may be electrically connected to the first substrate (100) through the pads, and the signal processing element (620) and the capacitor (610) may be electrically connected to the lower pad (130) through the upper pad (120). In addition, the upper pad (120) to which the connection circuit is extended may not have a via hole formed therein as needed, in which case a via hole may be formed in the connection circuit.

[0034] A solder resist layer may be disposed on the lower surface of the first substrate (100). A second solder resist layer (720) may be applied and disposed on the lower surface of the first substrate (100). The second solder resist layer (720) may be disposed on the surface of the lower surface of the first substrate (100) except for the area where the lower pad (130) is disposed. In this case, the second connection circuit may also be covered by the second solder resist layer (720). This has the effect of preventing a short circuit due to electrical connection between different lower pads (130).

[0035] The second substrate (200) is laminated so that the first substrate (100) is placed on top, and has a plate shape. The second substrate (200) may be a rigid substrate to supplement the rigidity of the first substrate (100), and may include, for example, one or more of a metal plate, SUS, and a reinforcing plate. SUS is a type of steel that mixes chromium with iron to enhance corrosion resistance, and refers to a high-strength substrate. In addition to the above-described configuration, the second substrate (200) may use various reinforcing plates made of metal, and there is no limitation on the material thereof as long as it can be combined with the housing (500) to maintain the shield. The second substrate (200) supplements the rigidity of the first substrate (100), so that the flexible first substrate (100) can maintain its shape.

[0036] The second substrate (200) may include one or more cavities. The second substrate (200) is disposed on the upper portion of the first substrate (100), and the first substrate (100) may be exposed to the upper portion of the second substrate (200) through the cavities of the second substrate (200). The first substrate (100) may be exposed to the upper portion of the second substrate (200) by having pads disposed in the spaces where the cavities of the second substrate (200) are formed. When the second substrate (200) is laminated on the first substrate (100), since the upper surface of the first substrate (100) is disposed on the lower surface of the second substrate (200), the upper pad (120) formed on the upper surface of the first substrate (100) may be exposed to the upper portion of the second substrate (200) through the cavities of the second substrate (200). The upper pad (120) of the first substrate (100) can be electrically connected to the signal processing element (620) and capacitor (610) through a cavity formed in the second substrate (200).

[0037] The second substrate (200) may include an acoustic hole. The cross-sectional area of ​​the acoustic hole may be circular, but is not limited thereto, and may have a size corresponding to the acoustic hole formed in the first substrate (100). The acoustic hole formed in the second substrate (200) may be in communication with the acoustic hole formed in the first substrate (100) to form a single acoustic hole, and a MEMS structure (400) may be arranged above the acoustic hole.

[0038] A solder resist layer may be disposed on the upper surface of the second substrate (200). A first solder resist layer (710) may be applied and disposed on the upper surface of the second substrate (200). The first solder resist layer (710) may be disposed on the surface of the upper surface of the second substrate (200) excluding the cavity, and in this case, the upper pad (120) and the first connection circuit that vertically overlap with the cavity may be exposed to the outside without being covered by the first solder resist layer (710). Through this, the electrical connection between the upper pad (120) and the MEMS structure (400), signal processing element (620), and capacitor (610) disposed on the second substrate (200) may be stably established.

[0039] In addition, the first solder resist layer (710) on the upper surface of the second substrate (200) may additionally include an etching area. The etching area of ​​the first solder resist layer (710) is formed to penetrate the first solder resist layer (710), and thus, an area of ​​the second substrate (200) that vertically overlaps with the etching area may be exposed. The etching area may be defined alone. In addition, a plating layer may be disposed on the etching area of ​​the first solder resist layer (710). Accordingly, since the plating layer does not vertically overlap with the first solder resist layer (710), solder application is possible on the upper surface, and mounting or bonding of each component, such as the MEMS structure (400) and the signal processing element (620), is possible.

[0040] An adhesive layer (300) may be disposed between the second substrate (200) and the first substrate (100). The adhesive layer (300) may have a lower surface adhered to the upper surface of the first substrate (100) and an upper surface adhered to the lower surface of the second substrate (200) to attach the first substrate (100) and the second substrate (200). The adhesive layer (300) may include a bonding sheet. The bonding sheet may be made of resin. For example, the adhesive layer (300) may be made of one or more of polyimide (PI), polyester (PET), epoxy, and acrylic resin. The adhesive layer (300) may be disposed to have a shape corresponding to the second substrate (200). The first substrate (100) and the second substrate (200) may be bonded through the adhesive layer (300).

[0041] A housing (500), a MEMS structure (400), a signal processing element (620), and a capacitor (610) may be placed on the second substrate (200). The capacitor (610) may be selectively placed on the second substrate (200) as needed.

[0042] The solder resist layer may be formed in a form that covers the upper surface of the second substrate (200) and the lower surface of the first substrate (100) and surrounds the substrate unit to which the first substrate (100) and the second substrate (200) are bonded. The solder resist layer may include a photosensitive solder resist (PSR), and the photosensitive solder resist may include polyimide. The solder resist layer may include a photosenetic polyimide (PSPI). However, the present disclosure is not limited thereto, and the solder resist layer may include a resin. For example, the solder resist layer may include a resin, a curing agent, a photoinitiator, a pigment, a solvent, a filler, an additive, an acrylic monomer, and the like, and may further include glass fiber or a GCP (Glass Core Primer) according to an embodiment. That is, there is no limitation on the material of the solder resist layer as long as an insulating material capable of performing insulation is used.

[0043] The solder resist layer may be disposed on the lower surface of the first substrate (100) and the upper surface of the second substrate (200). The solder resist layer may have a shape corresponding to the lower surface of the first substrate (100) and the upper surface of the second substrate, and a circuit of a desired shape may be formed as needed. The solder resist layer may include a first solder resist layer (710) disposed on the upper surface of the second substrate (200) and a second solder resist layer (720) disposed on the lower surface of the first substrate (100).

[0044] The first solder resist layer (710) may be placed on the upper surface of the second substrate (200). In this case, the substrate of the MEMS microphone (1000) may be laminated in the following order from top to bottom: the first solder resist layer (710), the second substrate (200), the adhesive layer (300), the first substrate (100), and the second solder resist layer (720).

[0045] The first solder resist layer (710) is disposed on the upper surface of the second substrate (200) and may have a shape corresponding to the shape of the second substrate (200). In detail, the first solder resist layer (710) may be disposed on the second substrate (200) so that a hole corresponding to a cavity of the second substrate (200) is formed. The first solder resist layer (710) may have a first hole (711) formed in an area where an acoustic hole of the second substrate (200) is formed. The first solder resist layer (710) may have a second hole (712) formed in an area where a cavity of the second substrate (200) is formed. At least a portion of the upper surface of the second substrate (200) and the upper pad (120) of the second substrate (200) may be exposed to the outside through the second hole (712).

[0046] The first solder resist layer (710) may have a hole formed in the area where the MEMS structure (400) and the housing (500) to be described later are coupled. That is, the first solder resist layer (710) may not only have a first hole formed in an area corresponding to an acoustic hole on the upper surface of the second substrate (200) and a second hole (712) formed corresponding to a cavity on the upper surface of the second substrate (200), but also have a third hole (713) formed in the first area where the housing (500) is coupled, and a fourth hole (714) formed in the second area where the MEMS structure (400) is coupled. At least a portion of the upper surface of the second substrate (200) may be exposed through the third hole (713) and the fourth hole (714) formed in the first solder resist layer (710). In this case, a plating layer may be placed in the third hole (713) and the fourth hole (714) formed in the first solder resist layer (710) to block external exposure of the upper surface of the second substrate (200).

[0047] The second solder resist layer (720) may be placed on the lower surface of the first substrate (100). In this case, the substrate of the MEMS microphone (1000) may be laminated in the following order from top to bottom: the first solder resist layer (710), the second substrate (200), the adhesive layer (300), the first substrate (100), and the second solder resist layer (720).

[0048] The second solder resist layer (720) is disposed on the lower surface of the first substrate (100) and may have a shape corresponding to the shape of the first substrate (100). A hole may be formed in the second solder resist layer (720) in an area where an external electronic component is to be connected. A fifth hole (721) may be formed in the second solder resist layer (720) in an area where the lower pad (130) of the first substrate (100) is disposed. The lower surface of the lower pad (130) may be exposed to the outside through the fifth hole (721) formed in the second solder resist layer (720).

[0049] The plating layer may be disposed on the upper portion of the second substrate (200) and the lower portion of the first substrate (100). The plating layer may be disposed in the third hole (713) and the fourth hole (714) formed in the first solder resist layer (710). In this case, the lower surface of the plating layer may be in contact with the upper surface of the second substrate (200). The plating layer may be disposed on the pad of the first substrate (100). The plating layer may be disposed to cover the upper pad (120) of the first substrate (100). The plating layer may be disposed to cover the lower pad (130) of the first substrate (100).

[0050] The plating layer may include a first plating layer (810) and a second plating layer (820) disposed on top of the first plating layer (810). The plating layer may be disposed such that the first plating layer (810) and the second plating layer (820) are stacked in a vertical direction. However, this is not limited thereto, and in some areas, only the second plating layer (820) may be disposed as the plating layer.

[0051] The first plating layer (810) may be a base plating for plating the second plating layer (820). Generally, since the second substrate (200) is a metal plate, there is a problem that it is difficult to form a plating layer during electroless plating. To solve this problem, the first plating layer (810) may be a base plating. The first plating layer (810) may have a thickness of 3 μm or less. The first plating layer (810) may include nickel. When the second plating layer (820) is plated, the first plating layer (810) may provide adhesion for the second plating layer (820) to be attached.

[0052] The second plating layer (820) may be laminated on top of the first plating layer (810). The second plating layer (820) is a plating layer for electrical connection and may have a lower surface connected to the upper surface of the first plating layer (810). The second plating layer (820) may have a thickness of 0.3 μm or less. The second plating layer (820) may include gold.

[0053] When the plating layer is disposed on the second substrate (200), both the first plating layer (810) and the second plating layer (820) may be disposed. When the plating layer is disposed in the third hole (713) and the fourth hole (714) in which the first solder resist layer (710) is formed, both the first plating layer (810) and the second plating layer (820) may be disposed. In this case, the thickness of the plating layer may be the same as that of the first solder resist layer (710). However, the present invention is not limited thereto, and the thickness of the plating layer may be greater than or less than that of the first solder resist layer (710). The plating layer disposed on the second substrate (200) is defined as an upper plating layer.

[0054] When the plating layer is disposed on the pad of the first substrate (100), the plating layer may be disposed as a second plating layer (820). That is, when the plating layer is disposed on the pad of the first substrate (100), the plating layer may not include the first plating layer (810). The second plating layer (820) may be disposed on each of the upper pad (120) and the lower pad (130) of the first substrate (100). The second plating layer (820) may be disposed to cover the upper surface of the upper pad (120) of the first substrate (100). The second plating layer (820) may be disposed to surround at least a portion of the side surface of the upper pad (120) of the first substrate (100). The second plating layer (820) may be disposed to cover the lower surface of the lower pad (130) of the first substrate (100). The second plating layer (820) may be arranged to cover at least a portion of the side surface of the lower pad (130) of the second substrate (200). However, the second plating layer (820) may not cover the side surfaces of the upper pad (120) and the lower pad (130) when the side surfaces of the upper pad (120) and the lower pad (130) are protected by a solder resist layer. The plating layer arranged on the pad of the first substrate (100) is defined as the lower plating layer. In addition, the plating layer covering the upper pad (120) of the first substrate (100) is defined as the first lower plating layer (910), and the plating layer covering the lower pad (130) of the first substrate (200) is defined as the second lower plating layer (920).

[0055] One or more components of a housing (500), a MEMS structure (400), a signal processing element (620), and a capacitor (610) may be arranged on the upper portion of the second substrate (200). When a first solder resist layer (710) is formed on the upper portion of the second substrate (200), one or more components of the housing (500), the MEMS structure (400), the signal processing element (620), and the capacitor (610) may be in contact with a plurality of connection lines on the upper surface of the first solder resist layer (710). During the process of laminating the housing (500), the MEMS structure (400), the signal processing element (620), and the capacitor (610) on the second substrate (200), a thermal curing process or a reflow process is performed. During the process, heat is generated in the second substrate (200), and since the thermal conductivity of the second substrate (200) is high, the MEMS structure (400) receives heat from the second substrate (200), and its shape is deformed or damaged, which causes a problem of generating noise. Accordingly, the signal-to-noise ratio (SNR), power supply rejection (PSR) related to power noise suppression, and power supply rejection ratio (PSRR) characteristics are changed, and in some cases, the acoustic signal sensing of the MEMS microphone (1000) may operate abnormally or noise may be generated. Since the MEMS structure (400), signal processing element (620), and capacitor (610) are connected to the second substrate (200) through the first solder resist layer (710), there is an effect of reducing the influence of heat generated from the second substrate (200) being transferred to the MEMS structure (400) and signal processing element (620).

[0056] At least one of a housing (500), a MEMS structure (400), a signal processing element (620), and a capacitor (610) may be arranged on the upper portion of the second substrate (200). When a first solder resist layer (710) is formed on the upper portion of the second substrate (200), at least one of the housing (500), the MEMS structure (400), the signal processing element (620), and the capacitor (610) may be arranged in one of the third hole (713) and the fourth hole (714) formed in the first solder resist layer (710). In this case, at least a portion of the housing (500), the MEMS structure (400), the signal processing element (620), and the capacitor (610) may be arranged to be in contact with the plating layer.

[0057] The housing (500) is a means that is disposed on the upper portion of the second substrate (200) and forms an accommodation space therein. The housing (500) may be formed in a cover shape with an open lower surface, and the lower surface of the housing (500) may be connected to a plating layer disposed on the upper surface of the second substrate (200) to form the accommodation space. The lower surface of the housing (500) may be connected to a plating layer disposed in a third hole (713) of the first solder resist layer (710). The housing (500) may be electrically connected to the second substrate (200) through the plating layer. Depending on the size (Back Volume) of the accommodation space formed inside the housing (500), the signal-to-noise ratio (SNR), the power supply rejection (PSR) related to power noise suppression, and the power supply rejection ratio (PSRR) may be improved, thereby determining the noise state.

[0058] The housing (500) may be composed of nickel silver or SUS. Nickel silver is a material containing 15-30% zinc and 10-20% nickel in copper, and solder joints are possible without plating in the raw material state. When plating is applied to the seating area of ​​the housing (500), solder joint adhesion can be improved. Ni+Au plating can be applied. Both electroless and electrolytic plating processes can be applied. Although SUS contains nickel, solder joint adhesion may be reduced if plating is not performed. Therefore, plating can be applied. Unlike nickel silver, when electroless plating is applied, plating adhesion on the SUS surface may be reduced, so plating can be performed using an electrolytic plating process.

[0059] The MEMS structure (400) may be placed within a receiving space formed by the housing (500). The MEMS structure (400) may include a body (410), a back plate (430), and a vibration plate (420). The MEMS structure (400) may be placed on the upper portion of the second substrate (200), and the lower portion of the MEMS structure (400) may be placed at a position adjacent to the sound hole.

[0060] The MEMS structure (400) can be electrically connected to a plating layer formed in the fourth hole (714) of the first solder resist layer (710). The MEMS structure (400) can be electrically connected to a second metal layer through the plating layer. If necessary, the MEMS structure (400) can be connected to the plating layer through a conductive adhesive member.

[0061] The body (410) is a means that can form a partition wall by surrounding the sound hole formed in the second substrate (200). The body (410) can be electrically connected to the first substrate (100) via a signal processing element (620). In addition, an sound hole communicating with the sound hole can be formed in the body (410).

[0062] The body (410) may be formed with an acoustic hole (440). When the body (410) is coupled to the second substrate (200), the acoustic holes formed in the first substrate (100) and the second substrate (200) and the acoustic hole (440) of the body (410) may be arranged to communicate with each other, and thus, sound from the outside may be designed to be introduced through the acoustic hole.

[0063] The body (410) can be electrically connected to a plating layer disposed on a second substrate (200). The body (410) can be electrically connected to the second substrate (200) stably through a conductive adhesive member while the lower surface is connected to the plating layer.

[0064] The back plate (430) and the vibration plate (420) may be placed in an acoustic hole formed in the body (410). The vibration plate (420) may vibrate due to the sound pressure when sound is introduced from the outside through the acoustic hole, and the back plate (430) may sense an acoustic signal by measuring the capacitance according to the vibration of the vibration plate. In the drawing, the back plate (430) is depicted as being positioned above the vibration plate (420), but the vibration plate (420) may also be positioned above the back plate (430).

[0065] Although not shown, one or more body pads for electrical connection may be formed on the upper surface of the body (410). The body pads may be electrically connected to the back plate (430) and the vibration plate (420), and may be electrically connected to a signal processing element (620) to be described later via wires or the like. The body pads serve as a means for electrical connection, and their shapes and materials are known in the art, and thus a description thereof will be omitted.

[0066] The signal processing element (620) is electrically connected to the MEMS structure (400) and can process an electric signal sensed by the MEMS structure (400). The MEMS structure (400) and the signal processing element (620) can be electrically connected via a body pad. For example, the MEMS structure (400) and the signal processing element (620) can be connected via a wire through wire bonding. In another example, the MEMS structure (400) and the signal processing element (620) can be electrically connected while being mounted on a second substrate (200) in a flip-chip form. When the MEMS structure (400) and the signal processing element (620) are wire bonded, a signal pad can be arranged on the signal processing element (620) to be connected to the body pad of the MEMS structure (400) through wire bonding.

[0067] The signal processing element (620) can be electrically connected to the first substrate (100). The signal processing element (620) can be electrically connected to the upper pad (120) of the first substrate (100) through a cavity formed in the second substrate (200). For example, the signal processing element (620) and the first substrate (100) can be connected by wires through wire bonding. When the first substrate (100) and the signal processing element (620) are wire bonded, the upper pad (120) of the first substrate (100) and the signal pad of the signal processing element (620) can be connected through wire bonding. A signal processed in the signal processing element (620) can be transmitted to the upper pad (120) formed on the upper surface of the first substrate (100) and can be transmitted to the outside that requires the signal through the lower pad (130) formed on the lower surface of the first substrate (100).

[0068] As another example, the first substrate (100) and the signal processing element (620) may be electrically connected while mounted on the first substrate (100) in a flip-chip form. In this case, although not shown, a plating layer for contacting the lower surface of the signal processing element (620) may be additionally formed on the upper surface of the second substrate (200). To this end, a sixth hole may be formed in the first solder resist layer (710) in a shape corresponding to the lower surface of the signal processing element (620).

[0069] The signal processing element (620) can amplify a signal sensed by the MEMS structure (400). Here, the signal processing element (620) may include an application-specific integrated circuit (ASIC), but is not limited thereto. The signal processing element (620) may be formed as a single module and may be formed in a chip form. The signal processing element (620) may include an ASIC and an En-cap that coats the ASIC.

[0070] The signal processing element (620) may be disposed on the second substrate (200). The signal processing element (620) may be disposed on the second substrate (200) spaced apart from the MEMS structure (400). The signal processing element (620) may be disposed spaced apart from the MEMS structure (400) in an accommodation space formed inside the housing (500) and may receive a signal from the MEMS structure (400). Since signal transmission between the MEMS structure (400) and the signal processing element (620) occurs in the accommodation space formed by the housing (500), external interference is reduced, thereby reducing noise.

[0071] A capacitor (610) may be selectively placed on the upper portion of the second substrate (200) as needed. When the capacitor (610) is placed, the PSRR performance, which is RF-related noise, may be improved, and the PSR performance, which is power-related noise, may be improved. That is, noise-related performances such as SNR, PSRR, and PSR may be improved through the capacitor (610). The capacitor (610) may be electrically connected to a signal processing element (620). As a result, the capacitor (610) may remove noise during the signal processing process in the signal processing element (620).

[0072] The capacitor (610) may be placed on the upper portion of the second substrate (200) and may be electrically connected to the signal processing element (620) and the first substrate (100). The capacitor (610) may be electrically connected to the signal processing element (620) and the first substrate (100) via a wire. When the capacitor (610) is connected to the first substrate (100) via a wire, it may be connected to an upper pad (120) formed on the first substrate (100) exposed through a cavity of the second substrate (200) via a wire.

[0073] However, the capacitor (610) may be electrically connected to the first substrate (100) by being mounted on the second substrate (200) or the signal processing element (620) in a flip-chip form as well as by bonding through wires. In this case, although not shown, a plating layer for contacting the lower surface of the capacitor (610) may be additionally formed on the upper surface of the second substrate (200). For this purpose, a seventh hole may be formed in the first solder resist layer (710) in a shape corresponding to the lower surface of the capacitor (610). In the case of the MEMS microphone (1000), since miniaturization is essential, there are many cases where the capacitor (610) is not placed in the circuit design due to insufficient space for placing the capacitor (610). In this case, a problem occurs in which the performance of SNR, PSR, and PSRR deteriorates due to power noise or RF noise. In the case of power noise filtering for improving SNR and PSR performance, the frequency of the noise is at the level of 0.1uF to 10uF, whereas in the case of RF noise filtering for improving SNR and PSRR performance, the frequency of the noise is at the level of 10pF to 500pF, so they have different frequency bands. When a plurality of capacitors (610) are arranged, the filtering noise frequency of each capacitor (610) can be determined differently, and accordingly, there is an effect that all performance improvements of SNR, PSR, and PSRR are possible.

[0074] Below, a process for manufacturing a substrate of a MEMS microphone (1000) according to an embodiment of the present invention is described. FIG. 2 is a drawing illustrating a process for manufacturing a MEMS microphone (1000) according to an embodiment of the present invention. Referring to FIG. 2, a MEMS microphone (1000) according to an embodiment of the present invention can be manufactured according to steps A to F.

[0075] First, step A is a step of preparing a first substrate (100), a second substrate (200), and an adhesive layer (300). In step A, the first substrate (100) can be prepared in a roll form because it is a flexible substrate, and the adhesive layer (300) can also be prepared in a roll form because it utilizes a bonding sheet. In addition, the second substrate (200) can exist in a state in which a plurality of second substrate (200) units are arranged in a panel form, and the second substrate (200) can be prepared in a state in which sound holes and cavities are formed through etching.

[0076] Step B is a step of attaching an adhesive layer (300) to the upper surface of the prepared first substrate (100). In detail, through processing in a roll-shaped first substrate (100) array, first substrate (100) units having circular holes and pads and connection circuits formed therein can be arranged and prepared, and through processing in a roll-shaped bonding sheet, bonding sheet units having circular holes and cavities formed therein can be arranged and prepared. In this state, the bonding sheet can be attached to the first substrate (100) by stacking the bonding sheet units so that their lower surfaces are arranged on the upper surface of the first substrate (100) units.

[0077] Step C is a step of forming a substrate unit of a MEMS microphone (1000) by stacking a first substrate (100) and a second substrate (200). In detail, a bonding sheet is attached to the upper surface of the first substrate (100) and a set temperature and a set pressure are applied for a set time through a thermocompression process to bond the lower surface of the second substrate (200) to the upper surface of the bonding sheet, thereby forming a substrate unit in which the first substrate (100), the bonding sheet, and the second substrate (200) are sequentially stacked from the bottom to the top.

[0078] Step D is a step of disposing a solder resist layer on the upper and lower surfaces of the substrate unit. The solder resist layer can be formed through a photo solder resist (PSR) process. In this case, a polishing process for surface modification and improved adhesion can be performed on the upper surface of the substrate unit, that is, the upper surface of the second substrate (200). Thereafter, for the PSR process, an invariant ink is coated on the upper and lower surfaces of the substrate unit, that is, the lower surface of the first substrate (100) and the upper surface of the second substrate (200), and an exposure process is performed to photo-cure the ink, and thereafter, a drying process, a printing process, and a developing process can be performed to form a circuit. Through this, a first solder resist layer (710) can be disposed on the upper surface of the second substrate (200), and a second solder resist layer (720) can be disposed on the lower surface of the first substrate (100). That is, the second solder resist layer (720), the first substrate (100), the bonding sheet, the second substrate (200), and the first solder resist layer (710) can be sequentially laminated from the bottom to the top.

[0079] This is the step of performing a plating process on the substrate unit in step E. The plating may be performed by electroless plating. Through plating, a plating layer may be placed on the hole formed in the first solder resist and the pad area (hereinafter, plating area) of the first substrate (100).

[0080] Plating can be performed through a two-step plating process. In the first-step plating process, a first plating layer (810) can be formed on the upper surface area of ​​the second substrate (200), i.e., the third hole (713) and the fourth hole (714) (including the sixth hole and the seventh hole as needed) formed in the first solder resist. In the first-step plating process, nickel can be used as the plating material. For example, a nickel strike process can be performed in the first-step plating process.

[0081] After this, an electroless plating process may be performed in the second-stage plating process. In the second-stage plating process, plating treatment may be performed after the degreasing, cleaning, and activation processes of the substrate unit on which the first-stage plating process was performed in step D. In the second-stage plating process, gold may be used as the plating material. In this process, a second plating layer (820) may be plated in the area where the first plating layer (810) is formed. In addition, the second plating layer (820) may be plated in the upper pad (120) and lower pad (130) areas of the first substrate (100).

[0082] In step E, the substrate unit of the MEMS microphone (1000) can be plated using an electroless plating process through a two-step plating process.

[0083] In step F, the substrate units for which plating has been completed in step E can be arranged so that they can be packaged, and thereafter, the arranged substrate units can be packaged to manufacture a MEMS microphone (1000).

[0084] FIG. 3 is a side view of a MEMS microphone (1000) according to another embodiment of the present invention.

[0085] Referring to FIG. 3, the configuration of a MEMS microphone (1000) according to another embodiment of the present invention will be described. Among the structures of the MEMS microphone (1000) according to another embodiment of the present invention, duplicate descriptions of structures identical to those of the MEMS microphone (1000) according to an embodiment of the present invention will be omitted, and only differences in structure will be described.

[0086] A MEMS microphone (1000) according to another embodiment of the present invention may include a first substrate (100), a second substrate (200), a solder resist layer, an adhesive layer (300), a MEMS structure (400), a housing (500), a signal processing element (620), a capacitor (610), and a plating layer. Since the structure of the solder resist layer and the plating layer is different from that of the MEMS microphone (1000) according to the embodiment of the present invention, the structure will be described below.

[0087] The solder resist layer may be disposed on the upper portion of the second substrate (200) and the lower portion of the second substrate (200). The solder resist layer may be disposed on the lower surface of the first substrate (100) and the upper surface of the second substrate (200). The solder resist layer may include a first solder resist layer (710) disposed on the upper surface of the second substrate (200) and a second solder resist layer (720) disposed on the lower surface of the first substrate (100). The second solder resist layer (720) has the same structure as the second solder resist layer (720) of the MEMS microphone (1000) according to the embodiment of the present invention, and thus only the first solder resist layer (710) will be described below.

[0088] The first solder resist layer (710) may be placed on the upper surface of the second substrate (200). In this case, the substrate of the MEMS microphone (1000) may be laminated in the following order from top to bottom: the first solder resist layer (710), the second substrate (200), the adhesive layer (300), the first substrate (100), and the second solder resist layer (720).

[0089] The first solder resist layer (710) may be disposed on at least a portion of the upper surface of the second substrate (200). The first solder resist layer (710) may be disposed on the upper surface of the second substrate (200) in an area where the second substrate (200) protrudes outward from the housing (500), i.e., an area not disposed in the receiving space. In this case, the first solder resist layer (710) may be disposed on the upper surface of the second substrate (200) in an area where the lower surface of the housing (500) protrudes outward.

[0090] The first solder resist layer (710) may have a seventh hole formed in an area corresponding to the lower surface and the receiving space of the housing (500). The seventh hole of the first solder resist layer (710) may have the same size as the lower outer edge area of ​​the housing (500). Accordingly, the first solder resist layer (710) may be arranged to extend along the upper edge direction of the second substrate (200). In addition, the first solder resist layer (710) may not be arranged in the receiving space formed by the housing (500) and the lower portion of the housing (500).

[0091] The plating layer may be disposed on the upper portion of the second substrate (200) and the lower portion of the first substrate (100). The plating layer may be disposed in the seventh hole formed in the first solder resist layer (710). In this case, the lower surface of the plating layer may be in contact with the upper surface of the second substrate (200). The plating layer may be disposed on the pad of the first substrate (100). The plating layer may be disposed to cover the upper pad (120) of the first substrate (100). The plating layer may be disposed to cover the lower pad (130) of the first substrate (100).

[0092] The plating layer may include a first plating layer (810) and a second plating layer (820) disposed on top of the first plating layer (810). The plating layer may be disposed such that the first plating layer (810) and the second plating layer (820) are stacked in a vertical direction. However, this is not limited thereto, and in some areas, only the second plating layer (820) may be disposed as the plating layer.

[0093] When the plating layer is disposed on the second substrate (200), both the first plating layer (810) and the second plating layer (820) may be disposed. When the plating layer is disposed in the seventh hole in which the first solder resist layer (710) is formed, both the first plating layer (810) and the second plating layer (820) may be disposed. In this case, the thickness of the plating layer may have the same thickness as that of the first solder resist layer (710). However, the present invention is not limited thereto, and the thickness of the plating layer may be greater than or less than that of the first solder resist layer (710). In this case, the housing (500), the MEMS structure (400), the signal processing element (620), and the capacitor (610) may be electrically connected to the second substrate (200) through the plating layer.

[0094] Although all components constituting the embodiments of the present invention have been described above as being combined or operating in combination, the present invention is not necessarily limited to these embodiments. That is, within the scope of the purpose of the present invention, all components may be selectively combined and operated one or more times. In addition, terms such as "include," "comprise," or "have" described above, unless specifically stated to the contrary, mean that the corresponding component may be inherent, and therefore should be interpreted as including other components rather than excluding other components. All terms, including technical or scientific terms, have the same meaning as generally understood by a person of ordinary skill in the art to which the present invention pertains, unless otherwise defined. Commonly used terms, such as terms defined in a dictionary, should be interpreted as being consistent with the contextual meaning of the related technology, and shall not be interpreted in an ideal or excessively formal sense, unless explicitly defined in the present invention.

[0095] The above description is merely an illustrative description of the technical idea of ​​the present invention, and those skilled in the art will appreciate that various modifications and variations may be made without departing from the essential characteristics of the present invention. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. The scope of protection of the present invention should be interpreted by the following claims, and all technical ideas within a scope equivalent thereto should be interpreted as being included in the scope of the rights of the present invention.

Claims

1. First substrate; A second substrate laminated on the first substrate; A solder resist layer formed on a portion of the upper surface of the second substrate and the lower surface of the first substrate; A housing disposed on the upper part of the second substrate and having a receiving space formed therein; A MEMS structure disposed within the receiving space on the upper portion of the second substrate; and Including an upper plating layer disposed between the second substrate, the housing, and the MEMS structure, A MEMS microphone wherein the upper plating layer comprises a first plating layer and a second plating layer laminated on the first plating layer and made of a different material from the first plating layer.

2. In paragraph 1, A MEMS microphone having a thickness of the first plating layer that exceeds the thickness of the second plating layer.

3. In paragraph 1, The above solder resist layer A first solder resist layer disposed on the upper surface of the second substrate; and A second solder resist layer is disposed on the lower surface of the first substrate, The above upper plating layer is a MEMS microphone placed in a hole formed in the first solder resist layer.

4. In paragraph 3, A MEMS microphone in which a hole formed in the first solder resist layer is formed in an area corresponding to the lower surface of the housing and the lower surface of the MEMS structure.

5. In paragraph 1, A MEMS microphone further comprising a lower plating layer covering a pad disposed on the first substrate.

6. In paragraph 5, A MEMS microphone in which the lower plating layer is made of the same material as the second plating layer.

7. In paragraph 6, The above first substrate includes an upper pad disposed in a portion of the upper surface and a lower pad disposed in a portion of the lower surface, The above lower plating layer is a MEMS microphone that covers the upper pad and the lower pad.

8. In paragraph 3, A MEMS microphone arranged so that the thickness of the upper plating layer has a height corresponding to the thickness of the first solder resist layer.

9. In paragraph 8, A MEMS microphone in which the first solder resist layer has a hole formed in an area corresponding to the lower surface of the housing and the receiving space.

10. In paragraph 9, A MEMS microphone in which the upper plating layer is disposed in a hole formed in the first solder resist layer.

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