Array substrate and display substrate

By setting a film structure with uneven thickness and auxiliary electrodes on the array substrate, the problem of liquid crystal molecule orientation disorder caused by step difference in liquid crystal display panel is solved, thereby improving the orientation uniformity of liquid crystal molecules and display contrast.

WO2025222382A1PCT designated stage Publication Date: 2025-10-30BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
PCT/CN2024/089411
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-23
Publication Date
2025-10-30

AI Technical Summary

Technical Problem

In liquid crystal display panels, the step difference between the data line area and the pixel electrode area on the array substrate makes it difficult for the alignment film to make contact during the rubbing alignment method, resulting in disordered liquid crystal molecule arrangement, poor light leakage, and reduced contrast.

Method used

By setting a third region with uneven film thickness on the array substrate, the step difference and slope are reduced, and a planar electric field is formed between the auxiliary electrode and the pixel electrode to drive the liquid crystal deflection, thus overcoming the disordered orientation of liquid crystal molecules in the step difference region.

Benefits of technology

It improves the orientation uniformity of liquid crystal molecules, reduces light leakage, and enhances display contrast.

✦ Generated by Eureka AI based on patent content.

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Abstract

An array substrate and a display substrate, which belong to the technical field of display. The array substrate comprises: a base, wherein the base comprises a plurality of pixel areas, each of which comprises a first area, a second area, and a third area located between the first area and the second area; a pixel electrode located in the first area; and a film layer structure located between the pixel electrode and the base, the film layer structure comprising a data line layer, the orthographic projection of the data line layer on the base overlapping with the second area and not overlapping with the first area, and the film layer structure located in the second area having a step difference with the film layer structure located in the first area, wherein the thickness of the film layer structure located in the third area is not uniform, and / or the step difference is less than the total thickness of a functional layer in the film layer structure, which functional layer comprises the data line layer.
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Description

Array substrate and display substrate Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to an array substrate and a display substrate. Background Technology

[0002] Liquid crystal displays (LCDs) are widely used in various sizes of liquid crystal displays due to their advantages such as low power consumption, thin size, wide viewing angle, and high definition. An LCD panel typically consists of an array substrate and a cell substrate symmetrically formed, with liquid crystal filling the space between them to create the LCD panel.

[0003] An alignment film is fabricated between the liquid crystal and the array substrate to control the alignment of the liquid crystal molecules. The alignment of the liquid crystal molecules is related to the display quality of the liquid crystal display panel.

[0004] Overview

[0005] Based on the background art, this disclosure proposes an array substrate and a display substrate.

[0006] First, an array substrate is provided, comprising:

[0007] A substrate, the substrate including a plurality of pixel regions, the pixel regions including a first region, a second region and a third region located between the first region and the second region;

[0008] Pixel electrodes, located within the first region; and,

[0009] A film structure is located between the pixel electrode and the substrate. The film structure includes a data line layer. The orthographic projection of the data line layer on the substrate overlaps with the second region. The film structure located in the second region has a step difference from the film structure located in the first region.

[0010] The thickness of the membrane structure located in the third region is not uniform, and / or the step difference is less than the total thickness of the functional layers in the membrane structure, wherein the functional layers include the data line layer.

[0011] For example, the thickness of the membrane structure located in the third region is not uniform; the third region includes multiple sub-regions;

[0012] Among the two adjacent sub-regions, the thickness of the membrane structure in the sub-region closer to the second region is greater than the thickness of the membrane structure in the sub-region closer to the first region.

[0013] For example, in the direction from the first region to the second region, the thickness of the membrane structure in the plurality of sub-regions gradually increases.

[0014] For example, at least one first sub-region exists among the plurality of sub-regions, and the thickness of the membrane structure within the first sub-region increases linearly in the direction of the first region toward the second region.

[0015] For example, the system includes multiple first sub-regions, and the thickness increments of the multiple first sub-regions are not exactly the same.

[0016] For example, it includes multiple first sub-regions, and the thickness increment of the first sub-region closer to the second region is greater than the thickness increment of the first sub-region closer to the first region.

[0017] Exemplarily, it includes multiple first sub-regions spaced apart;

[0018] The multiple sub-regions also include a second sub-region other than the first sub-region, and the thickness uniformity of the second sub-region is higher than that of the first sub-region.

[0019] Exemplarily, the membrane structure further includes:

[0020] An active layer is located on the side of the data line layer closest to the substrate, and the orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate.

[0021] A protective layer is located on the side of the data line layer opposite to the substrate. The protective layer includes an insulating material, and its orthographic projection on the substrate covers the first region, the third region, and the second region.

[0022] For example, the orthographic projection of the active layer onto the substrate also overlaps with the third region;

[0023] The thickness of the active layer located in the third region is not uniform, and / or the thickness of the protective layer located in the third region is not uniform.

[0024] For example, the thickness of the active layer located in the third region is not uniform, and the active layer in the third region includes multiple active regions;

[0025] Among the two adjacent active regions, the thickness of the active region closer to the second region is greater than the thickness of the active region closer to the first region.

[0026] For example, the plurality of active regions include a plurality of first active regions spaced apart, and a second active region other than the first active regions;

[0027] In the direction from the first region to the second region, the thickness of the first active region increases linearly, and the thickness uniformity of the second active region is higher than that of the first active region.

[0028] For example, the edge of the first active region has a slope, wherein the first slope of the slope of the first active region closer to the first region is greater than the second slope of the slope of the first active region closer to the second region.

[0029] For example, the first slope is 20° to 30°, and the second slope is less than 20°.

[0030] For example, the plurality of first active regions includes an end active region located at the end of the active layer, and the distance between the end active region and the second region is 1.7 μm to 2.7 μm.

[0031] For example, the step difference is less than the total thickness of the active layer and the data line layer;

[0032] The thickness of the protective layer located in the second region is less than the thickness of the protective layer located in the first region.

[0033] For example, the protective layer includes:

[0034] A passivation layer is located on the side of the data line layer that faces away from the substrate;

[0035] An organic film layer is located on the side of the passivation layer opposite to the substrate;

[0036] Wherein, the first thickness of the passivation layer located in the second region is less than the second thickness of the passivation layer located in the first region, and / or the thickness of the organic film layer located in the second region is less than the thickness of the organic film layer located in the first region.

[0037] For example, the first thickness is The second thickness is The thickness of the organic film layer is

[0038] Exemplarily, the array substrate further includes:

[0039] An auxiliary electrode is disposed on the same layer as the pixel electrode and close to the pixel electrode; wherein the auxiliary electrode and the data line layer are both located on the same side of the pixel electrode.

[0040] The array substrate provided in this embodiment includes a substrate with multiple pixel regions. Each pixel region includes a first region, a second region, and a third region located between the first and second regions. A pixel electrode is disposed in the first region, and a film structure is disposed between the pixel electrode and the substrate. The film structure includes a data line layer located in the second region. The film structure in the second region has a step difference from the film structure in the first region. The film structure in the third region has a non-uniform thickness to reduce the step difference, and / or the step difference is less than the total thickness of the functional layers in the film structure, including the data line layer. On the one hand, because the film structure in the third region, which transitions from the first to the second region, has a non-uniform thickness, it helps to reduce the step difference, thereby making the slope between the first and second regions gentler. This allows the fabric fibers to contact the alignment film in the slope regions more frequently when aligning liquid crystal molecules using a friction alignment method, improving the uniformity of liquid crystal molecule alignment across the entire region. On the other hand, the thickness of the step difference can be less than the total thickness of the functional layers in the film structure. Since the functional layers include at least the data line layer, the step difference can be reduced. This allows the fabric to have a greater chance of contacting the alignment film in the up and down slope regions of the step difference, thereby improving the alignment uniformity of liquid crystal molecules across the entire domain.

[0041] Secondly, an array substrate is also provided, comprising:

[0042] A substrate on which multiple pixel regions are disposed, the pixel regions including a first region, a second region, and a third region located between the first region and the second region;

[0043] The pixel electrode is located within the first region;

[0044] A film structure is located between the substrate and the pixel electrode, the film structure including a data line layer located within a second region, and the film structure located in the second region having a step difference from the film structure located in the first region; and...

[0045] An auxiliary electrode is disposed on the same layer as the pixel electrode and close to the pixel electrode, and the auxiliary electrode is located on one side of the third region of the pixel electrode.

[0046] For example, the orthographic projection of the auxiliary electrode on the substrate overlaps with the orthographic projection of the data line layer on the substrate.

[0047] For example, it includes two adjacent first pixel regions and second pixel regions;

[0048] The orthographic projection of the auxiliary electrode on the substrate overlaps with both the third region within the first pixel region and the third region within the second pixel region.

[0049] For example, multiple third pixel regions are arranged in the extending direction of the data line layer;

[0050] The orthographic projection of the auxiliary electrode onto the vertical plane of the substrate covers the orthographic projection of the multiple third pixel regions onto the vertical plane.

[0051] For example, the thickness of the membrane structure located in the third region is not uniform; and / or, the step difference is less than the total thickness of the functional layers in the membrane structure, the functional layers including the data line layer.

[0052] For example, the second region includes a plurality of sub-regions; wherein the thickness of the membrane structure in the sub-region closer to the second region is greater than the thickness of the membrane structure in the sub-region closer to the first region.

[0053] Exemplarily, the membrane structure further includes:

[0054] An active layer is located on the side of the data line layer closest to the substrate, and the orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate.

[0055] A protective layer is located on the side of the data line layer facing away from the substrate, and the orthographic projection of the protective layer on the substrate covers the first region, the third region, and the second region;

[0056] The orthographic projection of the active layer on the substrate overlaps with the third region, and the active layer in the third region includes multiple active regions. In the direction from the first region to the second region, the thickness of at least one active region increases linearly.

[0057] The array substrate provided in this embodiment includes a substrate with multiple pixel regions. Each pixel region includes a first region, a second region, and a third region located between the first and second regions. A pixel electrode is disposed in the first region, and a film structure, including a data line layer, is disposed between the pixel electrode and the substrate. The data line layer is located in the second region, and there is a step difference between the film structure in the second region and the film structure in the first region. An auxiliary electrode is disposed on the same layer as the pixel electrode, close to the pixel electrode, and located on one side of the third region of the pixel electrode. Therefore, during display driving, a planar electric field can be formed between the auxiliary electrode and the pixel electrode in the third region, driving the deflection of the liquid crystal molecules in the third region, thereby overcoming the problems of poor light leakage and decreased contrast caused by the disordered orientation of the liquid crystal molecules in the third region.

[0058] The present invention also provides a display substrate, comprising any one of the array substrates described above, and a counter substrate disposed opposite to the array substrate, wherein liquid crystal is filled between the counter substrate and the array substrate.

[0059] The above description is merely an overview of the technical solution disclosed herein. In order to better understand the technical means of this disclosure and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this disclosure more apparent and understandable, specific embodiments of this disclosure are described below.

[0060] Brief description of the attached diagram

[0061] To more clearly illustrate the technical solutions in the embodiments or related technologies of this disclosure, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the scale in the drawings is for illustration only and does not represent the actual scale.

[0062] Figure 1 shows a schematic diagram of the process of rubbing alignment of an array substrate with step differences in related technologies;

[0063] Figure 2 shows a top plan view of the array substrate according to an embodiment of the present disclosure;

[0064] Figure 3 shows a schematic diagram of the cross-sectional structure at A-A' in Figure 2;

[0065] Figure 4 shows an enlarged schematic diagram of the third region in Figure 3;

[0066] Figures 5, 6, 7, 8 and 9 respectively show schematic cross-sectional views of the A-A' section of the multiple array substrates in the embodiments of this disclosure;

[0067] Figure 10 shows an enlarged schematic diagram of the active layer in the third region of Figures 6 and 7;

[0068] Figures 11 and 12 show schematic cross-sectional views of two array substrates at A-A' in embodiments of this disclosure;

[0069] Figure 13 shows a top plan view of another array substrate in an embodiment of the present disclosure;

[0070] Figure 14 shows a schematic diagram of the cross-sectional structure of the array substrate in Figure 13 along section A-A'.

[0071] Figure 15 shows a top plan view of another array substrate in an embodiment of the present disclosure;

[0072] Figure 16 shows a schematic flowchart of the manufacturing process of array substrate A in Example 1;

[0073] Figure 17 shows a scanning electron microscope image of the original film structure in the region near the data line layer;

[0074] Figure 18 shows a scanning electron microscope image of the film structure in the region near the data line layer of array substrate A;

[0075] Figure 19 shows a scanning electron microscope image of the original film structure in the region near the data line layer;

[0076] Figure 20 shows a scanning electron microscope image of the film structure in the region near the data line layer of array substrate B;

[0077] Figure 21 shows a cross-sectional view of the display substrate in another embodiment.

[0078] Detailed description

[0079] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0080] Among related technologies, the commonly used techniques for forming alignment films are mainly divided into two categories: rubbing alignment and vertical alignment (VA). Rubbing alignment is a contact alignment technique, typically involving a friction roller formed by wrapping a friction cloth covered with fine fibers around a cylindrical roller. The relative movement between the friction roller and the array substrate coated with the alignment film causes the fibers on the friction roller to rub and align the alignment film on the array substrate. For array substrates in Advanced Super Dimension Switch (ADS) display modes, there is a step difference between the data line area and the pixel electrode area on the array substrate. Referring to Figure 1, a schematic diagram of the rubbing alignment process for an array substrate with this step difference is shown. As can be seen in Figure 1, the alignment film is not easily aligned by the fibers at the step difference, resulting in disordered liquid crystal molecule arrangement at this location, leading to poor light leakage and ultimately reduced product contrast.

[0081] To address the aforementioned issues, the array substrate proposed in this disclosure, on the one hand, can reduce the step difference and / or the slope of the step difference by adjusting the film thickness of the film structure on the array substrate. This allows the morphology of the film structure to facilitate contact between the fibers and the alignment film when the fibers pass through, increasing the probability of alignment of the step difference region by the fibers and ensuring the normal alignment of liquid crystal molecules in that region. On the other hand, auxiliary electrodes can be disposed on the array substrate, and a planar electric field (also known as a reinforcing electric field) can be formed between the auxiliary electrodes and the pixel electrodes. Driven by the reinforcing electric field, the liquid crystal molecules in the step difference region that are not brushed by the fibers are normally deflected, thereby overcoming the problem of poor light leakage caused by disordered alignment of liquid crystal molecules in this region.

[0082] It should be noted that the array substrate of this embodiment is not only applicable to array substrates in ADS display mode, but also to other array substrates where there is a step difference between the data lines and the pixel electrodes. For example, array substrates in which the common electrode and the pixel electrode are located on the same substrate to form a planar electric field to drive the liquid crystal.

[0083] Referring to Figures 2 and 3, Figure 2 shows a top plan view of the array substrate according to an embodiment of the present disclosure, and Figure 3 shows a cross-sectional view of section A-A' in Figure 2. As shown in Figures 2 and 3, the array substrate in this embodiment of the present disclosure includes:

[0084] The substrate 10 includes a plurality of pixel regions 101, each pixel region 101 including a first region c, a second region a, and a third region b located between the first region c and the second region a;

[0085] Pixel electrode 11 is located in the first region c; and,

[0086] The film structure 20 is located between the pixel electrode 11 and the substrate 10. The film structure includes a data line layer 12. The orthogonal projection of the data line layer on the substrate overlaps with the second region a. The film structure located in the second region a has a step difference with the film structure located in the first region c.

[0087] The thickness of the membrane structure located in the third region b is non-uniform to reduce the step difference, and / or the step difference is less than the total thickness of the functional layers in the membrane structure, including the data line layer 12.

[0088] In this embodiment, the common electrode and the pixel electrode are both located on one side of the substrate, and can be disposed in the same layer or in different layers, thereby forming a planar electric field on the same side of the liquid crystal to drive the liquid crystal deflection. When disposed in different layers, the common electrode can be located on the side of the pixel electrode closer to the substrate or on the side of the pixel electrode away from the substrate, and the common electrode can cover the entire substrate.

[0089] The substrate can be a glass substrate, which includes multiple pixel regions. Each pixel region can be understood as a sub-pixel. The pixel region can include a first region, a second region, and a third region located between the first and second regions. The first region can be understood as the region where the pixel electrode is located, that is, the first region includes the pixel electrode. For example, the first region can be the region where the pixel electrode is projected onto the substrate. In the first region, an electric field is formed between the pixel electrode and the common electrode. The liquid crystal formed on the array substrate is deflected under the drive of the electric field, so the first region can be called the light-emitting region.

[0090] As shown in Figure 2, the substrate includes multiple gate lines 13 and multiple data lines 12. The gate lines 13 and data lines 12 intersect to define a pixel region 101. The gate lines provide scanning signals to the pixel region, and the data lines provide data signals to the pixel region. As shown in Figure 2, each pixel region also includes a TFT thin-film transistor switch 14. The thin-film transistor switch 14 may include a gate 41 connected to the gate line, a drain 43 connected to the data line, and a source 42 connected to the pixel electrode. The gate, source, and drain constitute a TFT switch. In practice, the voltage provided to the TFT switch on the gate line can be used to turn the TFT switch on or off. When the switch is on, the voltage provided to the TFT switch by the data line can be transmitted to the drain and then to the pixel electrode, thereby forming an electric field between the pixel electrode and the common electrode to drive the liquid crystal deflection.

[0091] As shown in Figure 2, the pixel electrode includes multiple strip electrodes 111, which are arranged at intervals in the first region c, as shown in Figure 2.

[0092] In this example, pixel region 101 is defined as the area bounded by the intersection of data lines and gate lines. The area where the data lines are located is called the second region a. This second region a can be considered part of the pixel region. In practice, it does not need to emit light, so it can be called a non-emitting region or an opaque region. Pixel region 101 can include the second region a, the first region c, and the third region b located between the second region a and the first region c. The third region b can be understood as the area in the pixel region that is not covered by the pixel electrode and the second region. That is, the orthogonal projection of the pixel electrode on the substrate can not overlap with the third region b, and the third region b does not overlap with the second region. It can be understood as the area between the emitting and non-emitting regions. As shown in Figure 3, in some examples, the orthogonal projection of the data lines on the substrate can cover the second region and partially overlap with the third region.

[0093] As shown in Figure 3, which is a cross-sectional view of the area between two adjacent pixel regions (i.e., the cross-section at position A-A' in Figure 3), this view does not include the film structure of the region where the thin-film transistor is located. As shown in Figure 3, a film structure is formed between the pixel electrode 11 and the substrate 10. The orthogonal projection of this film structure onto the substrate can cover the second region, the first region, and the third region. The film structure includes at least a data line layer, which is the film layer containing the data lines. As mentioned above, the orthogonal projection of the data line layer onto the substrate overlaps with the second region. Specifically, the orthogonal projection of the data lines onto the substrate can cover the second region and partially overlaps with the third region.

[0094] The film layers in different regions within a pixel area can be different, and their morphologies can also differ. For example, the film layer structure may exhibit different thicknesses in different regions within the pixel area. In this example, there is a step difference between the film layer structure in the first region and the film layer structure in the second region. This step difference can be due to the difference in thickness between the film layer structure in the first region and the film layer structure in the second region. For example, the thickness of the film layer structure in the first region may be less than the thickness of the film layer structure in the second region, or the thickness of the film layer structure in the first region may be greater than the thickness of the film layer structure in the second region.

[0095] In practice, referring to Figure 3, the film structure in the second region and the first region has a step difference. This can be because the second region includes a data line layer and other film layers that are associated with the data line layer, such as a gate layer and an active layer. This results in the number of film layers in the second region being greater than the number of film layers in the first region, thus creating a step difference in the film structure between the second and first regions. To compensate for the step difference between the first and second regions, which prevents the alignment film between the first and second regions from being uniformly aligned during rubbing alignment, in this embodiment, the third region can be used as a buffer zone for the step difference, and the film structure in the third region can be configured with a non-uniform thickness morphology; alternatively, the thickness difference between the film structure in the first region and the film structure in the second region can be reduced, i.e., the step difference can be reduced, such as making the step difference less than the total thickness of the functional layers in the film structure. The functional layer may include a data line layer and other film layers that work in conjunction with the data line layer, such as an active layer. In practice, the orthogonal projection of the functional layer on the substrate may overlap with the second region but not with the first region. In one case, it is precisely because there is a functional layer in the second region that there is a step difference between the film layer structure in the first region and the film layer structure in the second region.

[0096] Alternatively, the membrane structure in the third region can be configured with a non-uniform thickness morphology, while the step difference between the first and second regions can be less than the total thickness of the functional layers in the membrane structure. Thus, on the one hand, the third region can act as a buffer zone for the step difference, mitigating the steepness of the step difference's descent; on the other hand, the thickness of the membrane structure located in the first region can be increased, raising the first region and thereby reducing the step difference between the first and second regions.

[0097] It should be noted that the aforementioned film structure is a collective term for multiple film layers located between the pixel electrode and the substrate. As shown in Figure 3, this film structure may include: a gate insulating layer 15, an active layer 16 located on the side of the gate insulating layer 15 facing away from the substrate 10, wherein the data line layer 12 is located on the side of the active layer 17 facing away from the substrate 10, and a protective layer 17 located on the side of the data line layer 12 facing away from the substrate 10. Since there is a step difference between the film structure in the first region and the film structure in the second region, this step difference is caused by the different number of film layers included in the film structure in different regions. The data line layer exists in the second region and part of the third region. The orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate. This overlap can mean that they coincide, or the orthographic projection of the active layer on the substrate covers the orthographic projection of the data line layer on the substrate.

[0098] It should be noted that the non-uniform thickness of the film structure located in the third region in this embodiment can refer to different thicknesses of the film structure at multiple different locations within the third region. Due to this non-uniform thickness, the surface of the film structure in the third region facing away from the substrate forms an uneven morphology. For example, the surface of the film structure in the third region facing away from the substrate may have a wavy, stepped, or wedge-shaped morphology. Regardless of the type of non-uniformity, the thickness value of the film structure in the third region can fall between the first thickness value of the film structure in the first region and the second thickness value of the film structure in the second region. That is, the thickness of the film structure in the third region exhibits non-uniformity between the first and second thickness values.

[0099] The uneven thickness of the film structure in the third region can slow down the trend of the step difference. For example, the transition between the first and second regions can be smooth. Comparing Figure 1 and Figure 3, the slope of the step difference in Figure 1 is larger, and the fabric cannot be brushed onto the liquid crystal in the third region. The slope of the step difference in Figure 3 is smaller and gentler, so the fabric cannot be brushed onto the liquid crystal in the third region, thus allowing the liquid crystal in this region to be pre-aligned.

[0100] Using the array substrate of this embodiment, when the step difference is less than the total thickness of the functional layers in the film structure, the defect of a large film structure thickness in the second region caused by the presence of functional layers can be compensated. This can raise the height of the pixel electrode in the first region, thereby reducing the step difference and allowing the brush to reach the liquid crystal in the third region, thus pre-orienting the liquid crystal in that region. When the film structure thickness in the third region is uneven, the film structure in the third region can serve as a transition between the first and second regions, reducing the steep slope between the first and second regions. This allows the brush to reach the liquid crystal in this region when moving from the first region to the second region, thus pre-orienting the liquid crystal in that region.

[0101] In summary, when the liquid crystal in the third region is pre-aligned, the light leakage in this region can be improved, thereby increasing the display contrast.

[0102] In some examples, the case of non-uniform thickness of the membrane structure located in the third region is described.

[0103] In the third region, the thickness of the membrane structure near the second region is greater than that near the first region. In this case, the thickness of the membrane structure in the third region can gradually increase in the direction from the first region to the second region. This gradual increase can be linear or nonlinear. For linear increases, the morphology of the membrane structure in the third region can be wedge-shaped. For nonlinear increases, the morphology of the membrane structure in the third region can be wavy, stepped, or similar.

[0104] Please refer to Figures 3 and 4. Figure 4 shows an enlarged schematic diagram of the third region in Figure 3. As shown in Figures 3 and 4, the third region can be divided into multiple sub-regions. The thickness of the membrane structure in the multiple sub-regions is not the same. Specifically, the thickness of the membrane structure in the sub-region closer to the second region is greater than the thickness of the membrane structure in the sub-region closer to the first region.

[0105] In this example, the sub-region closer to the second zone can refer to a single sub-region adjacent to the second zone, such as sub-region 5; or it can refer to multiple sub-regions adjacent to the second zone, such as sub-region 4 and sub-region 5. Similarly, the sub-region closer to the first zone can refer to a single sub-region adjacent to the first zone, such as sub-region 1; or it can refer to multiple sub-regions adjacent to the first zone, such as sub-region 1 and sub-region 2.

[0106] In practice, for two adjacent sub-regions, the thickness of the membrane structure in the sub-region closer to the first region can be less than the thickness of the membrane structure in the sub-region closer to the second region. Specifically, as shown in Figures 4 and 3, for each pair of adjacent sub-regions, the thickness of the membrane structure in the sub-region closer to the first region can be less than the thickness of the membrane structure in the sub-region closer to the second region.

[0107] Suppose two adjacent sub-regions comprise sub-region A and sub-region B, with sub-region A closer to region 1 and sub-region B closer to region 2. The thickness of the membrane structure within sub-region A is less than the thickness of the membrane structure within sub-region B to reduce the steepness of the slope between regions 1 and 2. For other sub-regions besides A and B, the thickness of the membrane structure within these sub-regions varies; it can be less than or greater than the thickness of sub-region B. In one example, it is sufficient to ensure that the thickness of the membrane structure in the sub-region closer to region 2 is greater than the thickness of the membrane structure in the sub-region closer to region 1 among two adjacent sub-regions, which also reduces the steepness of the slope.

[0108] Specifically, in some examples, among multiple sub-regions, only some adjacent sub-regions exhibit a membrane structure thickness on one side of the first region that is less than the membrane structure thickness on the side closer to the second region. For example, taking Figure 4 as an example, in other examples, the membrane structure thickness in sub-region 3 can be less than that in sub-region 4, the membrane structure thickness in sub-region 4 can be less than that in sub-region 5, while the thicknesses of sub-regions 1 and 2 can be slightly greater than that of sub-region 3 and less than that of sub-region 4. This results in a wavy morphology in the membrane structure of the third region, meaning that in the direction from the first region to the second region, the thickness of multiple sub-regions can first increase, then decrease, then increase again, repeating this spirally until it reaches the thickness of the membrane structure in the second region.

[0109] In a further example of this embodiment, the thickness of multiple sub-regions can gradually increase. For instance, in the direction from the first region to the second region, the thickness of the film structure within the multiple sub-regions gradually increases, thereby allowing the film structure in the non-light region to have a wedge-shaped morphology. Referring to FIG5, the gradual increase in the thickness of the film structure within the multiple sub-regions can mean that, in every two adjacent sub-regions, the thickness of the film structure in the sub-region closer to the first region can be less than the thickness of the film structure in the sub-region closer to the second region, and the thickness of each sub-region increases linearly in the direction from the first region to the second region.

[0110] When using the film structure in this example, the film structure in the third region is wedge-shaped. Furthermore, the difference between the thickness of the film structure in the first region and the thickness of the film structure in the second region can be less than the total thickness of the functional films in the film structure, such as less than the sum of the thicknesses of the data line layer and the active layer. This reduces the step difference between the first and second regions, allowing the pixel electrode position to be raised, thereby mitigating the steep slope in the third region.

[0111] In a further example of this embodiment, some or all of the sub-regions in the multiple sub-regions have a wedge-shaped morphology, such as in the direction from the first region to the second region, and the thickness of the film structure in some or all of the multiple sub-regions increases linearly.

[0112] Specifically, at least one first sub-region exists among the multiple sub-regions, and the thickness of the membrane structure within the first sub-region increases linearly in the direction of the first region toward the second region.

[0113] In this example, the first sub-region can be any one of the multiple sub-regions, or it can be a subset of multiple sub-regions. Referring to Figures 3 and 4, some sub-regions in the multiple sub-regions exhibit a linearly increasing thickness. These sub-regions with linearly increasing thickness can be called the first sub-regions. For example, in Figure 4, sub-regions 2, 4, and 5 are the first sub-regions. The thickness of the film structure in these first sub-regions increases linearly, resulting in a wedge-shaped morphology.

[0114] In the case of multiple first sub-regions, the multiple first sub-regions can be sequentially adjacent sub-regions; or, the multiple first sub-regions include adjacent first sub-regions and non-adjacent first sub-regions, as shown in Figure 4, where sub-region 2 and sub-region 4 are spaced-apart sub-regions, and sub-region 4 and sub-region 5 are adjacent first sub-regions; or, the multiple first sub-regions are not adjacent to each other, thus, the multiple sub-regions present a stepped shape feature through the spaced-apart first sub-regions.

[0115] In the case of multiple first sub-regions, the slopes of the multiple first sub-regions may be different, and the slope represents the thickness increment of the membrane structure, that is, the thickness increment of the membrane structure in the multiple first sub-regions is not the same; or, the slopes of the multiple first sub-regions may be the same, and in the same case, the multiple first sub-regions may be set at intervals.

[0116] For example, and more specifically, as shown in FIG4, the thickness increments of the multiple first sub-regions are not entirely the same. This non-uniformity may include: the thickness increments of the multiple first sub-regions being different from each other, i.e., the film structures within different first sub-regions having different thicknesses; and at least two first sub-regions having the same thickness increment, while the thickness increments of the remaining first sub-regions are all different.

[0117] For example, as shown in Figure 4, sub-regions 2, 4, and 5 are the first sub-regions. The thickness of the membrane structure in these first sub-regions increases linearly. However, the thickness increments of sub-regions 2 and 4 can be the same, while the thickness increments of sub-regions 4 and 5 can be different. It should be noted that since the thickness of the membrane structure in the first sub-regions increases linearly, the first sub-regions have a slope. The thickness increment can be reflected as the slope of the first sub-region. Thus, the thickness increments of multiple first sub-regions are not completely the same, which can be reflected as the slopes of multiple first sub-regions being different.

[0118] In a further example, where the thickness increments of multiple first sub-regions are not exactly the same, the thickness increment of the first sub-region closer to the second region can be greater than the thickness increment of the first sub-region closer to the first region.

[0119] In this example, the slope of the first sub-region closer to the second region can be greater, that is, the thickness increment of the first sub-region closer to the second region is greater, as shown in Figure 4. Sub-regions 2, 4 and 5 are the first sub-regions. The thickness of the membrane structure in these first sub-regions increases linearly. The thickness increments of sub-regions 2 and 4 can be the same, and the thickness increment of sub-region 5 is greater than that of sub-region 4.

[0120] When this design is adopted, when the fabric passes through the third zone, the sub-region near the first zone has a greater obstruction to the fabric brushing liquid crystal. That is, in this sub-region, the step difference with the second zone is large, and the fabric is not easy to brush the liquid crystal. Therefore, the slope of the first sub-region near the first zone is set to be smaller, so that the slope of the first sub-region is gentler. This gentle slope can gradually reduce the step difference with the second zone, so that the fabric has a greater chance of brushing the liquid crystal in this area. On the other hand, the thickness of the first sub-region near the second zone is greater than the thickness of the first sub-region near the first zone, so that the first sub-region near the second zone itself has less obstruction to the fabric brushing liquid crystal. Therefore, a larger slope is allowed in this first sub-region.

[0121] Among them, some sub-regions in the multiple sub-regions are called the first sub-regions, and the sub-regions in the multiple sub-regions other than the first sub-regions can be called the second sub-regions. The thickness of the second sub-regions does not have to be linear. It can be sinusoidal, triangular, etc., without any special limitation.

[0122] In a further example of this embodiment, multiple first sub-regions may be spaced apart, and the multiple sub-regions may also include second sub-regions other than the first sub-regions, with the thickness uniformity of the second sub-regions being higher than that of the first sub-regions.

[0123] In this embodiment, multiple spaced-apart first sub-regions may be included, with a second sub-region spaced between each spaced-apart first sub-region. The thickness uniformity of the second sub-region may be higher than that of the first sub-regions. This thickness uniformity characterizes the variation range of the sub-region's thickness; higher uniformity indicates a greater variation range, and the sub-region tends to be flatter. Thus, the surface of the membrane structure located in the second sub-region can be flat, thereby making all or part of the membrane structure in the third region have a stepped structure.

[0124] In this design, some of the first sub-regions are spaced apart, as shown in Figure 4. Sub-regions 2, 4, and 5 are the first sub-regions, and the thickness of the film structure in these first sub-regions increases linearly. Sub-regions 2 and 4 are spaced apart, and a second sub-region 3 is located between these two first sub-regions. The uniformity of the film structure in the second sub-region 3 is higher than that in the second sub-region 2, such as when the thickness of the film structure in the second sub-region 3 is uniform. The thickness of the film structure in the second sub-region 2 increases linearly towards the second region.

[0125] In this case, all the first sub-regions in the multiple first sub-regions can also be arranged at intervals, and a second sub-region can be set between every two first sub-regions. Referring to Figure 6 below, Figure 6 shows a schematic diagram of the cross-sectional structure of another array substrate. As shown in Figure 6, it includes three sub-regions, sub-region 1, sub-region 2 and sub-region 3. Sub-region 1 and sub-region 3 are the first sub-regions, which are arranged at intervals. Sub-region 2 is the second sub-region. The thickness of the film structure in the second sub-region is uniform, which is reflected in the fact that the surface facing away from the substrate is a flat surface. Thus, the film structure in the third region presents a stepped morphology.

[0126] When using this example, the film structure in the third region can include at least one relatively flat step. This step further alleviates the steep slope between the first and second regions when there is a step difference between them. This increases the probability of the fabric coming into contact with the liquid crystal when passing through this region, enhances the uniformity of liquid crystal molecule orientation in this region, and further alleviates the defect of poor light leakage.

[0127] In order to achieve the non-uniform thickness of the membrane structure in the third region mentioned above, the following is an exemplary description of the membrane structure setup.

[0128] Please refer to Figures 3 and 6. The membrane structure includes the following membrane layers:

[0129] The gate insulating layer 15 is located on the side of the substrate near the pixel electrode;

[0130] The active layer 16 is located on the side of the gate insulating layer 15 that is away from the substrate;

[0131] The protective layer 17 is located on the side of the data line layer 12 that is away from the substrate.

[0132] Among them, the orthographic projection of the active layer 16 on the substrate overlaps with the orthographic projection of the data line layer on the substrate, and the orthographic projection of the protective layer 17 on the substrate covers the first region c, the third region b, and the second region a.

[0133] It should be noted that the orthographic projection of the active layer 16 on the substrate and the orthographic projection of the pixel electrode on the substrate may or may not overlap. Since the active layer 16 and the data line layer 12 exist in the second region, while the data line layer does not exist in the first region, the film thickness in the second region is greater than the film thicknesses in the third and first regions, thus creating a step difference. In this example, the thickness of the protective layer 17 in the third region can be set to make the film thickness of the protective layer 17 non-uniform in the third region; alternatively, the thickness of the protective layer 17 in the first region can be greater than the thickness of the protective layer in the second region, thereby reducing the step difference between the second and first regions and increasing the height of the pixel electrode on the substrate. The step difference can be less than the total thickness of the active layer and the data line layer.

[0134] In a further example of this embodiment, in addition to setting the thickness of the protective layer to be non-uniform in the third region, the thickness of the active layer in the third region can also be set to be non-uniform.

[0135] Please refer to Figure 6. The orthographic projection of the active layer on the substrate not only covers the orthographic projection of the data line layer on the substrate, but also overlaps with the third region, and does not overlap with the first region.

[0136] Among them, the thickness of the active layer located in the third region is not uniform, and / or the thickness of the protective layer located in the third region is not uniform.

[0137] In this example, as shown in Figure 6, the film structure in the third region consists of a gate insulating layer, an active layer, and a protective layer stacked sequentially. By adding an active layer, the thickness of the film structure in the third region can be increased, thereby reducing the steepness of the step difference between the first and second regions.

[0138] In this design, the active layer can have a non-uniform thickness within the third region, while the protective layer can have a uniform thickness within the same region. Since the protective layer is stacked on top of the active layer, the uniform thickness of the protective layer compared to the non-uniform thickness of the active layer results in different heights of the protective layer's surface facing away from the substrate. Figure 7 illustrates a case where the active layer has a non-uniform thickness, while the protective layer has a relatively uniform thickness within the third region. This approach reduces the difficulty of controlling the protective layer thickness and improves manufacturing efficiency.

[0139] In this design, the active layer can have a uniform thickness in the non-light-emitting region. In this case, the protective layer can have a non-uniform thickness in the third region. This allows the active layer to increase the thickness of certain areas of the film structure within the third region, thereby forming wedge-shaped, stepped, or other morphological structures. Referring to Figure 8, a case is shown where the active layer has a uniform thickness, while the protective layer has a non-uniform thickness in the third region. This approach reduces the difficulty of controlling the film thickness of the active layer and improves manufacturing efficiency.

[0140] The active layer in the non-light region may have a non-uniform thickness, and the protective layer in the third region may also have a non-uniform thickness. Referring to Figure 6, in the direction from the second region to the first region, the thickness of the active layer in the third region decreases, while the thickness of the protective layer in the third region may alternate between increasing and decreasing. Specifically, the morphology of the active layer in the non-light region may differ from that of the protective layer in the third region, and the degree of non-uniformity in the thickness of the active layer in the non-light region may differ from that of the protective layer in the third region.

[0141] It should be noted that, regardless of which setting is used in Figures 6-8, when the thickness of the membrane structure in the third region is not uniform, the membrane structure in the third region can exhibit wedge-shaped or step-shaped morphological features.

[0142] Using the film structure of this example, the active layer can form a vertical capacitor or a lateral capacitor with the pixel electrode. Specifically, when the orthographic projection of the active layer on the substrate does not overlap with the orthographic projection of the pixel electrode on the substrate, a lateral capacitor is formed between the active layer and the pixel electrode. When the orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the pixel electrode on the substrate, both a lateral capacitor and a vertical capacitor can be formed between the active layer and the pixel electrode simultaneously.

[0143] As the film thickness in the third region gradually decreases in the direction from the second region to the first region, and the protective layer thickness gradually decreases in the same direction, the capacitance formed between the active layer and the pixel electrode gradually decreases, thereby causing the pixel voltage corresponding to the pixel to gradually increase. Refer to the following formula (1):

[0144] In formula (1), VLC V is the pixel voltage. ITO C is the voltage of the pixel electrode. LC C1 is the capacitance of the liquid crystal capacitor, and C2 is the capacitance corresponding to the insulating region (third region). Since the thickness of the protective layer in the film structure decreases sequentially in the direction from the second region to the first region, the capacitance C1 in the third region can be reduced. According to the above formula (1), when C1 is reduced, the pixel voltage V LC Increasing the pixel voltage leads to a larger deflection angle of the liquid crystal molecules, improving light leakage at the pixel level and thus enhancing the product's contrast.

[0145] Therefore, when adopting this structural design, not only can the steepness of the slope caused by the step difference between the first and second zones be reduced, allowing the fabric to contact the liquid crystal in the third zone more likely, but the capacitance in this area can also be reduced, the pixel voltage increased, and the light leakage at the step difference improved, thereby increasing the contrast of the product.

[0146] In a further example of this embodiment, the thickness of the active layer located in the third region may be non-uniform. In practice, the active layer in the third region can be divided into multiple active regions. Among two adjacent active regions, the thickness of the active region closer to the second region is greater than the thickness of the active region closer to the first region.

[0147] Referring to Figures 6 and 7, when the thickness of the active layer within the third region is non-uniform, the thickness of the protective layer can be uniform or non-uniform. Specifically, in any two adjacent active regions, the thickness of the active region closer to the second region may be greater than the thickness of the active region closer to the first region. Therefore, in the direction from the second region to the first region, the thickness of the active layer gradually decreases; this gradual decrease can include both linear and non-linear reductions.

[0148] Referring to Figures 9 and 10, Figure 9 shows a cross-sectional structural schematic diagram of another array substrate, and Figure 10 shows a partially enlarged schematic diagram of the array substrate shown in Figures 6 and 7. As shown in Figures 9 and 10, when multiple active regions are included, the uniformity of the film thickness of different active regions can be different. Specifically, active regions with different degrees of uniformity can be staggered in the third region. For example, an active region with a more uniform film thickness can be spaced between two active regions with large film thickness variations.

[0149] In a further example of this embodiment, the plurality of active regions may include a plurality of first active regions 161 spaced apart, and a second active region 162 located between the first active regions; in the direction from the first region to the second region, the thickness of the first active region increases linearly, and the thickness uniformity of the second active region is higher than that of the first active region.

[0150] In this example, as shown in Figures 9 and 10, multiple active regions are included. In the direction from the first region to the second region, the film thickness of the multiple active regions gradually increases. The film thickness of the first active region increases linearly, thereby making the first active region wedge-shaped with a sloping edge. The first active regions are spaced apart, so that there are second active regions with relatively uniform film thickness between the first active regions. The film thickness of the active layer in the second active region is uniform, or at least the variation range of the film thickness of the active layer in the second active region is small, making its surface away from the substrate relatively flat.

[0151] For example, taking Figure 10 as an example, it includes four active regions, where active regions d1 and d3 are the first active regions, and active regions d2 and d4 are the second active regions. In the direction from the first region to the second region, the film thickness of the active layer in the first active region increases linearly, and the film thickness of the active layer in the second active region is uniform.

[0152] For example, taking Figure 9 as an example, there are two active regions, where active region d is the first active region and active region e is the second active region. In the direction from the first region to the second region, the film thickness of the active layer in the first active region increases linearly, while the film thickness of the active layer in the second active region is uniform.

[0153] When this design is adopted, since a lateral capacitance can be formed between the active layer and the pixel electrode, the film thickness of the active layer gradually decreases in the direction from the second region to the first region. Since a protective layer is stacked on the side of the active layer away from the substrate, the film thickness of the protective layer in the third region also needs to be gradually reduced. The gradual decrease in the film thickness of the active layer can reduce the capacitance in the third region, thereby increasing the pixel voltage.

[0154] Among them, when the thickness of the first active region increases linearly, the edge of the first active region has a slope, that is, the first active region exhibits a wedge-shaped morphological feature.

[0155] In a further example of this embodiment, the slopes of the slopes of the multiple first active zones may be consistent or inconsistent. In the case of inconsistency, the first slope of the slope of the first active zone closer to the first zone is greater than the second slope of the slope of the first active zone closer to the second zone.

[0156] Taking Figure 10 as an example, it includes four active regions. Active regions d1 and d3 are the first active regions, and active regions d2 and d4 are the second active regions. In the direction from the first region to the second region, the film thickness of the active layer in the first active region increases linearly. The first slope of the slope of active region d1 is greater than the second slope of the slope of active region d3. That is to say, the film thickness increment of the active layer in active region d1 per unit distance is greater than the film thickness increment of the active layer in active region d3 per unit distance.

[0157] This design makes the steps or wedge-shaped structure at the edge of the data line layer more obvious, that is, the film thickness gradually decreases, avoiding a cliff-like height difference.

[0158] In the slope setting of the first active area in this example, the first slope can be 20° to 30°, specifically 20°, 30°, 22°, or 25°. The second slope is less than the first slope. In practice, the second slope can be less than 20°, such as 19° or 18°, but the second slope is greater than 0°.

[0159] In the first active region setting of this example, the plurality of first active regions includes an end active region located at the end of the active layer, the distance between the end active region and the data line layer being 1.7μm to 2.7μm.

[0160] For example, as shown in Figure 9, the terminal active region is active region d, and as shown in Figure 10, the terminal active region is active region d1. The distance between the terminal active region and the second region can be 1.7μm, 2.7μm, 2μm, 2.5μm, etc.

[0161] In conjunction with the above embodiments, there is a step difference between the film structure in the first region and the film structure in the second region. In one film structure configuration, the step difference can be reduced, such as by making the step difference less than the total thickness of the functional layers, thereby increasing the height of the pixel electrode on the substrate. Specifically, when the film structure includes a protective layer, the thickness of the protective layer located in the second region can be less than the thickness of the protective layer located in the first region.

[0162] In this example, because the second region contains a data line layer and an active layer, while the first region does not, when the thickness of the protective layer in the second region is the same as the thickness of the protective layer in the first region, the step difference between the second and first regions is reflected in the thickness of the data line layer and the active layer.

[0163] If the thickness of the protective layer in the second region is less than that in the first region, the step difference caused by the presence of the data line layer and active layer in the second region can be reduced, thereby increasing the height of the pixel electrode.

[0164] For example, referring to FIG11, a cross-sectional structural schematic diagram of another array substrate is shown. As shown in FIG11, the thickness of the protective layer in the second region is less than the thickness of the protective layer in the first region. In this configuration, the thickness of the protective layer in the third region can be non-uniform, and the thickness of the protective layer in the third region can decrease sequentially in the direction from the second region to the first region. For example, as shown in FIG11, the protective layer in the third region has a wedge-shaped morphology, that is, it has a slope.

[0165] In one example of this embodiment, as shown in FIG11, the protective film layer may include a passivation layer located on the side of the data line layer facing away from the substrate. The passivation layer is projected onto the substrate into a first region, a third region, and a second region. The thickness of the passivation layer in the second region may be less than the thickness of the passivation layer in the first region. For example, the thickness of the passivation layer in the second region may be [missing information]. The thickness of the passivation layer in the first region can be

[0166] In forming the passivation layer in this example, after forming the passivation layer on the side of the data line layer away from the substrate, an ashing process is used to ashing the photoresist (PR) in the second region and etching part of the passivation layer, so that the thickness of the passivation layer in the second region is approximately [missing information]. The passivation layer in the first zone mainly protects the drain metal wire from corrosion by external moisture and other factors.

[0167] In one example of this embodiment, as shown in FIG12, FIG12 illustrates a cross-sectional structural schematic diagram of another array substrate. The protective film layer may include a passivation layer 171 and an organic film layer 172 formed on the side of the passivation layer 171 facing away from the substrate. When the protective layer includes a passivation layer and an organic film layer, the first thickness of the passivation layer located in the second region is less than the second thickness of the passivation layer located in the first region, and / or the thickness of the organic film layer located in the second region is less than the thickness of the organic film layer located in the first region, so that the thickness of the protective layer located in the second region is less than the thickness of the protective layer located in the first region.

[0168] In this embodiment, when forming the organic film layer, the leveling effect of the organic film layer can be utilized to make the thickness of the organic film layer in the second region less than its thickness in the first region. Alternatively, the thickness of the organic film layer is relatively uniform, and the first thickness of the passivation layer in the second region is less than its second thickness in the first region; or, the thickness of the organic film layer in the second region is less than its thickness in the first region, and the first thickness of the passivation layer in the second region is less than its second thickness in the first region.

[0169] In the third region, the total thickness of the organic film and passivation layer located in the third region may be non-uniform. For example, in the direction from the second region to the first region, the total thickness of the organic film and passivation layer may gradually decrease, and both the organic film and passivation layer have wedge-shaped morphological features.

[0170] In a further example of this embodiment, the first thickness is The second thickness is The thickness of the organic film layer is

[0171] Specifically, the first thickness can be or The second thickness can be or

[0172] The thickness of the organic film layer located in the first region can be 1.3 times the thickness of the organic film layer located in the second region.

[0173] In this example, when the passivation layer has a uniform thickness in the protective layer, and the organic film layer has a smaller thickness in the second region than in the first region, the thickness of the passivation layer can be [missing information]. That is, the thickness of the passivation layer in both the second and first regions can be The thickness of the organic film layer is

[0174] Where the organic film layer in the protective layer has a uniform thickness, and the passivation layer has a thinner thickness in the second region than in the first region, the first thickness of the passivation layer in the second region is [missing information]. The second thickness of the passivation layer in the first region is

[0175] In some embodiments, an auxiliary electrode 18 can be disposed on the side of the film structure facing away from the substrate. A planar electric field (also known as a reinforcing electric field) is formed between the auxiliary electrode 18 and the pixel electrode 11 to drive the deflection of liquid crystal molecules in the third region. Specifically, refer to Figures 13 and 14. Figure 13 shows a top planar schematic diagram of another array substrate, and Figure 14 shows a structural schematic diagram of the A-A' section of Figure 13. As shown in Figures 13 and 14, the array substrate also includes an auxiliary electrode, which is disposed on the same layer as the pixel electrode and close to the pixel electrode; wherein, the auxiliary electrode and the data line layer are both located on the same side of the pixel electrode.

[0176] In this embodiment, the auxiliary electrode can be located on the side of the protective film layer facing away from the substrate. A planar electric field can be formed between the auxiliary electrode and the pixel electrode in the third region, thereby driving the deflection of the liquid crystal in the third region to improve light leakage and enhance contrast. Specifically, the orthogonal projection of the auxiliary electrode on the substrate may not overlap with the orthogonal projection of the data line layer on the substrate. In this case, the auxiliary electrode can be disposed in the third region and spaced apart from the pixel electrode. Alternatively, the orthogonal projection of the auxiliary electrode on the substrate may overlap with the orthogonal projection of the data line layer on the substrate. This overlap may include the orthogonal projection of the auxiliary electrode on the substrate being covered by the orthogonal projection of the data line layer on the substrate, or the orthogonal projection of the auxiliary electrode on the substrate covering the orthogonal projection of the data line layer on the substrate.

[0177] In the case where the orthogonal projection of the auxiliary electrode on the substrate is covered by the orthogonal projection of the data line layer on the substrate, the auxiliary electrode is located in the second region; in the case where the orthogonal projection of the auxiliary electrode on the substrate covers the orthogonal projection of the data line layer on the substrate, the auxiliary electrode can span the second and third regions, that is, the orthogonal projection of the auxiliary electrode on the substrate can cover the orthogonal projection of the data line layer on the substrate and overlap with the third region.

[0178] As shown in Figure 13, two adjacent pixel regions can share a single auxiliary electrode. More specifically, multiple pixel regions can be arranged in an array on the substrate, such as in multiple rows and columns, in which case pixel regions in two adjacent columns can share a single auxiliary electrode.

[0179] In this embodiment, the auxiliary electrode may have the same voltage as the pixel electrode or a different voltage. Further details will not be provided here.

[0180] Based on the same inventive concept, another embodiment of this disclosure provides an array substrate. This array substrate primarily achieves this by adding an auxiliary electrode in the same layer as the pixel electrode in the second region, thereby creating a planar electric field between the auxiliary electrode and the pixel electrode, which in turn drives the deflection of liquid crystal molecules in the third region. Referring to Figures 13 and 14, the array substrate of this embodiment may include:

[0181] A substrate, on which multiple pixel regions are disposed, the pixel regions including a first region, a second region, and a third region located between the first region and the second region;

[0182] Pixel electrodes are located within the first region;

[0183] A film structure is located between a substrate and a pixel electrode. The film structure includes a data line layer located within a second region. The film structure in the second region has a step difference from the film structure in the first region.

[0184] The auxiliary electrode is located on the same layer as the pixel electrode and close to it. The auxiliary electrode is located on one side of the third region of the pixel electrode.

[0185] In this embodiment, the common electrode and the pixel electrode are both located on one side of the substrate, and can be disposed in the same layer or in different layers, thereby forming a planar electric field on the same side of the liquid crystal to drive the liquid crystal deflection. When disposed in different layers, the common electrode can be located on the side of the pixel electrode closer to the substrate or on the side of the pixel electrode away from the substrate, and the common electrode can cover the entire substrate.

[0186] The substrate can be a glass substrate, which includes multiple pixel regions. Each pixel region can be understood as a sub-pixel. The pixel region can include a first region, a second region, and a third region located between the first and second regions. The first region can be understood as the region where the pixel electrode is located, that is, the first region includes the pixel electrode. For example, the first region can be the region where the orthogonal projection of the pixel electrode is located on the substrate. In the first region, an electric field is formed between the pixel electrode and the common electrode, and the liquid crystal formed on the array substrate is deflected under the drive of the electric field.

[0187] As shown in Figure 13, the substrate includes multiple gate lines 13 and multiple data lines 12. The gate lines 13 and data lines 12 intersect to define a pixel region 101. The gate lines provide scanning signals to the pixel region, and the data lines provide data signals to the pixel region. As shown in Figure 13, each pixel region also includes a TFT thin-film transistor switch. The thin-film transistor switch may include a gate 41 connected to the gate line, a source 43 connected to the data line, and a drain 42 connected to the pixel electrode. The gate, source, and drain constitute a TFT switch. In practice, the voltage provided to the TFT switch on the gate line can be used to turn the TFT switch on or off. When the switch is on, the voltage provided to the TFT switch by the data line can be transmitted to the drain and then to the pixel electrode, thereby forming an electric field between the pixel electrode and the common electrode to drive the liquid crystal deflection.

[0188] In this example, pixel region 101 is defined as the area bounded by the intersection of data lines and gate lines. The area where the data lines are located is called the second region a. This second region a can be considered as part of the pixel region. Therefore, pixel region 101 can include the second region a, the first region c, and the third region b located between the second region a and the first region c. The third region b can be understood as the area in the pixel region that is not covered by the pixel electrode and the second region. That is, the orthogonal projection of the pixel electrode on the substrate can not overlap with the third region b, and the third region b does not overlap with the second region. As shown in Figure 3, in some examples, the orthogonal projection of the data lines on the substrate can cover the second region and partially overlap with the third region.

[0189] As shown in Figure 3, a film structure is formed between the pixel electrode 11 and the substrate 10. The orthogonal projection of this film structure onto the substrate can cover the second region, the first region, and the third region. The film structure includes at least a data line layer, which is the film layer containing the data lines. As mentioned above, the orthogonal projection of the data line layer onto the substrate overlaps with the second region. Specifically, the orthogonal projection of the data lines onto the substrate can cover the second region and partially overlaps with the third region.

[0190] In this embodiment, there is a step difference between the film structure in the second region and the film structure in the first region. Specifically, the thickness of the film structure in the first region is less than the thickness of the film structure in the second region. Alternatively, in some other cases, the thickness of the film structure in the first region is greater than the thickness of the film structure in the second region. As shown in Figure 14, the step difference between the film structures in the second and first regions may be due to the inclusion of a data line layer and other film layers associated with the data line layer, such as a gate layer and an active layer, in the second region, resulting in a greater number of film layers in the second region than in the first region, thus creating a step difference between the film structures in the second and first regions.

[0191] In this embodiment, the film layer structure is a collective term for multiple film layers located between the pixel electrode and the substrate, as shown in FIG14. The film layer structure may include: a gate insulating layer 15, an active layer 16 located on the side of the gate insulating layer 15 facing away from the substrate 10, wherein the data line layer 12 is located on the side of the active layer 17 facing away from the substrate 10, and a protective layer 17 located on the side of the data line layer 12 facing away from the substrate 10. Since there is a step difference between the film layer structure located in the first region and the film layer structure located in the second region, this step difference is caused by the different number of film layers included in the film layer structure in different regions. The data line layer has a second region and a part of a third region. The orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate. This overlap may mean that they are identical, or the orthographic projection of the active layer on the substrate covers the orthographic projection of the data line layer on the substrate.

[0192] In this embodiment, an auxiliary electrode is provided on the side of the film structure away from the substrate. The auxiliary electrode can be disposed in the same layer as the pixel electrode, and there is a gap between the auxiliary electrode and the pixel electrode. This gap is located in the third region. As a result, a planar electric field can be formed between the auxiliary electrode and the pixel electrode. This planar electric field can strengthen the electric field between the pixel electrode and the common electrode, drive the liquid crystal molecules in the friction weak region (i.e., the third region) to deflect normally, improve the light leakage at the step difference, and thus improve the contrast of the product.

[0193] The auxiliary electrode can be formed using the same photomask as the pixel electrode. The voltage of the auxiliary electrode can be the same as or different from the pixel voltage, which will not be elaborated here.

[0194] In some embodiments, the orthographic projection of the auxiliary electrode on the substrate overlaps with the orthographic projection of the data line layer on the substrate. This overlap may include: the orthographic projection of the auxiliary electrode on the substrate covering the orthographic projection of the data line layer on the substrate; the orthographic projection of the auxiliary electrode on the substrate falling within the orthographic projection of the data line layer on the substrate; or a partial overlap between the orthographic projection of the auxiliary electrode on the substrate and the orthographic projection of the data line layer on the substrate.

[0195] The auxiliary electrode can be connected to the data line layer through a through-hole in the protective layer 17. This reduces the difficulty of creating a through-hole in the protective layer when the auxiliary electrode and the data line layer overlap.

[0196] Referring to FIG15, a top planar schematic diagram of another array substrate is shown. As shown in FIG15, it includes multiple pixel regions arranged in an array on the substrate, including adjacent first pixel regions and second pixel regions. The data line layer is located between the first pixel regions and the second pixel regions. In this example, the orthographic projection of the auxiliary electrode on the substrate overlaps with the third region in the first pixel region and the third region in the second pixel region.

[0197] In this example, the orthographic projection of the auxiliary electrode on the substrate covers the orthographic projection of the data line layer on the substrate and partially overlaps with the third region, as shown in Figures 13 and 15. The same auxiliary electrode can simultaneously form a reinforcing electric field in the third region of the first pixel region and the third region of the second pixel region. In this way, the first pixel region and the second pixel region share a single auxiliary electrode, thereby simplifying the driving of the array substrate.

[0198] Referring again to Figure 15, multiple pixel regions are arranged in an array on the substrate. If they are arranged in multiple rows and columns, pixel regions in two adjacent columns can share a single auxiliary electrode. Specifically, multiple third pixel regions are arranged in the extension direction of the data line layer; wherein, the orthographic projection of the auxiliary electrode onto the vertical plane of the substrate covers the orthographic projection of the multiple third pixel regions onto the vertical plane.

[0199] In this example, the auxiliary electrode can be set along the extension direction of the data line. If there are n data lines, there can be n auxiliary electrodes, so that the pixel areas arranged in adjacent columns can share one auxiliary electrode. The auxiliary electrode can simultaneously form a reinforcing electric field with the pixel electrodes on both sides, thereby simplifying the driving of the array substrate.

[0200] In some embodiments, the thickness of the membrane structure located in the third region is non-uniform, and / or the step difference is less than the total thickness of the functional layers in the membrane structure, which may include a data line layer and an active layer. That is, in some embodiments, the thickness of the membrane structure located in the third region is non-uniform; in other embodiments, the difference between the total thickness of the membrane structure located in the second region and the total thickness of the membrane structure located in the first region is less than the total thickness of the data line layer and the active layer. In still other embodiments, the thickness of the membrane structure located in the third region is non-uniform, and the step difference is less than the total thickness of the data line layer and the active layer.

[0201] In one method of achieving non-uniform thickness of the film structure in the third region, the thickness of the film structure in the third region can gradually increase in the direction from the first region to the second region. This gradual increase can include linear and non-linear increases. With a linear increase, the film structure in the third region exhibits a wedge-shaped morphology. With a non-linear increase, the film structure in the third region can exhibit a step-shaped morphology or a continuous slope with varying gradients. This arrangement increases the probability of the fabric fibers contacting the liquid crystal in the third region, thereby allowing the alignment film in the third region to be fully rubbed and oriented, improving the rubbed orientation in this area.

[0202] In the case of non-linear addition, the embodiments described in Figures 3-8 above can be referred to, and will not be repeated in this embodiment.

[0203] Specifically, in the implementation of a non-uniform film structure located in the third region, the orthographic projection of the active layer in the protective layer onto the substrate can overlap with the third region but not with the first region. With this configuration, light leakage can be improved by adjusting the morphology of the active layer.

[0204] As shown in Figures 6 and 7, the orthographic projection of the active layer on the substrate also overlaps with the third region, and the active layer in the third region includes multiple active regions. In the direction from the first region to the second region, the thickness of at least one active region increases linearly.

[0205] In this embodiment, when multiple active regions are included, the thickness of the active region closer to the first region is less than the thickness of the active region closer to the second region. Furthermore, the thicknesses of the multiple active regions are different, and at least one active region has a linearly increasing thickness. This active region with a linearly increasing thickness is called the first active region, which has a wedge-shaped morphology with a slope at its edge.

[0206] The film thickness uniformity of the second active region (excluding the first active region) is higher than that of the first active region.

[0207] The uniformity of film thickness in different active regions can vary. Specifically, active regions with different degrees of uniformity can be staggered in the third region. For example, a second active region with a relatively uniform film thickness can be spaced between two first active regions with large film thickness variations.

[0208] As shown in Figures 6 and 7, the system may include multiple first active regions, which are spaced apart. The remaining second active regions have a uniform thickness, and the slopes of the slopes of the different first active regions may be different. More specifically, the first slope of the slope of the first active region closer to the first region may be greater than the second slope of the slope of the first active region closer to the second region.

[0209] Furthermore, the first slope can be 20° to 30°, specifically 20°, 30°, 22°, or 25°. The second slope is less than the first slope. In practice, the second slope can be less than 20°, such as 19° or 18°, but the second slope is greater than 0°.

[0210] More specifically, the plurality of first active regions includes an end active region located at the end of the active layer, the distance between the end active region and the second region being 1.7 μm to 2.7 μm.

[0211] By adopting the technical solution of this embodiment, since the thickness of the active layer gradually decreases in the direction from the second region to the first region, and the thickness of the protective layer in the third region also gradually decreases, the capacitance between the active layer and the pixel electrode can be reduced. Thus, according to the above-disclosed formula (1), the pixel voltage can be increased, so that the liquid crystal molecules in the weakly rubbed alignment region (third region) can be deflected normally, thereby improving light leakage and increasing contrast.

[0212] In some other embodiments, since the step difference is less than the thickness of the data line layer and the active layer, the thickness of the protective layer in the second region can be less than the thickness of the protective layer in the first region, thereby mitigating the impact of the step difference caused by the presence of the data line layer and the active layer in the second region, thus raising the height of the pixel electrode on the substrate and reducing the step difference.

[0213] The protective layer may include a passivation layer, and the thickness of the passivation layer in the second region may be [missing information]. The thickness of the passivation layer in the first region can be

[0214] The protective layer may include a passivation layer and an organic film layer located on the side of the passivation layer facing away from the substrate. The thickness of the passivation layer can be [missing information]. The thickness of the organic film layer located in the second region is less than the thickness of the organic film layer located in the first region; the thickness of the organic film layer can be...

[0215] The thickness of the protective layer located in the third zone may be uneven, and its specific setting can be referred to the above embodiment, which will not be repeated here.

[0216] The array substrate proposed in the above embodiments will be illustrated below with reference to several specific examples.

[0217] Example 1 provides an array substrate A

[0218] Referring to Figure 6, it includes:

[0219] The substrate 10 includes multiple pixel regions, each pixel region being a region defined by the intersection of gate lines and data lines; the pixel regions include a first region, a second region, and a third region located between the first and second regions.

[0220] Pixel electrode 11 is located in the first region;

[0221] The film structure, located between the pixel electrode and the substrate, includes a gate insulating layer 15, an active layer 16 located on the side of the gate insulating layer 15 facing away from the substrate, a data line layer 12 located on the side of the active layer 16 facing away from the substrate, and a passivation layer 171 located on the side of the data line layer facing away from the substrate. The gate insulating layer 15 and the passivation layer 171 cover the entire substrate. The orthographic projection of the active layer 16 on the substrate covers the data line layer and partially overlaps with the third region, while not overlapping with the first region. The orthographic projection of the data line layer 12 on the substrate covers the second region and partially overlaps with the third region, while not overlapping with the first region.

[0222] The film structure in the third region of the array substrate A includes a gate insulating layer 15, an active layer 16, and a passivation layer 171. The thickness of the gate insulating layer 15 is uniform. However, the total thickness of the active layer 16 and the passivation layer 171 in the third region is not uniform. Specifically, in the direction from the first region to the second region, the total thickness of the active layer 16 and the passivation layer 171 in the third region gradually increases, and this gradual increase is non-linear.

[0223] Specifically, for the active layer in the third region, the active layer includes multiple active regions, which include multiple first active regions spaced apart, and second active regions located between the first active regions. In the direction from the first region to the second region, the thickness of the active layer in the first active region increases linearly, while the thickness of the active layer in the second active region is uniform. More specifically, the first slope of the slope of the first active region (end active region) at the end of the active layer is 20° to 30°, and the distance between the end first active region (end active region) and the data line layer is 1.7μm to 2.7μm. The first slope of the slope of the other first active region is less than 20° and greater than 0°.

[0224] The thickness of the passivation layer in the third region can be non-uniform. Specifically, by setting the thickness of the passivation layer in the third region, the distance between the surface of the passivation layer away from the substrate and the substrate gradually increases. This gradual increase can include linear increase and non-linear increase, and in array substrate A, it is a non-linear increase.

[0225] Therefore, by setting the active layer and passivation layer in the third region, the membrane structure in the third region has the following characteristics: the third region includes multiple sub-regions; there are multiple spaced first sub-regions in the multiple sub-regions; in the direction of the first region toward the second region, the thickness of the membrane structure in the first sub-region increases linearly; the thickness of the membrane structure in the second sub-regions other than the first sub-regions in the multiple sub-regions is uniform; thus, the membrane structure in the third region forms a stepped structure.

[0226] Specifically, when fabricating array substrate A, referring to Figure 16, a schematic diagram of the process flow for array substrate A is shown. As shown in Figure 16, the process fabrication steps are as follows:

[0227] A gate metal layer is fabricated on a glass substrate, and then a gate insulating layer, an active layer, and a source / drain metal layer are deposited on the gate metal layer to form the thin film transistor and data line layer shown in Figures 2 and 13. Finally, photoresist (PR) is coated, exposed, and developed on its surface. A half-tone is added to the edge of the drain (data line) of the half-tone mask (HTM). After exposure, a thinner PR is formed at the edge of the drain (data line). During the subsequent dry etching process, the thin PR at the edge is laterally recessed. After etching, the gate insulating layer and the active layer form a stepped or wedge-shaped film structure.

[0228] Based on the above, the first wet etching is performed, and the source / drain metal layer is etched into the PR resist, exposing the active layer, as shown in Figure 16(a);

[0229] Based on the above, the first dry etching is performed to etch away the active layer in the pixel area. At the same time, since there is a thinner photoresist (PR) at the edge of the drain (Data Line), when etching the active layer in the pixel area, the thin photoresist (PR) at the edge of the drain (Data Line) will be laterally recessed (ashed), and the active layer near the edge of the drain (Data Line) will be partially etched away, eventually forming a stepped or wedge-shaped film structure, as shown in Figure 16(b).

[0230] In the process of dry etching to form the active layer, as the size of the half-tone increases, the slope of the thin photoresist (PR) at the edge of the data line decreases, the lateral recess (ashing) increases, and the distance between the first step and the data line increases. Specifically, when the size of the half-tone is between 2.3 μm and 3.8 μm, the distance between the first step and the data line is approximately 1.7 μm to 2.7 μm, the slope of the first step is 20° to 30°, and the slopes of the remaining steps are all less than 20°. Furthermore, the ashing gas combination is O2, NF3 / O2, the gas flow rate is 2000–15000 sccm, 200–2000 / 2000–15000 sccm, the power (Source / Bias) is 5–15 / 5–15 kW, the gas pressure is 20–70 mT, and the ashing time is 40–80 s.

[0231] Based on the above, a second wet etching is performed to form the source / drain metal layer, ensuring that there is no metal residue and some active layer etching in the TFT channel. At the same time, the step or wedge structure at the edge of the drain (data line) is more obvious, that is, the film thickness gradually decreases, avoiding the appearance of a cliff-like height difference, as shown in Figure 16(c).

[0232] Based on the above, a metal protective layer (passivation layer) and pixel electrodes are fabricated to finally form an array substrate, as shown in Figure 16(c).

[0233] After fabrication, the original film structure of the drain (data line), i.e., the region near the data line layer, is shown in Figure 17. The scanning electron microscope image of the film structure in this embodiment is shown in Figure 18. It should be noted that both Figure 17 and Figure 18 show the morphology of the active layer below the data line layer.

[0234] Using the array substrate of this embodiment, on the one hand, a lateral capacitor is formed between the active layer and the pixel electrode. Compared with the setting of the third region in related technologies, the capacitance of the lateral capacitor is smaller, which can increase the pixel voltage, thereby enabling the liquid crystal in the third region to deflect normally and improve light leakage. On the other hand, since the thickness of the film structure in the third region gradually increases in the direction from the first region to the second region, the steep slope between the first region and the second region can be reduced, thereby increasing the probability of the fabric contacting the liquid crystal in this region, so that the liquid crystal in this region can be uniformly oriented.

[0235] Example 2 provides an array substrate B

[0236] The array substrate B can be seen with reference to Figures 3 and 1. Unlike Example 1, in this Example 2, the orthographic projection of the active layer on the substrate coincides with the orthographic projection of the data line layer on the substrate, and the film thickness of the active layer is uniform.

[0237] The film structure located in the third region includes a passivation layer and a gate insulating layer. The thickness of the gate insulating layer is uniform, while the thickness of the passivation layer is non-uniform. Specifically, in the direction from the first region to the second region, the thickness of the passivation layer in the third region gradually increases, and this gradual increase is non-linear.

[0238] The passivation layer in the third region includes five sub-regions. Sub-regions 2, 4, and 5 are the first sub-regions, and their film thickness increases linearly in the direction from the first region to the second region. Sub-regions 1 and 3 are the second sub-regions, and the thickness of the passivation layer in the second sub-regions is uniform. Specifically, the increase in the thickness of the passivation layer per unit distance in sub-region 2 is less than the increase in the thickness of the passivation layer per unit distance in sub-region 4, and the increase in the thickness of the passivation layer per unit distance in sub-region 4 is less than the increase in the thickness of the passivation layer per unit distance in sub-region 5.

[0239] The detailed fabrication process for array substrate B is as follows:

[0240] S1: Sequentially fabricate a gate metal layer, a gate insulating layer, an active layer, and a source / drain metal layer on a glass substrate;

[0241] S2: A passivation layer is fabricated on the substrate obtained in S1 above. The surface of this passivation layer is coated with photoresist (PR), exposed, and developed. The mask is either a photoresist with a gradient in transmittance or a photoresist with a gradient in stripe spacing. A dry etching process is used to first etch and form source conductive vias. Then, an ashing process is used to ashing the unexposed areas of the photoresist (PR) and etching the passivation layer. Because a photoresist with a gradient in transmittance or a photoresist with a gradient in stripe spacing is used, the photoresist film thickness gradually decreases away from the drain (Data Line), causing the passivation layer thickness above the drain (Data Line) to gradually increase, forming a step or wedge-shaped structure.

[0242] S3: Pixel electrodes are fabricated on the substrate obtained in S2 above, and finally an array substrate is formed.

[0243] After fabrication, the original film structure of the drain (Data Line), i.e., the area near the data line layer, is shown in Figure 19. The scanning electron microscope image of the film structure in this embodiment can be seen in Figure 20.

[0244] Example 3 provides an array substrate C

[0245] The array substrate C can be seen with reference to Figures 12 and 2, but differs from Examples 1 and 2 in that:

[0246] An organic film layer 172 is formed on the side of the passivation layer away from the substrate. Due to the leveling effect, the organic film layer reduces the film step difference between the drain (data line) and the adjacent pixel region (pixel), thereby reducing the step difference between the first region and the second region.

[0247] The thickness of the organic film layer located in the second region is less than the thickness of the organic film layer located in the first region; the thickness of the organic film layer is approximately... The organic film layer is made of insulating material.

[0248] The fabrication steps for array substrate C are as follows:

[0249] S1: Sequentially fabricate the gate metal layer, gate insulating layer, active layer, and source / drain metal layer on the glass substrate.

[0250] S2: A passivation layer and an organic insulating layer are fabricated on the substrate obtained in S1. The surface of the passivation layer is then coated with photoresist (PR), exposed, developed, and etched to form source conductive vias. The passivation layer primarily protects the TFT channel from external contamination, and its thickness is approximately [missing information]. The thickness of the organic film insulating layer is approximately Because organic membranes have a leveling effect.

[0251] Example 4 provides an array substrate D

[0252] The array substrate C can be seen with reference to Figures 11 and 2. Unlike Examples 1 and 2, the thickness of the passivation layer in the first region is greater than the thickness of the passivation layer in the second region, so that the step difference between the first region and the second region is less than the thickness of the data line layer and the active layer.

[0253] Its production method is as follows:

[0254] S1: Sequentially fabricate a gate metal layer, a gate insulating layer, an active layer, and a source / drain metal layer on a glass substrate;

[0255] S2: A passivation layer is fabricated on the substrate obtained in S1. The surface is coated with photoresist (PR), exposed, and developed. A half-tone mask is added above the data lines. A dry etching process is used to first etch source conductive vias, followed by an ashing process to ashing the photoresist (PR) above the data line layer and etching part of the passivation layer. The remaining passivation layer thickness is approximately [missing information]. The passivation layer in the first region primarily protects the drain metal wire from corrosion by external moisture and other contaminants; its thickness is [missing information].

[0256] Example 5 provides an array substrate E

[0257] Referring to Figures 13 and 14, unlike the array substrates in Examples 1-4, this array substrate includes an auxiliary electrode. The auxiliary electrode is located on the side of the passivation layer away from the substrate, and is on the same layer as the pixel electrode and disposed close to the pixel electrode. The orthographic projection of the auxiliary electrode on the substrate overlaps with the orthographic projection of the data line layer on the substrate. The auxiliary electrode can form a reinforcing electric field with the pixel electrode in the third region, driving the liquid crystal molecules in this region to deflect normally and improve light leakage.

[0258] The auxiliary electrode can have the same voltage as the pixel electrode or a different voltage. The specific voltage can be adjusted according to the light leakage of the product. The auxiliary electrode can form a reinforcing electric field at the edge of the region above the drain (data line), so that the liquid crystal molecules in the weak friction area can be deflected normally, improve the poor light leakage at the step difference, and thus improve the contrast of the product.

[0259] The detailed manufacturing process is as follows:

[0260] S1: Sequentially fabricate a gate metal layer, a gate insulating layer, an active layer, a source / drain metal layer, and a passivation layer on a glass substrate;

[0261] S2: On the substrate obtained in S1 above, auxiliary electrodes and pixel electrodes are fabricated. The auxiliary electrodes and pixel electrodes are on the same layer and are formed by the same photomask, and finally an array substrate is formed.

[0262] Example 6 provides an array substrate F

[0263] The array substrate F is a combination of Example 1 and Example 5, that is, based on the array substrate of Example 1, an auxiliary electrode is also provided.

[0264] Example 7 provides an array substrate G

[0265] The array substrate G is a combination of Example 1 and Example 3. That is, based on the fact that the array substrate of Example 1 can reduce the steep slope between the first region and the second region, the thickness of the passivation layer in the second region is less than the thickness of the passivation layer in the first region, so as to increase the height of the pixel electrode on the substrate and reduce the step difference.

[0266] Example 8 provides an array substrate H

[0267] The array substrate H is a combination of Example 1 and Example 4. That is, based on the fact that the array substrate of Example 1 can reduce the steep slope between the first region and the second region, an organic film layer is also provided on the side of the passivation layer away from the substrate. The thickness of the organic film layer in the second region is less than the thickness of the organic film layer in the first region, so as to increase the height of the pixel electrode on the substrate and reduce the step difference.

[0268] Based on the same inventive concept, this disclosure also provides a display substrate, which is an LCD substrate. Referring to FIG21, a cross-sectional structural schematic diagram of the display substrate is shown. As shown in FIG21, it includes the array substrate 100 described in the above embodiment, and the opposing substrate 200 disposed opposite to the array substrate 100, with liquid crystal 300 filling the space between the opposing substrate and the array substrate.

[0269] The opposing substrate can be a color filter substrate, and the display substrate can be an ADS type display substrate.

[0270] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0271] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0272] The array substrate and display substrate provided in this disclosure have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this disclosure. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this disclosure. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this disclosure. Therefore, the content of this specification should not be construed as a limitation of this disclosure.

[0273] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0274] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

[0275] The terms "an embodiment," "embodiment," or "one or more embodiments" as used herein mean that a particular feature, structure, or characteristic described in connection with an embodiment is included in at least one embodiment of this disclosure. Furthermore, please note that the examples of the phrase "in one embodiment" do not necessarily all refer to the same embodiment.

[0276] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of this disclosure may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0277] In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. This disclosure can be implemented by means of hardware comprising a plurality of different elements and by means of a suitably programmed computer. In a unit claim enumerating a plurality of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0278] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit them. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

Claims

1. An array substrate, wherein, include: A substrate, the substrate including a plurality of pixel regions, the pixel regions including a first region, a second region and a third region located between the first region and the second region; Pixel electrodes, located in the first region; and, A film structure is located between the pixel electrode and the substrate. The film structure includes a data line layer. The orthographic projection of the data line layer on the substrate overlaps with the second region but does not overlap with the first region. The film structure located in the second region has a step difference from the film structure located in the first region. The thickness of the membrane structure located in the third region is not uniform, and / or the step difference is less than the total thickness of the functional layers in the membrane structure, wherein the functional layers include the data line layer.

2. The array substrate according to claim 1, wherein, The thickness of the membrane structure located in the third region is not uniform; the third region includes multiple sub-regions. Among the two adjacent sub-regions, the thickness of the membrane structure in the sub-region closer to the second region is greater than the thickness of the membrane structure in the sub-region closer to the first region.

3. The array substrate according to claim 2, wherein, In the direction from the first region to the second region, the thickness of the membrane structure in the plurality of sub-regions gradually increases.

4. The array substrate according to claim 2, wherein, At least one first sub-region exists among the multiple sub-regions, and the thickness of the membrane structure within the first sub-region increases linearly in the direction from the first region toward the second region.

5. The array substrate according to claim 4, wherein, It includes multiple first sub-regions, and the thickness increments of the multiple first sub-regions are not exactly the same.

6. The array substrate according to claim 5, wherein, It includes multiple first sub-regions, and the thickness increment of the first sub-region closer to the second region is greater than the thickness increment of the first sub-region closer to the first region.

7. The array substrate according to claim 4, wherein, This includes the first sub-region, which is set at multiple intervals. The plurality of sub-regions also include a second sub-region in addition to the first sub-region, the third... The thickness uniformity of the second sub-region is higher than that of the first sub-region.

8. The array substrate according to any one of claims 1-7, wherein, The membrane structure further includes: An active layer is located on the side of the data line layer closest to the substrate, and the orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate. A protective layer is located on the side of the data line layer opposite to the substrate. The protective layer includes an insulating material, and its orthographic projection on the substrate covers the first region, the third region, and the second region.

9. The array substrate according to claim 8, wherein, The orthographic projection of the active layer onto the substrate also overlaps with the third region; The thickness of the active layer located in the third region is not uniform, and / or the thickness of the protective layer located in the third region is not uniform.

10. The array substrate according to claim 9, wherein, The active layer located in the third region has a non-uniform thickness, and the active layer in the third region includes multiple active regions; Among the two adjacent active regions, the thickness of the active region closer to the second region is greater than the thickness of the active region closer to the first region.

11. The array substrate according to claim 10, wherein, The plurality of active regions include a plurality of first active regions spaced apart, and a second active region other than the first active regions; In the direction from the first region to the second region, the thickness of the first active region increases linearly, and the thickness uniformity of the second active region is higher than that of the first active region.

12. The array substrate according to claim 11, wherein, The edge of the first active region has a slope, wherein the first slope of the slope of the first active region closer to the first region is greater than the second slope of the slope of the first active region closer to the second region.

13. The array substrate according to claim 12, wherein, The first slope is 20° to 30°, and the second slope is less than 20°.

14. The array substrate according to claim 11, wherein, The plurality of first active regions includes an end active region located at the end of the active layer, and the distance between the end active region and the second region is 1.7 μm to 2.7 μm.

15. The array substrate according to claim 8, wherein, The step difference is less than the total thickness of the active layer and the data line layer; The thickness of the protective layer located in the second region is less than the thickness of the protective layer located in the first region.

16. The array substrate according to claim 15, wherein, The protective layer includes: A passivation layer is located on the side of the data line layer that faces away from the substrate; An organic film layer is located on the side of the passivation layer opposite to the substrate; Wherein, the first thickness of the passivation layer located in the second region is less than the second thickness of the passivation layer located in the first region, and / or the thickness of the organic film layer located in the second region is less than the thickness of the organic film layer located in the first region.

17. The array substrate according to claim 14, wherein, The first thickness is The second thickness is The thickness of the organic film layer is 18. The array substrate according to claim 1, wherein, The array substrate further includes: An auxiliary electrode is disposed on the same layer as the pixel electrode and close to the pixel electrode; wherein the auxiliary electrode and the data line layer are both located on the same side of the pixel electrode.

19. An array substrate, wherein, include: A substrate on which multiple pixel regions are disposed, the pixel regions including a first region, a second region, and a third region located between the first region and the second region; The pixel electrode is located within the first region; A film structure is located between the substrate and the pixel electrode. The film structure includes a data line layer. The orthographic projection of the data line layer onto the substrate overlaps with the second region but not with the first region. A step difference exists between the film structure located in the second region and the film structure located in the first region. An auxiliary electrode is disposed on the same layer as the pixel electrode and close to the pixel electrode, and the auxiliary electrode is located on one side of the third region of the pixel electrode.

20. The array substrate according to claim 19, wherein, The orthographic projection of the auxiliary electrode on the substrate overlaps with the orthographic projection of the data line layer on the substrate.

21. The array substrate according to claim 19, wherein, It includes two adjacent first pixel regions and second pixel regions; Wherein, the orthographic projection of the auxiliary electrode on the substrate is parallel to the first pixel region. The third region and the third region within the second pixel region overlap.

22. The array substrate according to claim 19, wherein, Multiple third pixel regions are arranged in the extending direction of the data line layer; The orthographic projection of the auxiliary electrode onto the vertical plane of the substrate covers the orthographic projection of the multiple third pixel regions onto the vertical plane.

23. The array substrate according to claim 19, wherein, The thickness of the membrane structure located in the third region is not uniform; and / or, the step difference is less than the total thickness of the functional layers in the membrane structure, the functional layers including the data line layer.

24. The array substrate according to claim 23, wherein, The thickness of the membrane structure located in the third region is not uniform, and the second region includes multiple sub-regions; wherein the thickness of the membrane structure in the sub-region closer to the second region is greater than the thickness of the membrane structure in the sub-region closer to the first region.

25. The array substrate according to claim 23, wherein, The thickness of the membrane structure located in the third region is not uniform, and the membrane structure further includes: An active layer is located on the side of the data line layer closest to the substrate, and the orthographic projection of the active layer on the substrate overlaps with the orthographic projection of the data line layer on the substrate. A protective layer is located on the side of the data line layer facing away from the substrate, and the orthographic projection of the protective layer on the substrate covers the first region, the third region, and the second region; The orthographic projection of the active layer on the substrate overlaps with the third region, and the active layer in the third region includes multiple active regions. In the direction from the first region to the second region, the thickness of at least one active region increases linearly.

26. A display substrate, wherein, It includes an array substrate as described in any one of claims 1-18 or any one of claims 19-25, and a counter substrate disposed opposite to the array substrate, wherein liquid crystal is filled between the counter substrate and the array substrate.

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