Substrate processing method and substrate processing device

The method addresses the challenge of developing metal-containing resists by using controlled gas processes to remove unexposed regions and replace metals with silicon, improving pattern precision and reducing contamination in semiconductor substrates.

WO2025234182A1PCT designated stage Publication Date: 2025-11-13TOKYO ELECTRON LTD
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
PCT/JP2025/004397
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-09
Filing Date
2025-02-10
Publication Date
2025-11-13

AI Technical Summary

Technical Problem

Existing technologies face challenges in effectively developing metal-containing resists on semiconductor substrates, particularly in selectively removing unexposed regions and replacing metals with silicon to form precise patterns.

Method used

A substrate processing method involving supplying a first process gas to remove unexposed regions and a second process gas containing a silicon-containing gas to replace metal with silicon, utilizing a thermal or plasma processing apparatus with controlled environments and gas delivery systems.

Benefits of technology

Enables precise development of metal-containing resists by selectively removing unexposed regions and replacing metals with silicon, reducing contamination and defects, and enhancing pattern formation efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2025004397_13112025_PF_FP_ABST
    Figure JP2025004397_13112025_PF_FP_ABST
Patent Text Reader

Abstract

A substrate processing method according to one exemplary embodiment of the present invention involves: (a) a step for providing a substrate on a substrate support unit in a chamber, wherein the substrate includes a base film and a metal-containing resist on the base film, and the metal-containing resist has an exposed first region and an unexposed second region; (b) a step for supplying a first processing gas into the chamber to remove the second region; and (c) a step for supplying a second processing gas containing a silicon-containing gas into the chamber to replace the metal contained in the metal-containing resist with silicon.
Need to check novelty before this filing date? Find Prior Art

Description

Substrate processing method and substrate processing apparatus

[0001] SUMMARY Exemplary embodiments of the present disclosure relate to a substrate processing method and apparatus.

[0002] Patent Document 1 discloses a technique for forming a metal-containing film on a semiconductor substrate that can be patterned using extreme ultraviolet light (hereinafter referred to as "EUV"), and a technique for selectively removing unexposed regions that have not been exposed to EUV using boron trichloride.

[0003] Special Publication No. 2021-523403

[0004] The present disclosure provides techniques that allow for proper development of metal-containing resists.

[0005] In one exemplary embodiment, a substrate processing method includes: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an undercoat film and a metal-containing resist on the undercoat film, the metal-containing resist having a first region that is exposed and a second region that is not exposed; (b) supplying a first process gas into the chamber to remove the second region; and (c) supplying a second process gas including a silicon-containing gas into the chamber to replace metal contained in the metal-containing resist with silicon.

[0006] According to one exemplary embodiment, a technique is provided that allows for proper development of metal-containing resists.

[0007] FIG. 1 is a diagram schematically illustrating a dry developing apparatus as a substrate processing apparatus according to one exemplary embodiment. FIG. 2 is a diagram schematically illustrating a dry developing apparatus as a substrate processing apparatus according to another exemplary embodiment. FIG. 3 is a diagram schematically illustrating a dry developing apparatus as a substrate processing apparatus according to another exemplary embodiment. FIG. 4 is a flowchart of a substrate processing method according to one exemplary embodiment. FIG. 5 is a cross-sectional view showing an example of a substrate to which the method shown in FIG. 4 can be applied. FIG. 6 is a cross-sectional view showing an example of a substrate to which the method shown in FIG. 4 can be applied. FIG. 7 is a cross-sectional view showing a step of a dry developing method according to one exemplary embodiment. FIG. 8 is a diagram showing an example of a structural formula of an aminosilane. FIG. 9 is a cross-sectional view showing a step of a dry developing method according to one exemplary embodiment. FIG. 10 is a flowchart of a substrate processing method according to another exemplary embodiment. FIG. 11 is a cross-sectional view showing a step of the dry developing method according to another exemplary embodiment shown in FIG. 10. FIG. 12 is a diagram schematically illustrating a substrate processing system according to one exemplary embodiment. FIG. 13 is a flowchart showing an example of a substrate processing method performed in the substrate processing system. FIG. 14 is a cross-sectional view showing a step of the method of FIG. 13. Fig. 15 is a flowchart showing an example of a substrate processing method different from the method shown in Fig. 13. Fig. 16 is a cross-sectional view showing a step of the method of Fig. 15. Fig. 17 is a diagram showing the results of a third experiment and a fourth experiment.

[0008] Various exemplary embodiments will be described in detail below with reference to the drawings, in which the same or equivalent parts are designated by the same reference numerals.

[0009] 1 is a diagram schematically illustrating a dry developing apparatus as a substrate processing apparatus according to an exemplary embodiment. In the exemplary embodiment, a thermal processing system includes a thermal processing apparatus 100 and a control unit 200. The thermal processing system is an example of a dry developing system. The thermal processing apparatus 100 is an example of a dry developing apparatus.

[0010] The heat treatment apparatus 100 has a process chamber 102 (chamber) that is configured to be airtight. The process chamber 102 is, for example, an airtight cylindrical container, and is configured so that the atmosphere inside can be controlled. A sidewall heater 104 is provided on the sidewall of the process chamber 102. A ceiling heater 130 is provided on the ceiling wall (top plate) of the process chamber 102. A ceiling surface 140 of the ceiling wall (top plate) of the process chamber 102 is formed as, for example, a horizontal, flat surface. The temperature of the ceiling surface 140 is controlled by the ceiling heater 130.

[0011] A substrate support 121 is provided at the lower side of the processing chamber 102. The substrate support 121 constitutes a mounting portion on which a substrate W is mounted. The substrate support 121 may have, for example, a circular surface (top surface) or a horizontally formed surface (top surface). The substrate W is mounted on the surface of the substrate support 121. A stage heater 120 is embedded in the substrate support 121. This stage heater 120 can heat the substrate W mounted on the substrate support 121. A ring assembly 125 may be disposed on the substrate support 121 to surround the substrate W. The ring assembly 125 may include one or more annular members. By disposing the ring assembly 125, temperature controllability of the outer peripheral region of the substrate W can be improved. The ring assembly 125 may be made of an inorganic material or an organic material depending on the intended thermal treatment.

[0012] The substrate support 121 is supported on the processing chamber 102 by support columns 122 provided on the bottom surface of the processing chamber 102. A plurality of lift pins 123 that, for example, vertically move up and down are provided on the circumferential outer sides of the support columns 122. The plurality of lift pins 123 are inserted into a plurality of through holes that are provided at intervals in the circumferential direction of the substrate support 121. The lifting and lowering operation of the lift pins 123 is controlled by a lifting mechanism 124. When the lift pins 123 protrude from the surface of the substrate support 121, the substrate W is transferred between a transport mechanism (not shown) and the substrate support 121.

[0013] An exhaust port 131 having an opening is provided in the sidewall of the processing chamber 102. The exhaust port 131 is connected to an exhaust mechanism 132 via an exhaust pipe. The exhaust mechanism 132 is composed of a vacuum pump, a valve, etc., and adjusts the exhaust flow rate from the exhaust port 131. The pressure inside the processing chamber 102 is adjusted by adjusting the exhaust flow rate, etc., using the exhaust mechanism 132. A transfer port for a substrate W (not shown) that can be opened and closed is formed in the sidewall of the processing chamber 102 at a position different from the position of the exhaust port 131.

[0014] A gas nozzle 141 is provided on the sidewall of the processing chamber 102 at a position different from the exhaust port 131 and the transfer port for the substrate W. The gas nozzle 141 supplies processing gas into the processing chamber 102. The gas nozzle 141 is provided on the sidewall of the processing chamber 102 on the opposite side from the exhaust port 131 when viewed from the center of the substrate support 121.

[0015] The gas nozzle 141 is formed in a rod shape that protrudes from the sidewall of the processing chamber 102 toward the center of the processing chamber 102. The tip of the gas nozzle 141 extends, for example, horizontally from the sidewall of the processing chamber 102. The processing gas is discharged into the processing chamber 102 from a discharge port provided at the tip of the gas nozzle 141. The discharged processing gas flows in the direction of arrow AR1 shown in FIG. 1 and is exhausted from the exhaust port 131. The tip of the gas nozzle 141 may extend obliquely downward toward the substrate W, or may extend obliquely upward toward the ceiling surface 140 of the processing chamber 102.

[0016] The gas nozzle 141 may be provided, for example, in the ceiling wall of the processing chamber 102. The exhaust port 131 may be provided in the bottom surface of the processing chamber 102.

[0017] The heat treatment apparatus 100 has a gas supply pipe 152 connected to a gas nozzle 141 from the outside of the processing chamber 102. A piping heater 160 for heating the inside of the gas supply pipe 152 is provided around the gas supply pipe 152. The gas supply pipe 152 is connected to a gas supply unit 170. The gas supply unit 170 includes at least one gas source and at least one flow rate controller. The gas supply unit may include a vaporizer that vaporizes a gas source in a liquid state.

[0018] The control unit 200 processes computer-executable instructions that cause the heat treatment apparatus 100 to perform the various steps described in this disclosure. The control unit 200 may be configured to control each element of the heat treatment apparatus 100 to perform the various steps described herein. In one embodiment, part or all of the control unit 200 may be included in the heat treatment apparatus 100. The control unit 200 may include a processing unit 200a1, a storage unit 200a2, and a communication interface 200a3. The control unit 200 is realized, for example, by the computer 200a. The processing unit 200a1 may be configured to read a program from the storage unit 200a2 and execute the read program to perform various control operations. This program may be stored in the storage unit 200a2 in advance or may be acquired via a medium when needed. The acquired program is stored in the storage unit 200a2 and read from the storage unit 200a2 by the processing unit 200a1 and executed. The medium may be various storage media readable by the computer 200a, or a communication line connected to the communication interface 200a3. The processing unit 200a1 may be a CPU (Central Processing Unit). The storage unit 200a2 may include a RAM (Random Access Memory), a ROM (Read Only Memory), a HDD (Hard Disk Drive), an SSD (Solid State Drive), or a combination thereof. The communication interface 200a3 may communicate with the heat treatment apparatus 100 via a communication line such as a LAN (Local Area Network).

[0019] FIG. 2 is a schematic diagram illustrating a dry developing apparatus as a substrate processing apparatus according to another exemplary embodiment. In this embodiment, the plasma processing system includes a plasma processing apparatus 1 and a control unit 2. The plasma processing system is an example of a dry developing system, and the plasma processing apparatus 1 is an example of a dry developing apparatus. The plasma processing apparatus 1 includes a plasma processing chamber (hereinafter also simply referred to as a "processing chamber") 10, a substrate support 11, and a plasma generation unit 12. The plasma processing chamber 10 has a plasma processing space. The plasma processing chamber 10 also has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to a gas supply unit 20 (described later), and the gas exhaust port is connected to an exhaust system 40 (described later). The substrate support 11 is disposed in the plasma processing space and has a substrate support surface for supporting a substrate W.

[0020] The plasma generating unit 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma generated in the plasma processing space may be capacitively coupled plasma (CCP), inductively coupled plasma (ICP), electron-cyclotron-resonance plasma (ECR plasma), helicon wave plasma (HWP), or surface wave plasma (SWP). Various types of plasma generators may be used, including alternating current (AC) plasma generators and direct current (DC) plasma generators. In one embodiment, the AC signal (AC power) used in the AC plasma generator has a frequency in the range of 100 kHz to 10 GHz. Thus, AC signals include radio frequency (RF) signals and microwave signals. In one embodiment, the RF signal has a frequency in the range of 100 kHz to 150 MHz.

[0021] The control unit 2 processes computer-executable instructions that cause the plasma processing apparatus 1 to perform the various steps described in this disclosure. The control unit 2 may be configured to control each element of the plasma processing apparatus 1 to perform the various steps described herein. In one embodiment, some or all of the control unit 2 may be included in the plasma processing apparatus 1. The control unit 2 is realized by, for example, a computer 2a. The control unit 2 may include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. Each component of the control unit 2 may be the same as each component of the control unit 200 (see FIG. 1) described above.

[0022] The following describes a configuration example of a capacitively coupled plasma processing apparatus as an example of the plasma processing apparatus 1. Fig. 3 is a diagram schematically showing a dry developing apparatus as a substrate processing apparatus according to another exemplary embodiment.

[0023] The capacitively coupled plasma processing apparatus 1 includes a plasma processing chamber 10, a gas supply 20, a power supply 30, and an exhaust system 40. The plasma processing apparatus 1 also includes a substrate support 11 and a gas inlet. The gas inlet is configured to introduce at least one process gas into the plasma processing chamber 10. The gas inlet includes a showerhead 13. The substrate support 11 is disposed within the plasma processing chamber 10. The showerhead 13 is disposed above the substrate support 11. In one embodiment, the showerhead 13 forms at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the showerhead 13, a sidewall 10a of the plasma processing chamber 10, and the substrate support 11. The plasma processing chamber 10 is grounded. The showerhead 13 and the substrate support 11 are electrically insulated from the housing of the plasma processing chamber 10.

[0024] The substrate support 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central region 111a for supporting a substrate W and an annular region 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular region 111b of the main body 111 surrounds the central region 111a of the main body 111 in a plan view. The substrate W is disposed on the central region 111a of the main body 111, and the ring assembly 112 is disposed on the annular region 111b of the main body 111 so as to surround the substrate W on the central region 111a of the main body 111. Therefore, the central region 111a is also called a substrate support surface for supporting the substrate W, and the annular region 111b is also called a ring support surface for supporting the ring assembly 112.

[0025] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive member. The conductive member of the base 1110 may function as a lower electrode. The electrostatic chuck 1111 is disposed on the base 1110. The electrostatic chuck 1111 includes a ceramic member 1111a and an electrostatic electrode 1111b disposed within the ceramic member 1111a. The ceramic member 1111a has a central region 111a. In one embodiment, the ceramic member 1111a also has an annular region 111b. Note that the annular region 111b may also be provided by another member surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating member. In this case, the ring assembly 112 may be disposed on the annular electrostatic chuck or the annular insulating member, or may be disposed on both the electrostatic chuck 1111 and the annular insulating member. Furthermore, at least one RF / DC electrode coupled to an RF power supply 31 and / or a DC power supply 32, which will be described later, may be disposed within the ceramic member 1111a. In this case, the at least one RF / DC electrode functions as a lower electrode. When a bias RF signal and / or a DC signal, which will be described later, is supplied to the at least one RF / DC electrode, the RF / DC electrode is also called a bias electrode. Note that the conductive member of the base 1110 and the at least one RF / DC electrode may function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b may function as a lower electrode. Therefore, the substrate support 11 includes at least one lower electrode.

[0026] The ring assembly 112 includes one or more annular members. In one embodiment, the one or more annular members include one or more edge rings and at least one cover ring. The edge rings are formed of a conductive or insulating material, and the cover rings are formed of an insulating material.

[0027] The substrate support 11 may include a temperature adjustment module configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112, and the substrate to a target temperature. The temperature adjustment module may include a heater, a heat transfer medium, a flow passage 1110a, or a combination thereof. A heat transfer fluid such as brine or a gas flows through the flow passage 1110a. In one embodiment, the flow passage 1110a is formed in the base 1110, and one or more heaters are disposed in the ceramic member 1111a of the electrostatic chuck 1111. The substrate support 11 may also include a heat transfer gas supply configured to supply a heat transfer gas to a gap between the backside of the substrate W and the central region 111a.

[0028] The showerhead 13 is configured to introduce at least one process gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and multiple gas inlets 13c. The process gas supplied to the gas supply port 13a passes through the gas diffusion chamber 13b and is introduced into the plasma processing space 10s from the multiple gas inlets 13c. The showerhead 13 also includes at least one upper electrode. In addition to the showerhead 13, the gas inlet may also include one or more side gas injectors (SGIs) attached to one or more openings formed in the sidewall 10a.

[0029] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from a corresponding gas source 21 to the showerhead 13 via a corresponding flow controller 22. Each flow controller 22 may include, for example, a mass flow controller or a pressure-controlled flow controller. Additionally, the gas supply unit 20 may include at least one flow modulation device that modulates or pulses the flow rate of the at least one process gas.

[0030] The power supply 30 includes an RF power supply 31 coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to supply at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one processing gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a part of the plasma generation unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, thereby attracting ion components in the formed plasma to the substrate W.

[0031] In one embodiment, the RF power supply 31 includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is coupled to at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit and is configured to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generating unit 31a may be configured to generate multiple source RF signals having different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0032] The second RF generator 31b is coupled to at least one lower electrode via at least one impedance matching circuit and is configured to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100 kHz to 60 MHz. In one embodiment, the second RF generator 31b may be configured to generate multiple bias RF signals having different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0033] The power supply 30 may include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to the at least one lower electrode and configured to generate a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to the at least one upper electrode and configured to generate a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0034] In various embodiments, the first and second DC signals may be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses may have a rectangular, trapezoidal, triangular, or combination thereof pulse waveform. In one embodiment, a waveform generator for generating the sequence of voltage pulses from the DC signal is connected between the first DC generator 32a and at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. When the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to at least one upper electrode. The voltage pulses may have either positive or negative polarity. Furthermore, the sequence of voltage pulses may include one or more positive voltage pulses and one or more negative voltage pulses within one period. The first and second DC generating units 32a and 32b may be provided in addition to the RF power supply 31, or the first DC generating unit 32a may be provided instead of the second RF generating unit 31b.

[0035] The exhaust system 40 may be connected to, for example, a gas exhaust port 10e provided at the bottom of the plasma processing chamber 10. The exhaust system 40 may include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump may include a turbomolecular pump, a dry pump, or a combination thereof.

[0036] First Embodiment FIG. 4 is a flowchart of a substrate processing method (hereinafter referred to as "method MT1") according to one exemplary embodiment. As shown in FIG. 4, method MT1 includes step ST11 of providing a substrate W, step ST12 of supplying a first process gas to remove a second region, and step ST13 of supplying a second process gas to replace metal with silicon. Hereinafter, dry development will be described as an example of the substrate processing method. Step ST12 and step ST13 may be performed simultaneously, or either may be performed first. When step ST12 and step ST13 are performed simultaneously, step ST12 and step ST13 may be performed at least partially simultaneously.

[0037] The method MT1 may be performed using any one of the substrate processing systems described above (see FIGS. 1 to 3), or may be performed using two or more of these substrate processing systems. For example, the method MT1 may be performed by a thermal processing system (see FIG. 1). The following describes an example in which the control unit 200 controls each unit of the thermal processing apparatus 100 to perform the method MT1 on a substrate W.

[0038] (Process ST11: Providing a Substrate) First, in process ST11, a substrate W is provided in the process chamber 102 of the thermal processing apparatus 100. The substrate W is provided on the substrate support 121, for example, by lowering the lift pins 123. After the substrate W is placed on the substrate support 121, the temperature of the substrate support 121 is adjusted to a set temperature. The temperature adjustment of the substrate support 121 may be performed by controlling the output of one or more of the sidewall heater 104, the stage heater 120, the ceiling heater 130, or the piping heater 160. In method MT1, the temperature of the substrate support 121 may be adjusted to the set temperature before process ST11. That is, the substrate W may be provided on the substrate support 121 after the temperature of the substrate support 121 is adjusted to the set temperature.

[0039] 5 is a cross-sectional view showing an example of a substrate W to which the method MT1 can be applied. The substrate W includes an underlayer UF and a metal-containing resist MF formed on the underlayer UF. The substrate W may be used in the manufacture of semiconductor devices. Examples of semiconductor devices include memory devices such as DRAMs and 3D-NAND flash memories, and logic devices.

[0040] The metal-containing resist MF may contain tin (Sn) as the metal. The metal-containing resist MF may contain at least one metal selected from the group consisting of tellurium (Te), antimony (Sb), indium (In), silver (Ag), titanium (Ti), chromium (Cr), cobalt (Co), nickel (Ni), copper (Cu), zinc (Zn), germanium (Ge), and hafnium (Hf). The metal-containing resist MF may further contain oxygen. The metal-containing resist MF may be a metal oxide film (Metal-Oxide-Resist). The metal-containing resist MF may contain, for example, tin oxide. The metal-containing resist MF may further contain an organic substance such as an organic ligand.

[0041] The metal-containing resist MF may be an EUV resist. As shown in Figure 5, the metal-containing resist MF has an exposed first region R1 and an unexposed second region R2. The first region R1 may be an exposed region that is exposed by EUV. The second region R2 may be an unexposed region that is not exposed by EUV.

[0042] The underlayer UF may be formed on a silicon wafer. The underlayer UF may be at least one selected from the group consisting of a carbon-containing film, a silicon nitride film, a silicon carbide film, and an amorphous silicon film. Examples of the carbon-containing film include an amorphous carbon film.

[0043] In one embodiment, the substrate W is formed as follows. First, as shown in FIG. 6 , a pre-exposed metal-containing resist (hereinafter, the pre-exposed metal-containing resist will be referred to as “metal-containing resist MF0”) is formed on an undercoat film UF that has been subjected to adhesion treatment and the like. The film formation may be performed by a dry process, a wet process such as a solution coating method, or both a dry process and a wet process. Before forming the metal-containing resist MF0, a surface modification process of the undercoat film may be performed. After the film formation, the wafer is subjected to a heat treatment, i.e., pre-baking (Post Apply Bake: PAB). An additional heat treatment may be performed after the pre-baking. After the heat treatment, the wafer is transferred to an exposure tool, and EUV light is irradiated onto the metal-containing resist MF0 through an exposure mask (reticle). This forms a metal-containing resist MF having an exposed first region R1 and an unexposed second region R2. The first region R1 corresponds to an opening formed in an exposure mask (reticle). The second region R2 corresponds to a pattern formed in the exposure mask (reticle). EUV has a wavelength in the range of 10 nm to 20 nm, for example. EUV may have a wavelength in the range of 11 nm to 14 nm, and in one example has a wavelength of 13.5 nm. The exposed wafer is transferred from the exposure tool to a thermal processing device under atmosphere control and subjected to a thermal processing, i.e., post-exposure bake (PEB). The exposed wafer may be further subjected to a thermal processing after the PEB.

[0044] (Step ST12: Supplying a First Processing Gas and Removing the Second Region) In step ST12, a first processing gas is supplied into the processing chamber 102, and the second region R2 is removed by dry development. FIG. 7 is a cross-sectional view showing an example of the substrate W in step ST12. As shown in FIG. 7, a first region R1 is formed on the base film UF as a pattern after development. The pattern of the first region R1 after development may be a line pattern or a dot pattern.

[0045] The first process gas may include a silicon-containing gas. The silicon-containing gas may include at least one selected from the group consisting of a gas containing silicon and chlorine, a gas containing silicon and bromine, a gas containing silicon and iodine, a gas containing silicon and hydrogen, and an aminosilane gas. The silicon-containing gas may further include hydrogen, and may include dichlorosilane (SiH 2 Cl 2 The silicon and bromine containing gas may further include hydrogen, and may include dibromosilane (SiH 2 Br 2 The silicon and iodine-containing gas may further include hydrogen, and may include diiodosilane (SiH 2 I 2 The silicon and hydrogen containing gas may include monosilane (SiH 4 ) gas, disilane (Si 2 H 6 The aminosilane gas may have 1 to 4 amino groups.

[0046] 8 is a diagram showing an example of the structural formula of an aminosilane. 1 ~R 8 and R a ~R c Each of the symbols represents hydrogen or a hydrocarbon. The hydrocarbon may contain nitrogen, oxygen, and halogen atoms. (a) of Figure 8 shows an aminosilane having one amino group. (b) of Figure 8 shows an aminosilane having two amino groups. (c) of Figure 8 shows an aminosilane having three amino groups. (d) of Figure 8 shows an aminosilane having four amino groups.

[0047] Examples of aminosilanes include butylaminosilane (BAS), bis(tertiarybutylaminosilane) (BTBAS), dimethylaminosilane (DMAS), bis(dimethylaminosilane) (BDMAS), tridimethylaminosilane (TDMAS), diethylaminosilane (DEAS), bis(diethylaminosilane) (BDEAS), dipropylaminosilane (DPAS), diisopropylaminosilane (DIPAS), hexakisethylaminodisilane, and silanes of the formula (1) ((R1R2)N) n Si X H 2X+2-n-m (R3) m , and (2) formula ((R1R2)N) n Si X H 2X-n-m (R3) m Includes.

[0048] In the above formulas (1) and (2), n is the number of amino groups and is a natural number from 1 to 6. m is the number of alkyl groups and is 0 or a natural number from 1 to 5. R1, R2, or R3 is CH 3 , C 2 H 5 or C 3 H 7 R1, R2 and R3 may or may not be the same as each other. R3 may be Cl or F. X is a natural number of 1 or more.

[0049] The first process gas may not include the silicon-containing gas described above. The first process gas may include hydrogen bromide (HBr) gas, hydrogen chloride (HCl) gas, boron trichloride (BCl 3 The developing gas may include at least one selected from the group consisting of a fluorine-containing gas and a carboxylic acid gas. By using the developing gas, the second region R2 can be selectively removed relative to the first region R1.

[0050] When the first process gas contains a silicon-containing gas, the mechanism by which the second region R2 can be selectively removed relative to the first region R1 is presumed to be, but is not limited to, the following. The first region R1 and the second region R2 both contain, for example, tin-oxygen bonds (Sn—O bonds). When the first region R1 and the second region R2 are exposed to the silicon-containing gas, the Sn—O bonds are replaced with Si—O bonds. At this time, hydrogen (H) or chlorine (Cl) may bond with tin (Sn) to form a substance containing an H—Sn bond or a Cl—Sn bond, which may then volatilize. The first region R1 contains a greater number of Sn—O bonds than the second region R2. In other words, the density of Sn—O bonds per unit volume in the first region R1 is higher than that in the second region R2. Therefore, by substituting silicon for tin, the density of Si—O bonds per unit volume in the first region R1 is higher than that in the second region R2. Furthermore, the number of organic ligands contained in the second region R2 is greater than the number of organic ligands contained in the first region R1. Therefore, the second region R2 is more likely to volatilize than the first region R1.

[0051] In step ST12, the pressure in the processing chamber 102 may be controlled. In step ST12, the pressure in the processing chamber 102 may be set within the following ranges: The pressure in the processing chamber 102 may be 13.3 Pa (100 mTorr) or higher; The pressure in the processing chamber 102 may be 133 Pa (1 Torr) or higher; The pressure in the processing chamber 102 may be 665 Pa (5 Torr) or higher; The pressure in the processing chamber 102 may be 13.3 kPa (100 Torr) or lower.

[0052] In step ST12, the substrate support part 121 may be heated. In step ST12, the temperature of the substrate support part 121 may be set within the following ranges. The temperature of the substrate support part 121 may be 30° C. or higher. The temperature of the substrate support part 121 may be 60° C. or higher. The temperature of the substrate support part 121 may be 100° C. or higher. The temperature of the substrate support part 121 may be 200° C. or higher. The temperature of the substrate support part 121 may be 300° C. or lower.

[0053] (Step ST13: Supplying a Second Process Gas to Replace Metal with Silicon) In step ST13, a second process gas containing a silicon-containing gas is supplied into the process chamber 102, and the metal-containing resist MF is exposed to the second process gas. This replaces the metal contained in the metal-containing resist MF with silicon. FIG. 9 is a cross-sectional view showing an example of the substrate W in step ST13. The metal contained in the first region R1 is replaced with silicon, and a silicon-containing region SF1 is formed from the first region R1. In step ST13, the silicon-containing gas is reacted with the metal-containing resist MF to replace the metal element (e.g., tin element) contained in the metal-containing resist MF with silicon element. When the metal-containing resist MF is a metal oxide film (e.g., tin oxide), the metal-containing resist MF contains a bond between tin and oxygen (Sn—O bond). In this case, in step ST13, the Sn—O bond in the metal-containing resist MF may be replaced with a bond between silicon and oxygen (Si—O bond). As a result, a silicon-containing region SF1 may be formed from the metal-containing resist MF. In one exemplary embodiment, plasma may not be generated from the second process gas in step ST13. The metal present in the metal-containing resist MF may be substituted with tin without generating plasma. Alternatively, plasma may be generated from the second process gas in step ST13 using the plasma processing apparatus 1 of FIG. 2 or 3.

[0054] The silicon-containing gas contained in the second process gas in step ST13 may be the same as the silicon-containing gas contained in the first process gas in step ST12. The silicon-containing gas contained in the second process gas may be the same as or different from the silicon-containing gas contained in the first process gas. The silicon-containing gas contained in the second process gas may be a silicon-containing gas that does not remove the second region R2.

[0055] The pressure in the processing chamber 102 in step ST13 may be the same as or higher than the pressure in the processing chamber 102 in step ST12. A high pressure in the processing chamber 102 in step ST13 promotes a substitution reaction from metal to silicon. An example of the pressure in the processing chamber 102 in step ST13 may be the same as the example of the pressure in the processing chamber 102 in step ST12.

[0056] In step ST13, the substrate support 121 may be heated. The temperature of the substrate support 121 in step ST13 may be the same as or higher than the temperature of the substrate support 121 in step ST12. If the temperature of the substrate support 121 in step ST13 is high, the substitution reaction from metal to silicon is promoted. An example of the temperature of the substrate support 121 in step ST13 may be the same as the example of the temperature of the substrate support 121 in step ST12.

[0057] In step ST13, at least one of the pressure in the processing chamber 102 and the temperature of the substrate support part 121 may be changed during the process. For example, when a predetermined time has elapsed since the start of step ST13, at least one of the pressure in the processing chamber 102 and the temperature of the substrate support part 121 may be changed. For example, a lower limit threshold and an upper limit threshold for the pressure in the processing chamber 102 may be set, and in step ST13, the pressure may be changed when the pressure in the processing chamber 102 falls below the lower limit threshold or exceeds the upper limit threshold.

[0058] Step ST12 and step ST13 may be alternately repeated. That is, method MT1 may include a step of repeating step ST12 and step ST13. The step of repeating step ST12 and step ST13 may be repeated a predetermined number of times. The step of repeating step ST12 and step ST13 may be repeated until the recess formed by removing the second region R2 reaches the base film UF (until the base film UF is exposed).

[0059] The first process gas used in step ST12 may be different depending on whether step ST12 and step ST13 are performed simultaneously, whether step ST12 is performed first, or whether step ST13 is performed first. When step ST12 and step ST13 are performed simultaneously, the first process gas and the second process gas may be the same gas. For example, both the first process gas and the second process gas may be dichlorosilane gas. When step ST12 is performed before step ST13, or when step ST13 is performed before step ST12, the first process gas may be a gas different from the second process gas. The first process gas may not contain silicon. Alternatively, when step ST12 is performed before step ST13, or when step ST13 is performed before step ST12, the first process gas and the second process gas may be the same gas. For example, both the first process gas and the second process gas may be dichlorosilane. If process ST12 is performed before process ST13, the second region R2 is removed in process ST12, but the metal in the metal-containing resist MF is not replaced with silicon. For example, by lowering the temperature of the substrate support 121 in process ST12, the second region R2 can be removed without replacement. Then, by raising the temperature of the substrate support 121 in process ST13, the metal contained in the first region R1 can be replaced with silicon.

[0060] 4 in that the process ST13 includes a step ST13A of depositing a silicon-containing deposit on the first region R1. FIG. 10 is a flowchart of a substrate processing method (hereinafter referred to as "method MT2") according to another exemplary embodiment. The method MT2 of FIG. 10 differs from the method MT1 of FIG. 4 in that the process ST13 includes a step ST13A.

[0061] 11 is a cross-sectional view showing an example of a substrate W in step ST13A. In the method MT2, the second region R2 is removed by step ST12. As a result, the first region R1 is formed on the underlayer UF as a pattern after development. Then, step ST13 is performed. As a result, a silicon-containing deposit SF2 may be formed on the silicon-containing region SF1 formed from the first region R1. The formed silicon-containing pattern includes the silicon-containing region SF1 and the silicon-containing deposit SF2. The silicon-containing deposit SF2 may be formed to cover the top surface and side surfaces of the silicon-containing region SF1, as shown in FIG. In particular, the width (CD: Critical Dimension) of the silicon-containing pattern may be adjusted by forming the silicon-containing deposit SF2 on the side surfaces of the silicon-containing region SF1. For example, in process ST13A, the width of the silicon-containing pattern may be adjusted by adjusting at least one selected from the group consisting of the supply amount and supply time of the silicon-containing gas, the pressure in the processing chamber 102, and the temperature of the substrate support part 121.

[0062] Step ST13A may be performed when steps ST12 and ST13 are performed simultaneously. In this case, deposition of the silicon-containing deposit SF2 may be performed simultaneously with removal of the second region R2. The silicon-containing deposit SF2 may be formed to cover the upper surface and side surfaces of the silicon-containing region SF1, as shown in FIG. 11 . Alternatively, step ST13A may be performed when step ST13 is performed before step ST12. In this case, the silicon-containing deposit SF2 is formed on the first region R1 and the second region R2. Then, the second region R2 and the silicon-containing deposit SF2 on the second region R2 are removed. As a result, the silicon-containing deposit SF2 may be formed on the upper surface of the silicon-containing region SF1, but not on the side surfaces.

[0063] According to methods MT1 and MT2, the metal-containing resist MF can be appropriately developed. Furthermore, in methods MT1 and MT2, the metal contained in the metal-containing resist MF is replaced with silicon in step ST13. This makes it possible to suppress contamination of the processing chamber 102 and the substrate W by the metal contained in the metal-containing resist MF. For example, in steps subsequent to step ST13, it is possible to suppress adhesion of metal deposits to the processing chamber 102 and defects on the substrate W due to metal residues.

[0064] Steps ST12 and ST13 may be performed simultaneously. In this case, the second region R2 can be removed and the metal can be replaced with silicon efficiently. This reduces the processing time for the substrate W.

[0065] Step ST13 may be performed before step ST12. In step ST13, a substance containing the substituted metal may not volatilize and remain on the substrate W. For example, a substance containing the above-described H—Sn bond or Cl—Sn bond may not volatilize and remain. Even in this case, the remaining substance can be removed together with the second region R2 in step ST12.

[0066] Step ST12 may be performed before step ST13. In this case, in step ST12, the pattern shape of the first region R1 after development is appropriately adjusted, and then the metal contained in the first region R1 can be replaced with silicon. Thus, the silicon-containing region SF1 having a desired pattern shape (e.g., low edge roughness) can be formed.

[0067] When step ST12 is performed simultaneously with or before step ST13, step ST13 may include step ST13A of depositing a silicon-containing deposit on the first region R1. In this case, the width of the silicon-containing pattern to be formed can be adjusted by the deposition amount of the silicon-containing deposit SF2.

[0068] Second Embodiment The above-described methods MT1 and MT2 may be applied to a substrate processing system including pre-processing and post-processing steps of a dry development process. Figure 12 is a schematic diagram showing a substrate processing system SS according to one exemplary embodiment. The substrate processing system SS includes a first carrier station CS1, a first processing station PS1, a first interface station IS1, an exposure apparatus EX, a second interface station IS2, a second processing station PS2, a second carrier station CS2, and a controller CT.

[0069] The first carrier station CS1 loads and unloads the first carrier C1 between the substrate processing system SS and an external system. The first carrier station CS1 has a loading table on which a plurality of first loading plates ST1 are provided. The first carrier C1 is loaded on each of the first loading plates ST1. The first carrier C1 has a housing capable of accommodating a plurality of substrates W therein. The first carrier C1 is loaded on each of the first loading plates ST1 in a state where it accommodates a plurality of substrates W or in an empty state where it does not accommodate any substrates W. The first carrier C1 is, for example, a front opening unified pod (FOUP).

[0070] The first carrier station CS1 transports substrates W between the first carrier C1 and the first processing station PS1. The first carrier station CS1 is provided with a first transport device HD1 located between the mounting table and the first processing station PS1. The first processing station PS1 is provided with a second transport device HD2. The first transport device HD1 transports substrates W between the first carrier C1 on each first mounting tray ST1 and the second transport device HD2 in the first processing station PS1. A load lock module may be provided between the first carrier station CS1 and the first processing station PS1. The load lock module can switch the pressure therein between atmospheric pressure and vacuum. "Atmospheric pressure" may be the pressure inside the first transport device HD1. "Vacuum" may be a pressure lower than atmospheric pressure, for example, a medium vacuum of 0.1 Pa to 100 Pa. The interior of the second transport device HD2 may be atmospheric pressure or vacuum. The load lock module may, for example, transfer a substrate W from a first transport device HD1 at atmospheric pressure to a second transport device HD2 at vacuum. The load lock module may, for example, transfer a substrate W from a second transport device HD2 at vacuum to the first transport device HD1 at atmospheric pressure.

[0071] The first processing station PS1 performs various processes on the substrates W. In one embodiment, the first processing station PS1 includes a pre-processing module PM1, a resist film formation module PM2, and a first thermal processing module PM3 (hereinafter collectively referred to as the "first substrate processing module PMa"). A second transport device HD2 in the first processing station PS1 transports the substrates W. The second transport device HD2 transports the substrates W between the first substrate processing modules PMa. The second transport device HD2 transports the substrates W between the first processing station PS1 and the first carrier station CS1, or between the first processing station PS1 and the first interface station IS1.

[0072] The pre-treatment module PM1 performs pre-treatment on the substrate W. In one embodiment, the pre-treatment module PM1 includes a temperature adjustment unit that adjusts the temperature of the substrate W, or a high-precision temperature adjustment unit that adjusts the temperature of the substrate W with high precision. In one embodiment, the pre-treatment module PM1 includes a hydrophobic treatment unit that performs a surface modification treatment on the substrate W. Each treatment unit in the pre-treatment module PM1 may be configured to include a heat treatment apparatus 100 (see FIG. 1) and a plasma treatment apparatus 1 (see FIGS. 2 and 3).

[0073] The resist film formation module PM2 forms a metal-containing resist MF0 on the substrate W. In one embodiment, the resist film formation module PM2 includes a dry coating unit. The dry coating unit forms the metal-containing resist MF0 on the substrate W using a dry process such as a vapor phase deposition method. The dry coating unit may include a CVD apparatus or an ALD (Atomic Layer Deposition) apparatus that performs chemical vapor deposition of a resist film on the substrate W. Alternatively, the dry coating unit may include a PVD (Physical Vapor Deposition) apparatus that performs physical vapor deposition of the metal-containing resist MF0. The dry coating unit may be a thermal processing apparatus 100 (see FIG. 1) or a plasma processing apparatus 1 (see FIGS. 2 and 3).

[0074] In one embodiment, the resist film formation module PM2 includes a wet coating unit that forms a metal-containing resist MF0 on the substrate W using a wet process such as a solution coating method.

[0075] In one embodiment, the resist film formation module PM2 includes both a wet coating unit and a dry coating unit.

[0076] The first thermal treatment module PM3 thermally treats the substrate W. In one embodiment, the first thermal treatment module PM3 includes one or more of a pre-bake (PAB) unit that heat-treats the substrate W on which the metal-containing resist MF0 is formed, a temperature adjustment unit that adjusts the temperature of the substrate W, and a high-precision temperature adjustment unit that adjusts the temperature of the substrate W with high precision. Each of these units may have one or more thermal treatment devices. The multiple thermal treatment devices may be configured by stacking thermal treatment devices. The thermal treatment device may be, for example, the thermal treatment device 100 (see FIG. 1 ). The thermal treatment may be performed at a predetermined temperature using a predetermined gas.

[0077] The first interface station IS1 has a third transport device HD3. The third transport device HD3 transports substrates W between the first processing station PS1 and the exposure apparatus EX. The third transport device HD3 has a housing that accommodates the substrates W. The third transport device HD3 may be configured to be able to control the temperature, humidity, pressure, etc. inside the housing.

[0078] The exposure apparatus EX forms a metal-containing resist MF by exposing a metal-containing resist MF0 on a substrate W using an exposure mask (reticle). The metal-containing resist MF has an exposed first region R1 and an unexposed second region R2. The exposure apparatus EX may be, for example, an EUV exposure apparatus that uses EUV as a light source.

[0079] The second interface station IS2 has a fourth transport device HD4. The fourth transport device HD4 transports substrates W between the exposure apparatus EX and the second processing station PS2. The fourth transport device HD4 has a housing that accommodates the substrates W. The fourth transport device HD4 may be configured to be able to control the temperature, humidity, pressure, etc. inside the housing.

[0080] The second processing station PS2 performs various processes on the substrates W. In one embodiment, the second processing station PS2 includes a second thermal treatment module PM4, a measurement module PM5, a development module PM6, and a third thermal treatment module PM7 (hereinafter collectively referred to as the "second substrate processing module PMb"). The second processing station PS2 has a fifth transport device HD5. The fifth transport device HD5 transports the substrates W. The fifth transport device HD5 transports the substrates W between the second substrate processing modules PMb. The fifth transport device HD5 transports the substrates W between the second processing station PS2 and the second carrier station CS2 or between the second processing station PS2 and the second interface station IS2.

[0081] The second thermal treatment module PM4 thermally treats the substrate W. The second thermal treatment module PM4 may include a post-exposure bake (PEB) unit that heat-treats the exposed substrate W. The second thermal treatment module PM4 may include a temperature adjustment unit that adjusts the temperature of the substrate W. The second thermal treatment module PM4 may include a high-precision temperature adjustment unit that adjusts the temperature of the substrate W with high precision. Alternatively, the second thermal treatment module PM4 may include one or more of these units. Each of these units may have one or more thermal treatment devices. The multiple thermal treatment devices may be configured by stacking thermal treatment devices. The thermal treatment device may be, for example, the thermal treatment device 100 (see FIG. 1). The thermal treatment may be performed at a predetermined temperature using a predetermined gas.

[0082] The measurement module PM5 measures the substrate W. In one embodiment, the measurement module PM5 includes an imaging unit including a mounting stage for mounting the substrate W, an imaging device, an illumination device, and various sensors (such as a temperature sensor and a reflectance measurement sensor). The imaging device may be, for example, a CCD camera that captures an image of the appearance of the substrate W, or a hyperspectral camera that captures images by dispersing light into wavelengths. The hyperspectral camera can measure one or more of the pattern shape, dimensions, film thickness, composition, and film density of the metal-containing resist MF0.

[0083] The developing module PM6 develops the substrate W. The developing module PM6 supplies a first process gas into the chamber to remove the second region R2. Furthermore, the developing module PM6 supplies a second process gas containing a silicon-containing gas into the chamber to replace the metal contained in the metal-containing resist MF with silicon. In one embodiment, the developing module PM6 includes a dry developing unit that dry-develops the substrate W. The dry developing unit may be, for example, the thermal processing apparatus 100 (see FIG. 1) or the plasma processing apparatus 1 (see FIGS. 2 and 3).

[0084] The third thermal treatment module PM7 thermally treats the substrate W. The third thermal treatment module PM7 may include a post-bake (PB) unit that heat-treats the substrate W after development. The third thermal treatment module PM7 may include a temperature adjustment unit that adjusts the temperature of the substrate W. The third thermal treatment module PM7 may include a high-precision temperature adjustment unit that adjusts the temperature of the substrate W with high precision. Alternatively, the third thermal treatment module PM7 may include one or more of these units. Each of these units may have one or more thermal treatment devices. The multiple thermal treatment devices may be configured by stacking thermal treatment devices. The thermal treatment device may be, for example, the thermal treatment device 100 (see FIG. 1 ). The thermal treatment may be performed at a predetermined temperature using a predetermined gas.

[0085] The second carrier station CS2 transfers the second carrier C2 to and from a system external to the substrate processing system SS. The configuration and functions of the second carrier station CS2 may be the same as those of the first carrier station CS1 described above.

[0086] The controller CT controls each component of the substrate processing system SS to perform the above-described series of processes on the substrate W. The controller CT stores a recipe in which the process procedure, process conditions, transport conditions, etc. are set. The controller CT controls each component of the substrate processing system SS in accordance with the recipe. The controller CT may have some or all of the functions of the controllers (controller 200, controller 2) shown in FIGS. 1 to 3.

[0087] [Example of Substrate Processing Method] FIG. 13 is a flowchart of a substrate processing method (hereinafter referred to as "method MT3") according to one illustrative embodiment. Method MT3 may be performed using the substrate processing system SS shown in FIG. 12. In the following description, a case will be described in which a controller CT of the substrate processing system SS controls each component of the substrate processing system SS to perform method MT3 on a substrate W. As shown in FIG. 13, method MT3 includes steps ST14 to ST23 in addition to steps ST11 to ST13 of method MT1. Step ST14 is a step of pre-treating the substrate. Step ST15 is a step of forming a metal-containing resist MF0 on the undercoat film UF of the substrate W. Step ST16 is a step of performing a heat treatment (pre-bake: PAB) on the substrate W on which the metal-containing resist MF0 has been formed. Step ST17 is a step of exposing the metal-containing resist MF0 to light to form a metal-containing resist MF. Step ST18 is a step of heat-treating (post-exposure bake: PEB) the substrate W after exposure. Step ST19 is a step of measuring the substrate W. Step ST11 is a step of providing the substrate W to a chamber (first chamber) of a dry developing unit in the developing module PM6. After steps ST12 and ST13, step ST20 is a step of unloading the substrate W from the first chamber. Step ST21 is a step of heat-treating (post-bake: PB) the substrate W after development. Step ST22 is a step of loading the substrate W into a chamber (second chamber) in the plasma processing apparatus after steps ST20 and ST21. Step ST23 is a step of supplying a third process gas into the second chamber after step ST22 to etch the undercoat film UF. The method MT3 does not necessarily include one or more of the above steps. For example, the method MT3 does not need to include step ST19, and step ST11 may be performed after step ST18.

[0088] (Process ST14: Pretreatment) First, a first carrier C1 accommodating a plurality of substrates W is loaded into a first carrier station CS1 of the substrate processing system SS. The first carrier C1 is placed on a first mounting plate ST1. Next, the first transport device HD1 sequentially removes each substrate W from the first carrier C1 and transports them to a second transport device HD2 in the first processing station PS1. The substrates W are transported by the second transport device HD2 to a pretreatment module PM1. The substrates W are pretreated by the pretreatment module PM1. The pretreatment may include, for example, one or more of temperature adjustment of the substrates W, forming a part or all of an underlayer film on the substrates W, heating the substrates W, and high-precision temperature adjustment of the substrates W. The pretreatment may also include a surface modification process of the substrates W.

[0089] (Step S15: Forming Metal-Containing Resist MF0 on Undercoat Film UF of Substrate W) Next, the substrate W is transported to the resist film formation module PM2 by the second transport device HD2. The resist film formation module PM2 forms a metal-containing resist MF0 on the undercoat film UF of the substrate W. The metal-containing resist MF0 here refers to a resist film before exposure. In other words, it is the state of the metal-containing resist MF before exposure. In one embodiment, the metal-containing resist MF0 is formed by a wet process such as a solution coating method. For example, the metal-containing resist MF0 is formed by spin-coating the metal-containing resist MF0 on the substrate W using a wet coating unit of the resist film formation module PM2. In one embodiment, the metal-containing resist MF0 is formed on the substrate W by a dry process such as a vapor-phase deposition method. For example, the metal-containing resist MF0 is formed by vapor-depositing the metal-containing resist MF0 on the substrate W using a dry coating unit of the resist film formation module PM2.

[0090] The metal-containing resist MF0 may be formed on the substrate W using both a dry process and a wet process. For example, after a first metal-containing resist MF01 is formed on the substrate W by a dry process, a second metal-containing resist MF02 may be formed on the first metal-containing resist by a wet process. In this case, the film thickness, material, and composition of the first metal-containing resist MF01 may be the same as or different from the film thickness, material, and composition of the second metal-containing resist MF02.

[0091] (Process ST16: PAB) Next, the substrate W is transported by the second transport device HD2 to the first thermal treatment module PM3. The substrate W is subjected to a heat treatment (pre-baking: PAB) by the first thermal treatment module PM3. The pre-baking may be performed in an air atmosphere or an inert atmosphere. In the pre-baking, the substrate W may be heated to 50° C. or higher and 250° C. or lower, 50° C. or higher and 200° C. or lower, or 80° C. or higher and 150° C. or lower. When the metal-containing resist MF0 is formed by a dry process in process ST200, the pre-baking may be performed consecutively by the dry coating unit that performed process ST200. In one embodiment, after the pre-baking, a process (Edge Bead Removal: EBR) for removing the metal-containing resist MF0 from the edge of the substrate W may be performed.

[0092] (Process ST17: Exposing metal-containing resist MF0 to form metal-containing resist MF) Next, the substrate W is transferred by the second transport device HD2 to the third transport device HD3 in the first interface station IS1. The substrate W is then transported by the third transport device HD3 to the exposure device EX. In the exposure device EX, the metal-containing resist MF0 is exposed to light to form the metal-containing resist MF. The metal-containing resist MF0 is exposed to EUV light via an exposure mask (reticle) in the exposure device EX. As a result, a first region R1 that is EUV-exposed and a second region R2 that is not EUV-exposed are formed in the exposed metal-containing resist MF, corresponding to the pattern of the exposure mask (reticle).

[0093] (Process ST18: PEB) Next, the substrate W is transferred from the fourth transfer device HD4 in the second interface station IS2 to the fifth transfer device HD5 in the second processing station PS2. The substrate W is then transferred by the fifth transfer device HD5 to the second thermal treatment module PM4, where it is subjected to a heat treatment (post-exposure bake: PEB). The post-exposure bake may be performed in an atmospheric environment. In the post-exposure bake, the substrate W may be heated to a temperature of 180° C. or higher and 250° C. or lower.

[0094] (Process ST19: Measurement) Next, the substrate W is transported to the measurement module PM5 by the fifth transport device HD5. The substrate W is measured by the measurement module PM5. The measurement may be optical measurement. In one embodiment, the measurement by the measurement module PM5 includes measuring the appearance and dimensions of the substrate W using a CCD camera. In one embodiment, the measurement by the measurement module PM5 includes measuring one or more of the pattern shape, dimensions, film thickness, composition, and film density of the metal-containing resist MF (hereinafter also referred to as "pattern shape, etc.") using a hyperspectral camera.

[0095] In one embodiment, the controller CT determines whether or not there is an exposure abnormality in the substrate W based on the measured appearance, dimensions, pattern shape, etc. of the substrate W. In one embodiment, if the controller CT determines that there is an exposure abnormality in the substrate W, the substrate W may be reworked or discarded without being developed in step ST700. Reworking of the substrate W may be performed by removing the metal-containing resist MF on the substrate W and returning to step ST200 to form a metal-containing resist MF0 again. By performing rework before development, damage to the substrate W can be avoided or suppressed.

[0096] (Process ST11: Providing substrate W to chamber (first chamber) of dry developing unit in developing module PM6) Next, the substrate W is transported to the developing module PM6 by the fifth transport device HD5. Then, the substrate W is provided to the chamber (first chamber) of the dry developing unit included in the developing module PM6. The first chamber may be, for example, the processing chamber 102 in the heat processing device 100 or the plasma processing chamber 10 in the plasma processing device 1. In the first chamber, the metal-containing resist MF on the substrate W is developed. The development process may be performed by dry development. In the example of FIG. 13, the development process is performed by method MT1.

[0097] (Step ST12: Supplying a First Processing Gas and Removing the Second Region) Next, a first processing gas is supplied into the first chamber to remove the second region R2, as shown in Fig. 7. As a result, the first region R1 is formed on the base film UF as a pattern after development.

[0098] (Step ST13: Supplying a second process gas to replace metal with silicon) Next, a second process gas containing a silicon-containing gas is supplied into the first chamber to replace the metal contained in the metal-containing resist MF with silicon, as shown in Fig. 9. As a result, silicon-containing regions SF1 are formed from the first regions R1.

[0099] (Step ST20: Unloading the Substrate W from the First Chamber) Next, the substrate W is unloaded from the first chamber. The substrate W may be unloaded by the fifth transport device HD5.

[0100] (Step ST21: PB) Next, the substrate W is transported by the fifth transport device HD5 to the third thermal treatment module PM7, where it is subjected to a thermal treatment (post-baking). The post-baking may be performed in an air atmosphere or in a N 2 Or O 2The post-baking may be performed in a reduced pressure atmosphere containing SiO 2 . In the post-baking, the substrate W may be heated to 150° C. or higher and 250° C. or lower. The post-baking may be performed by the second thermal treatment module PM4 instead of the third thermal treatment module PM7. In one embodiment, after the post-baking, the measurement module PM5 may perform optical measurement of the substrate W. This measurement may be performed in addition to or instead of the measurement in step ST19. In one embodiment, the controller CT determines the presence or absence of abnormalities, such as defects, scratches, and foreign matter adhesion, in the developed pattern of the substrate W, based on the measured appearance, dimensions, pattern shape, and the like of the substrate W. In one embodiment, if the controller CT determines that the substrate W has an abnormality, the substrate W may be reworked or discarded without being etched in step ST23. In one embodiment, if the controller CT determines that the substrate W has an abnormality, the opening dimension of the metal-containing resist MF of the substrate W may be adjusted by a dry coating unit (such as a CVD apparatus or an ALD apparatus).

[0101] (Process ST22: Loading the substrate W into a chamber (second chamber) in the plasma processing apparatus) After process ST21 is performed, the substrate W is transferred by the fifth transport device HD5 to the sixth transport device HD6 in the second carrier station CS2, and then transferred by the sixth transport device HD6 to the second carrier C2 on the second mounting plate ST2. The second carrier C2 is then transferred to the plasma processing apparatus. The plasma processing apparatus here may be the plasma processing apparatus 1 of FIG. 2 or 3. The substrate W is then loaded into a processing chamber (second chamber) in the plasma processing apparatus. The second chamber may be the plasma processing chamber 10 in the plasma processing apparatus 1.

[0102] (Step ST23: Etching the Base Film UF by Supplying a Third Process Gas) In a plasma processing apparatus, a third process gas is supplied into a second chamber to etch the base film UF. The third process gas may include a fluorine-containing gas. The third process gas may include a fluorine-containing gas and a carbon-containing gas. FIG. 14 is a cross-sectional view showing an example of a substrate W in step ST23. In step ST23, the base film UF of the substrate W is etched using the silicon-containing region SF1 as a mask. The silicon-containing region SF1 may include a silicon oxide film by replacing the metal contained in the first region R1 with silicon in step ST12. The base film UF may include a material that can achieve a high selectivity relative to a silicon oxide film. For example, as described above, the base film UF may be at least one selected from the group consisting of a carbon-containing film, a silicon nitride film, a silicon carbide film, and an amorphous silicon film. In this case, the base film UF can be etched with a high selectivity. In addition, since the metal (e.g., tin) is replaced with silicon in the silicon-containing region SF1, the metal can be prevented from being exposed to the fluorine-containing gas. This makes it possible to prevent contamination of the second chamber and the substrate W by the metal in step ST23 as well. This completes the method MT3.

[0103] When the metal-containing resist MF is developed using a plasma processing apparatus in steps ST12 and ST13, a third process gas may be supplied into the first chamber to etch the base film UF in step ST23 after steps ST12 and ST13. In this case, steps ST20 and ST22 may be omitted. Steps ST21 and ST23 may be performed in the first chamber, similar to steps ST12 and ST13. For example, steps ST12, ST13, ST21, and ST23 may be performed in situ in the plasma processing chamber 10 of the plasma processing apparatus 1.

[0104] 15 is a flowchart of a substrate processing method (hereinafter referred to as "method MT4") different from method MT3 according to one example embodiment. In method MT4, steps ST14 to ST12 are the same as those in method MT3. In method MT4, steps ST23 to ST26 may be performed after step ST12. Steps ST23 to ST26 may also be performed in this order.

[0105] (Step ST23: Supplying a third process gas to etch the base film UF) In step ST23, a third process gas may be supplied into the first chamber to etch the base film UF. At this time, the base film UF of the substrate W is etched using the first region R1 as a mask.

[0106] (Step ST24: Removing Metal-Containing Resist) Subsequently, in step ST24, the first region R1 is removed to remove the metal-containing resist MF. Step ST24 may include step ST24A. Step ST24A is a step of supplying a second process gas to replace the metal contained in the metal-containing resist MF with silicon, and is the same as step ST13 in method MT3. In step ST24A, a second process gas containing a silicon-containing gas is supplied into the first chamber to replace the metal contained in the metal-containing resist MF with silicon. As a result, a silicon-containing region SF1 is formed from the first region R1.

[0107] In step ST24, after the silicon-containing region SF1 is formed, for example, a fourth process gas may be supplied into the first chamber to remove the silicon-containing region SF1 formed in step ST24A.

[0108] In step ST24, plasma may not be generated from the fourth process gas. In this case, in step ST24, the silicon-containing region SF1 may be removed by chemical dry etching without using plasma. The fourth process gas may include a fluorine-containing gas. The fourth process gas may include a nitrogen-containing gas. Examples of the fluorine-containing gas include hydrogen fluoride gas. Examples of the nitrogen-containing gas include ammonia gas.

[0109] In step ST24, plasma may be generated from the fourth process gas using the plasma processing apparatus 1 of FIG. 2 or 3. In this case, in step ST24, the silicon-containing region SF1 may be removed by reactive ion etching using the plasma. The fourth process gas may contain at least one gas selected from the group consisting of a fluorine-containing gas and an oxygen-containing gas. The fluorine-containing gas may be CF 4 Fluorocarbon gases such as NF 3 It may also be a gas.

[0110] In step ST24, the formation of the silicon-containing region SF1 and the removal of the silicon-containing region SF1 may be performed simultaneously. In this case, a second process gas may be supplied to remove the metal-containing resist MF. For example, the second process gas may be dichlorosilane gas.

[0111] (Step ST25: Supplying a second processing gas to replace the metal contained in the residue with silicon) As shown in FIG. 16, after step ST24, residue RS1 may remain on the base film UF. The residue RS1 may be the first region R1 that remains without being removed in step ST24, or the first region R1 that has not been replaced with silicon in step ST24A. In step ST25, a second processing gas is supplied to replace the metal contained in the residue RS1 with silicon. Step ST25 is the same as step ST24A.

[0112] (Step ST26: Removing Residue) In step ST26, the residue RS1 is removed. In step ST26, for example, a fourth process gas may be supplied into the first chamber to remove the residue RS1 that has been substituted with silicon in step ST25. Alternatively, steps ST25 and ST26 may be performed simultaneously. In this case, a second process gas may be supplied to remove the residue RS1 that has been substituted with silicon. Step ST26 is the same step as the step of removing the silicon-containing region SF1 in step ST24.

[0113] Various experiments conducted to evaluate Methods MT1 to MT4 will be described below, but the experiments described below do not limit the present disclosure.

[0114] (First Experiment) In the first experiment, a substrate was placed on a substrate support in a chamber. The substrate included an undercoat film and an exposed EUV resist on the undercoat film. The EUV resist included tin (Sn).

[0115] Thereafter, dichlorosilane gas was supplied into the chamber without generating plasma (steps ST12 and ST13). The pressure inside the chamber was 665 Pa (5 Torr). The temperature of the substrate support was 100° C. The processing time was 20 minutes. As a result, the EUV resist was developed, and a line pattern was formed.

[0116] (Second Experiment) An experiment was carried out under the same conditions as the first experiment, except that the temperature of the substrate support was 50°C.

[0117] (Results of the First and Second Experiments) The cross sections of the substrates obtained in the first and second experiments were observed using a high-angle annular dark field scanning transmission microscope (HAADF-STEM). Furthermore, the elements contained in the line patterns were analyzed by energy dispersive X-ray spectroscopy (EDX).

[0118] In the second experiment, the EDX results showed that almost no silicon was detected as an element contained in the line pattern, but only tin was detected. On the other hand, in the first experiment, the EDX results showed that almost no tin was detected as an element contained in the line pattern, but only silicon and oxygen were detected. From these results, substitution of tin with silicon was confirmed in the first experiment. In addition, the amount of oxygen detected in the first experiment was visually less than the amount of oxygen detected in the second experiment.

[0119] (Third Experiment) In the third experiment, the treatment time was changed from the first experiment. The treatment times were 60 seconds, 300 seconds, and 1200 seconds. The treatment time of 1200 seconds corresponds to the first experiment.

[0120] (Fourth Experiment) An experiment was carried out under the same conditions as the third experiment, except that the temperature of the substrate support was 200°C.

[0121] (Results of Third and Fourth Experiments) The width (CD) of the line pattern was measured for the substrates obtained in the third and fourth experiments.

[0122] FIG. 17 shows the results of the third and fourth experiments. In the third experiment, it can be seen that the width of the line pattern increases as the processing time increases. In other words, it can be seen that the amount of silicon-containing deposits increases as the processing time increases. In contrast, in the fourth experiment, the change in the width of the line pattern is small even as the processing time increases. It is presumed that the silicon-containing deposits volatilized in the fourth experiment. From the above, it can be seen that a higher temperature of the substrate support part can minimize the change in the width of the line pattern even as the processing time increases. On the other hand, it can be seen that the width of the line pattern can be adjusted depending on the length of the processing time by lowering the temperature of the substrate support part.

[0123] Various exemplary embodiments included in the present disclosure are now described in [E1] to [E19] below.

[0124] [E1] A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an undercoat film and a metal-containing resist on the undercoat film, the metal-containing resist having a first region that is exposed and a second region that is unexposed; (b) supplying a first process gas into the chamber to remove the second region; and (c) supplying a second process gas into the chamber, the second process gas including a silicon-containing gas, to replace a metal contained in the metal-containing resist with silicon.

[0125] [E2] The substrate processing method according to [E1], wherein (b) and (c) are carried out simultaneously.

[0126] [E3] The substrate processing method according to [E1], wherein (c) is carried out after (b).

[0127] [E4] The substrate processing method according to [E1], wherein (c) is performed before (b).

[0128] [E5] The substrate processing method according to any one of [E1] to [E4], wherein the metal-containing resist contains tin as the metal.

[0129] [E6] The substrate processing method according to any one of [E1] to [E5], wherein the silicon-containing gas includes at least one selected from the group consisting of a gas containing silicon and chlorine, a gas containing silicon and bromine, a gas containing silicon and iodine, a gas containing silicon and hydrogen, and an aminosilane gas.

[0130] [E7] The substrate processing method according to [E6], wherein the silicon-containing gas contains dichlorosilane gas.

[0131] [E8] The substrate processing method according to any one of [E1] to [E7], wherein (c) includes a step of depositing a silicon-containing deposit on the first region.

[0132] [E9] The substrate processing method according to any one of [E1] to [E8], wherein in (c), the pressure inside the chamber is 13.3 Pa or more.

[0133] [E10] The substrate processing method according to any one of [E1] to [E9], wherein in (c), the temperature of the substrate support part is 60° C. or higher.

[0134] [E11] The substrate processing method according to any one of [E1] to [E10], wherein in (c), at least one of the pressure in the chamber and the temperature of the substrate support part is changed midway through the process.

[0135] [E12] The substrate processing method according to any one of [E1] to [E11], wherein in (c), plasma is not generated from the second processing gas.

[0136] [E13] The substrate processing method according to any one of [E1] to [E12], wherein the chamber is a first chamber, and further includes, after (b) and (c), (d) a step of unloading the substrate from the first chamber; (e) a step of loading the substrate into a second chamber after (d); and (f) a step of supplying a third process gas into the second chamber to etch the base film after (e).

[0137] [E14] The substrate processing method according to any one of [E1] to [E12], further comprising, after (b) and (c), (f) supplying a third processing gas into the chamber to etch the base film.

[0138] [E15] The substrate processing method according to [E13] or [E14], wherein the silicon-containing region formed from the first region after (b) contains silicon oxide, and the underlayer film is at least one selected from the group consisting of a carbon-containing film, a silicon nitride film, a silicon carbide film, and an amorphous silicon film.

[0139] [E16] A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an underlayer and a metal-containing resist on the underlayer, the metal-containing resist having a first region that is exposed and a second region that is not exposed; (b) supplying a first process gas into the chamber to remove the second region and expose the underlayer; (c) etching the exposed underlayer; (d) removing the metal-containing resist; (e) supplying a second process gas containing a silicon-containing gas into the chamber to replace metal contained in residue generated in (d) with silicon; and (f) removing the residue.

[0140] [E17] The substrate processing method according to [E16], wherein (d) includes a step of supplying a second processing gas containing a silicon-containing gas into the chamber to replace metal contained in the metal-containing resist with silicon.

[0141] [E18] A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an undercoat film and a metal-containing resist on the undercoat film, the metal-containing resist having a first region that is exposed and a second region that is unexposed; (b) supplying a first process gas into the chamber to remove the second region; and (c) supplying a second process gas including a silicon-containing gas to expose the metal-containing resist to the second process gas.

[0142] [E19] A substrate processing apparatus comprising: a chamber; a substrate support part for supporting a substrate in the chamber, the substrate comprising an underlayer and a metal-containing resist on the underlayer, the metal-containing resist having a first region that is exposed and a second region that is not exposed; a gas supply part configured to supply a first process gas containing a silicon-containing gas and a second process gas into the chamber; and a control part configured to: supply the first process gas into the chamber to remove the second region; and supply the second process gas into the chamber to replace a metal contained in the metal-containing resist with silicon, and control the gas supply part.

[0143] 1,100...substrate processing apparatus, 10,102...chamber (plasma processing chamber, processing chamber), 11,121...substrate support part, 2,200...control part, 20,170...gas supply part, UF...undercoat film, MF...metal-containing resist, R1...first region, R2...second region, MT1, MT2, MT3, MT4...method (substrate processing method), W...substrate.

Claims

1. A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an undercoat and a metal-containing resist on the undercoat, the metal-containing resist having a first region that is exposed and a second region that is unexposed; (b) supplying a first process gas into the chamber to remove the second region; and (c) supplying a second process gas into the chamber, the second process gas comprising a silicon-containing gas, to replace metal contained in the metal-containing resist with silicon.

2. The substrate processing method according to claim 1, wherein steps (b) and (c) are carried out simultaneously.

3. The substrate processing method according to claim 1, wherein (c) is performed after (b).

4. The substrate processing method of claim 1, wherein (c) is performed before (b).

5. The substrate processing method according to any one of claims 1 to 4, wherein the metal-containing resist contains tin as the metal.

6. The substrate processing method according to any one of claims 1 to 4, wherein the silicon-containing gas includes at least one selected from the group consisting of a gas containing silicon and chlorine, a gas containing silicon and bromine, a gas containing silicon and iodine, a gas containing silicon and hydrogen, and an aminosilane gas.

7. The substrate processing method according to claim 6, wherein the silicon-containing gas includes dichlorosilane gas.

8. The substrate processing method according to any one of claims 1 to 4, wherein (c) comprises depositing a silicon-containing deposit on the first region.

9. The substrate processing method according to any one of claims 1 to 4, wherein in (c), the pressure inside the chamber is 13.3 Pa or more.

10. The substrate processing method according to any one of claims 1 to 4, wherein in (c), the temperature of the substrate support part is 60°C or higher.

11. The substrate processing method according to any one of claims 1 to 4, wherein in (c), at least one of the pressure in the chamber and the temperature of the substrate support part is changed during the process.

12. The substrate processing method according to any one of claims 1 to 4, wherein in (c), plasma is not generated from the second processing gas.

13. The substrate processing method according to any one of claims 1 to 4, wherein the chamber is a first chamber, and further comprising, after steps (b) and (c), (d) unloading the substrate from the first chamber; (e) after step (d), loading the substrate into a second chamber; and (f) after step (e), supplying a third processing gas into the second chamber to etch the base film.

14. The substrate processing method according to any one of claims 1 to 4, further comprising, after steps (b) and (c), the step of: (f) supplying a third processing gas into the chamber to etch the base film.

15. The substrate processing method of claim 13, wherein the silicon-containing region formed from the first region after (c) contains silicon oxide, and the underlayer film is at least one selected from the group consisting of a carbon-containing film, a silicon nitride film, a silicon carbide film, and an amorphous silicon film.

16. A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an underlayer and a metal-containing resist on the underlayer, the metal-containing resist having a first exposed region and a second unexposed region; (b) supplying a first process gas into the chamber to remove the second region and expose the underlayer; (c) etching the exposed underlayer; (d) removing the metal-containing resist; (e) supplying a second process gas including a silicon-containing gas into the chamber to replace metal contained in residue generated in (d) with silicon; and (f) removing the residue.

17. The substrate processing method according to claim 16, wherein (d) includes a step of supplying a second process gas containing a silicon-containing gas into the chamber to replace metal contained in the metal-containing resist with silicon.

18. A substrate processing method comprising: (a) providing a substrate on a substrate support in a chamber, the substrate comprising an undercoat and a metal-containing resist on the undercoat, the metal-containing resist having a first region that is exposed and a second region that is unexposed; (b) supplying a first process gas into the chamber to remove the second region; and (c) supplying a second process gas comprising a silicon-containing gas to expose the metal-containing resist to the second process gas.

19. A substrate processing apparatus comprising: a chamber; a substrate support unit for supporting a substrate in the chamber, the substrate comprising an underlayer and a metal-containing resist on the underlayer, the metal-containing resist having a first region that is exposed and a second region that is not exposed; a gas supply unit configured to supply a first process gas containing a silicon-containing gas and a second process gas into the chamber; and a control unit, wherein the control unit is configured to control the gas supply unit to supply the first process gas into the chamber to remove the second region, and to supply the second process gas into the chamber to replace the metal contained in the metal-containing resist with silicon.

Citation Information

Patent Citations

  • Method for forming an EUV patternable hard mask

    JP2021523403A

  • Plasma processing method and plasma processing system

    JP2024006972A

  • Etching method

    WO2014156681A1